CN113434285B - Memory management method and device based on key value cache system - Google Patents
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Abstract
The application discloses a memory management method and device based on a key value cache system. And for the memory pages which cannot be eliminated, the memory pages to be processed are added again, so that all the memory pages can be eliminated and recovered regularly.
Description
Technical Field
The present disclosure relates to Cache technology, and more particularly, to a memory management method and apparatus based on Key-Value Cache (Key-Value Cache) system.
Background
Currently, the mainstream Key-Value Cache (Key-Value Cache) system has Memcached and Redis. Both Memcached and Redis have limitations in memory management, mainly in terms of both data elimination and defragmentation.
Memcached adopts a sleb memory management mode, memory pages are divided into memory blocks with different sizes, and data with different sizes are distributed into the memory blocks with corresponding sizes, so that memory fragmentation is more convenient to integrate, but a sleb-based elimination strategy ignores data equalization among slebs, and fairness of the elimination strategy is affected. The slot is a policy for dividing and managing a memory with a fixed size.
Redis does not implement an individual memory management policy, but rather memory management is implemented through an external memory management policy such as encapsulation jemalloc, tcmalloc. The external memory management strategy can only perform general memory management and cannot be adaptively optimized. Therefore, the Redis cannot realize better memory defragmentation when ensuring fairness of the elimination strategy, so that the memory utilization rate is low. Among them, jemalloc, tcmalloc is a widely used external memory management policy.
Disclosure of Invention
The memory management method and device based on the key value cache system can achieve high-quality memory defragmentation and guarantee fairness of elimination strategies.
The embodiment of the invention provides a memory management method based on a key value cache system, which comprises the following steps:
determining whether to eliminate the memory pages to be eliminated according to the access states of key value pairs in the memory pages to be eliminated;
if the memory pages to be eliminated are determined to be eliminated, releasing the memory pages to be eliminated; and if the memory pages to be eliminated are determined not to be eliminated, adding the memory pages to be eliminated into the memory pages to be processed.
In an exemplary embodiment, the determining whether to retire the memory page to be retired includes:
selecting the memory pages to be eliminated from the memory pages to be processed according to an elimination strategy;
if all the data units stored in the memory pages to be eliminated can be eliminated according to the access states of the key value pairs, the memory pages to be eliminated are eliminated; and if the data units which cannot be eliminated exist in the data units stored in the memory pages to be eliminated are determined according to the access states of the key value pairs, determining that the memory pages to be eliminated are not eliminated.
In one illustrative example, the elimination strategy includes: first-in first-out FIFO policy, or least frequently LFU policy, or least recently LRU policy.
In an exemplary embodiment, the method further comprises: and setting an identifier for the memory page to be eliminated so as to be expressed as an eliminated page.
In an exemplary embodiment, the releasing the memory page to be eliminated includes:
adding all data units in the memory page to be eliminated into an elimination queue, and releasing all data units added into the elimination queue; and releasing the memory pages to be eliminated.
In an exemplary embodiment, the method further comprises:
and managing the memory pages to be processed by using the FIFO strategy.
In an exemplary embodiment, adding the memory page to be eliminated to the memory page to be processed includes: and adding the memory pages to be eliminated into the FIFO queue.
In an exemplary embodiment, after determining to discard the memory page to be discarded, before releasing the memory page to be discarded, the method further includes:
calculating release space information according to the access frequency of the memory pages to be eliminated and the access frequency of the memory pages with the minimum access frequency in the LFU heat collecting pool;
according to the calculated release space information, releasing the space of the memory page with the minimum access frequency in the LFU heat collecting pool;
wherein the priority of the LFU heat accumulation pool is higher than that of the FIFO queue.
In one illustrative example, the calculating the release space information includes:
calculating the ratio of the access frequency of the memory pages to be eliminated to the access frequency of the memory page with the minimum access frequency in the LFU heat collecting pool; and calculating the product of the ratio and a preset weight to obtain a release space ratio value beta serving as the release space information.
In an exemplary embodiment, the preset weight is determined according to practical situations, and the preset weight is a value between 0 and 1.
The present application also provides a computer-readable storage medium storing computer-executable instructions for performing any one of the memory management methods described above.
The application further provides a device for realizing memory management, which comprises a memory and a processor, wherein the memory stores the following instructions executable by the processor: the method for performing any one of the above memory management methods.
The application further provides a memory management device, which comprises: a determining module and a first processing module; wherein,
the determining module is used for determining whether to eliminate the memory pages to be eliminated according to the access states of the key value pairs in the memory pages to be eliminated;
the first processing module is used for releasing the memory pages to be eliminated if determining to eliminate the memory pages to be eliminated; and if the memory pages to be eliminated are determined not to be eliminated, adding the memory pages to be eliminated into the memory pages to be processed.
In an exemplary embodiment, the determining module is specifically configured to:
selecting the memory pages to be eliminated from the memory pages to be processed according to an elimination strategy; if all the data units stored in the memory pages to be eliminated can be eliminated according to the access states of the key value pairs, the memory pages to be eliminated are eliminated; and if the data units which cannot be eliminated exist in the data units stored in the memory pages to be eliminated are determined according to the access states of the key value pairs, determining that the memory pages to be eliminated are not eliminated.
In an exemplary embodiment, the releasing the memory page in the first processing module includes:
adding all data units in the memory page to be eliminated into an elimination queue, and releasing all data units added into the elimination queue; and releasing the memory pages to be eliminated.
In an exemplary example, the first processing module is further to: managing the memory pages to be processed by using the FIFO strategy; in response to this, the control unit,
the memory pages to be processed are included in the FIFO queue, and the memory pages to be eliminated are added into the memory pages to be processed as follows: and adding the memory pages to be eliminated into the memory pages to be processed, and adding the memory pages to be eliminated into the FIFO queue.
In an exemplary embodiment, the apparatus further includes a second processing module configured to:
calculating a release space according to the access frequency of the memory pages to be eliminated and the access frequency of the memory pages with the minimum access frequency in the LFU heat collection pool; according to the calculated release space, releasing the space of the memory page with the minimum access frequency in the LFU heat collecting pool; then executing the release of the memory pages to be eliminated;
wherein the priority of the LFU heat accumulation pool is higher than that of the FIFO queue.
The method and the device are based on the elimination strategy of the memory pages, so that the eliminated memory pages are changed from the state of being subjected to slab division (namely, the memory block division is performed) to the state of not being subjected to slab division, and therefore the memory pages which are changed to the state of not being subjected to slab division can be divided according to the sizes of other slabs, and the fairness of the elimination strategy on all slabs is ensured. For the memory pages which cannot be eliminated, the memory pages to be processed are re-added, namely, the cyclic elimination processing process is re-entered, so that all the memory pages can be eliminated and recovered regularly.
Furthermore, the embodiment of the application ensures that all memory pages can be eliminated and recycled regularly through the FIFO strategy, so that the elimination processing of the expired data and the memory fragments is flexibly obtained in the process of circularly eliminating the memory pages without additionally adding a memory management mechanism.
Further, through the processing of the LFU heat collecting pool, after the memory page to be eliminated is released later, if hot data exists, the hot data is written into the released space in the LFU heat collecting pool, so that the aggregation of the hot data is realized, and the elimination probability of the hot data is reduced.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the technical aspects of the present application, and are incorporated in and constitute a part of this specification, illustrate the technical aspects of the present application and together with the examples of the present application, and not constitute a limitation of the technical aspects of the present application.
FIG. 1 is a flow chart of a memory management method based on a key value cache system according to the present application;
FIG. 2 is a schematic diagram of an application scenario embodiment of a memory management method based on a key-value cache system according to the present application;
fig. 3 is a schematic diagram of the composition structure of a memory management device based on a key-value cache system in the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in detail hereinafter with reference to the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be arbitrarily combined with each other.
In one typical configuration of the present application, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media.
Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer readable media, as defined herein, does not include non-transitory computer readable media (transmission media), such as modulated data signals and carrier waves.
The steps illustrated in the flowchart of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, while a logical order is depicted in the flowchart, in some cases, the steps depicted or described may be performed in a different order than presented herein.
Fig. 1 is a flow chart of a memory management method based on a key value cache system according to the present application, as shown in fig. 1, including:
step 100: and determining whether to eliminate the memory page to be eliminated according to the access state of the key value pair in the memory page to be eliminated.
In one illustrative example, the present step may include:
selecting a memory page to be eliminated from the memory pages to be processed according to an elimination strategy;
if all data units (items) stored in the memory page to be eliminated can be eliminated according to the access state of the key value pair, the memory page to be eliminated is eliminated; if it is determined that the non-obsolete item exists in the items stored in the memory page to be obsolete according to the access state of the key value pair, for example: thread pre-allocated item, item being written, etc., then it is determined not to retire the memory page to be retired.
In one illustrative example, it may be determined whether an item is in a thread pre-allocation state or in a writing state based on the access state of a key-value pair.
In one illustrative example, the memory page to be processed may be a memory page that has been memory block partitioned.
In one illustrative example, the elimination strategy in step 100 may include, but is not limited to, such as: first-in first-out (FIFO, first in First out) strategy. The elimination strategy may also include, for example: least frequently used (LFU, least Frequently Used) policies, least recently used (LRU, least Recently Used) policies, and the like. Taking the elimination strategy as the FIFO strategy as an example, the memory pages to be eliminated are the memory pages which are allocated first from the memory pages to be processed.
In an illustrative example, step 100 may further comprise:
the memory page to be eliminated is set as an elimination page, such as a set identifier, so that the writing operation of the memory page is not performed any more, and the condition that new writing data is eliminated immediately is avoided.
Step 101: if the memory page to be eliminated is determined to be eliminated, releasing the memory page to be eliminated; and if the memory page to be eliminated is determined not to be eliminated, adding the memory page to be eliminated into the memory page to be processed.
In an exemplary embodiment, the step of releasing the memory page to be eliminated includes:
and adding all the items in the memory page to be eliminated into an elimination queue, releasing all the items added into the elimination queue, and then releasing the memory page to be eliminated.
According to the method and the device, based on the elimination strategy of the memory pages, the eliminated memory pages are changed from the state of being subjected to slab division (namely, the memory block division is performed) to the state of not being subjected to slab division, so that the memory pages with the state of not being subjected to slab division can be divided according to the sizes of other slabs, and the fairness of the elimination strategy on all slabs is ensured. For the memory pages which cannot be eliminated, the memory pages to be processed are re-added, namely, the cyclic elimination processing process is re-entered, so that all the memory pages can be eliminated and recovered regularly.
In one illustrative example, the present application may further include:
and managing the memory pages to be processed by using the FIFO strategy.
In one illustrative example, the present application may further include:
the memory pages to be processed in step 100 are included in the FIFO queue, and the re-adding the non-obsolete memory pages to the memory pages to be processed in step 101 includes: and adding the memory pages which cannot be eliminated into the FIFO queue to wait for the subsequent cycle elimination processing.
According to the embodiment of the invention, through the FIFO strategy, all memory pages can be eliminated and recycled regularly, so that the elimination processing of the expired data and the memory fragments is flexibly obtained in the cyclic elimination process of the memory pages, and an additional memory management mechanism is not required to be added.
In an exemplary embodiment, after determining to discard the memory page to be discarded and before releasing the memory page to be discarded, the method may further include:
according to the access frequency of the memory pages to be eliminated and the access frequency of the memory pages with the minimum access frequency in the LFU heat collection pool, calculating release space information;
and releasing the space of the memory page with the minimum access frequency in the LFU heat collecting pool according to the calculated release space information.
The priority of the LFU heat collecting pool is higher than that of the FIFO queue, namely, as long as the LFU heat collecting pool has space, data is written into the LFU heat collecting pool, so that the access frequency of memory pages in the LFU heat collecting pool is far higher than that of memory pages in a FIFO record chain when the stable state is reached over time, and the heat data is ensured to be collected in the LFU heat collecting pool; and the memory pages in the LFU hot pool and the memory pages in the FIFO record chain are managed separately, that is, the memory pages in the LFU hot pool are not recorded in the FIFO record chain and do not participate in the elimination process shown in step 100 and step 101.
In one illustrative example, calculating the release space information may include:
calculating the ratio of the access frequency of the memory pages to be eliminated to the access frequency of the memory page with the minimum access frequency in the LFU heat collecting pool; and calculating the product of the ratio and a preset weight to obtain a release space ratio value beta.
In an exemplary embodiment, the preset weight may be determined according to practical situations, where the preset weight is a value between 0 and 1.
In one embodiment of the present application, the LFU pool characterizes the access frequency of memory pages by recording the allocation order of the memory pages through FIFO queues (also called FIFO record chains). Through the processing of the LFU heat collecting pool, after the memory pages to be eliminated are released later, if hot data exist, the hot data are written into the released space in the LFU heat collecting pool, so that the heat data are aggregated, and the probability of eliminating the hot data is reduced.
The present application also provides a computer-readable storage medium storing computer-executable instructions for performing the memory management method of any one of the above.
The application further provides a device for implementing memory management, including a memory and a processor, where the memory stores the following instructions executable by the processor: a step for performing the memory management method of any of the above.
Fig. 2 is a schematic diagram of an application scenario embodiment of a memory management method based on a key value cache system in the present application, as shown in fig. 2, memory pages in an LFU hot pool and memory pages in a FIFO record chain are managed separately, that is, the memory pages in the LFU hot pool are not recorded in a FIFO queue, the FIFO queue (also referred to as FIFO record chain) records an allocation sequence of the memory pages, and the LFU hot pool characterizes an access frequency of the memory pages. The LFU heat sink has a higher priority than the FIFO queue.
As shown in fig. 2, when the elimination process is triggered, such as: when the remaining free memory space is less than 5% of the total memory space, firstly, selecting the memory page which is allocated first from the FIFO queue as the memory page to be eliminated according to the FIFO strategy, and setting an identification for the memory page to be eliminated to indicate that the memory page is the eliminated page, so that the writing operation of the memory page is not performed any more, and the condition that newly written data is eliminated immediately is avoided.
Then, successively trying to eliminate the item in the eliminated page: if all the items stored in the obsolete pages can be obsolete according to the access state of the key value pairs, determining to obsolete the obsolete pages; if it is determined that there are non-obsolete items in the items stored in the obsolete page according to the access state of the key value pair, for example: the access status of the key-value pair is displayed as a pre-assigned item for the thread, an item being written, etc., then it is determined that the obsolete page is not obsolete.
Then, if the obsolete page is determined not to be obsolete, putting the obsolete page into the FIFO queue again, and waiting for the subsequent obsolete process;
if the obsolete pages are determined to be obsolete, calculating a release space according to the access frequency of the obsolete pages and the access frequency of the memory pages with the minimum access frequency in the LFU heat collecting pool; according to the calculated release space, releasing the corresponding space of the memory page with the minimum access frequency in the LFU heat collecting pool; and then releasing the memory pages to be eliminated. Therefore, after the obsolete pages are released, if hot data exists, the hot data can be written into the released space in the LFU heat collecting pool, so that the aggregation of the hot data is realized, and the probability of obsolete hot data is reduced.
Fig. 3 is a schematic structural diagram of a memory management device based on a key-value cache system according to the present application, and as shown in fig. 3, at least includes: a determining module and a first processing module; wherein,
the determining module is used for determining whether to eliminate the memory page to be eliminated according to the access state of the key value pair in the memory page to be eliminated;
the first processing module is used for releasing the memory pages to be eliminated if the memory pages to be eliminated are determined to be eliminated; and if the memory page to be eliminated is determined not to be eliminated, adding the memory page to be eliminated into the memory page to be processed.
In one illustrative example, the determination module is specifically configured to:
selecting a memory page to be eliminated from the memory pages to be processed according to an elimination strategy; if all the items stored in the memory pages to be eliminated can be eliminated according to the access states of the key value pairs, the memory pages to be eliminated are eliminated; if it is determined that there are non-obsolete items in the items stored in the memory page to be obsolete according to the access state of the key value pair, for example: the access state of the key value pair indicates the item pre-allocated by the thread, the item being written, etc., and then it is determined that the memory page to be eliminated is not eliminated.
In an exemplary embodiment, the releasing the memory page in the first processing module includes:
and adding all the items in the memory page to be eliminated into an elimination queue, releasing all the items added into the elimination queue, and then releasing the memory page to be eliminated.
According to the method and the device, based on the elimination strategy of the memory pages, the eliminated memory pages are changed from the state of being subjected to slab division (namely, the memory block division is performed) to the state of not being subjected to slab division, so that the memory pages with the state of not being subjected to slab division can be divided according to the sizes of other slabs, and the fairness of the elimination strategy on all slabs is ensured. For the memory pages which cannot be eliminated, the memory pages to be processed are re-added, namely, the cyclic elimination processing process is re-entered, so that all the memory pages can be eliminated and recovered regularly.
In one illustrative example, the first processing module is further to: managing the memory pages to be processed by using the FIFO strategy; accordingly, the memory pages to be processed are included in the FIFO queue, and the memory pages that are not eliminated are added to the memory pages to be processed again, that is, the memory pages that are not eliminated are added to the FIFO queue to wait for the subsequent round robin elimination processing.
According to the embodiment of the invention, through the FIFO strategy, all memory pages can be eliminated and recycled regularly, so that the elimination processing of the expired data and the memory fragments is flexibly obtained in the cyclic elimination process of the memory pages, and an additional memory management mechanism is not required to be added.
In an exemplary embodiment, the memory management device further includes a second processing module, configured to:
calculating a release space according to the access frequency of the memory pages to be eliminated and the access frequency of the memory pages with the minimum access frequency in the LFU heat collection pool; according to the calculated release space, releasing the space of the memory page with the minimum access frequency in the LFU heat collecting pool; and then releasing the memory pages to be eliminated.
The priority of the LFU heat collecting pool is higher than that of the FIFO queue, namely, as long as the LFU heat collecting pool has space, data is written into the LFU heat collecting pool, so that the access frequency of memory pages in the LFU heat collecting pool is far higher than that of memory pages in a FIFO record chain when the stable state is reached over time, and the heat data is ensured to be collected in the LFU heat collecting pool; and the memory pages in the LFU hot pool and the memory pages in the FIFO record chain are managed separately, that is, the memory pages in the LFU hot pool are not recorded in the FIFO record chain and do not participate in the elimination process shown in step 100 and step 101.
In one embodiment of the present application, the LFU pool characterizes the access frequency of memory pages by recording the allocation order of the memory pages through FIFO queues (also called FIFO record chains). Through the processing of the LFU heat collecting pool, after the memory pages to be eliminated are released later, if hot data exist, the hot data are written into the released space in the LFU heat collecting pool, so that the heat data are aggregated, and the probability of eliminating the hot data is reduced.
Although the embodiments disclosed in the present application are described above, the embodiments are only used for facilitating understanding of the present application, and are not intended to limit the present application. Any person skilled in the art to which this application pertains will be able to make any modifications and variations in form and detail of implementation without departing from the spirit and scope of the disclosure, but the scope of the application is still subject to the scope of the claims appended hereto.
Claims (13)
1. A memory management method based on a key value cache system comprises the following steps:
determining whether to eliminate the memory pages to be eliminated according to the access states of key value pairs in the memory pages to be eliminated;
if the memory pages to be eliminated are determined to be eliminated, releasing the memory pages to be eliminated; if the memory pages to be eliminated are determined not to be eliminated, adding the memory pages to be eliminated into the memory pages to be processed;
the adding the memory page to be eliminated into the memory page to be processed includes: adding the memory pages to be eliminated into an FIFO queue;
after determining to eliminate the memory pages to be eliminated, before releasing the memory pages to be eliminated, the method further comprises: calculating the ratio of the access frequency of the memory pages to be eliminated to the access frequency of the memory page with the minimum access frequency in the LFU heat collecting pool; calculating the product of the ratio and a preset weight to obtain a release space ratio value beta serving as release space information; according to the calculated release space information, releasing the space of the memory page with the minimum access frequency in the LFU heat collecting pool; wherein the priority of the LFU heat accumulation pool is higher than that of the FIFO queue.
2. The memory management method of claim 1, wherein the determining whether to retire the memory page to be retired comprises:
selecting the memory pages to be eliminated from the memory pages to be processed according to an elimination strategy;
if all the data units stored in the memory pages to be eliminated can be eliminated according to the access states of the key value pairs, the memory pages to be eliminated are eliminated; and if the data units which cannot be eliminated exist in the data units stored in the memory pages to be eliminated are determined according to the access states of the key value pairs, determining that the memory pages to be eliminated are not eliminated.
3. The memory management method of claim 2, wherein the elimination policy comprises: first-in first-out FIFO policy, or least frequently LFU policy, or least recently LRU policy.
4. The memory management method of claim 2, the method further comprising: and setting an identifier for the memory page to be eliminated so as to be expressed as an eliminated page.
5. The memory management method according to claim 1, wherein the releasing the memory page to be eliminated includes:
adding all data units in the memory page to be eliminated into an elimination queue, and releasing all data units added into the elimination queue; and releasing the memory pages to be eliminated.
6. The memory management method of claim 2, the method further comprising:
and managing the memory pages to be processed by using the FIFO strategy.
7. The memory management method according to claim 1, wherein the preset weight is determined according to an actual situation, and the preset weight is a value between 0 and 1.
8. A computer readable storage medium storing computer executable instructions for performing the memory management method of any one of claims 1 to 7.
9. An apparatus for implementing memory management, comprising a memory and a processor, wherein the memory has stored therein instructions executable by the processor to: steps for performing the memory management method of any one of claims 1 to 7.
10. A memory management device, comprising: a determining module and a first processing module; wherein,
the determining module is used for determining whether to eliminate the memory pages to be eliminated according to the access states of the key value pairs in the memory pages to be eliminated;
the first processing module is used for releasing the memory pages to be eliminated if determining to eliminate the memory pages to be eliminated; if the memory pages to be eliminated are determined not to be eliminated, adding the memory pages to be eliminated into the memory pages to be processed;
the adding the memory page to be eliminated into the memory page to be processed includes: adding the memory pages to be eliminated into an FIFO queue;
after determining to eliminate the memory pages to be eliminated, before releasing the memory pages to be eliminated, the method further comprises: calculating the ratio of the access frequency of the memory pages to be eliminated to the access frequency of the memory page with the minimum access frequency in the LFU heat collecting pool; calculating the product of the ratio and a preset weight to obtain a release space ratio value beta serving as release space information; according to the calculated release space information, releasing the space of the memory page with the minimum access frequency in the LFU heat collecting pool; wherein the priority of the LFU heat accumulation pool is higher than that of the FIFO queue.
11. The memory management device of claim 10, wherein the determining module is specifically configured to:
selecting the memory pages to be eliminated from the memory pages to be processed according to an elimination strategy; if all the data units stored in the memory pages to be eliminated can be eliminated according to the access states of the key value pairs, the memory pages to be eliminated are eliminated; and if the data units which cannot be eliminated exist in the data units stored in the memory pages to be eliminated are determined according to the access states of the key value pairs, determining that the memory pages to be eliminated are not eliminated.
12. The memory management device of claim 10, wherein releasing the memory page in the first processing module comprises:
adding all data units in the memory page to be eliminated into an elimination queue, and releasing all data units added into the elimination queue; and releasing the memory pages to be eliminated.
13. The memory management device of claim 12, the first processing module further to: and managing the memory pages to be processed by using the FIFO strategy.
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