CN113433745A - Display panel and spliced display screen - Google Patents
Display panel and spliced display screen Download PDFInfo
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- CN113433745A CN113433745A CN202110633651.4A CN202110633651A CN113433745A CN 113433745 A CN113433745 A CN 113433745A CN 202110633651 A CN202110633651 A CN 202110633651A CN 113433745 A CN113433745 A CN 113433745A
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 64
- 239000002184 metal Substances 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 abstract description 21
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 239000000463 material Substances 0.000 abstract description 6
- 239000010408 film Substances 0.000 description 29
- 239000010409 thin film Substances 0.000 description 12
- 239000011521 glass Substances 0.000 description 11
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- 238000000137 annealing Methods 0.000 description 8
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- 238000012546 transfer Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000001755 magnetron sputter deposition Methods 0.000 description 3
- 150000003384 small molecules Chemical class 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- VDZOOKBUILJEDG-UHFFFAOYSA-M tetrabutylammonium hydroxide Chemical compound [OH-].CCCC[N+](CCCC)(CCCC)CCCC VDZOOKBUILJEDG-UHFFFAOYSA-M 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
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- 239000010949 copper Substances 0.000 description 1
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/35—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- General Physics & Mathematics (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Nonlinear Science (AREA)
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Abstract
The embodiment of the invention discloses a display panel and a spliced display screen, wherein the display panel comprises a substrate, a first signal wire and a second signal wire, the first signal wire and the second signal wire are positioned on the first side of the substrate, the substrate comprises a plurality of first through holes positioned in a display area, the first through holes at least penetrate through the substrate, the second signal wire comprises stacked metal routing wires and bridging wires, the metal routing wires are arranged on the second side, opposite to the first side, of the substrate, the bridging wires fill the first through holes, and the bridging wires are electrically connected with the first signal wire and the metal routing wires. The first through hole is formed in the substrate, so that the bridging material capable of forming the film in the deep hole is formed in the first through hole and used as a bridging line to bridge the first signal line and the metal wiring, the double-sided wiring process of the display panel is realized, the area of a frame is reduced, in addition, the deep hole film forming process of the double-sided process of the display panel can be realized by utilizing the existing production line equipment, and the production efficiency is high.
Description
Technical Field
The invention relates to the technical field of display, in particular to a spliced display screen.
Background
With the continuous development of the tiled display technology, the large-sized tiled display screen is favored by more and more consumers. The glass substrate is low in cost and widely applied to the display industry. Conventional glass-based display products are typically single-sided multi-film processes, including an in-plane display region and a peripheral region. The peripheral area is used for arranging peripheral wiring and is connected with the signal lines in the display area so as to realize signal input and output of the panel. However, the presence of the peripheral area can make the seam of the tiled display screen too large.
At present, the glass substrate can be precisely punched by using technologies such as laser and the like, so that a double-sided process is developed, and seamless splicing of glass-based display products is realized. However, the traditional metal magnetron sputtering takes a long time, and the film layer has poor adhesion, so that the deep hole film forming is difficult to correspond to (the thickness of the glass substrate is generally 0.5-0.7 mm).
In summary, the conventional metal magnetron sputtering cannot cause metal to form a film in the deep hole of the glass substrate, so that the metal trace designed on the back surface of the display panel cannot be connected with the signal line of the display area on the front surface of the display panel through the deep hole.
Disclosure of Invention
The embodiment of the invention provides a display panel and a spliced display screen, and aims to solve the technical problem that in the existing display panel, metal wiring cannot be directly connected with a signal line of a display area on the front side of the display panel through a through hole of a substrate, so that the frame of the display panel is too wide, and further the spliced display screen formed by the display panel is influenced, and the spliced seam is obvious.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
an embodiment of the present invention provides a display panel, including a display area, where the display panel includes:
the substrate comprises a plurality of first through holes positioned in the display area, and the first through holes at least penetrate through the substrate;
the first signal line is arranged on the first side of the substrate and is positioned in the display area;
the second signal line comprises a stacked metal routing line and a bridging line; wherein,
the metal routing is arranged on a second side of the substrate opposite to the first side, the bridging line fills the first through hole, and the bridging line is electrically connected with the first signal line and the metal routing.
In some embodiments of the present invention, the first signal line includes at least one of a scan line and a data line, and the bridge line is an ITO (indium tin oxide) bridge line.
In some embodiments of the present invention, the display panel further comprises:
the grid electrode is arranged on the first side of the substrate, and the scanning line and the grid electrode are arranged on the same layer;
the first insulating layer is arranged on one side, away from the substrate, of the grid electrode;
the active layer is arranged on one side, away from the substrate, of the first insulating layer; and
and the source drain layer is arranged on one side of the active layer, which is deviated from the substrate, and the data line and the source drain layer are arranged on the same layer.
In some embodiments of the present invention, the first via penetrates the substrate.
In some embodiments of the present invention, the first via sequentially penetrates through the active layer, the first insulating layer and the substrate, and the ITO bridging line electrically connects the data line and the metal trace.
In some embodiments of the present invention, the ITO bridging line is disposed on a side of the metal trace away from the substrate, and the first through hole further penetrates through the metal trace.
In some embodiments of the present invention, an orthographic projection of the first via on the substrate is located within an orthographic projection of the ITO bridge line on the substrate.
In some embodiments of the present invention, the length of the metal trace is greater than the length of the ITO bridge line.
In some embodiments of the present invention, the second side of the substrate is further provided with a gate driver and a source driver, and the metal trace is electrically connected to the gate driver or the source driver.
In some embodiments of the present invention, at least two tiled display panels are included, and the display panels in the above embodiments are the display panels.
The invention has the beneficial effects that: the invention provides a display panel and a spliced display screen, which comprise a substrate, a first signal wire and a metal wire, wherein the first signal wire and the metal wire are positioned on two sides of the substrate; in addition, the deep hole film forming process of the double-sided process of the display panel can be realized by using the existing production line equipment, and the production efficiency is high.
Drawings
Fig. 1 is a schematic structural diagram of a tiled display screen according to an embodiment of the present invention;
fig. 2 is a schematic plan view of a display panel according to an embodiment of the invention;
FIG. 3 is another schematic plan view of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic structural view of section A-A in FIG. 3;
FIG. 5 is a schematic structural view of the section B-B in FIG. 3;
fig. 6A to 6E are schematic structural diagrams of a manufacturing process of a display panel according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
Referring to fig. 1, an embodiment of the invention provides a tiled display screen 1000, which includes at least two tiled display panels 100, where the display panel 100 includes a display area AA and a frame area NA disposed around the display area AA.
In the prior art, the frame area NA is used to arrange peripheral wires and a driving circuit, and the peripheral wires connect signal lines in the display area NA to the driving circuit, so that signals sent by the driving circuit are transmitted to the signal lines in the display area NA to drive pixels in the display area AA to emit light.
Due to the existence of the frame area NA, the splicing seam of the spliced display screen 1000 at the splicing position of the display panel 100 is too large, and the display effect is affected. Therefore, the present invention improves the structure of the display panel 100, moves the peripheral traces in the frame area NA into the display area NA, designs the peripheral traces on the back surface of the display panel 100, and connects the signal traces in the front display area NA and the peripheral traces on the back surface by punching the substrate and using the bridging material capable of forming a film in the deep hole as the bridging lines.
Specifically, referring to fig. 2 to 5, the display panel 100 includes a substrate 10, a first signal line 90, and a second signal line 20, where the second signal line 20 includes stacked metal traces 21 and bridging lines, the bridging lines are ITO bridging lines 22, an ITO material may be formed into a film in a deep hole through a solution process, and the bridging lines may also be other conductive materials capable of forming a film in a deep hole.
The substrate 10 includes a first side and a second side opposite to each other, the first signal line 90 is at least located in the display area AA, the metal trace 21 of the second signal line 20 is located on the second side of the substrate 10, the first side is a light exit side of the display panel 100, and the second side is a backlight side of the display panel.
Referring to fig. 3 to fig. 5, the substrate 10 includes a plurality of first through holes 101 located in the display area AA, and the first through holes 101 at least penetrate through the substrate 10. The ITO bridging line 22 fills the first through hole 101, the ITO bridging line 22 is electrically connected to the first signal line 90 and the metal wire 21, so that peripheral wires in the prior art are moved to the back of the display panel 100, the occupied area of a frame is reduced, the seam width of the spliced display screen 1000 is reduced, and the display quality of the spliced display screen 1000 is improved.
The substrate 10 includes but is not limited to a glass substrate, the thickness of a general glass substrate is 0.5-0.7mm, and because the traditional metal magnetron sputtering consumes a long time and has poor film adhesion, metal is difficult to form a film in corresponding deep and small holes (the hole depth is greater than 0.25 mm, and the hole width is less than 100 microns), so that the metal film cannot penetrate through the substrate 10 such as the glass substrate to realize up-and-down connection and conduction. The second signal line provided by the embodiment of the invention comprises an ITO bridge line, the ITO bridge line is prepared by a solution process, and the first through hole 101 is filled with the formed ITO film layer due to the leveling property of the ITO solution, so that the second signal line 20 is communicated with the first signal line 90.
Referring to fig. 2, the first signal line 90 includes, but is not limited to, at least one of a scan line 91 and a data line 92 of the display panel 100. It can be understood that the first through holes 101 are opened at any position of the display panel 100 where a hole needs to be opened, the first through holes 101 may be distributed in an array or in a scattered manner, and the depths of the first through holes 101 at different positions may be different.
In an embodiment of the present invention, the first through hole 101 may be a circular through hole or a tapered through hole.
Referring to fig. 1 and 5, a plurality of scan lines 91 and a plurality of data lines 92 are interlaced with each other to define a plurality of sub-pixel regions, each sub-pixel region corresponds to one sub-pixel (e.g., R sub-pixel, G sub-pixel, B sub-pixel) and at least one thin film transistor, a gate 30 of the thin film transistor is electrically connected to the scan line 91, a source 61 of the thin film transistor is electrically connected to the data line 92, and a drain 62 of the thin film transistor is electrically connected to a pixel electrode of the display panel 100.
In some embodiments of the present invention, the scan line 91 is disposed in the same layer as the gate of the thin film transistor, and the data line 92 is disposed in the same layer as the source/drain layer of the thin film transistor.
Referring to fig. 4 and 5, in the embodiment of the invention, the metal trace 21 is disposed on the second side of the substrate 10, and the ITO bridge line 22 is disposed on a side of the metal trace 21 away from the substrate 10, because the metal cannot form a film in the first through hole 101 with a deep hole depth, the first through hole 101 also penetrates through the metal trace 21. In other embodiments, the ITO bridging lines 22 may also be disposed on one side of the metal traces 21 close to the substrate 10, and in such a structure, the first through holes 101 do not need to penetrate through the metal traces 21, and only need to form a film layer of the metal traces 21 directly on the ITO bridging lines 22 after forming the film layer of the ITO bridging lines 22.
Referring to fig. 4 and 5, the depth of the first via 101 depends on the position of the film layer where the first signal line 90 is located, i.e. the thickness of the film layer between the first signal line 90 and the substrate 10, and the first via 101 penetrates through the film layer between the substrate 10 and the first signal line 90 in addition to the substrate 10, so as to electrically connect the first signal line 90 and the second signal line 20.
When the first signal line 90 is the scan line 91 or the data line 92, the depth of the first via hole 101 depends on the type of the thin film transistor.
Referring to fig. 4, taking an amorphous silicon thin film transistor as an example, the display panel 100 includes a gate 30 disposed on a first side of the substrate 10, a first insulating layer 40 disposed on a side of the gate 30 away from the substrate 10, an active layer 50 disposed on a side of the first insulating layer 40 away from the substrate 10, a source drain layer disposed on a side of the active layer 50 away from the substrate 10, a second insulating layer 70 disposed on a side of the source drain layer away from the substrate 10, and a pixel electrode 80 disposed on a side of the second insulating layer 70 away from the second insulating layer 70. In other embodiments, the thin film transistor of the display panel 100 may also be a low temperature polysilicon type or an oxide type, and the thin film transistor may be a bottom gate type or a top gate type, and may be a single gate type or a double gate type, which is not limited herein.
The first through hole 101 at the corresponding position of the scan line 91 penetrates through the substrate 10, the ITO bridging line 22 fills the first through hole 101, and the ITO bridging line 22 electrically connects the scan line 91 and the metal trace 21. It is understood that when a buffer layer, a barrier layer, or the like is disposed between the scan line 92 (the gate 30) and the substrate 10, the first via 101 also needs to penetrate through these layers.
Referring to fig. 5, the first via 101 at the corresponding position of the data line 92 sequentially penetrates through the active layer 50, the first insulating layer 40 and the substrate 10, and the ITO bridging line 22 electrically connects the data line 92 and the metal trace 21.
Referring to fig. 4 and fig. 5, in the embodiment of the invention, an orthogonal projection of the first through hole 101 on the substrate 10 is located within an orthogonal projection of the ITO bridging line 22 on the substrate 10, that is, an opening width of the first through hole 101 is smaller than a line width of the ITO bridging line 22.
In the embodiment of the present invention, the line width of the ITO bridging line 22 may be the same as the line width of the metal trace 21, the length of the ITO bridging line 22 is smaller than the length of the metal trace 21, and the length of the ITO bridging line 22 does not need to be as long as the length of the metal trace 21, and only needs to be slightly larger than the opening size of the first through hole 101 to perform a conducting function.
The metal traces 21 are used to be electrically connected to a gate driver or a source driver (not shown in the figure) of the display panel 100, which can be disposed on the second side of the substrate 10, the gate driver is used to provide a scan signal, and the source driver is used to provide a data driving signal.
When the metal trace 21 is electrically connected to the scan line 91, the metal trace 21 is connected to the source driver; when the metal trace 21 is electrically connected to the data line 92, the metal trace 21 is connected to the source driver.
In the embodiment of the present invention, the gate electrode 30, the source electrode 61, the drain electrode 62, the scan line 91, the data line 92 and the metal trace 21 are made of a high conductivity metal material, such as aluminum, copper, etc.
The display panel 100 in the embodiment of the invention may be a liquid crystal display panel, a Mini LED display panel or a Micro LED display panel.
Referring to fig. 6A to 6E, the method for manufacturing the display panel 100 includes: forming a first via hole 101 on the substrate 10; forming a first signal line 90 on a first side 102 of the substrate 10; forming a metal trace 21 on the second side 103 of the substrate 10; and filling an ITO bridge line 22 in the first through hole 101.
Specifically, referring to fig. 6A, the substrate 10 may be a glass substrate, and a first through hole 101 penetrating through the substrate 10 is drilled at a position of the substrate 10 where a hole needs to be drilled by using a laser drilling technology, and the width of the first through hole is on the micrometer scale (less than 100 micrometers).
Referring to fig. 6B, a first metal layer is deposited on the first side 102 of the substrate 10 by sputter deposition and patterned to form a pattern of scan lines 91, gates, etc.; a second metal layer 21' is sputter deposited on the second side 103 of the substrate 10. Since the thickness of the glass substrate is thick (0.5-0.7mm), the first through hole 101 formed by the above method is small and deep, and at this time, the first metal layer and the second metal layer 21 'deposited by sputtering cannot be formed in the first through hole 101, so that the first metal layer and the second metal layer 21' cannot be conducted. And the high-quality ITO film can be prepared by a solution method, so that double-sided conduction of the substrate 10 is realized.
Referring to FIG. 6C, the deep hole ITO deposition process may be a solution process. The second side 103 is coated with an ITO solution, and is baked at a low temperature to obtain an ITO film layer 22 ', and due to the leveling property of the ITO solution, the first through hole 101 is filled with the ITO film layer 22', so that the scan line 91 is connected to the metal trace 21.
Specifically, ITO crystal grains, a small-molecule organic phase transfer agent and NCs solution are mixed to obtain a dispersion solution, wherein the boiling point range of the small-molecule organic phase transfer agent is 85-115 ℃, and the small-molecule organic phase transfer agent is preferably selected from tetrabutylammonium hydroxide; coating the dispersion solution on the second metal layer and baking to remove the small molecular organic phase transfer agent and obtain uniformly assembled ITO crystal grains; and refining the ITO grains in an inert atmosphere by adopting an annealing mode to obtain an ITO film, wherein the refined ITO grains obtained after annealing treatment have the advantages of uniform structure, released stress, increased extensibility and toughness of the material and the like.
The coating mode includes but is not limited to spin coating and blade coating; the baking time is 90-130 ℃, the baking time is 2-7 minutes, preferably, the baking time is 120 ℃, and the baking time is five minutes; the annealing temperature is 280-320 ℃, the annealing inert gas can be Ar + 5% He, the annealing temperature is preferably 300 ℃, the annealing time is 1 hour, the conductivity of the ITO can be improved through annealing treatment, and the conduction of double-sided film layers of the substrate is realized.
Referring to fig. 6D, a patterned photoresist layer 200 is formed on the ITO film layer 22'. Referring to fig. 6E, the ITO film layer 22 'and the second metal layer 21' are etched by a yellow light process to form a predetermined pattern of the metal traces 21 and the ITO bridging lines 22.
After the pattern on the back side (second side) is formed, the tft device can be continuously formed on the front side (first side), thereby completing the entire process of manufacturing the display panel 100.
In other embodiments, the ITO bridging line 22 may be formed by coating, baking, etching, and annealing after the thin film transistor of the display panel 100 is manufactured. In the process of forming the thin film transistor device, via holes are formed at corresponding positions to communicate with the first through holes 101, so that the ITO film layer can communicate with signal lines such as the second data lines 92, etc. across the multi-layer film layer.
The display panel and the spliced display screen provided by the invention comprise a substrate, and a first signal line and a metal wire which are positioned on two sides of the substrate, wherein the substrate is provided with a through hole, so that an ITO film can be formed in the through hole and used as a bridging layer to bridge the first signal line and the metal wire, thereby realizing the double-sided wire routing process of the display panel and reducing the area of a frame; in addition, the deep hole film forming process of the double-sided process of the display panel can be realized by using the existing production line equipment, and the production efficiency is high.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display panel and the tiled display screen provided by the embodiment of the invention are described in detail, a specific example is applied in the description to explain the principle and the implementation mode of the invention, and the description of the embodiment is only used for helping to understand the technical scheme and the core idea of the invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A display panel including a display area, comprising:
the substrate comprises a plurality of first through holes positioned in the display area, and the first through holes at least penetrate through the substrate;
the first signal line is arranged on the first side of the substrate and at least positioned in the display area;
the second signal line comprises a stacked metal routing line and a bridging line; wherein,
the metal routing is arranged on a second side of the substrate opposite to the first side, the bridging line fills the first through hole, and the bridging line is electrically connected with the first signal line and the metal routing.
2. The display panel of claim 1, wherein the first signal line comprises at least one of a scan line and a data line, and the bridge line is an ITO bridge line.
3. The display panel according to claim 2, characterized in that the display panel further comprises:
the grid electrode is arranged on the first side of the substrate, and the scanning line and the grid electrode are arranged on the same layer;
the first insulating layer is arranged on one side, away from the substrate, of the grid electrode;
the active layer is arranged on one side, away from the substrate, of the first insulating layer; and
and the source drain layer is arranged on one side of the active layer, which is deviated from the substrate, and the data line and the source drain layer are arranged on the same layer.
4. The display panel according to claim 3, wherein the first via penetrates through the substrate, and the ITO bridge line electrically connects the scan line and the metal trace.
5. The display panel according to claim 3, wherein the first via hole sequentially penetrates through the active layer, the first insulating layer and the substrate, and the ITO bridge line electrically connects the data line and the metal trace.
6. The display panel of claim 2, wherein the ITO bridge line is disposed on a side of the metal trace facing away from the substrate.
7. The display panel according to claim 2, wherein an orthographic projection of the first via hole on the substrate is located within an orthographic projection of the ITO bridge line on the substrate.
8. The display panel of claim 7, wherein the length of the metal traces is greater than the length of the ITO bridge lines.
9. The display panel of claim 1, wherein the second side of the substrate is further provided with a gate driver and a source driver, and the metal trace is electrically connected to the gate driver or the source driver.
10. A tiled display screen comprising at least two tiled display panels, the display panels being according to any of claims 1-9.
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| CN202110633651.4A CN113433745A (en) | 2021-06-07 | 2021-06-07 | Display panel and spliced display screen |
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| CN202110633651.4A CN113433745A (en) | 2021-06-07 | 2021-06-07 | Display panel and spliced display screen |
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| CN114355657A (en) * | 2022-03-18 | 2022-04-15 | Tcl华星光电技术有限公司 | Splicing display panel and splicing display device |
| CN114355658A (en) * | 2022-03-18 | 2022-04-15 | Tcl华星光电技术有限公司 | Mixed connection display device and spliced display device |
| CN114488636A (en) * | 2022-01-21 | 2022-05-13 | 绵阳惠科光电科技有限公司 | Array substrate, manufacturing method thereof, display panel and display device |
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Application publication date: 20210924 |