CN113424366A

CN113424366A - Method and system for signal self-alignment in large scale phased array systems

Info

Publication number: CN113424366A
Application number: CN201980091783.XA
Authority: CN
Inventors: S·沙拉米安; R·穆鲁格斯
Original assignee: Nokia Solutions and Networks Oy
Current assignee: Nokia Solutions and Networks Oy
Priority date: 2019-02-12
Filing date: 2019-02-12
Publication date: 2021-09-21
Also published as: EP3925031A1; WO2020167300A1; US20220149518A1

Abstract

A method and system for aligning signals in a phased array system having a plurality of blocks is provided. Block-to-block signal alignment is achieved by using internally generated local oscillator signals and existing coupling paths between transmit and receive antenna elements in adjacent blocks of the phased array system. The relative phase of the local oscillator signals is measured in both directions between adjacent tiles to determine a phase difference, which can then be used for signal alignment between adjacent tiles. The self-alignment process can then be repeated on subsequent pairs of adjacent blocks, thereby providing a fully aligned and phase balanced phased array system. Since no external signals or components are required that are not already resident on the blocks, self-alignment can be performed at system start-up, e.g., aligning a multi-block phased array before the system is put into operation in a real-time network.

Description

Method and system for signal self-alignment in large scale phased array systems

Technical Field

The present invention relates generally to phased arrays, and more particularly to a method and system for self-alignment of large scale phased array systems.

Background

Next generation mobile technologies, such as the fifth generation (5G), require ultra-low latency and high data rates, supporting ubiquitous deployment of multiple users by using small cells. For example, a picocell may typically require up to several hundred active elements capable of generating thousands of beam patterns. As such, highly integrated phased array systems are fundamental building blocks for next generation communication applications.

In the manufacture of large-scale phased arrays, it is generally preferable to avoid integrating all elements of the system on a single chip, as the chip size can become too large and the yield can be reduced. Therefore, it is not uncommon to distribute system components across various chips. However, distributing over multiple chips may have its own challenges and complexities, such as ensuring alignment of various system components to ensure proper response and signal integrity. In a distributed arrangement, "tiles" (e.g., cells) are typically arranged in rows and columns, with one tile being electrically coupled to adjacent tiles, e.g., a previous tile and a next tile. While the elements within one block are aligned with each other, the elements between two adjacent blocks are not necessarily aligned, thus requiring additional alignment processes to maintain signal integrity. In large-scale phased arrays, distributing the signal to all blocks for beamforming purposes requires phase balancing, which can be very complex, especially when distributing high frequency signals, such as 90GHz millimeter wave (mm-wave) signals using an array of 16 or more blocks on a Printed Circuit Board (PCB).

Disclosure of Invention

According to various embodiments, a method and system for aligning signals in a phased array system having a plurality of blocks is provided. Block-to-block signal alignment is advantageously achieved by using internally generated local oscillator signals and existing coupling paths between transmit and receive antenna elements in adjacent blocks of the phased array system. For example, the relative phase of the Local Oscillator (LO) signal in both directions between adjacent tiles is measured using existing antenna coupling paths to determine the phase difference that can then be used for signal alignment between adjacent tiles. The self-alignment process can then be repeated on subsequent pairs of adjacent blocks, thereby providing a fully aligned and phase balanced phased array system. Since no external signals or components are required that are not already resident on the blocks, self-alignment may be performed as part of system startup, e.g., to align a multi-block phased array before the system is put into operation in a real-time network.

According to an embodiment, a first LO signal is sent from a transmitter in a first block to a receiver in an adjacent second block, wherein the phase of the first LO signal is measured. In a similar manner, the second LO signal is sent in the opposite direction from the transmitter in the second block, and the phase of the second LO signal is measured at the receiver in the first block. If the measurements indicate a phase difference, action may be taken to correct the phase difference, for example, by changing the phase of one of the LO signals by an amount equal to the phase difference, thereby obtaining signal alignment between adjacent blocks in the phased array. According to an embodiment, the phases of the respective local oscillator signals are scanned to obtain a plurality of measurements. According to an embodiment, the respective local oscillator signal is mixed with a constant DC voltage value to generate a local oscillator induced DC offset signal, such that at baseband level the phase of the local oscillator signal can be measured with DC offset cancellation circuitry.

According to an embodiment, a method for performing block-to-block alignment includes setting at least one of baseband signal inputs at a transmitter to a constant value (e.g., a constant DC voltage value). An internally generated LO signal is generated from the first block by applying an LO-induced DC offset to the transmit mixer of the first block for upconversion. The upconverted signal is received and downconverted at an adjacent second block. When the LO signal from the first block is received at the second block, the LO signal is downconverted to a DC value at a baseband module in the second block. Then, the DC value is measured using the existing DC offset cancellation circuit in the second block, and a value for the received baseband signal is calculated. In an embodiment, the process is then repeated in the opposite direction, i.e. transmission from the second block to the first block, and the detected DC term is used to measure the relative phase and calculate the phase difference to facilitate phase correction for block-to-block alignment.

The self-aligning aspects of the described embodiments may be particularly beneficial for large-scale systems, such as those systems intended for use in next generation 5G networks.

Drawings

FIG. 1 shows a block diagram of a phased array system configuration;

fig. 2A and 2B show graphical representations of phase relationships of local oscillator signals in a multi-block configuration, in accordance with various embodiments;

FIG. 3 shows a block diagram of a block-to-block coupling arrangement in a phased array system in accordance with an illustrative embodiment;

FIG. 4 shows a flowchart of a block-to-block phase alignment method in accordance with an illustrative embodiment;

FIG. 5 shows a block diagram of a block-to-block coupling arrangement in a phased array system in accordance with an illustrative embodiment;

FIG. 6 shows a block diagram of an illustrative configuration of elements in an analog baseband module in accordance with the embodiment of FIG. 5;

FIG. 7 shows a schematic diagram of an illustrative offset cancellation module in accordance with the embodiment of FIG. 6; and

fig. 8 shows a graphical representation of block-to-block phase measurements according to an embodiment.

Detailed Description

In this context, the term "block" should be understood to refer to elements forming part of a distributed arrangement of a phased array antenna system, where individual blocks include one or more transmitters and one or more radio frequency signal Receivers (RF).

Various illustrative embodiments will now be described more fully with reference to the accompanying drawings, in which some illustrative embodiments are shown. It should be understood, however, that there is no intention to limit the illustrative embodiments to the specific forms disclosed, but on the contrary, the illustrative embodiments are intended to cover all modifications, equivalents, and alternatives falling within the scope of the claims. Where appropriate, like numerals refer to like elements throughout the description of the figures. It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the illustrative embodiments. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. As used herein, the term 5G is intended to refer to the next generation (i.e., fifth generation) mobile network specified by the international telecommunications union radio communication sector (ITU-R), as is well known to those of ordinary skill in the art.

As described above, large-scale phased arrays may be arranged in a distributed architecture comprising a plurality of cells or blocks (hereinafter referred to as blocks), where each block includes various system elements. Fig. 1 shows a simplified block diagram of two (2)

adjacent blocks

110 and 150 in an exemplary phased array system configuration 100. In this example, block 110 includes a 16TX/8RX configuration, i.e., 16 transmitter modules 115 and 8 receiver modules 120. Similarly, block 150 has a 16TX/8RX configuration with 16 transmitter modules 160 and 8 receiver modules 170. In one example of a phased array system in accordance with embodiments, sixteen (16) blocks, each having a similar configuration to blocks 110 and 150, may be combined onto a Printed Circuit Board (PCB) to create a 384-element phased array system, e.g., a 256TX/128RX configuration with 256 transmitter modules and 128 receiver modules. It should be noted that the configuration in fig. 1 is merely illustrative and is not limiting in any way. For example, the embodiments described herein may be applied to various nTX/mRX block configurations, where n and m are integers, such as 8TX/16RX or any other combination of numbers, which may be a matter of design choice, network requirements, and/or other considerations. Thus, a large-scale phased array may take various forms (e.g., TX/RX configuration, etc.) in terms of the number of blocks and the density of sub-arrays over respective blocks.

Continuing with the example shown in fig. 1,

tiles

110 and 150 are organized in rows and columns and are electrically coupled to each other and to other respective adjacent tiles, e.g., each tile is coupled to at least a previous and next tile. While elements within a single block (e.g., components of transmitter module 115 and receiver module 120 within block 110) may be electrically aligned with each other to ensure signal integrity, elements between two adjacent blocks do not have to be aligned, thus requiring additional alignment processes to maintain signal integrity. That is, the signals distributed between block 110 and block 150 are not necessarily phase balanced. For large scale phased arrays, it is desirable that the distribution of signals to all blocks in the phased array be phase balanced for efficient beamforming, which can be very complex, especially when distributing high frequency signals, such as millimeter wave signals in a 5G communications network. For example, consider a case similar to fig. 1 in which transmitter module 115 in block 110 is coupled to receiver module 170 in block 150 (and transmitter module 160 in block 150 is coupled to receiver module 120 in block 110). Each of

blocks

110 and 150 includes a respective Local Oscillator (LO) and a respective mixer, not shown in the figure. In operation, the LO phase in block 110 may be different from the LO phase in the neighboring block 150, thus resulting in LO misalignment between the two blocks. Alignment between blocks in a phased array system can negatively impact beamforming. For example, if there is no block-to-block alignment, the relative phase between each block is random, thus resulting in a random beam pattern.

One possible alignment method is to detect/monitor the strength of the transmitted signal with the receiver while continuously varying the phase at the transmitter until an optimum value of the signal strength is detected at the receiver, which indicates that alignment is achieved. However, this approach may be impractical when a large number of antennas in the array need to be aligned. Furthermore, this solution may be an inefficient use of resources, as it typically requires an external element (e.g., a remote receiver) to perform the alignment.

According to various embodiments described herein, by utilizing self-alignment techniques to achieve block-to-block alignment, self-alignment counting does not require external components to perform the alignment, but rather utilizes the close proximity and coupling paths of antennas on adjacent blocks and utilizes existing circuitry and functionality within the blocks. The positions of the individual antennas on the respective pairs of adjacent blocks are selected to enable bi-directional coupling paths between adjacent transmit and receive antenna elements to achieve block-to-block alignment in a multi-block, large-scale phased array system. More specifically, antenna selection using existing coupling paths between adjacent tiles is utilized to measure the relative phase of Local Oscillator (LO) signals between adjacent tiles. Once the phase is aligned between two adjacent blocks, the process can then be repeated for the remaining pairs of adjacent blocks until all blocks are aligned. Notably, self-alignment/self-calibration can be performed during system setup (e.g., power up) without the need to generate a specific Intermediate Frequency (IF) signal at baseband, as only an internally generated LO signal is needed to facilitate measurement. In addition, phase alignment is maintained as long as the system is not shut down. In the case of system shutdown, self-calibration may be performed again to align and phase balance signals distributed across the blocks in the phased array system.

Fig. 2A shows a simplified graphical representation to illustrate the basic principles related to the measurement of the relative phase of the Local Oscillator (LO) signal from between two

adjacent blocks

110 and 150 of fig. 1. As will be described in further detail below, the first LO signal is transmitted from a first block to an adjacent block, e.g., from the transmitter module 160 in block 150 to the receiver module 120 in block 110, and the phase of the first LO signal is measured at the receiver module 120. In a similar manner, the second LO signal is transmitted from the transmitter module 115 in block 110 to the receiver module 170 in block 150, i.e., in a direction opposite to the transmission direction of the first LO signal, and the phase of the second LO signal is measured at the receiver module 170. As will be understood by those skilled in the art, multiple phase measurements may be obtained and the relative phase shifts derived by scanning the phase of the respective oscillators from 0 to 360 degrees. Alignment of the first and second LO signals is achieved when the measured phase of each of the first and second LO signals has the same or substantially the same value. If the measurements indicate a phase difference, action may be taken to reduce the phase difference to approximately zero, for example, by changing the phase of one of the LO signals by an amount equal to the phase difference, thereby obtaining signal alignment between

adjacent blocks

110 and 150.

As shown in fig. 2A, plot line 201 and plot line 210 correspond to phase representations of the first LO signal transmitted in the direction from blocks 150 to 110. More specifically, plot line 210 represents an actual phase measurement obtained by scanning the phase of the first LO from 0 to 360 degrees, e.g., a plurality of phase measurements obtained by scanning the phase of the first LO in block 150. Plot line 201 represents a "best fit" line corresponding to the actual phase measurement in plot line 210. Since the relationship between the received phase and the transmitted phase should be linear, a "best fit" linear approximation can be made to fit the measured phase. Similarly, plots 202 and 211 correspond to phase representations of the second LO signal transmitted in the opposite direction from block 110 to block 150. More specifically, plot line 211 represents an actual phase measurement obtained by scanning the phase of the second LO from 0 to 360 degrees, and plot line 202 represents a "best fit" line corresponding to the actual phase measurement in plot line 211. Scanning the phase of the respective oscillators to obtain multiple measurements and using a "best fit" approach may provide a more accurate relative phase estimate than using a single measurement. For example, points 205 and 206 represent a single phase measurement of the first and second LO signals, respectively. The accuracy of using multiple measurements (e.g., from a scan) is apparent when comparing the results of using a single measurement point (e.g., points 205 and 206) with the scan phase to obtain the "best fit"

lines

201 and 202 as shown in fig. 2A.

Accordingly, the resulting

plots

201, 202, 210, and 211 in fig. 2 show simplified phase representations of the respective LO signals from 0 to 360 degrees. Note that the LO signals have the same frequency, but are phase shifted. As will be described in further detail below, phase shifters associated with respective local oscillators on the transmitter side are scanned from 0 degrees to 360 degrees to facilitate phase measurements on the receiver side.

Returning to fig. 2A, the phase representations shown by

plot lines

201 and 202 represent offsets relative to each other of 2 Δ φ, e.g., the offsets represent twice the value of the phase difference (Δ φ) between the two LO signals. Therefore, when this offset value is measured and obtained, the phase difference can be obtained. Then, a phase shift equivalent to the phase difference Δ φ may be applied in signal transmission between the tiles, e.g., a phase shift equivalent to the phase difference + Δ φ may be applied in signal transmission from one of the tiles, or alternatively an opposite phase shift of- Δ φ may be applied in signal transmission from the other tile in the opposite direction. By this phase matching, signal alignment between the two blocks is achieved.

Fig. 2B shows another embodiment for measuring the phase of the first and second LO signals. In this example, only the phase of the first LO is swept (e.g., from 0 to 360 degrees), while the phase of the second LO is kept unchanged. Plot line 250 represents a phase measurement of the first LO signal (e.g., from transmitter T1 in the first block to receiver R2 in the second block). More specifically, at each scan point (along plot line 250), a first LO signal is transmitted from the first block and the resulting phase is measured at the receiver in the second block. At each of the aforementioned scanning points, a second LO signal is emitted from the second block and the resulting phase is recorded by the receiver at the first block. Those measurements made of the second LO signal are shown by plot line 251 (e.g., from transmitter T2 in the second tile to receiver R1 in the first tile). For the next and subsequent measurements, the phase of the first LO signal is incremented and the measurements are performed again for each of the first and second LO signals. Thus, the phase of the first LO signal is scanned and measured, while the phase of the second LO signal is only measured at each corresponding scanning point for the first LO signal, i.e. the phase of the second LO signal is not scanned but remains unchanged.

Plot lines

260 and 261 represent "best fit" lines from the respective phase measurements of

plot lines

250 and 251, respectively. Using this approach, alignment as shown in fig. 2B as alignment point 270 is achieved when the phase of the first LO signal measured at the second block is equal to the phase of the second signal measured at the first block.

Various embodiments for implementing the self-alignment process will now be described in more detail. Fig. 3 shows one illustrative embodiment of a block-to-block coupling arrangement 300 for a phased array system, where block 310 (block 1) is adjacent to block 350 (block 2). In this example, two adjacent blocks are shown for the purpose of illustrating a self-alignment procedure, although

adjacent blocks

310 and 350 may be part of a large-scale phased array system that includes multiple blocks, such as the 16-block phased array configuration described above as one non-limiting example. Further, configuration 300 is a simplified block diagram showing only a full subset of components in a typical tile. Each tile in a phased array system may typically include an RF integrated circuit (RFIC) that is further integrated with all antenna sub-arrays (e.g., 16TX/8RX phase shifter arrays, etc.) on the tile. In fig. 3, the

blocks

310 and 350 are simplified to show just one transmitter and receiver for each block, and only a subset of the associated components, although it will be understood that a complete representation of a block includes a full complement of transmitters and receivers, associated components, and a signal distribution network for routing various signals via RFICs on the block. For example, such an assembly includes: antenna sub-arrays, up/down converters (mixers, multipliers, etc.), analog baseband modules, Phase Locked Loop (PLL) circuits, diagnostic circuits for performance monitoring, etc. A signal distribution network within the block facilitates passive and active signal distribution to provide radio frequency signal paths to all antenna elements.

Referring again to fig. 3, block 310 includes a transmitter 315 and a receiver 320. For simplicity of description, block 310 is shown to include a Local Oscillator (LO) circuit 311, Local Oscillator (LO) circuit 311 working with

phase shift elements

312 and 313 to provide phase-shifted LO signals to respective in-phase/quadrature (I/Q) mixer circuits for appropriate upconversion for transmission and downconversion for signal reception. More specifically, I/

Q mixers

316 and 317 provide up-conversion for signal transmission via transmitter 315, and I/

Q mixers

321 and 322 provide down-conversion for signal reception via receiver 320. Block 310 is also shown to include a DC offset cancellation circuit module 325, which will be described in more detail below. Block 350 is shown to include similar elements as in block 310 to perform the same functions in block 350, such as: a transmitter 360; a receiver 370; a Local Oscillator (LO) circuit 383;

phase shift elements

352 and 353; I/

Q mixers

361, 363, 371, and 372; the DC offset cancellation circuit module 375.

Also shown in fig. 3 are various parameters that should be taken into account in the process of measuring and calculating the relative phase shift and phase difference during the self-alignment process. Without considering the delay (neither the "intra-block" nor the "inter-block" delay), alignment between blocks will not be possible. Such delay parameters may include adjustable parameters as well as some non-adjustable parameters. In one illustrative embodiment, as shown in fig. 3, these parameters include the delay between blocks 310 and 350 (i.e., inter-block delay), arrow 390 represents delay D1 from block 310 to block 350, and arrow 391 represents delay D2 from block 350 to block 310. Although the delays D1 and D2 may not be the same value in all scenarios, the self-alignment procedure according to one illustrative embodiment assumes that the inter-block delays D1 and D2 are the same in both directions.

As mentioned above, blocks 310 and 350 have been simplified to each show a single transmitter and a single receiver. In practice, however, for the foregoing example, each of the

blocks

310 and 350 has multiple transmitters and multiple receivers, e.g., 16 transmitters and 8 receivers each. Thus, each tile will have its respective signal distribution network to route signals to a respective plurality of transmitters and receivers via the various components. For example, the LO signal (e.g., a Voltage Controlled Oscillator (VCO) signal) is phase shifted, mixed with the I/Q baseband IF signal, and then split (for routing to the transmitter) or combined (in the receiver) onto multiple paths for respective routing and distribution between elements on the block. Thus, the signal distribution network on each block will introduce intra-block delays associated with signal routing within that block. In fig. 3, these intra-block delay parameters are shown as x and y, which are also constant, e.g. not adjustable, like the inter-block delay D. More specifically, x represents the delay in the respective transmit path for each of

blocks

310 and 350, and y represents the delay in the respective receive path for each of

blocks

310 and 350.

Parameters α and γ are adjustable parameters related to the phase shift operation on the LO signal, e.g., scanning the phase of the oscillator for a phase measurement to determine the relative phase shift, e.g., using

phase shift elements

312 and 352 in each of

blocks

310 and 350, respectively. Thus, the parameters α and γ may also be considered for the phase difference measurement between the LO signals in

blocks

310 and 350.

The various steps of performing block-to-block self-alignment as shown in fig. 4 will be described with reference to the illustrative multi-block arrangement 300 shown in fig. 3. In step 401, the transmitters 360 in block 350 are enabled, and in step 402, I_in(2)Is set to a constant value (e.g., value ═ 1), where I_in(2)Representing the in-phase baseband signal input for block 350 ("block 2"). As indicated previously, block-to-block self-alignment can be performed without generating additional and specific baseband signals. The LO signal is generated from block 350 and allowed to "leak", as will be described in further detail below, such that an LO-induced DC offset is applied to transmit mixer 361 in step 403 for upconversion in step 404. In step 405, at receiver 320 in adjacent block 310, the upconverted signal transmitted from transmitter 360 in block 350 is received and downconverted. It is worth noting that the LO signals generated from

blocks

350 and 310 have the same frequency, but different phases, so that when the LO signal from block 350 is transmitted to block 310, the LO signal is downconverted to a DC value at I and Q receive

mixers

321 and 322 in block 310. In step 406, the DC value is measured using the DC offset cancellation circuit module 325 in the analog baseband module of block 310. I at block 310_out(1)And Q_out(1)Calculated in step 407 and represented as:

where ρ is₂＝D₂+ x-y; and is

Representing the phase difference between the two blocks;

ω is the angular frequency;

γ is a parameter related to the phase shift of the local oscillator signal in block 350;

α is a parameter associated with the local oscillator signal in phase shift block 310;

x and y are parameters representing the intra-block delays in

blocks

310 and 350; and

d2 is a parameter representing the inter-block delay between blocks 310 and 350 (fig. 3).

Next, in step 408, steps 401 through 407 are applied to the transmission in the opposite direction from blocks 310 through 350 to calculate I at block 350_out(2)And Q_out(2). More specifically, the transmitter 315 in block 310 is enabled, I_in(1)Set to a value of 1, the LO signal is generated from block 310 and allowed to "leak," thereby applying an LO-induced DC offset to the transmit mixer 316 for upconversion, transmission, and downconversion at the receiver 370 in the adjacent block 350. The DC value is measured using the DC offset cancellation circuit module 375 in the analog baseband module of block 350. I at block 350_out(2)And Q_out(2)Is calculated and expressed as:

wherein:

ρ₁＝D₁l x y; and is

D1 is a parameter representing the inter-block delay between blocks 310 and 350 (fig. 3).

The received I and Q values are then used to calculate the required phase corrections in step 409 for block-to-block alignment between

blocks

310 and 350. In the case where D1 ═ D2:

the measured I and Q values can be used to calculate the angle:

the angle can be used to find the phase offset between two blocks

Wherein:

symbol 1 represents received I_out1And Q_out1An angle of value; and

symbol 2 represents received I_out2And Q_out2Angle of value.

In case of D1 ≠ D2, factory calibration should be performed where the initial phase correction is

And corresponding < 1 >_oldAnd 2_oldMeasured on a block-by-block basis and stored, for example,

and

in the case of a system shutdown and then power on, the new phase correction required for alignment can be calculated from the new angle measurement and the previously stored values as follows:

and

tiles

310 and 350 are considered aligned when the phase at reference point P1 in fig. 3 (as shown at location 340 in tile 310) is equal or substantially equal to the phase at reference point P2 (as shown at location 385 in tile 350).

According to another embodiment, multiple measurements of < 1 and < 2 can be made by scanning the phase shifter in each of

blocks

310 and 350. In this way, multiple measurements can be used to find the best fit for < 1 and < 2. More specifically, this is during the self-alignment process described above by using the respective LO phase shifters on the transmit side in each direction (e.g., phase shifter 352 for transmission from block 350 to block 310 and phase shifter 312 for transmission from block 310 to 350). For example, in one illustrative embodiment, the phase shifter 352 for the LO signal in block 350 may be swept from 0 degrees to 360 degrees, while the I and Q signals received at the receive side in block 310 are measured accordingly.

According to various embodiments described herein, the block-to-block alignment takes advantage of coupling paths that already exist between transmit/receive antenna elements in adjacent blocks. Self-alignment can also be accomplished prior to system power-up and various efficiencies are achieved by utilizing existing circuits, components, and signals. As mentioned above, no additional and specific baseband signals need to be generated to perform the above measurements. Instead, a DC constant (voltage) may be applied to the transmit mixer.

Furthermore, the existing, internally generated LO signal can be used for all measurement and alignment purposes. The features and functionality of existing circuitry already included in the block, such as DC offset cancellation circuitry, may be exploited to facilitate measurements and calculations for affecting signal alignment. For example, DC offset cancellation circuitry in the analog baseband module is typically used to cancel any LO-induced DC offset that originates from the I/Q downconverter mixer. However, in performing block-to-block self-alignment in accordance with various embodiments, the detected I/Q DC term is internally digitized and used in a novel manner to measure the relative phase between blocks in a multi-block phased array system. In this manner, various embodiments take advantage of features already available in using DC offset cancellation circuits, but which are not generally used for the purposes described herein. In the described embodiment, the DC offset value detected but discarded in conventional systems is effectively used to detect and calculate the phase difference between the LO signals of two adjacent blocks. This is possible because the LO signals have the same frequency but different phases, so when the LO signals from one block are transmitted to and mixed with the LO signals of the next block, they are downconverted to DC values. This measurement of the DC value is performed by existing DC offset cancellation circuitry residing in each block. This value can then be digitized and used to calculate the phase difference.

Fig. 5 shows another illustrative embodiment of a block-to-block coupling arrangement 500 for a phased array system, where block 550 (block n) is adjacent to block 510 (block n + 1). For ease of illustration and description, configuration 500 is a simplified block diagram again showing only a subset of the components, with emphasis on coupling transmit antenna 560 in block 550 with receive antenna 520 in block 510. The various components and functionality previously described in the context of the embodiment shown in fig. 3 are equally applicable to the current embodiment of fig. 5 and, therefore, are not described in detail for the sake of brevity. As represented by distribution network 567, block 550 actually includes a plurality of other transmit and receive antennas in addition to transmit antenna 560 (shown). The RF signals in block 550 are split and then routed to multiple transmit antennas for transmission, whereas the RF signals are received by multiple receive antennas and combined for further routing and processing in block 510. Configuration 500 also includes a main phase-locked loop (PLL) circuit 501 with associated components to provide local oscillator signals to each of blocks 550 and 510, as well as other blocks (not shown), in the large-scale phased array. Similar to the embodiment in fig. 3, blocks 510 and 550 each include a phase shifter element 512/513 and 552/553, respectively, for phase shifting the respective LO signals.

Block 550 is shown to include I/

Q mixers

561 and 563, respectively, for upconversion. Similarly, block 510 includes I/

Q mixers

521 and 522, respectively, which feed I/Q signals to

analog baseband modules

504 and 502, respectively. Importantly, in this embodiment, switch (inductive LO switch) 564 is used to "leak" the internally generated LO signal for upconversion and transmission to block 510. In this way, the self-alignment/self-calibration process may be performed without any external signals and may be performed as part of system check/start-up, e.g., aligning a multi-block phased array before the system is put into operation in a real-time network.

As will be described further below, the analog baseband module includes circuitry (not shown in fig. 5) for canceling any LO-induced DC offset originating from the I/Q downconverter mixers (521 and 522). As mentioned in the foregoing description, the only purpose of DC offset cancellation circuits has traditionally been to ensure that high gain IF amplifier stages do not saturate under strong LO injection conditions. However, in this embodiment, the detected I/Q DC term is internally digitized and used in a new calibration scheme to measure the relative phase between blocks in a multi-block phased array system. As shown, the signal for I is generated in block 510 as a result of down-conversion of the signal received from block 550_out DC value 505 and for Q_outWherein the LO is "leaked" and wherein a constant is applied to the I/Q signal in the transmit mixer (561 and/or 563) in block 550A constant DC voltage. Then, for I_outDC value 505 and for Q_outIs further processed by DC offset cancellation circuits in

analog baseband circuits

504 and 502, respectively.

Fig. 6 shows a block diagram of some elements in an analog baseband module 600 according to the embodiment of fig. 5. In particular, the analog baseband module 600 is shown to include a tunable low pass active filter 642 and associated components (e.g., a transimpedance amplifier (TIA), etc.) for receiving an input signal, a pair of ladder attenuator VGAs 643 and associated components, a linear output driver 644, and a monitoring/control portion 645. Notably, the analog baseband module 600 includes two DC offset cancellation feedback loops/

modules

625 and 626, where the LO-induced DC offset cancellation module 625 pair is used for I according to various embodiments_outDC value 505 and for Q_outPerforms further processing to measure the phase difference of the LO signals in neighboring blocks 503 (from fig. 5).

Fig. 7 shows a configuration 700 that includes a simplified schematic of LO-induced DC offset cancellation module 725 along with other components similar to those described for analog baseband module 600 (fig. 6). For example, configuration 700 includes an input from I/Q mixer 721/722 of receiver 720 (not shown), a tunable low pass active filter 742, and a portion of ladder attenuator VGA portion 743. The LO-induced DC offset cancellation module 725 is shown to include known components for performing its conventional functions. As previously described for various embodiments, a "leaked" LO signal may be generated by a transmit mixer applying a DC offset on one block, and the induced DC offset at the receivers in adjacent blocks is measured by LO-induced DC offset cancellation module 725. On-chip analog-to-digital converters (ADCs), such as ADC 726, internally measure and process DC values for received I/Q signals, e.g., for I_out505 and for Q_out503 (from fig. 5). More specifically, digitized I/Q DC signals are measured to derive relative phase differences of LO signals in neighboring blocks to perform block-to-block self-alignment. FIG. 8 shows a graphical representation of measured DC voltage for I/Q signals obtained as a result of sweeping the LO signal phase from 0 to 360 degreesShown (shown as plot lines 803 and 805).

Calculating the relative phase and applying the phase correction parameters may be performed in many different ways and are contemplated by the teachings herein. In one embodiment, as described, each RFIC measures its own DC offset value, which can be used to calculate the relative phase. The DC offset value (initially analog) is converted to digital (e.g., via an on-chip ADC such as ADC 726 in fig. 7 in one embodiment) and then may be read via the digital interface of each RFIC. A central microprocessor, FPGA, or the like may then collect this data from all RFICs and may calculate the necessary phase information for all RFICs in the phased array system. It should be noted and will be apparent to those skilled in the art that the analog-to-digital conversion need not be performed on-chip in each RFIC. In one example, a central ADC may be used to perform this task outside of each RFIC. In another example, a modem may be used to calculate the relative phase and apply the phase correction parameters. Other implementations will be apparent to those skilled in the art, the primary consideration for any alternative being that signals and/or data must be collected between RFIC pairs in order to calculate their relative phase, etc.

As noted in the foregoing description, the multi-block, self-alignment process is autonomous in that it does not require or involve any external devices or components, but rather can achieve signal alignment across many blocks of the phased array by utilizing components organic to the phased array blocks and associated signal processing. The autonomous, self-aligning aspects of the described embodiments may be particularly beneficial for large-scale systems, such as those systems that are and will be envisioned for next generation 5G networks.

It is noted that for clarity of explanation, the illustrative embodiments described herein may be presented as including individual functional blocks or combinations of functional blocks. The functions represented by these blocks may be provided through the use of dedicated or shared hardware, including, but not limited to, hardware capable of executing software. The illustrative embodiments may include digital signal processor ("DSP") hardware and/or software to perform the operations described herein. Thus, for example, it will be appreciated by those skilled in the art that the block diagrams herein represent conceptual views of illustrative functionality, operation, and/or circuitry of the principles described herein in various embodiments. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudocode, program code, and the like represent various processes which may be substantially represented in computer readable media and so executed by a computer, machine or processor, whether or not such computer, machine or processor is explicitly shown. Those skilled in the art will recognize that an actual computer or computer system implementation may have other structures and may contain other components as well, and that a high-level representation of some components of such a computer is for illustrative purposes.

The foregoing merely illustrates the principles of the disclosure. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the disclosure and are included within its spirit and scope. Furthermore, all examples and conditional language recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the disclosure and the concepts contributed by the inventors to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the disclosure, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Further, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future.

Claims

1. A method for aligning signals in a phased array antenna system comprising a plurality of blocks, wherein each block from the plurality of blocks comprises at least one transmitter and at least one receiver of radio frequency signals, the method comprising:

generating a first local oscillator signal at a first tile of the plurality of tiles and a second local oscillator signal at a second tile of the plurality of tiles;

transmitting, via a first transmit antenna corresponding to the first tile, the first local oscillator signal to a first receive antenna corresponding to the second tile;

transmitting, via a second transmit antenna corresponding to the second tile, the second local oscillator signal to a second receive antenna corresponding to the first tile;

measuring a phase of the first local oscillator signal at the second block and a phase of the second local oscillator signal at the first block; and

determining a phase difference based on the measured phase of the first local oscillator signal and the measured phase of the second local oscillator signal,

wherein the first block is adjacent to the second block, wherein the first transmit antenna is electrically coupled to the first receive antenna, and wherein the second transmit antenna is electrically coupled to the second receive antenna.

2. The method of claim 1, further comprising:

adjusting a phase of one of the first and second local oscillator signals by an amount corresponding to the phase difference.

3. The method of claim 1, wherein the step of determining the phase difference is performed at a time corresponding to system startup of the phased array antenna system.

4. The method of claim 1, wherein measuring the phase of the first local oscillator signal at the second tile and measuring the phase of the second local oscillator signal at the first tile comprises:

scanning the phase of the first local oscillator signal from the first block to generate a plurality of phase measurements at the second block; and

scanning the phase of the second local oscillator signal from the second block to generate a plurality of phase measurements at the first block.

5. The method of claim 4, wherein scanning the phase of the first local oscillator signal and scanning the phase of the second local oscillator signal comprises scanning phase from 0 to 360 degrees.

6. The method of claim 1, wherein the first local oscillator signal is generated internally at the first tile and the second local oscillator signal is generated internally at the second tile.

7. The method of claim 6, further comprising:

mixing the first local oscillator signal with a first signal having a constant DC voltage value to generate a first local oscillator induced DC offset signal; and

mixing the second local oscillator signal with a second signal having a constant DC voltage value to generate a second local oscillator induced DC offset signal.

8. The method of claim 7, wherein measuring the phase of the first local oscillator signal at the second block and measuring the phase of the second local oscillator signal at the first block are performed using a digitizing term associated with a DC offset cancellation function.

9. A system for aligning signals in a phased array antenna system comprising at least a first block and a second block positioned adjacent to the first block, wherein the first block and the second block each comprise at least one transmitter and at least one receiver of radio frequency signals, the system comprising:

a first local oscillator circuit configured to generate a first local oscillator signal at the first tile;

a second local oscillator circuit configured to generate a second local oscillator signal at the second block;

a first transmit antenna, corresponding to the first tile, configured to transmit the first local oscillator signal to a first receive antenna corresponding to the second tile, the first transmit antenna being electrically coupled to the first receive antenna;

a second transmit antenna, corresponding to the second tile, configured to transmit the second local oscillator signal to a second receive antenna corresponding to the first tile, the second transmit antenna being electrically coupled to the second receive antenna;

a first baseband circuit, corresponding to the first block, configured to measure the phase of the second local oscillator signal;

a second baseband circuit, corresponding to the second block, configured to measure the phase of the first local oscillator signal; and

a processor configured to calculate a phase difference based on the measured phase of the first local oscillator signal and the measured phase of the second local oscillator signal.

10. The system of claim 9, wherein the processor is further configured to communicate with the first and second local oscillator circuits to enable adjusting a phase of one of the first and second local oscillator signals by an amount corresponding to the phase difference.

11. The system of claim 9, wherein the processor is configured to calculate the phase difference at a time corresponding to system startup at the phased array antenna system.

12. The system of claim 9, further comprising:

a first phase shifter coupled to the first local oscillator circuit and configured to scan a phase of the first local oscillator signal from the first block to generate a plurality of phase measurements at the second block; and

a second phase shifter coupled to the second local oscillator circuit and configured to scan a phase of the second local oscillator signal from the second block to generate a plurality of phase measurements at the first block.

13. The system of claim 9, wherein the first local oscillator signal is generated internally within the first block and the second local oscillator signal is generated internally within the second block, and wherein:

the first baseband circuit further comprises a first switch to selectively generate the first local oscillator signal; and is

The second baseband circuit further includes a second switch to selectively generate the second local oscillator signal.

14. The system of claim 13, wherein:

the first baseband circuit further comprises a first mixer configured to mix the first local oscillator signal with a first signal having a constant DC voltage value to generate a first local oscillator induced DC offset signal; and is

The second baseband circuit also includes a second mixer configured to mix the second local oscillator signal with a second signal having a constant DC voltage value to generate a second local oscillator induced DC offset signal.

15. The system of claim 14, wherein:

the first baseband circuit further comprises a first DC offset cancellation circuit configured to measure a phase of the second local oscillator signal; and is

The second baseband circuit further includes a second DC offset cancellation circuit configured to measure a phase of the first local oscillator signal.

16. A system for performing alignment in a phased array antenna configuration, wherein the phased array antenna system comprises at least a first block and a second block positioned adjacent to the first block, wherein the first block and the second block each comprise at least one transmitter and at least one receiver of radio frequency signals, the system comprising a processor for executing computer program instructions stored in a memory, which when executed by the processor, cause the system to perform operations comprising:

setting a value for at least one baseband signal input associated with a first transmitter in the first block, the value being a constant DC voltage value;

mixing the at least one baseband signal input associated with the first transmitter with a first local oscillator signal to generate a first local oscillator induced DC offset signal for upconversion by the first transmitter and transmission to the second block;

down-converting a signal transmitted from the first transmitter to generate one or more DC voltage values in a baseband block of the second block; and

calculating a phase of the first local oscillator signal from the one or more DC voltage values associated with one or more baseband signal outputs derived from a DC offset cancellation function at the second block.

17. The system of claim 16, wherein the operations further comprise:

setting a value for at least one baseband signal input associated with a second transmitter in the second block, the value being a constant DC voltage value;

mixing at least one baseband signal input associated with the second transmitter with a second local oscillator signal to generate a second local oscillator induced DC offset signal for upconversion by the second transmitter and transmission to the second block;

down-converting a signal transmitted from the second transmitter to generate one or more DC voltage values in a baseband block of the first block; and

calculating a phase of the second local oscillator signal from the one or more DC voltage values associated with one or more baseband signal outputs derived from a DC offset cancellation function at the first block.

18. The system of claim 17, wherein the operations further comprise: calculating a phase difference between a phase of the first local oscillator signal and a phase of the second local oscillator signal.