CN113422632A - Satellite communication system - Google Patents
Satellite communication system Download PDFInfo
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- CN113422632A CN113422632A CN202110568069.4A CN202110568069A CN113422632A CN 113422632 A CN113422632 A CN 113422632A CN 202110568069 A CN202110568069 A CN 202110568069A CN 113422632 A CN113422632 A CN 113422632A
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- 238000004891 communication Methods 0.000 title claims abstract description 22
- 238000012545 processing Methods 0.000 claims abstract description 52
- 238000006243 chemical reaction Methods 0.000 claims abstract description 5
- 230000005540 biological transmission Effects 0.000 claims description 14
- 230000003321 amplification Effects 0.000 claims description 3
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 3
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
- H04B7/18515—Transmission equipment in satellites or space-based relays
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Abstract
One embodiment of the present invention discloses a satellite communication system, including: the microwave signal processing module comprises a baseband application processing module, a zero intermediate frequency architecture module, a receiving antenna and a transmitting antenna, wherein the zero intermediate frequency architecture module is used for amplifying a microwave signal received by the receiving antenna in a receiving state, and then converting the microwave signal into a baseband signal in a down-conversion mode and sending the baseband signal to the baseband application processing module; in the transmitting state, the baseband application processing module is used for up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal, and then the microwave signal is amplified and sent out by a transmitting antenna; the baseband application processing module is used for carrying out digital demodulation and decoding on the received baseband signal to obtain communication information in a receiving state; and in the transmitting state, the module is used for sending a baseband modulation signal to the zero intermediate frequency architecture module. The invention relates to a satellite communication system, which reduces the development period and cost of the satellite communication system by using an ADRV9009 highly integrated broadband radio frequency transceiver to replace the radio frequency building of a discrete device.
Description
Technical Field
The invention relates to the technical field of satellite communication, in particular to a satellite communication system.
Background
With the development of technology, zero-if signal processing architectures have emerged since the beginning of the radio, and are now found in many consumer radio applications, which are so widespread mainly because of their lowest cost, lowest power consumption and smallest size. Although radio product application demands are growing rapidly, power consumption and space budgets are not growing. With the ever increasing demands for power consumption and space saving, it is important to reduce both carbon emissions and size. In the future, satellite communication needs to be fused into a 5G integrated wireless access network, the network uses a satellite infrastructure and a 5G core network, end-to-end time delay of millisecond level, mobility of more than 500Km per hour, peak rate of digital Gbps and the like, and energy efficiency and cost efficiency are improved by more than one hundred times. To achieve these goals, the zero intermediate frequency signal processing architecture needs to be known from a new perspective. At present, most of domestic satellite communication architectures are built by discrete module devices, and the traditional radio frequency transmission idea is that digital signals are up-converted into intermediate frequency and then are converted into high-frequency signals which are wanted by people; and the radio frequency receiving is that the high frequency signal is down-converted into the intermediate frequency, then the down-conversion is continued to the baseband signal, and then the baseband signal is processed. However, due to the design, the power consumption of the whole machine is large, the system integration cost is high, research and development designers need to have abundant radio frequency signal processing and hardware design experience, and the threshold requirement on the aspect of software design is also high. With the development of commercial low-earth orbit satellite internet, compared with the traditional satellite communication architecture, the zero intermediate frequency architecture has the advantages of lower development cost, lower power consumption, more flexible use and higher performance.
Disclosure of Invention
The invention aims to provide a satellite communication system, which utilizes an integrated zero intermediate frequency signal processing architecture, provides a dual-channel transmitter and receiver, an integrated synthesizer and a digital signal processing function for a highly integrated broadband radio frequency transceiver applied to a satellite internet system, and solves the problems of power consumption, space, carbon emission reduction and the like in the traditional structure.
In order to solve the above problems, the present invention provides the following technical solutions:
the present invention provides a satellite communication system, comprising: a baseband application processing module, a zero intermediate frequency architecture module, a receiving antenna and a transmitting antenna, wherein,
the zero intermediate frequency architecture module is used for amplifying the microwave signal received by the receiving antenna in a receiving state, and then converting the microwave signal into a baseband signal through down conversion and sending the baseband signal to the baseband application processing module; in the transmitting state, the baseband application processing module is used for up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal, and then the microwave signal is amplified and sent out by a transmitting antenna;
the baseband application processing module is used for carrying out digital demodulation and decoding on the received baseband signal to obtain communication information in a receiving state; and in the transmitting state, the module is used for sending a baseband modulation signal to the zero intermediate frequency architecture module.
In a specific embodiment, the zero intermediate frequency architecture module includes: a low noise amplifier module, a power amplifier module and an ADRV9009, wherein,
the low-noise amplifier module is used for amplifying the received microwave signal in a receiving state;
the ADRV9009 down-converts the amplified microwave signal into a baseband signal in a receiving state and sends the baseband signal to the baseband application processing module; up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal in a transmitting state;
and the power amplification module amplifies the microwave signal modulated by the ADRV9009 in a transmitting state.
In a specific embodiment, the baseband application processing module performs corresponding register configuration control ADRV9009 through the SPI bus to complete data transmission.
In a specific embodiment, the data interface between the baseband application processing module and the ADRV9009 is JESD204B, and the JESD204B is used for transceiving data.
In one embodiment, the SPI bus uses a four wire interface mode, MSB First multi-byte transmission, with an address pointer being incremented automatically.
In one embodiment, the baseband application processing module sends an instruction word to set a read or write operation, wherein,
during write operation, the baseband application processing module transmits 8-bit data to the ADRV9009, the ADRV9009 finishes receiving the data, the register address is decreased progressively, the baseband application processing module continues to transmit the next 8-bit data from the MSB to the LSB, and when the CS signal level is increased, the data transmission is terminated;
during reading operation, the ADRV9009 sequentially sends 8-bit data to the baseband application processing module from MSB to LSB, the register address continues to send 8-bit data after increasing, and when the CS signal level is pulled high, data transmission is terminated.
The invention has the beneficial effects that:
the invention relates to a satellite communication system, which uses an ADRV9009 highly integrated broadband radio frequency transceiver to replace the radio frequency building of a discrete device, reduces the development period and the cost of the satellite communication system, uses an innovative digital JESD204B interface, reduces the number of SERDES circuits by half, and reduces the complexity and the cost of a baseband application processing module. The integration and system cost reduction will have good application prospects in future low-power consumption and small-outline size application occasions.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a block diagram illustrating a satellite communications architecture according to one embodiment of the invention.
Fig. 2 shows a block diagram of an integrated broadband radio frequency transceiver ADRV9009 of the present invention.
Fig. 3 shows a timing diagram of an SPI read operation in the present invention.
Fig. 4 shows a timing diagram of an SPI write operation in the present invention.
Detailed Description
In order to make the technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The present invention provides a satellite communication system, as shown in fig. 1, including: a baseband application processing module, a zero intermediate frequency architecture module, a receiving antenna and a transmitting antenna, wherein,
the zero intermediate frequency architecture module is used for amplifying the microwave signal received by the receiving antenna in a receiving state, and then converting the microwave signal into a baseband signal through down conversion and sending the baseband signal to the baseband application processing module; in the transmitting state, the baseband application processing module is used for up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal, and then the microwave signal is amplified and sent out by a transmitting antenna;
the baseband application processing module is used for carrying out digital demodulation and decoding on the received baseband signal to obtain communication information in a receiving state; and in the transmitting state, the module is used for sending a baseband modulation signal to the zero intermediate frequency architecture module.
In one embodiment, the communication information is text, voice, video, picture, etc. that can be read and understood by people.
In a specific embodiment, the zero intermediate frequency architecture module includes: a low noise amplifier module, a power amplifier module and an integrated broadband radio frequency transceiver ADRV9009, wherein,
the Low Noise Amplifier (LNA) module is used for amplifying the received microwave signals in a receiving state;
the ADRV9009 down-converts the amplified microwave signal into a baseband signal in a receiving state and sends the baseband signal to the baseband application processing module; up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal in a transmitting state;
and the power amplification module (PA) amplifies the microwave signal modulated by the ADRV9009 in a transmitting state.
In one particular embodiment, the integrated wideband radio frequency transceiver ADRV9009 comprises three radio frequency PLL synthesizers: a radio frequency local oscillator synthesizer, an auxiliary synthesizer and a clock synthesizer, as shown in fig. 2, each PLL synthesizer adopts a fractional division architecture with a highly integrated voltage-controlled oscillator and a loop filter and generates a required frequency by itself; the synthesizer configuration can use any reference frequency to match the channel sampling rate, each PLL fundamental frequency ranges from 6GHz to 12GHz, the PLL voltage controlled oscillator frequency is divided to obtain the local oscillator frequency, the transmission frequency range can reach 70MHz to 6GHz, and the reference clock frequency of the PLL is from the input pin of REF _ CLK _ IN plus or minus.
In a specific embodiment, the baseband application processing module performs corresponding register configuration through the SPI bus to control the ADRV9009 to complete data transmission, performs corresponding configuration on the ADRV9009 according to a specific use scenario, and enters a working state after all parameter configuration is successfully set by the baseband application processing module, so that data can be received and transmitted.
In a specific embodiment, the data interface between the baseband application processing module and the ADRV9009 is a high-speed port JESD204B, and data transmission and reception are performed through the data interface.
The data interface is JESD204B, the interface rate can reach 12.5Gbps to the maximum, the data throughput requirement of ADRV9009 in the widest bandwidth mode can be met, and all receiving and transmitting digital filtering sampling rates in the chip can meet the requirement of JESD 204B.
In one embodiment, the SPI bus has two modes: three-wire and four-wire modes. The difference between the former and the latter lies in that SDIO in the three-wire mode can be used for reading and writing, while SDO is added in the four-wire mode for reading.
In one embodiment, the baseband application processing module sends an instruction word to set a read or write operation, wherein,
during read operation, as shown in fig. 3, ADRV9009 sequentially sends 8-bit data from MSB to LSB to the baseband application processing module, the register address continues to send 8-bit data after being incremented, and when the CS signal level is pulled high, data transmission is terminated;
in a write operation, as shown in fig. 4, the baseband application processing module transmits 8-bit data to the ADRV9009, the ADRV9009 finishes receiving the data, the register address is decremented, the baseband application processing module continues to transmit the next 8-bit data from the MSB to the LSB, and when the CS signal level is raised, the data transmission is terminated.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (6)
1. A satellite communication system, comprising: a baseband application processing module, a zero intermediate frequency architecture module, a receiving antenna and a transmitting antenna, wherein,
the zero intermediate frequency architecture module is used for amplifying the microwave signal received by the receiving antenna in a receiving state, and then converting the microwave signal into a baseband signal through down conversion and sending the baseband signal to the baseband application processing module; in the transmitting state, the baseband application processing module is used for up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal, and then the microwave signal is amplified and sent out by a transmitting antenna;
the baseband application processing module is used for carrying out digital demodulation and decoding on the received baseband signal to obtain communication information in a receiving state; and in the transmitting state, the module is used for sending a baseband modulation signal to the zero intermediate frequency architecture module.
2. The system of claim 1, wherein the zero intermediate frequency architecture module comprises: a low noise amplifier module, a power amplifier module and an ADRV9009, wherein,
the low-noise amplifier module is used for amplifying the received microwave signal in a receiving state;
the ADRV9009 down-converts the amplified microwave signal into a baseband signal in a receiving state and sends the baseband signal to the baseband application processing module; up-converting the baseband modulation signal sent by the baseband application processing module into a microwave signal in a transmitting state;
and the power amplification module amplifies the microwave signal modulated by the ADRV9009 in a transmitting state.
3. The system of claim 2, wherein the baseband application processing module performs corresponding register configuration control ADRV9009 via SPI bus to complete data transmission.
4. The system of claim 2, wherein the data interface between the baseband application processing module and the ADRV9009 is JESD204B, and the JESD204B interface is used for transceiving data.
5. The system of claim 3, wherein the SPI bus uses a four wire interface mode, MSB First multi-byte transmission, with an address pointer auto-increment.
6. The system of claim 5, wherein the baseband application processing module sends an instruction word to set a read or write operation, wherein,
during write operation, the baseband application processing module transmits 8-bit data to the ADRV9009, the ADRV9009 finishes receiving the data, the register address is decreased progressively, the baseband application processing module continues to transmit the next 8-bit data from the MSB to the LSB, and when the CS signal level is increased, the data transmission is terminated;
during reading operation, the ADRV9009 sequentially sends 8-bit data to the baseband application processing module from MSB to LSB, the register address continues to send 8-bit data after increasing, and when the CS signal level is pulled high, data transmission is terminated.
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| CN202110568069.4A CN113422632A (en) | 2021-05-25 | 2021-05-25 | Satellite communication system |
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| CN202110568069.4A CN113422632A (en) | 2021-05-25 | 2021-05-25 | Satellite communication system |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106908809A (en) * | 2017-03-31 | 2017-06-30 | 广州海格通信集团股份有限公司 | The anti-interference antenna of satellite system |
| CN110545121A (en) * | 2019-08-14 | 2019-12-06 | 湖北三江航天险峰电子信息有限公司 | Satellite communication method and module |
| CN210111991U (en) * | 2019-08-30 | 2020-02-21 | 华讯方舟科技有限公司 | Zero intermediate frequency radio frequency receiving and transmitting system |
| CN111416649A (en) * | 2020-05-22 | 2020-07-14 | 西安电子科技大学 | Digital beam forming method based on zero intermediate frequency architecture |
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- 2021-05-25 CN CN202110568069.4A patent/CN113422632A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106908809A (en) * | 2017-03-31 | 2017-06-30 | 广州海格通信集团股份有限公司 | The anti-interference antenna of satellite system |
| CN110545121A (en) * | 2019-08-14 | 2019-12-06 | 湖北三江航天险峰电子信息有限公司 | Satellite communication method and module |
| CN210111991U (en) * | 2019-08-30 | 2020-02-21 | 华讯方舟科技有限公司 | Zero intermediate frequency radio frequency receiving and transmitting system |
| CN111416649A (en) * | 2020-05-22 | 2020-07-14 | 西安电子科技大学 | Digital beam forming method based on zero intermediate frequency architecture |
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