CN113407752B - Graph database memory management method, system, electronic device and storage medium - Google Patents
Graph database memory management method, system, electronic device and storage medium Download PDFInfo
- Publication number
- CN113407752B CN113407752B CN202110954028.9A CN202110954028A CN113407752B CN 113407752 B CN113407752 B CN 113407752B CN 202110954028 A CN202110954028 A CN 202110954028A CN 113407752 B CN113407752 B CN 113407752B
- Authority
- CN
- China
- Prior art keywords
- operator
- variable
- current
- execution plan
- input variable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/50—Information retrieval; Database structures therefor; File system structures therefor of still image data
- G06F16/53—Querying
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/70—Software maintenance or management
- G06F8/75—Structural analysis for program understanding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
Abstract
The method comprises the steps of generating an execution plan of a graph database through a syntax tree, registering a mapping table when the execution plan is generated, wherein the mapping table is used for storing variables and corresponding variable values, the execution plan comprises a plurality of operators, finding out an end user of each variable through preorder traversal, and releasing a variable value corresponding to an input variable after the current operator is executed if the current operator is the end user of the input variable in the process of executing the execution plan; the method and the device solve the problems of query failure and abnormal exit of service even when a large amount of query is carried out in a large data volume or a large number of queries are carried out simultaneously due to the fact that memory occupation is greatly increased in the related technology, reduce invalid memory occupation and improve the stability of graph database operation.
Description
Technical Field
The present application relates to the field of graph database technologies, and in particular, to a graph database memory management method and system based on static analysis, an electronic device, and a storage medium.
Background
With the rise of industries such as retail, finance, e-commerce, internet and internet of things, graph databases are applied more and more widely.
At present, memory management in a graph database is very rough, a mode which is often adopted is that no additional processing is performed on intermediate variables, all variables are released uniformly after query execution is completed, and many intermediate variables have no effect in the query process but are still not released, so that a large amount of invalid memory occupation is caused and query time is also increased.
Disclosure of Invention
The embodiment of the application provides a graph database memory management method, a graph database memory management system, electronic equipment and a storage medium based on static analysis, so that the problem that in the related technology, when a large amount of data is queried or a large amount of queries are performed concurrently, the memory occupation is greatly increased, so that the query fails and even the service is abnormal is at least solved.
In a first aspect, an embodiment of the present application provides a static analysis-based graph database memory management method, where the method includes:
generating an execution plan of a graph database through a syntax tree, and registering a mapping table when the execution plan is generated, wherein the mapping table is used for storing variables and corresponding variable values, and the execution plan comprises a plurality of operators;
finding out the final users of all the variables through the first-order traversal;
in the process of executing the execution plan, if the current operator is the end user of the input variable, releasing the variable value corresponding to the input variable after the current operator is executed, wherein the operator of the current input variable is called as the current operator.
In some embodiments, the execution order of the execution plan is to execute the dependent operator of the current operator first and then execute the current operator.
In some embodiments, the step of executing the dependent operator of the current operator first and then executing the current operator includes:
judging whether the current operator has a branch operator and/or a dependent operator;
if the current operator does not have the branch operator and/or the dependency operator, the current operator is a leaf node;
executing the current operator starting from the leaf node.
In some embodiments, the analyzing whether the current operator is the end user of the input variable by the preface traversal comprises:
traversing said execution plan in an order reverse to said execution order, the operator that first references said input variable then being said end user.
In some of these embodiments, prior to storing variables and corresponding variable values to the mapping table, the method further comprises:
and if the variable is judged not to be used by the operator, the variable value corresponding to the variable is not stored in the mapping table.
In some embodiments, the mapping table stores variable names, and the number of the variable names is kept unchanged after registration.
In some embodiments, the operators include one or more combinations of recombination operators, truncation operators, loop operators, filter operators, index scan operators, or neighbor acquisition operators.
In a second aspect, an embodiment of the present application provides a static analysis-based map database memory management system, including:
the generating module is used for generating an execution plan of the graph database according to a syntax tree and registering a mapping table when the execution plan is generated;
the analysis module is used for analyzing whether the operator of the current input variable is a final user according to the first-order traversal before executing the operator of the current input variable, and outputting a corresponding analysis result;
and the management module is used for releasing the variable value corresponding to the input variable or storing the variable value into the mapping table according to the analysis result after the operator of the current input variable is executed.
In a third aspect, an embodiment of the present application provides an electronic device, including a memory and a processor, where the memory stores a computer program, and the processor is configured to implement the static analysis-based map database memory management method according to the first aspect when running the computer program.
In a fourth aspect, an embodiment of the present application provides a storage medium, in which a computer program is stored, where the computer program is configured to, when executed in runtime, implement the static analysis-based graph database memory management method according to the first aspect.
Compared with the prior art, the graph database memory management method based on static analysis provided by the embodiment of the application generates the execution plan of the graph database through the syntax tree, registers the mapping table when the execution plan is generated, finds out the end user of each variable through preorder traversal before the execution plan is executed, releases the variable value corresponding to the input variable after the current operator is executed if the current operator is the end user of the input variable in the process of executing the plan, compared with the stability of the operation of the graph database in the prior art, adopts a mode of not performing additional processing on the intermediate variable, uniformly releases all the variables after the query execution is finished, and for the query with large data volume or the concurrent large query, the problem of query failure or even abnormal exit of service is caused because the memory occupies a great amount of continuous increase and the whole query execution is not finished, before executing the execution plan, the embodiment of the application finds out the end user of each variable through preorder traversal, namely, whether the current operator is the end user of the input variable is analyzed and completed before the step of analyzing whether the current operator is the end user of the input variable, the execution can be directly judged by reading the analysis result (whether the current operator is the end user of the input variable), finally, in the process of executing the plan, if the current operator is the end user of the input variable, the variable value corresponding to the input variable is released after the current operator is executed, namely, in the process of executing the plan, the memory of the end user of the input variable is released in real time, the occupation of invalid memory is greatly reduced, and the problem that the query fails or even the service exits due to continuous and large increase of the memory occupation is solved for the query of large data volume or the large number of queries which are carried out concurrently, the embodiment reduces the occupation of invalid memories and improves the stability of graph database operation.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
FIG. 1 is a first flowchart of a static analysis-based method for managing a memory in a database according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a first process of steps for executing a dependent operator of a current operator first and then executing the current operator according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a second process of steps of executing a dependent operator of a current operator first and then executing the current operator according to an embodiment of the present application;
FIG. 4 is a flow diagram of an execution plan for generating a graph database from a syntax tree according to an embodiment of the present application;
FIG. 5 is a block diagram of a static analysis based map database memory management system according to an embodiment of the present application;
fig. 6 is an internal structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided in the present application without any inventive step are within the scope of protection of the present application. Moreover, it should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the specification. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of ordinary skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments without conflict.
Unless defined otherwise, technical or scientific terms referred to herein shall have the ordinary meaning as understood by those of ordinary skill in the art to which this application belongs. Reference to "a," "an," "the," and similar words throughout this application are not to be construed as limiting in number, and may refer to the singular or the plural. The present application is directed to the use of the terms "including," "comprising," "having," and any variations thereof, which are intended to cover non-exclusive inclusions; for example, a process, method, system, article, or apparatus that comprises a list of steps or modules (elements) is not limited to the listed steps or elements, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus. Reference to "connected," "coupled," and the like in this application is not intended to be limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Reference herein to "a plurality" means greater than or equal to two. "and/or" describes an association relationship of associated objects, meaning that three relationships may exist, for example, "A and/or B" may mean: a exists alone, A and B exist simultaneously, and B exists alone. Reference herein to the terms "first," "second," "third," and the like, are merely to distinguish similar objects and do not denote a particular ordering for the objects.
At present, memory management in a graph database is very rough, a mode which is often adopted is that no additional processing is performed on intermediate variables, all variables are released uniformly after query execution is completed, and many intermediate variables have no effect in the query process but are still not released, so that a large amount of invalid memory occupation is caused and query time is also increased.
In order to solve the above problems, the present application provides a static analysis-based graph database memory management method, which can be used in industries such as retail, finance, e-commerce, internet of things, and the like, fig. 1 is a first flow diagram of the static analysis-based graph database memory management method according to the embodiment of the present application, and as shown in fig. 1, the method includes:
step S101, generating an execution plan of a Graph Database (also called Graph Database) through a syntax tree, and registering a mapping table when generating the execution plan, wherein the mapping table is used for storing variables and corresponding variable values, and the execution plan comprises a plurality of operators; the syntax tree is a graphic representation of the sentence structure, represents the derivation result of the sentence and is beneficial to understanding the hierarchy of the sentence syntax structure. In brief, a syntax tree is a tree formed when derivation is performed according to a certain rule. In addition, in the embodiment, the execution plan of the local Graph database is a Directed Acyclic Graph (DAG) composed of a plurality of operators from a topological point of view, that is, the generated execution plan itself is a Directed Acyclic Graph, and in mathematics, particularly Graph theory and computer science, the Directed Acyclic Graph refers to a loop-free Directed Graph. For example, if there is a non-directed acyclic graph and point a can go back to point a through point B and C, forming a ring, then changing the edge direction from C to a from a to C becomes a directed acyclic graph.
Step S102, finding out the final user of each variable through the prior traversal (Pre-order, prior traversal); that is, before executing the operator of the current input variable, the end user of each variable is found out through the first-order traversal, the process of analyzing whether the current operator is the end user of the input variable is already completed, and the process of the subsequent execution is directly judged by reading the analysis result (whether the current operator is the end user of the input variable), so that the subsequent use is facilitated; it should be noted that, in general, each variable has an end user, that is, the end user of the input variable is the last operator using the variable during the execution of the operator. In addition, the person skilled in the art knows that the preface traversal is to pass through all nodes on the path along a certain path according to the left and right sequence of the root, and the description is omitted here.
Step S103, in the process of executing the execution plan, if the current operator is the end user of the input variable, after the current operator is executed, releasing the variable value corresponding to the input variable, wherein the operator of the current input variable is called as the current operator. Therefore, invalid memory occupation is reduced, and the stability of the graph database is improved.
It should be noted that, in this document, reducing the memory through static analysis is not performed by a specific operator, but is performed by analyzing an execution plan composed of operators, and analyzing which operator uses the result output by each operator (the output result is a variable value corresponding to an input variable) and then the result is not used, and at this time, the memory occupied by the result (the variable value corresponding to the input variable) is released, thereby achieving the effect of reducing the invalid memory occupation.
Through the above steps S101 to S103, the embodiment generates an execution plan of a graph database through a syntax tree, registers a mapping table when generating the execution plan, finds out an end user of each variable through a pre-sequence traversal before executing the execution plan, and in the process of executing the execution plan, if a current operator is an end user of an input variable, releases a variable value corresponding to the input variable after the current operator is executed, compared with the stability of the previous graph database, the method is adopted that no additional processing is performed on the intermediate variable, and after the query execution is completed, all variables are released in a unified manner, and for a query with a large data volume or a large number of queries performed concurrently, because the memory occupation increases greatly and the whole query execution is not completed yet, the query fails or even the service exits abnormally, in the embodiment of the present application before executing the execution plan, the end user of each variable is found out through preorder traversal, namely, the step of analyzing whether the current operator is the end user of the input variable is analyzed and completed before executing the execution plan, the analysis result (whether the current operator is the end user of the input variable or not) is directly judged during execution, finally, in the process of executing the plan, if the current operator is the end user of the input variable, the variable value corresponding to the input variable is released after the current operator is executed, namely, the memory of the end user of the input variable is released in real time during the execution plan process, the occupation of invalid memory is greatly reduced, and the problems of query failure and abnormal service exit caused by continuous and large increase of the memory occupation are solved for the query of large data volume or concurrent large quantity query, the embodiment reduces the occupation of invalid memories and improves the stability of graph database operation.
In this embodiment, the execution sequence of the execution plan is to execute the dependent operator of the current operator first, and then execute the current operator; for example, if we have three operators, operator 3, operator 2, and operator 1, and operator 3 depends on operator 2, operator 2 depends on operator 1, and operator 1 does not have any dependency, the execution order of the execution plan is operator 1, operator 2, and operator 3. Of course, in some other embodiments, the execution order of the execution plan may be other, and is not limited specifically here.
Fig. 2 is a first flowchart of a step of executing a dependent operator of a current operator first and then executing the current operator according to an embodiment of the present application, as shown in fig. 2, since an execution plan has some branch structures with special meanings, such as a loop and a conditional branch, the loop branch is executed in a loop at the execution place, the conditional branch is executed in a loop according to a condition value, in order to satisfy diversity of the execution plan, in some other embodiments, the step of executing the dependent operator of the current operator first and then executing the current operator includes:
step S201, judging whether the current operator has a branch operator and/or a dependent operator; wherein each operator points to its dependent operator through a pointer, each operator can have any number of inputs and 0-1 outputs.
Step S202, if the current operator has no branch operator and/or dependency operator, the current operator is a leaf node; those skilled in the art know that nodes without child nodes (i.e., degree 0) in a tree are called leaf nodes, and are not described in detail here.
Step S203, the current operator is executed from the leaf node.
Fig. 3 is a schematic diagram of a second flow of a step of executing a dependent operator of a current operator first and then executing the current operator according to an embodiment of the present application, as shown in fig. 3, further, in another embodiment, the step of executing the dependent operator of the current operator first and then executing the current operator further includes:
step S301, judging whether the current operator is used;
step S302, if the current operator is judged not to be used, the current operator is set as a final user of an input variable; that is to say, if the current operator does not have an end user, it indicates that the current operator is not used by anyone, so that the current operator does not exist in the mapping table directly, and thus, invalid memory occupation is reduced. In this embodiment, judging whether the current operator is already used may be implemented by using a function or an algorithm of the existing method, and certainly, in some other embodiments, it may also be implemented by using another function or algorithm that occupies a smaller memory, which is not specifically limited herein.
Step S303, if the current operator is judged to be used, judging whether a branch operator exists in the current input operator; the judgment of whether the branch operator exists in the current input operator may be implemented by using a function or an algorithm of whether the branch operator exists, and certainly, in some other embodiments, the judgment may also be implemented by using another function or algorithm that occupies a smaller memory, which is not specifically limited herein.
Step S304, if the current input operator has a branch operator, entering the branch operator and executing the branch operator;
step S305, if the current input operator does not have a branch operator, continuing to execute the step S305 downwards;
step S306, judging whether the current input operator has a dependent operator, and if the current operator does not have the dependent operator, releasing the current operator; the determination of whether the current input operator has the dependent operator may be implemented by using a function or an algorithm of whether the current input operator has the dependent operator, and certainly, in some other embodiments, the determination may also be implemented by using other functions or algorithms that occupy a smaller memory, which is not specifically limited herein.
Step S307, if the dependent operator exists in the current input operator, the step S301 is continuously executed in a circulating mode until the current operator is released when the fact that the dependent operator does not exist in the current operator is judged;
through the above steps S301 to S307, in this embodiment, if it is determined that the current operator is not used, the variable output by the operator is not used, and there is no mapping table directly, so that invalid memory usage is reduced, then, it is determined whether the current operator is an end user of an input variable according to a previous analysis result (the analysis result is an end user who analyzes whether the current operator is an input variable), and if so, the value of the corresponding input variable is released, so that invalid memory usage is reduced to the maximum, and the stability of the graph database is improved.
In one embodiment, analyzing whether the current operator is the end user of the input variable by a pre-order traversal comprises:
the execution plan is traversed in the reverse order of execution, with the first operator referencing the input variables being the end user.
It should be noted that the normal execution sequence is a subsequent traversal, and in short, when an operator is executed, the operator that it depends on is executed first, and the operator that depends on also executes the operator that depends on itself first, so that the traversal is performed until the leaf node of the execution plan, that is, an operator that does not depend on the operator, is executed from the operator back. The three operators, namely operator 3, operator 2 and operator 1, are taken as an example for explanation, the operator 3 depends on the operator 2, the operator 2 depends on the operator 1, and the operator 1 does not have any dependency, so the execution sequence of the execution plan is operator 1, operator 2 and operator 3, the present embodiment traverses operator 3, operator 2, operator 1 and the operator with the first reference input variable in the reverse order of the execution sequence, and then operator 3 is the final user. Thus, after one traversal of the execution plan, the end-user of all variables is analyzed. Then, at execution time, each operator execution is completed and it is checked whether it is the end user of the input variable, and if so, the variable is released. Thus, each variable is released immediately after the last variable is used, and invalid memory usage is minimized.
In some embodiments, prior to storing the variables and corresponding variable values to the mapping table, the method further comprises:
and if the variable is judged not to be used by the operator, the variable value corresponding to the variable is not stored in the mapping table. The space occupied by the variable value is large, and in order to reduce the use of invalid memories, when the variable is judged not to be used by an operator, the variable value corresponding to the variable is not stored in the mapping table.
In addition, in order to ensure the data security of concurrent execution, in some embodiments, variable names are stored in the mapping table, and the number of the variable names is kept unchanged after registration. That is, in the subsequent execution plan, the increase or decrease is not allowed, so that the sequential writing of the single operator is ensured, and the data security of the concurrent execution is ensured.
In an alternative embodiment, the operator includes one or more combinations of a recombination operator (Project), a truncation operator (Limit), a Loop operator (Loop), a Filter operator (Filter), an index scan operator (IndexScan), or a neighbor acquisition operator (GetNeighbors), although in some other embodiments, the operator may include other types of operators according to actual requirements, and is not specifically limited herein; fig. 4 is a schematic flow chart of an execution plan for generating a map database through a syntax tree according to an embodiment of the present application, and specifically, referring to fig. 4, the operators include a restructure operator (Project), a truncate operator (Limit), a Loop operator (Loop), a Filter operator (Filter), an index scan operator (IndexScan), and a neighbor acquisition operator (GetNeighbors), in the execution plan shown in fig. 4, the restructure operator (Project) uses a variable result output by the truncate operator (Limit) (the variable result is a variable value), the truncate operator (Limit) uses a variable result output by the Filter operator (Filter), the Filter operator (Filter) uses a variable result by the restructure operator (Project), the restructure operator (Project) uses a variable result by the neighbor acquisition operator (GetNeighbors), and the neighbor acquisition operator (GetNeighbors) uses a variable result by the index scan operator (IndexScan); so we are analyzing the time from the restructuring operator (Project) to the traversal, checking that the restructuring operator (Project) uses the output result of the truncation operator (Limit), and the result output by the truncation operator (Limit) has not set the end user, so the restructuring operator (Project) is set as the end user of the output result of the truncation operator (Limit); and repeating the steps step by step to obtain all final users outputting results. During execution, for example, after the recombination operator (Project) is executed, it is checked that the recombination operator (Project) is an end user of the output result of the truncation operator (Limit), that is, after the recombination operator (Project) is executed, no other operator can reuse the output result of the truncation operator (Limit), so that the memory occupied by the output result of the truncation operator (Limit) can be released, and the invalid memory occupation can be reduced.
Fig. 5 is a block diagram of a static analysis-based map database memory management system according to an embodiment of the present application, and as shown in fig. 5, the present application further provides a static analysis-based map database memory management system, which includes:
a generating module 51, configured to generate an execution plan of the graph database according to a syntax tree, and register a mapping table when generating the execution plan; the mapping table is used for storing variables and corresponding variable values, and the execution plan comprises a plurality of operators;
the analysis module 52 is configured to, before executing the operator of the current input variable, analyze whether the operator of the current input variable is an end user according to a first-order traversal, and output a corresponding analysis result;
and the management module 53 is configured to, after the operator of the current input variable is executed, release a variable value corresponding to the input variable according to the analysis result or store the variable value in the mapping table.
It should be noted that, since the static analysis-based map database memory management system adopts all the technical solutions of all the embodiments described above, at least all the beneficial effects brought by the technical solutions of the embodiments described above are achieved, and are not redundant here.
The present application further provides an electronic device comprising a memory having a computer program stored therein and a processor configured to run the computer program to perform the static analysis-based map database memory management method described above.
Optionally, the electronic device may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.
Optionally, in this embodiment, the processor may be configured to execute the following steps by a computer program:
step S101, generating an execution plan of a graph database through a syntax tree, and registering a mapping table when the execution plan is generated, wherein the mapping table is used for storing variables and corresponding variable values, and the execution plan comprises a plurality of operators;
step S102, finding out the final users of all variables through first-order traversal;
step S103, in the process of executing the execution plan, if the current operator is the end user of the input variable, after the current operator is executed, releasing the variable value corresponding to the input variable, wherein the operator of the current input variable is called as the current operator.
It should be noted that, for specific examples in this embodiment, reference may be made to examples described in the foregoing embodiments and optional implementations, and details of this embodiment are not described herein again.
In addition, in combination with the static analysis-based graph database memory management method in the foregoing embodiments, embodiments of the present application may provide a storage medium to implement. The storage medium having stored thereon a computer program; the computer program, when executed by a processor, implements any of the static analysis-based graph database memory management methods of the embodiments described above.
In one embodiment, a computer device is provided, which may be a terminal. The computer device includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a static analysis-based method for managing a map database memory. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the computer equipment, an external keyboard, a touch pad or a mouse and the like.
In an embodiment, fig. 6 is a schematic internal structure diagram of an electronic device according to an embodiment of the present application, and as shown in fig. 6, there is provided an electronic device, which may be a server, and its internal structure diagram may be as shown in fig. 5. The electronic device comprises a processor, a network interface, an internal memory and a non-volatile memory connected by an internal bus, wherein the non-volatile memory stores an operating system, a computer program and a database. The processor is used for providing calculation and control capability, the network interface is used for communicating with an external terminal through network connection, the internal memory is used for providing an environment for an operating system and the running of a computer program, the computer program is executed by the processor to realize a database and memory management method based on static analysis, and the database is used for storing data.
Those skilled in the art will appreciate that the configuration shown in fig. 6 is a block diagram of only a portion of the configuration associated with the present application, and does not constitute a limitation on the electronic device to which the present application is applied, and a particular electronic device may include more or less components than those shown in the drawings, or may combine certain components, or have a different arrangement of components.
It should be understood by those skilled in the art that various features of the above-described embodiments can be combined in any combination, and for the sake of brevity, all possible combinations of features in the above-described embodiments are not described in detail, but rather, all combinations of features which are not inconsistent with each other should be construed as being within the scope of the present disclosure.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (8)
1. A static analysis-based graph database memory management method, the method comprising:
generating an execution plan of a graph database through a syntax tree, and registering a mapping table when the execution plan is generated, wherein the mapping table is used for storing variables and corresponding variable values, and the execution plan comprises a plurality of operators; the execution sequence of the execution plan is to execute the dependent operator of the current operator first and then execute the current operator;
finding out the final users of all the variables through the first-order traversal;
in the process of executing the execution plan, if the current operator is the end user of the input variable, releasing the variable value corresponding to the input variable after the current operator is executed, wherein the operator of the current input variable is called as the current operator;
the step of analyzing whether the current operator is the end user of the input variable through the sequencing traversal comprises the following steps:
traversing said execution plan in an order reverse to said execution order, the operator that first references said input variable then being said end user.
2. The method of claim 1, wherein the step of executing the dependent operator of the current operator before executing the current operator comprises:
judging whether the current operator has a branch operator and/or a dependent operator;
if the current operator does not have the branch operator and/or the dependency operator, the current operator is a leaf node;
executing the current operator starting from the leaf node.
3. The method of claim 1, wherein prior to storing variables and corresponding variable values to the mapping table, the method further comprises:
and if the variable is judged not to be used by the operator, the variable value corresponding to the variable is not stored in the mapping table.
4. The method of claim 1, wherein variable names are stored in the mapping table, and the number of variable names remains unchanged after registration.
5. The method of any one of claims 1 to 4, wherein the operators comprise one or more combinations of recombination operators, truncation operators, loop operators, filtering operators, index scan operators, or neighbor acquisition operators.
6. A system for managing a memory in a graph database based on static analysis, the system comprising:
the generating module is used for generating an execution plan of the graph database according to a syntax tree and registering a mapping table when the execution plan is generated;
the analysis module is used for analyzing whether the operator of the current input variable is an end user according to the first-order traversal before executing the operator of the current input variable, and outputting a corresponding analysis result, wherein the step of analyzing whether the operator is the end user of the input variable through the first-order traversal comprises the following steps: traversing the execution plan in a sequence opposite to the execution sequence, wherein the operator which refers to the input variable is the end user, and the execution sequence of the execution plan is to execute the dependent operator of the current operator first and then execute the current operator;
and the management module is used for releasing the variable value corresponding to the input variable or storing the variable value into the mapping table according to the analysis result after the operator of the current input variable is executed.
7. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and the processor is configured to execute the computer program to perform the static analysis based map database memory management method of any of claims 1 to 5.
8. A storage medium having stored thereon a computer program, wherein the computer program is arranged to execute the static analysis based map database memory management method of any of claims 1-5 when run.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110954028.9A CN113407752B (en) | 2021-08-19 | 2021-08-19 | Graph database memory management method, system, electronic device and storage medium |
| US17/688,020 US11874831B2 (en) | 2021-08-19 | 2022-03-07 | Method and system for managing execution plan in graph database |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110954028.9A CN113407752B (en) | 2021-08-19 | 2021-08-19 | Graph database memory management method, system, electronic device and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113407752A CN113407752A (en) | 2021-09-17 |
| CN113407752B true CN113407752B (en) | 2021-11-16 |
Family
ID=77688887
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110954028.9A Active CN113407752B (en) | 2021-08-19 | 2021-08-19 | Graph database memory management method, system, electronic device and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113407752B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116761080A (en) * | 2022-10-13 | 2023-09-15 | 荣耀终端有限公司 | Image data processing method and terminal equipment |
| CN115599966B (en) * | 2022-12-15 | 2023-03-10 | 杭州欧若数网科技有限公司 | Data locality measurement method and system for distributed graph data |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106933733A (en) * | 2015-12-30 | 2017-07-07 | 华为技术有限公司 | A kind of method and apparatus for determining RAM leakage position |
| CN110968579A (en) * | 2018-09-30 | 2020-04-07 | 阿里巴巴集团控股有限公司 | Execution plan generation and execution method, database engine and storage medium |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9075712B2 (en) * | 2011-11-30 | 2015-07-07 | International Business Machines Corporation | Scheduling requests in a solid state memory device |
| US10642660B2 (en) * | 2017-05-19 | 2020-05-05 | Sap Se | Database variable size entry container page reorganization handling based on use patterns |
| CN112784120B (en) * | 2021-01-25 | 2023-02-21 | 浪潮云信息技术股份公司 | KV memory database storage management method based on range fragmentation mode |
-
2021
- 2021-08-19 CN CN202110954028.9A patent/CN113407752B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106933733A (en) * | 2015-12-30 | 2017-07-07 | 华为技术有限公司 | A kind of method and apparatus for determining RAM leakage position |
| CN110968579A (en) * | 2018-09-30 | 2020-04-07 | 阿里巴巴集团控股有限公司 | Execution plan generation and execution method, database engine and storage medium |
Non-Patent Citations (1)
| Title |
|---|
| 《JavaScript的垃圾回收机制，清除无用变量，释放多余内存，展现更好的性能》;「零一」;《https://blog.csdn.net/l_ppp/article/details/106858295》;20200623;第1-2页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113407752A (en) | 2021-09-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Havelund et al. | First-order temporal logic monitoring with BDDs | |
| Ji et al. | ispan: Parallel identification of strongly connected components with spanning trees | |
| Gulisano et al. | Scalejoin: A deterministic, disjoint-parallel and skew-resilient stream join | |
| Fan et al. | Distributed graph simulation: Impossibility and possibility | |
| CN113407752B (en) | Graph database memory management method, system, electronic device and storage medium | |
| US20200225921A1 (en) | Lookup table optimization for programming languages that target synchronous digital circuits | |
| CN101751333A (en) | Method, computer program and computer system for assisting in analyzing program | |
| Havelund et al. | Runtime verification logics a language design perspective | |
| Mo et al. | Performability analysis of k-to-l-out-of-n computing systems using binary decision diagrams | |
| EP3076289B1 (en) | Method, program, and apparatus, for managing a stored data graph | |
| Bakhishoff et al. | DTHMM ExaLB: discrete-time hidden Markov model for load balancing in distributed exascale computing environment | |
| Zou et al. | Lachesis: automatic partitioning for UDF-centric analytics | |
| Bédard et al. | Model checking of stream processing pipelines | |
| Yoon et al. | Testing component compatibility in evolving configurations | |
| Alemi et al. | CCFinder: using Spark to find clustering coefficient in big graphs | |
| Li et al. | High performance detection of strongly connected components in sparse graphs on GPUs | |
| CN115455006A (en) | Data processing method, data processing device, electronic device, and storage medium | |
| Cabodi et al. | A graph‐labeling approach for efficient cone‐of‐influence computation in model‐checking problems with multiple properties | |
| Higashino et al. | Attributed graph rewriting for complex event processing self-management | |
| Ryssel et al. | Reasoning of feature models from derived features | |
| Athanasopoulos et al. | Multi-objective service similarity metrics for more effective service engineering methods (short paper) | |
| Altisen et al. | Squeezing streams and composition of self-stabilizing algorithms | |
| Faghih et al. | ASSESS: A tool for automated synthesis of distributed self-stabilizing algorithms | |
| Klenik et al. | Adding semantics to measurements: Ontology-guided, systematic performance analysis | |
| Deininger et al. | Symbolic model checking for factored probabilistic models |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |