CN113407155A - Random number seed generator and method thereof - Google Patents
Random number seed generator and method thereof Download PDFInfo
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- CN113407155A CN113407155A CN202010181840.8A CN202010181840A CN113407155A CN 113407155 A CN113407155 A CN 113407155A CN 202010181840 A CN202010181840 A CN 202010181840A CN 113407155 A CN113407155 A CN 113407155A
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
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Abstract
A random number seed generator and a method thereof are provided. The provided random number seed generator comprises a random number register, a selector and an exclusive OR unit; a random number register stores a plurality of random numbers; an input signal of the random number seed generator is coupled to a control terminal of the selector; the selector generates an index according to an input signal of the random number seed generator and selects one of a plurality of random numbers stored by a random number register to be supplied to the exclusive-or unit; the input signal of the random number seed generator is also coupled to the input of the exclusive-or unit, the output of which acts as the random number seed generated by the random number seed generator from the input signal.
Description
Technical Field
The present application relates to a random number seed generator for data randomization, a method implemented by the random number seed generator and a storage device using the random number seed generator.
Background
Referring to FIG. 1, a block diagram of a storage device is shown. The storage device 102 is coupled to a host for providing storage capabilities to the host. The host and the storage device 102 may be coupled by a variety of means including, but not limited to, connecting the host and the storage device 102 by, for example, SATA, IDE, USB, PCIE, NVMe (NVM Express), SAS, ethernet, fibre channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The storage device 102 includes an interface 103, a control unit 104, one or more NVM (Non-Volatile Memory) chips 105 and optionally a firmware Memory 110. The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc. The control unit 104 is used to control data transfer between the interface 103, the NVM chip 105, and the firmware memory 110, and also used for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, and the like. The control component 104 can be implemented in a variety of ways including software, hardware, firmware, or a combination thereof. The control unit 104 may be in the form of an FPGA (Field-programmable gate array), an ASIC (Application Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller. Control unit 104 loads firmware from firmware memory 110 at runtime. Firmware memory 110 may be NOR flash, ROM, EEPROM, or may be part of NVM chip 105.
The memory Target (Target) is one or more Logic units (Logic units) that share a Chip Enable (CE) signal within the NAND flash package. Each logical Unit has a Logical Unit Number (LUN). One or more dies (Die) may be included within the NAND flash memory package. Typically, a logic cell corresponds to a single die. The logical unit may include a plurality of planes (planes). Multiple planes within a logical unit may be accessed in parallel, while multiple logical units within a NAND flash memory chip may execute commands and report status independently of each other. The meaning for target, logical Unit, LUN, Plane (Plane) is provided in "Open NAND Flash Interface Specification (Revision 3.0)" available from http:// www.micron.com// media/Documents/Products/Other% 20Documents/ONFI3_0gold.
Data is typically stored and read on a storage medium on a page-by-page basis. And data is erased in blocks. A block (also referred to as a physical block) contains a plurality of pages. A block contains a plurality of pages. Pages on the storage medium (referred to as physical pages) have a fixed size, e.g., 17664 bytes. Physical pages may also have other sizes.
NVM chips, such as NAND flash memory, require certain statistical properties of the data written to them. For example, the number of "0" s and "1" s is substantially the same, so that consecutive "0" s or "1" s are avoided, and "0" s and "1" s stored in memory cells around one physical memory cell are substantially uniform. To meet such requirements, data is scrambled prior to writing the data to the NVM chip, such that the data written to the NVM chip is randomized.
Fig. 2 is a schematic diagram of a data scrambling method in the prior art.
The randomizer 200 is used to scramble data to be written to the NVM chip. The randomizer 200 includes an m-sequence generator 210 and an exclusive or unit. The exclusive or unit exclusive ors the input data with the output of the m-sequence generator 210 to obtain output data corresponding to the data input as a result of scrambling the input data. The random number seed is provided to the m-sequence generator 210.
By way of example, to write data to a physical page P of the NVM chip, the m-sequence generator 210 is initialized with the physical address of the physical page P as a random number of seeds. The input data of the entire page is divided into small blocks corresponding to the size of the m-sequence generator 210, and each small block of data is sequentially supplied to the exclusive or unit to be exclusive-ored with the value output from the m-sequence generator 210. The exclusive or result is the scrambled data. Each pair of tiles performs an exclusive or operation and the m-sequence generator 210 advances to generate a new value.
In a similar manner, when reading out data from the physical page P, the read-out data is descrambled to obtain original data. For example, the m-sequence generator is initialized with the physical address of the physical page P as a seed, and for each small block of read data, the m-sequence generator is xored with the value of the m-sequence generator to obtain the corresponding small block of original data, and the m-sequence generator is advanced.
Other configurations of random number generators exist in the prior art. For example, chinese utility model patent zl201621458968.x provides yet another randomized scrambler and randomized descrambler.
NVM chips are also rapidly evolving and 3DNAND storage media have emerged, which store 1 bit (SLC), 2 bit (MLC), 3 bit (TLC) or even more bits of data per memory cell. The 3DNAND includes multiple layers in the Z direction (direction perpendicular to the wafer plane) of the wafer on which it is carried. The physical block sets word lines at each layer.
FIG. 3 shows an architecture diagram of a 3DNAND storage medium.
The 3d nand flash memory chip includes a plurality of physical blocks ( blocks 0 and 200 are shown in fig. 3) arranged in X-Y directions. The physical block includes a plurality of layers, shown in fig. 3 as layer L3, layer L4, layer L30, and layer L31, each of which includes a plurality of segments (segment 0 to segment 3 are shown). Each sector includes a word line. Taking TLC storage media as an example, a word line includes 3 physical pages, and each physical page of the same word line is referred to as LSB (least significant bit) page, CSB (middle significant bit) page, and MSB (most significant bit) page. Each physical page has a unique physical address. The physical page in the NVM chip is accessed by a physical address. Optionally, the physical address represents or does not represent a location of the physical page in a physical space of the storage medium.
The need for randomization of the data written to the NVM chip is also related to the spatial location carrying the data being written. For example, the LSB page, the CSB page, and the MSB page belonging to the same block share the same word line, and it is desirable that data written in the LSB page, the CSB page, and the MSB page belonging to the same word line have no correlation or as little correlation as possible, in addition to randomness. It is also desirable to write the data of the three physical pages so that the recorded potential (or charge amount) of each memory cell of the word line has randomness. Still by way of example, referring also to FIG. 3, tile 0 of layer L3 of physical tile 0 is co-located with tile 0 of layer L4 in the X-Y plane and adjacent in the Z-axis, and it is also desirable that there be no or as little correlation between the physical pages belonging to these two tiles 0. Similarly, it is also desirable that there be no or as little correlation between physical pages belonging to the same physical block and neighboring blocks of the same layer (e.g., block 0 and block 1).
With the development of NVM chips, there is also a new requirement for the randomness of data written into NVM chips.
In the prior art, it is common to use, for example, a physical page address as a random number seed. However, with the physical page address as the random number seed, between the adjacent physical pages, since the physical addresses of the adjacent physical pages also have an adjacent relationship in most cases, the random number seed applied to the adjacent physical pages has a strong correlation, for example, the difference between the two random number seeds is 0.
Fig. 4 shows the bit difference applied to the seed of an adjacent physical page when the physical page address is used as the random number seed.
A bit difference represents the number of times corresponding bits at the same position of two binary numbers appear the same or different. In the example of fig. 4, the situation of the random number seeds used by all physical pages in one physical block is counted. For two binary numbers with adjacent values, in many cases, the two binary numbers differ by only one bit and the other bits are the same.
Disclosure of Invention
Taking the physical page address as the random number seed results in a higher correlation of the random number seeds applied to adjacent physical pages, which are adjacent to each other in the physical space of the storage medium with a high probability, which affects the randomness of the data written to the storage medium. It is desirable to ameliorate or eliminate this effect.
The NVM chip outputs the read data in response to a read command. However, some NVM chips are defective and result in the data for physical address P2 being output in response to a read command to access physical address P1. It is difficult for the control part of the storage device to know that such an error has occurred. To check that the data output by the NVM chip comes from the address being accessed, the data written to the NVM chip is associated with the physical address to which the data was written. For example, the data to be written is scrambled with the physical address as a random number seed. So that when data is read from a specified address of the NVM chip, the random number seed is generated again with the specified address. If the regenerated random number seed is identical to the random number seed read from the NVM chip, it means that the data output by the NVM chip is from the accessed address, otherwise, it means that the NVM chip may give data from the wrong address. However, this further increases the correlation of the random number seeds used by adjacent physical pages.
And it is also desirable that the scrambled data exhibit sufficient randomness. For example, the values of the bits of the data of the physical pages exhibit randomness, the data of the spatially correlated (e.g., adjacent) physical pages have low or no correlation therebetween, the data of the physical pages belonging to the same word line have low or no correlation therebetween, the voltage distributions of the memory cells of the word line exhibit randomness, and the like.
According to a first aspect of the present application, there is provided a first random number seed generator according to the first aspect of the present application, comprising a random number register, a selector, and an xor unit; a random number register stores a plurality of random numbers; an input signal of the random number seed generator is coupled to a control terminal of the selector; the selector generates an index according to an input signal of the random number seed generator and selects one of a plurality of random numbers stored by a random number register to be supplied to the exclusive-or unit; the input signal of the random number seed generator is also coupled to the input of the exclusive-or unit, the output of which acts as the random number seed generated by the random number seed generator from the input signal.
The first random number seed generator according to the first aspect of the present application provides the second random number seed generator according to the first aspect of the present application, further comprising an and gate and a mask register; the output of the XOR unit is coupled to the AND gate; the output of the mask register is also coupled to the AND gate; the AND gate ANDs the output of the XOR unit and the output of the mask register; the output of the AND gate is used as a random number seed generated by the random number seed generator according to an input signal; the value of the mask register is used for selecting the designated bit of the output of the XOR unit through the AND gate.
According to a first or second random number seed generator of the first aspect of the present application, a third random number seed generator according to the first aspect of the present application is provided, wherein an input signal of the random number seed generator is a physical address for accessing the storage medium.
According to a third random number seed generator of the first aspect of the present application, there is provided a fourth random number seed generator of the first aspect of the present application, wherein a first part of bits of the physical address is coupled to the selector as a control signal for the selector; a second portion of bits of the physical address are coupled to the XOR unit; the number of the first part of bits is smaller than the number of the second part of bits.
According to a fourth random number seed generator of the first aspect of the present application, there is provided the fifth random number seed generator of the first aspect of the present application, wherein the number of the first portion of bits is adapted to index the random number stored by the random number register.
According to a second aspect of the present application, there is provided a first random number seed generator according to the second aspect of the present application, comprising a random number register, a selector, an xor unit, an address selection unit, a multiplier, and an adder; the input of the random number seed generator is coupled to the address selection unit; the address selection unit outputs a first part of bits and a second part of bits of the input of the random number seed generator; the first part of bits output by the address selection unit are coupled to the input of the multiplier; the second part of bits output by the address selection unit are coupled to the input of the adder; an output of the multiplier is coupled to an input of the adder; a random number register stores a plurality of random numbers; the selector selects one of the random numbers stored by the random number register according to the output of the adder and provides the random number to the XOR unit; the XOR unit also couples the index of the adder output; the output of the exclusive or unit is used as the random number seed generated by the random number seed generator according to the input signal.
The first random number seed generator according to the second aspect of the present application provides the second random number seed generator according to the second aspect of the present application, further comprising an and gate and a mask register; the output of the XOR unit is coupled to the input of the AND gate; the output of the mask register is also coupled to the input of the AND gate; the AND gate ANDs the output of the XOR unit and the output of the mask register; the output of the AND gate is used as a random number seed generated by the random number seed generator according to an input signal; the value of the mask register is used for selecting the designated bit of the output of the XOR unit through the AND gate.
According to a first or second random number seed generator according to the second aspect of the present application, a third random number seed generator according to the second aspect of the present application is provided, wherein an input signal of the random number seed generator is a physical address for accessing the storage medium.
According to one of the first to third random number seed generators of the second aspect of the present application, there is provided the fourth random number seed generator of the second aspect of the present application, wherein the multiplier multiplies the first part of bits output from the address selection unit by a specified value, and the product is the output of the multiplier.
According to a third random number seed generator of the second aspect of the present application, there is provided the fifth random number seed generator of the second aspect of the present application, wherein the first part output by the address selection unit is a number of a physical block indicated by the physical address in an independent unit; the second part output by the address selection unit is the number of the physical page indicated by the physical address in the physical block.
According to a fourth random number seed generator of the second aspect of the present application, there is provided the sixth random number seed generator of the second aspect of the present application, wherein the specified value is a number of physical pages within a physical block.
According to a third aspect of the present application, there is provided a first randomized scrambler according to the third aspect of the present application, comprising one of the random number seed generators according to the first and second aspects of the present application, a random number generation unit and a second exclusive or unit; the output of the random number seed generator is coupled with the random number generation unit; the output of the random number generation unit is coupled with the second exclusive-or unit; the second exclusive-or unit exclusive-ors the data to be scrambled with the output of the random number generation unit.
According to the first randomized scrambler of the third aspect of the present application, there is provided the second randomized scrambler of the third aspect of the present application, wherein the random number seed generated by the random number seed generator is provided to the random number generation unit; and the random number generation unit generates a random number according to the random number seed.
According to the first or second randomized scrambler of the third aspect of the present application, there is provided a third randomized scrambler of the third aspect of the present application, wherein a physical address of a storage medium to which data is to be written is taken as an input of the random number seed generating unit; the data to be written to the storage medium is taken as input to the second exclusive-or unit.
According to a fourth aspect of the present application, there is provided a method for a storage device according to the fourth aspect of the present application, comprising: acquiring data to be written into a storage device and a physical address of a storage medium of the storage device for bearing the data; generating a random number seed using the physical address by the random number seed generator of one of claims 1-11; scrambling the data with the random number seed; and writing the scrambled data and the random number seed into a storage medium by using the physical address.
According to the first method for a storage device of the fourth aspect of the present application, there is provided the second method for a storage device of the fourth aspect of the present application, wherein the scrambled data and the random number seed are error correction coded to obtain check data; and writing the scrambled data, the check data and the random number seed into a storage medium by using the physical address.
The first method for a storage device according to the fourth aspect of the present application provides the third method for a storage device according to the fourth aspect of the present application, further comprising: in response to reading data from a storage medium with a first physical address, generating a first random number seed with the first physical address by a random number seed generator according to the first and second aspects of the present application, and obtaining a second random number seed from the read data; if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
The third method for a storage device according to the fourth aspect of the present application provides the fourth method for a storage device according to the fourth aspect of the present application, further comprising: if the first random number seed is the same as the second random number seed, it is recognized that the data read from the storage medium using the first physical address is correct.
According to the second method for a storage device of the fourth aspect of the present application, there is provided a fifth method for a storage device of the fourth aspect of the present application, further comprising: in response to reading data from the storage medium with a first physical address, performing error check decoding on the read data, generating a first random number seed with the first physical address by a random number seed generator of any one of claims 1-11, and obtaining a second random number seed from the error check decoded data; if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
According to a fifth method for a storage device of the fourth aspect of the present application, there is provided the sixth method for a storage device of the fourth aspect of the present application, further comprising: if the first random number seed is the same as the second random number seed, it is recognized that the data read from the storage medium using the first physical address is correct.
According to a fifth aspect of the present application, there is provided a method of generating a random number seed for data to be written to a physical address of a storage medium according to the first aspect of the present application, comprising: selecting a first part of the physical address as an index, and acquiring a first random number from a plurality of random numbers; exclusive-oring the second portion of the physical address with the first random number; and obtaining a random number seed by using the result of the exclusive-or operation.
According to a first method of generating a random number seed for data to be written to a physical address of a storage medium according to the fifth aspect of the present application, there is provided a method of generating a random number seed for data to be written to a physical address of a storage medium according to the second aspect of the present application, wherein a part of bits of a result of the exclusive or operation is selected as the random number seed with a specified mask.
According to a fifth aspect of the present invention, there is provided a method of generating a random number seed for data to be written to a physical address of a storage medium, wherein the number of bits of a first part of the physical address is smaller than the number of bits of a second part.
According to a first method of generating a random number seed for data to be written to a physical address of a storage medium according to a fifth aspect of the present application, there is provided a method of generating a random number seed for data to be written to a physical address of a storage medium according to a fourth aspect of the present application, wherein a block number and a page number are extracted from the physical address; multiplying the number of pages in the block by the number of the extracted block, adding the number of the extracted page, and taking the designated bit of the obtained result as an index to obtain a first random number from a plurality of random numbers; and carrying out XOR operation on the obtained result and the first random number, and obtaining a random number seed by using the result of the XOR operation.
According to a fourth method of generating a random number seed for data to be written to a physical address of a storage medium according to the fifth aspect of the present application, there is provided a method of generating a random number seed for data to be written to a physical address of a storage medium according to the fifth aspect of the present application, wherein a part of bits of a result of the exclusive or operation is selected as the random number seed with a specified mask.
According to a sixth aspect of the present application, there is provided a method for a storage device according to the sixth aspect of the present application, comprising: acquiring data to be written into a storage device and a physical address of a storage medium of the storage device for bearing the data; generating a random number seed for the physical address according to one of the methods of the fifth aspect of the present application; scrambling the data to be written to a storage device with the random number seed; and writing the scrambled data and the random number seed into a storage medium by using the physical address.
According to the first method for a storage device of the sixth aspect of the present application, there is provided the second method for a storage device of the sixth aspect of the present application, wherein the scrambled data and the random number seed are error correction encoded to obtain check data; and writing the scrambled data, the check data and the random number seed into a storage medium by using the physical address.
The first method for a storage device according to the sixth aspect of the present application provides the third method for a storage device according to the sixth aspect of the present application, further comprising: in response to reading data from a storage medium with a first physical address, generating a first random number seed for the first physical address according to the method of one of claims 1 to 5, and obtaining a second random number seed from the read data; if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
According to a third method for a storage device of the sixth aspect of the present application, there is provided the fourth method for a storage device of the sixth aspect of the present application, further comprising: if the first random number seed is the same as the second random number seed, it is recognized that the data read from the storage medium using the first physical address is correct.
According to the second method for a storage device of the sixth aspect of the present application, there is provided the fifth method for a storage device of the sixth aspect of the present application, further comprising: in response to reading data from the storage medium with a first physical address, performing error check decoding on the read data, generating a first random number seed for the first physical address according to the method of one of claims 1 to 5, and obtaining a second random number seed from the error check decoded data; if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
According to a fifth method for a storage device of the sixth aspect of the present application, there is provided the sixth method for a storage device of the sixth aspect of the present application, further comprising: if the first random number seed is the same as the second random number seed, it is recognized that the data read from the storage medium using the first physical address is correct.
According to a seventh aspect of the present application, there is provided a method for a storage device according to the first aspect of the present application, comprising: in response to reading data from the storage medium with a first physical address, generating a first random number seed for the first physical address according to one of the methods according to the fifth aspect of the present application; and obtaining a second random number seed from the read data; if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
According to a first method for a storage device of a seventh aspect of the present application, there is provided a second method for a storage device of the seventh aspect of the present application, comprising: if the first random number seed is the same as the second random number seed, it is recognized that the data read from the storage medium using the first physical address is correct.
According to an eighth aspect of the present application, there is provided a method for a storage device according to the first aspect of the present application, comprising: in response to reading data from the storage medium using a first physical address, performing error check decoding on the read data, generating a first random number seed for the first physical address according to one of the methods according to the fifth aspect of the present application, and obtaining a second random number seed from the error check decoded data; if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
According to the first method for a storage device of the eighth aspect of the present application, there is provided the second method for a storage device of the eighth aspect of the present application, further comprising: if the first random number seed is the same as the second random number seed, it is recognized that the data read from the storage medium using the first physical address is correct.
According to a ninth aspect of the present application, there is provided a first storage device according to the ninth aspect of the present application, comprising a memory, a processor and a program stored in the memory and executable on the processor, wherein the processor implements one of the methods for a storage device according to the sixth aspect of the present application, one of the methods for a storage device according to the seventh aspect, or one of the methods for a storage device according to the eighth aspect when executing the program.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings.
FIG. 1 is a block diagram of a prior art storage device;
FIG. 2 is a diagram illustrating a data scrambling method according to the prior art;
FIG. 3 shows an architecture diagram of a 3D NAND storage medium;
FIG. 4 illustrates bit differences applied to a seed of an adjacent physical page when the physical page address is seeded with a random number;
FIG. 5 illustrates a schematic diagram of generating data to write to an NVM chip according to an embodiment of the present application;
FIG. 6 illustrates a block diagram of a randomized seed generator according to an embodiment of the present application;
FIG. 7 illustrates bit differences applied to seeds of adjacent physical pages in accordance with the embodiment of FIG. 6; and
FIG. 8 illustrates a block diagram of a randomized seed generator according to yet another embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the scope of the claims of the present application.
FIG. 5 shows a schematic diagram of generating data to write to an NVM chip according to an embodiment of the present application.
User data 552 comes from a write command that the user wants to write to the storage device. Physical address 550 is the address of the NVM chip that the storage device is assigned to carry user data 552. The random number seed generator 510 generates a random number seed 560 from the physical address 550. Randomizer 520 generates scrambled user data 562 from random number seed 560 and user data 552.
The random number seed 560 and the scrambled user data 562 are provided to an ECC (error correction code) encoder 540. ECC encoder 540 combines random number 560 with scrambled user data 562 as a message codeword and generates check data 566 from a check matrix (not shown). Random number seed 560, scrambled user data 562 and check data 566 are written to the NVM chip.
When reading data from the NVM chip, the ECC decoder decodes the read data, which includes the random number seed 560. And generating a random number seed in the same manner as when writing data using the physical address used to read the data. The random number seed 560 read from the NVM chip is compared to the random number seed generated from the physical address for consistency to identify whether the data read from the NVM chip is from the specified physical address.
FIG. 6 illustrates a block diagram of a random number seed generator in accordance with an embodiment of the present application.
Random number seed generator 600 includes random number register 610, selector 620, exclusive-or unit 630, and gate 640, and mask register 644.
The random number register 610 stores a plurality of random numbers. For example, the random number register 610 stores 32, 64, or more random numbers. Each random number stored by the random number register 610 may be accessed individually. The selector 620 provides an index to the random number register 610 for selecting one of the stored random numbers.
Data 680 is the data to be written to the NVM chip and physical address 682 indicates the physical address of the NVM chip assigned to carry the data to be written. A portion of the bits of physical address 682 are truncated and provided to selector 620 as an index to select the random number stored by random number register 610. The random number selected by the selector 620 is supplied to the exclusive or unit 630. The physical address 682 is also provided to the exclusive-or unit. The xor unit 630 xors the random number selected by the selector 620 with the physical address 682, and outputs the xor result to the and gate 640.
By selecting random numbers using the physical address 682 as an index, the respective random number seeds calculated from the physical address 682 are eliminated from being associated with each other. By way of example, the random number register 610 stores 32 random numbers, with the lower 5 bits of the physical address 682 being indexed such that the association between random numbers selected from consecutive 32 physical addresses is minimized. While between every 32 physical addresses, the random number is reused and causes a certain correlation between the corresponding random number seeds. Alternatively, by increasing the random number register 610 to store a greater number of random numbers, and then the chance that the random numbers will be reused is reduced, the association between the corresponding random number seeds is also reduced. Since the number of physical pages of an NVM chip is large, providing a dedicated random number for each physical page would result in a very large number of random numbers and occupy a large amount of memory space, which is practically not feasible. In order to make the random number seed have a stronger association with the physical address to satisfy the requirement of using the physical address and the random number seed to check whether the data provided by the NVM chip is from the correct accessed physical address, it is also necessary to directly participate in the calculation of the random number seed with the physical address 682, and to make the number of generated random number seeds larger (much larger than the number of random numbers stored in the random number register 610).
With continued reference to fig. 6, the inputs of the xor unit 630 are provided to an and gate 640. The and gate 640 bitwise and-operates the output of the xor unit 630 with the value stored in the mask register 644, and the calculation result is supplied to the random number generation unit 660. The mask register stores a value of, for example, 0x7FFF for truncating a designated bit from the output of the exclusive or unit 630 to fit into the input port of the random number generation unit 660. The output of and gate 640 is the random number seed that random number seed generator 600 derives from physical address 682.
The random number generation unit 660 is, for example, an m-sequence generator including an lfsr (linear Feedback Shifting register) generator, a CS6 sequence generator, an AI CS6 sequence generator, or a near sequence generator, etc.
The random number generation unit 660 generates a random number from the random number seeds and supplies to the exclusive or unit 670. The exclusive-or unit 670 performs exclusive-or operation on the data 680 by using the random number provided by the random number generation unit 660 to scramble the data 680, and the scrambled data is obtained for writing into the NVM chip.
According to an alternative embodiment, the check data for error correction is also generated from the scrambled data. The scrambled data, the random number seed generated by the random number seed generator 600 to obtain the scrambled data, and the verification data are written to the NVM chip together. When reading data from an NVM chip, the physical address used to read the data is denoted as P1. A random number seed (denoted RS1) is generated from physical address P1 using random number seed generator 600. A random number seed (denoted RS2) is extracted from the data read from the NVM chip. Optionally, error check decoding is performed on the data read from the NVM chip first, and the random number seed RS2 is extracted from the decoded result. The RS1 and RS2 are compared to check if the data read from the NVM chip is from the physical address P1. Alternatively, if it is recognized that the data read from the NVM chip is not from the physical address P1, an error occurs. The error is handled by, for example, attempting to re-read the data at physical address P1 from the NVM chip, or the data that should be stored at physical address P1 is obtained by other data recovery or data reconstruction means.
Fig. 7 illustrates bit differences applied to seeds of adjacent physical pages according to the embodiment of fig. 6.
The bit differences of the random number seeds applied to the adjacent physical pages generated according to the embodiment of fig. 6 are distributed between 4 bits and 12 bits, and the statistical values corresponding to the number of the difference bits are distributed more uniformly compared with fig. 4. This illustrates that the random number seed generated by the random number seed generator of the embodiment of fig. 6 applied to each physical page has a higher quality, lower correlation between the random number seeds corresponding to each physical page. And in the embodiment of fig. 6, no complex calculation is introduced, and the cost of generating the random number seed is low.
FIG. 8 illustrates a block diagram of a randomized seed generator according to yet another embodiment of the present application.
Randomizing seed generator 800 includes random number register 810, selector 820, exclusive or unit 830, and gate 840, mask register 844, independent unit address selection unit 822, multiplier 824, and adder 826.
The random number register 810 stores a plurality of random numbers.
Data 880 is data to be written to the NVM chip and physical address 882 indicates the physical address of the NVM chip assigned to carry the data to be written.
Independent unit address select unit 822 truncates a portion of the bits of physical address 882. The independent units include, for example, DIE (DIE), Logical Unit (LUN), or Plane (Plane) of the NVM chip. In the embodiment according to FIG. 8, a random number seed is generated for each individual cell's physical page. And the random number seeds corresponding to the respective physical pages of the plurality of independent units may be the same. By way of example, the portion of bits of physical address 882 intercepted by independent unit address selection unit 822 are bits used to address physical blocks and physical pages within independent units. Optionally, the intercepted portion of bits of physical address 882 also includes bits addressing data frames of a physical page that includes 2, 4, or other number of data frames.
Independent unit address selection unit 822 outputs a block number 884 representing a physical block and a block page number 886 representing a physical page based on the truncated partial bits of physical address 882. Block number 884 is the number of the physical block accessed by physical address 882, and the intra-block page number is the number of the physical page accessed by physical address 882 within the physical block to which it belongs. The random number seed generator 800 is also configured to record the number of pages within a block 888, which indicates the number of physical pages held within the physical blocks of the NVM chip used by the memory device.
The block number 884 and the number of pages 888 within the block are provided to a multiplier 824, and the multiplier 824 outputs the result of multiplying the block number 884 by the number of pages 888 within the block and provides it to an adder 826. The intra block page number 886 is also provided to adder 826. Adder 826 sums the result output by multiplier 826 with the intra-block page number 886, the result being physical page index 889. So that physical page index 889 is the unique number of all physical pages within the separate unit to which physical page the physical address 882 has accessed.
A portion of the bits of physical page index 889 are truncated and provided to selector 820 as an index to select the random number stored by random number register 810. The random number selected by the selector 820 is supplied to the exclusive or unit 830. Physical page index 889 is also provided to XOR unit 830. The xor unit 830 xors the random number selected by the selector 820 with the physical page index 889 and outputs the xor result to the and gate 840.
Since the physical addresses of the physical pages are not distributed contiguously in the physical address space, some of the values are not used. While the random numbers in the random number register 810 are stored continuously, so that the random number index obtained by truncating the physical address will make some random numbers unable to be indexed, resulting in waste of random numbers. The embodiment of fig. 8, in contrast to the embodiment of fig. 6, renumbers physical pages within independent units, assigns a unique number to each physical page, and the values of such numbers are consecutive in a value space. The random number index generated by such a number (physical page index 889) gets access to each random number stored by the random number register 810.
With continued reference to fig. 8, the inputs of xor unit 830 are provided to and gate 840. The and gate 840 bitwise and-operates the output of the xor unit 830 with the value stored in the mask register 844, and the calculation result is supplied to the random number generation unit 860. The output of and gate 840 is a random number seed that randomizer 800 derives from physical address 882.
Random number generation section 860 generates a random number from the random number seeds and supplies the random number to exclusive or section 870. Exclusive-or unit 870 exclusive-ors data 8880 with the random numbers provided by random number generation unit 860 to achieve scrambling of data 880.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application. It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A random number seed generator comprises a random number register, a selector and an exclusive OR unit;
a random number register stores a plurality of random numbers;
an input signal of the random number seed generator is coupled to a control terminal of the selector;
the selector generates an index according to an input signal of the random number seed generator and selects one of a plurality of random numbers stored by a random number register to be supplied to the exclusive-or unit;
the input signal of the random number seed generator is also coupled to the input of the exclusive-or unit, the output of which acts as the random number seed generated by the random number seed generator from the input signal.
2. The random number seed generator of claim 1, further comprising an and gate and mask register;
the output of the XOR unit is coupled to the AND gate; the output of the mask register is also coupled to the AND gate;
the AND gate ANDs the output of the XOR unit and the output of the mask register;
the output of the AND gate is used as a random number seed generated by the random number seed generator according to an input signal;
the value of the mask register is used for selecting the designated bit of the output of the XOR unit through the AND gate.
3. The random number seed generator of claim 1 or 2, wherein
The input signal of the random number seed generator is a physical address for accessing the storage medium.
4. The random number seed generator of claim 3, wherein
A first part of bits of the physical address are coupled to the selector as control signals for the selector;
a second portion of bits of the physical address are coupled to the XOR unit;
the number of the first part of bits is smaller than the number of the second part of bits.
5. A random number seed generator comprises a random number register, a selector, an exclusive OR unit, an address selection unit, a multiplier and an adder;
the input of the random number seed generator is coupled to the address selection unit;
the address selection unit outputs a first part of bits and a second part of bits of the input of the random number seed generator;
the first part of bits output by the address selection unit are coupled to the input of the multiplier;
the second part of bits output by the address selection unit are coupled to the input of the adder;
an output of the multiplier is coupled to an input of the adder;
a random number register stores a plurality of random numbers;
the selector selects one of the random numbers stored by the random number register according to the output of the adder and provides the random number to the XOR unit;
the XOR unit also couples the index of the adder output;
the output of the exclusive or unit is used as the random number seed generated by the random number seed generator according to the input signal.
6. The random number seed generator of claim 5, further comprising an AND gate and mask register;
the output of the XOR unit is coupled to the input of the AND gate; the output of the mask register is also coupled to the input of the AND gate;
the AND gate ANDs the output of the XOR unit and the output of the mask register;
the output of the AND gate is used as a random number seed generated by the random number seed generator according to an input signal;
the value of the mask register is used for selecting the designated bit of the output of the XOR unit through the AND gate.
7. A randomized scrambler comprising the random number seed generator of one of claims 1 to 6, a random number generation unit and a second exclusive or unit;
the output of the random number seed generator is coupled with the random number generation unit;
the output of the random number generation unit is coupled with the second exclusive-or unit;
the second exclusive-or unit exclusive-ors the data to be scrambled with the output of the random number generation unit.
8. A method for a storage device, comprising:
acquiring data to be written into a storage device and a physical address of a storage medium of the storage device for bearing the data;
generating a random number seed using the physical address by the random number seed generator of one of claims 1-7;
scrambling the data with the random number seed;
and writing the scrambled data and the random number seed into a storage medium by using the physical address.
9. The method of claim 8, further comprising:
generating, by the random number seed generator of one of claims 1-11, a first random number seed using a first physical address in response to reading data from the storage medium using the first physical address,
and obtaining a second random number seed from the read data;
if the first random number seed is different from the second random number seed, it is recognized that an error exists in the data read from the storage medium using the first physical address.
10. A method of generating a random number seed for data to be written to a physical address of a storage medium,
the method comprises the following steps:
selecting a first part of the physical address as an index, and acquiring a first random number from a plurality of random numbers;
exclusive-oring the second portion of the physical address with the first random number;
and obtaining a random number seed by using the result of the exclusive-or operation.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20220100416A1 (en) * | 2020-09-30 | 2022-03-31 | Micron Technology, Inc. | Performing scrambling operations based on a physical block address of a memory sub-system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20220100416A1 (en) * | 2020-09-30 | 2022-03-31 | Micron Technology, Inc. | Performing scrambling operations based on a physical block address of a memory sub-system |
| US11709622B2 (en) * | 2020-09-30 | 2023-07-25 | Micron Technology, Inc. | Performing scrambling operations based on a physical block address of a memory sub-system |
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