CN113400314A

CN113400314A - Robot control system and robot control method

Info

Publication number: CN113400314A
Application number: CN202110763230.3A
Authority: CN
Inventors: 石武; 孙彩明; 张爱东
Original assignee: Shenzhen Institute of Artificial Intelligence and Robotics
Current assignee: Shenzhen Institute of Artificial Intelligence and Robotics
Priority date: 2021-07-06
Filing date: 2021-07-06
Publication date: 2021-09-17
Anticipated expiration: 2041-07-06
Also published as: CN113400314B

Abstract

The invention discloses a robot control system, which comprises a controller, an FPGA and a plurality of actuators; the FPGA is in communication connection with the controller; the FPGA is provided with a plurality of interface controllers, the interface controllers are in one-to-one correspondence communication connection with the actuators, and the interface controllers are all driven by the same clock signal; because the interface controllers are all driven by the same clock signal, the FPGA can simultaneously send each control sub-instruction when distributing the control instruction, and the consistency of the sending time of the control sub-instruction is ensured, so that the time difference tau of adjacent actuators reaching a target position can be eliminated, and the stability of the gravity center of the whole system is further ensured. The invention also provides a robot control method, which also has the beneficial effects.

Description

Robot control system and robot control method

Technical Field

The present invention relates to the field of robot control technologies, and in particular, to a robot control system and a robot control method.

Background

The robot with multiple degrees of freedom consists of a plurality of connecting rods, bearings, sensors and motors, wherein each motor generally controls one degree of freedom, and the robot generally relates to a plurality of motors in the moving process and moves in the directions with multiple degrees of freedom. A controller, also called a control Unit (Central Process Unit), of the robot calculates target positions of all actuators, i.e., execution units, from data of sensors, and each actuator controls one degree of freedom. Generally, due to the large number of actuators, the controller can only send all target positions to all actuators in series in a certain order. At this stage, the time difference between the arrival of adjacent actuators at the target position is generally defined as τ. Due to the presence of τ, the phase difference between adjacent actuators to reach the target position can be defined as φ. The maximum phase difference between all actuators is (N-1) phi, and the phase difference affects the center of gravity of the whole system, so that the stability of the system is affected.

In the prior art, a high-speed cpu (central processing unit) is usually adopted to form a control unit; the execution units are composed of a plurality of servo drivers and are connected in series; the control unit and the execution unit are connected through a CAN (controller Area network) bus. This way can reduce the above mentioned time difference τ by increasing the operation speed of the CPU, but it cannot eliminate τ; and a high-speed CPU is used, which is costly. Therefore, how to provide a robot control system capable of eliminating the time difference τ is an urgent problem to be solved by those skilled in the art.

Disclosure of Invention

The invention aims to provide a robot control system, which can eliminate the time difference of adjacent actuators when reaching a target position; another object of the present invention is to provide a robot control method that can eliminate a time difference between adjacent actuators to reach a target position.

In order to solve the technical problem, the invention provides a robot control system, which comprises a controller, an FPGA and a plurality of actuators;

the FPGA is in communication connection with the controller; the FPGA is provided with a plurality of interface controllers, one interface controller is in communication connection with one corresponding actuator, and the interface controllers are all driven by the same clock signal;

the FPGA is used for:

acquiring a control instruction sent by the controller; the control instruction comprises control sub-instructions corresponding to a plurality of actuators;

and simultaneously sending each control sub-instruction to a corresponding actuator according to the clock signal through the interface controller so as to simultaneously drive a plurality of actuators to move.

Optionally, the FPGA is further configured to:

acquiring sensing data generated by a sensor through the interface controller;

uploading the sensory data to the controller.

Optionally, the controller includes a central processing unit, a DRAM, and a flash memory chip; the central processing unit is in communication connection with the FPGA.

Optionally, the FPGA and the controller are connected by a parallel read-write bus, an SPI serial bus, or a UART serial bus.

Optionally, the interface controller is a UART controller, and the UART controller is connected to the actuator through a UART bus; or, the interface controller is an SPI controller, and the SPI controller is connected with the actuator through an SPI bus; or the interface controller is a CAN controller, and the CAN controller is connected with the actuator through a CAN bus.

Optionally, any one of the actuators includes a servo driver, and the servo driver is in communication connection with the corresponding interface controller; one of the servo drivers corresponds to one degree of freedom.

The invention also provides a robot control method, which is applied to the FPGA and comprises the following steps:

acquiring a control instruction sent by a controller; the control commands comprise control sub-commands corresponding to a plurality of actuators; the FPGA is in communication connection with the controller; the FPGA is provided with a plurality of interface controllers, one interface controller is in communication connection with one corresponding actuator, and the interface controllers are all driven by the same clock signal;

Optionally, the method further includes:

acquiring sensing data generated by a sensor through the interface controller;

uploading the sensory data to the controller.

The robot control system provided by the invention comprises a controller, an FPGA and a plurality of actuators; the FPGA is in communication connection with the controller; the FPGA is provided with a plurality of interface controllers, the interface controllers are in one-to-one correspondence communication connection with the actuators, and the interface controllers are all driven by the same clock signal; the FPGA is used for acquiring a control instruction sent by the controller; the control command comprises control sub-commands corresponding to a plurality of actuators; and simultaneously sending each control sub-instruction to the corresponding actuator according to the clock signal through the interface controller so as to simultaneously drive the plurality of actuators to move.

Because the interface controllers are all driven by the same clock signal, the FPGA can simultaneously send each control sub-instruction when distributing the control instruction, and the consistency of the sending time of the control sub-instruction is ensured, so that the time difference tau of adjacent actuators reaching a target position can be eliminated, and the stability of the gravity center of the whole system is further ensured.

The invention also provides a robot control method, which has the beneficial effects and is not repeated herein.

Drawings

In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.

Fig. 1 is a block diagram of a robot control system according to an embodiment of the present invention;

fig. 2 is a block diagram of an interface of a specific robot control system according to an embodiment of the present invention;

fig. 3 is a flowchart of a robot control method according to an embodiment of the present invention.

In the figure: 1. the system comprises a controller, 2, an FPGA, 3, an interface controller and 4, an actuator.

Detailed Description

The core of the invention is to provide a robot control system. In the prior art, a high-speed CPU is generally adopted to form a control unit; the execution units are composed of a plurality of servo drivers and are connected in series; the control unit and the execution unit are connected through a CAN bus. This way can reduce the above mentioned time difference τ by increasing the operation speed of the CPU, but it cannot eliminate τ; and a high-speed CPU is used, which is costly.

In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, fig. 1 is a block diagram of a robot control system according to an embodiment of the present invention.

Referring to fig. 1, in an embodiment of the present invention, a robot control system includes a controller 1, an FPGA2, and a plurality of actuators 4; the FPGA2 is in communication connection with the controller 1; the FPGA2 is provided with a plurality of interface controllers 3, the interface controllers 3 are in one-to-one correspondence communication connection with the actuators 4, and the interface controllers 3 are all driven by the same clock signal; the FPGA2 is configured to: acquiring a control instruction sent by the controller 1; the control instruction comprises control sub-instructions corresponding to a plurality of actuators 4; and simultaneously sending each control sub-instruction to the corresponding actuator 4 according to the clock signal through the interface controller 3 so as to simultaneously drive the actuators 4 to move.

The controller 1 needs to be communicatively connected to the FPGA2, and the FPGA2 needs to be communicatively connected to the plurality of actuators 4. The controller 1 generates control commands corresponding to the actuators 4, and the control commands include a plurality of control sub-commands, each control sub-command corresponds to one actuator 4 and controls the corresponding actuator 4 to move. The specific content of the control command needs to be set according to the actual situation, and is not limited in detail here.

Specifically, in the embodiment of the present invention, the controller 1 may include a central processing unit, a DRAM (dynamic random access memory), and a flash memory chip; the central processor is in communication with the FPGA 2. The central processing unit, the DRAM and the flash memory chip are mutually matched to process data acquired by the sensor and generate corresponding control instructions. The specific structure of the controller 1 and the internal data processing flow of the controller 1 may refer to the prior art, and are not described herein again.

The FPGA2 generally needs to be provided with a control register, a data transmission buffer and a plurality of interface controllers 3, wherein the FPGA2 is connected to a plurality of actuators 4 through the plurality of interface controllers 3, and the interface controllers 3 are in one-to-one communication connection with the actuators 4. When the controller 1 wants to control the actuator 4 to move, it sends the control command to a send data buffer provided in the FPGA2, and then writes the send command into the control register. Then, the FPGA2 calls the interface controller 3 to send the corresponding control sub-instruction in the control instruction to the actuator 4 according to the sending instruction written in the control register, so as to drive the actuator 4 to move. At this time, it should be noted that, since the interface controllers 3 are all driven by the same clock signal in the embodiment of the present invention, that is, the interface controllers 3 simultaneously send corresponding control sub-commands to eliminate the time difference τ between the adjacent actuators 4 and the target position.

The FPGA2 is specifically configured to obtain the control command sent by the controller 1 first, and generally store the control command in its own data sending buffer; and then, the interface controller 3 simultaneously sends each control sub-instruction to the corresponding actuator 4 according to the clock signal, so as to simultaneously drive the plurality of actuators 4 to move, thereby ensuring the parallel and synchronous sending of the control sub-instructions.

It should be noted that the control sub-command usually includes target parameters that the corresponding actuator 4 needs to reach, such as a target position, a target speed, a target torque, and the like, and the FPGA2 sends the control sub-command including the target parameters to the corresponding actuator 4 to implement synchronous driving of the actuator 4.

Typically, any of the actuators 4 comprises a servo driver, and the servo driver is in communication connection with the corresponding interface controller 3; one of the servo drivers corresponds to one degree of freedom. That is, the FPGA2 will send the corresponding control sub-command to the servo driver in the actuator 4 through the interface controller 3, and the servo driver will drive the actuator 4 to move within the preset degree of freedom according to the received control sub-command.

Further, some of the above-mentioned interface controllers 3 may be connected to sensors, such as position sensors, etc., in the entire robot, which may generate sensing data. In the embodiment of the present invention, the FPGA2 may also be configured to: acquiring sensing data generated by a sensor through the interface controller 3; uploading the sensing data to the controller 1.

Status registers and receive data buffers may also be provided within the FPGA 2. When the FPGA2 acquires the sensor data generated by the sensor through the interface controller 3, the sensor data may be saved to the reception data buffer and the state value recorded in the state register may be changed. When the controller 1 finds that the state value in the state register in the FPGA2 changes, or finds that the state value in the state register in the FPGA2 corresponds to the state value of the acquired sensing data, the sensing data stored in the received data buffer can be actively acquired, and the sensing data is used as control feedback, so that the controller 1 can generate a next round of control instruction according to the sensing data.

It should be noted that the interface controller 3 connected to the sensor is also usually driven by the same clock signal, and usually all the data for realizing the movement of the actuator 4 and the acquisition of the sensing data in the FPGA2 are driven by the same clock signal. The one interface controller 3 may be connected to one actuator 4 and one sensor at the same time, but the one interface controller 3 may not be connected to a plurality of actuators 4 at the same time, thereby avoiding the generation of the time difference τ. Typically, each actuator 4 will be provided with a corresponding sensor to detect its current parameters, such as position parameters, speed parameters, torque parameters, etc., which the sensor will send to the controller 1 via the FPGA2 as control feedback so that the controller 1 controls the robot movement.

Normally, each interface controller 3 controls the transmission of the corresponding control sub-command when the clock signal jumps. When the clock signal is at a high level or a low level, each interface controller 3 can acquire the corresponding sensing data.

The robot control system provided by the embodiment of the invention comprises a controller 1, an FPGA2 and a plurality of actuators 4; the FPGA2 is in communication connection with the controller 1; the FPGA2 is provided with a plurality of interface controllers 3, the interface controllers 3 are in one-to-one correspondence communication connection with the actuators 4, and the interface controllers 3 are all driven by the same clock signal; the FPGA2 is used for acquiring a control instruction sent by the controller 1; the control commands include control sub-commands corresponding to the plurality of actuators 4; and simultaneously sending each control sub-instruction to the corresponding actuator 4 according to the clock signal through the interface controller 3 so as to simultaneously drive the plurality of actuators 4 to move.

Because the interface controllers 3 are all driven by the same clock signal, the FPGA2 can simultaneously send each control sub-instruction when distributing the control instruction, so as to ensure the consistency of the sending time of the control sub-instruction, thereby ensuring to eliminate the time difference τ when the adjacent actuators 4 reach the target position, and further ensuring the stability of the gravity center of the whole system.

The details of a robot control system according to the present invention will be described in detail in the following embodiments of the invention.

Referring to fig. 2, fig. 2 is a block diagram of an interface of a robot control system according to an embodiment of the present invention.

Different from the above embodiment of the invention, the embodiment of the invention further defines a specific connection manner among the controller 1, the FPGA2, and the actuator 4 on the basis of the above embodiment of the invention, and the rest of the contents are described in detail in the above embodiment of the invention and will not be described again here.

In the embodiment of the present invention, the FPGA2 and the controller 1 may be connected through a parallel read/write bus, an SPI serial bus, or a UART serial bus.

Referring to fig. 2, when the FPGA2 is connected to the controller 1 via a parallel read-write bus, the connection signals between the FPGA2 and the controller 1 generally include: RD, i.e. read control signal; WR, write control signal; ADDR, i.e., the address bus; DATA, i.e., the DATA bus.

When the FPGA2 is connected to the controller 1 through an spi (serial Peripheral interface) serial bus, the connection signals between the FPGA2 and the controller 1 generally include: CLK, a data transfer clock signal; CS, i.e., data transfer chip select signal; MISO, i.e., data input signal; MOSI, i.e. data out signal.

When the FPGA2 is connected to the controller 1 via a UART (Universal Asynchronous Receiver/Transmitter) serial bus, the connection signals between the FPGA2 and the controller 1 generally include: TXD, i.e., data out signal; RXD, the data input signal. For the details of the parallel read/write bus, the SPI serial bus, and the UART serial bus, reference may be made to the prior art, and details thereof are not repeated herein.

Specifically, in the embodiment of the present invention, the interface controller 3 may be a UART controller, and the UART controller is connected to the actuator 4 through a UART bus; or, the interface controller 3 may be an SPI controller, and the SPI controller is connected to the actuator 4 through an SPI bus; or, the interface controller 3 may be a CAN controller, and the CAN controller is connected to the actuator 4 through a CAN bus.

In the embodiment of the present invention, the type of the interface controller 3 needs to correspond to the communication connection mode between the FPGA2 and the actuator 4. Specifically, when the interface controller 3 is a UART controller, the UART controller needs to be connected to the corresponding actuator 4 through a UART bus; when the interface controller 3 is an SPI controller, the SPI controller needs to be connected to the corresponding actuator 4 through an SPI bus; when the interface controller 3 is a CAN controller, the CAN controller needs to be connected to the corresponding actuator 4 through a CAN bus.

The connection mode among the controller 1, the FPGA2 and the actuator 4 is selected according to actual conditions, and the connection mode may specifically refer to the types of the FPGA2 and the actuator 4 of the controller 1, and support conditions such as a communication interface and a resource size, and is not limited specifically here.

According to the robot control system provided by the embodiment of the invention, the interface controllers 3 are all driven by the same clock signal, so that the FPGA2 can simultaneously send each control sub-instruction when distributing the control instruction, the sending time of the control sub-instruction is ensured to be consistent, the time difference tau of the adjacent actuators 4 reaching the target position can be ensured to be eliminated, and the gravity center of the whole system is ensured to be stable.

In the following, a robot control method provided by an embodiment of the present invention is introduced, and the robot control method described below and the robot control system described above may be referred to correspondingly.

Referring to fig. 3, fig. 3 is a flowchart of a robot control method according to an embodiment of the present invention.

The robot control method provided by the embodiment of the present invention is specifically applied to the FPGA2, and the specific structure of the FPGA2 and the specific connection relationship between the FPGA2, the controller 1, and the actuator 4 are described in detail in the embodiment of the present invention, and are not described herein again. The robot control method provided by the embodiment of the invention is only used for realizing the specific functions of the robot control system.

Referring to fig. 3, in an embodiment of the present invention, a robot control method includes:

s101: and acquiring a control instruction sent by the controller.

In the embodiment of the present invention, the control command includes a control sub-command corresponding to a plurality of actuators 4; the FPGA2 is in communication connection with the controller 1; the FPGA2 is provided with a plurality of interface controllers 3, one of the interface controllers 3 is in communication connection with one of the corresponding actuators 4, and the interface controllers 3 are all driven by the same clock signal. The details of the control command and the control sub-command are described in detail in the above embodiments of the present invention, and are not described herein again.

S102: and simultaneously sending each control sub-instruction to the corresponding actuator 4 according to the clock signal through the interface controller so as to simultaneously drive the plurality of actuators 4 to move.

Further, in the embodiment of the present invention, the method may further include:

s103: and acquiring sensing data generated by the sensor through the interface controller.

S104: uploading the sensory data to the controller.

Further, in the embodiment of the present invention, the controller 1 includes a central processing unit, a DRAM, and a flash memory chip; the central processor is in communication with the FPGA 2.

Further, in the embodiment of the present invention, the FPGA2 is connected to the controller 1 through a parallel read/write bus, an SPI serial bus, or a UART serial bus.

Further, in the embodiment of the present invention, the interface controller 3 is a UART controller, and the UART controller is connected to the actuator 4 through a UART bus; or, the interface controller 3 is an SPI controller, and the SPI controller is connected to the actuator 4 through an SPI bus; or, the interface controller 3 is a CAN controller, and the CAN controller is connected with the actuator 4 through a CAN bus.

Further, in the embodiment of the present invention, any one of the actuators 4 includes a servo driver, and the servo driver is communicatively connected to the corresponding interface controller 3; one of the servo drivers corresponds to one degree of freedom.

The details of the specific steps performed by the FPGA2 are described in detail in the above embodiments of the present invention, and are not described herein again. Specifically, in the embodiment of the present invention, the controller 1 uses the target parameters of all the actuators 4, such as the target position, the target speed, the target torque, and the like, as the control sub-commands, and sends the control sub-commands as the control commands to the data sending buffer area inside the FPGA2, and meanwhile, the controller 1 sets the flag of the control register in the FPGA 2. The interface controller 3 inside the FPGA2 can read the control sub-instruction of the actuator 4 from the transmission data buffer according to the flag of the control register and transmit the control sub-instruction including the target parameter to the actuator 4; the actuator 4 will control the motor to operate to the target position according to the relevant set parameters. Since all the interface controllers 3 operate under the same clock drive, all the actuators 4 simultaneously obtain the target parameters and control the target motors to reach the target positions at the same time.

In the embodiment of the present invention, the feedback process is as follows, the actuator 4 may send its own state data, such as the current position, the current speed, the current moment, and the like, to the received data buffer area inside the FPGA2 at regular time; at this time, the status register in the FPGA2 may set a relevant flag bit according to the status of the received data buffer; the control unit reads the relevant flag bit of the status register inside the FPGA2 to judge whether the status data of the data buffer has new data: if there is new data, controller 1 reads the status data to execute it from the receive data buffer internal to FPGA2 as control feedback. The status data may be the sensing data.

According to the robot control method provided by the embodiment of the invention, the interface controllers 3 are all driven by the same clock signal, so that the FPGA2 can simultaneously send each control sub-instruction when distributing the control instruction, the sending time of the control sub-instruction is ensured to be consistent, the time difference tau of the adjacent actuators 4 reaching the target position can be ensured to be eliminated, and the gravity center of the whole system is ensured to be stable.

The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other.

Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The above detailed description is provided for a robot control system and a robot control method according to the present invention. The principles and embodiments of the present invention are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.

Claims

1. A robot control system is characterized by comprising a controller, an FPGA and a plurality of actuators;

the FPGA is used for:

2. The system of claim 1, wherein the FPGA is further configured to:

acquiring sensing data generated by a sensor through the interface controller;

uploading the sensory data to the controller.

3. The system of claim 1, wherein the controller comprises a central processor, DRAM, and flash memory chips; the central processing unit is in communication connection with the FPGA.

4. The system of claim 3, wherein the FPGA and the controller are connected through a parallel read-write bus, an SPI serial bus, or a UART serial bus.

5. The system of claim 1, wherein the interface controller is a UART controller, and the UART controller is connected to the actuator via a UART bus; or, the interface controller is an SPI controller, and the SPI controller is connected with the actuator through an SPI bus; or the interface controller is a CAN controller, and the CAN controller is connected with the actuator through a CAN bus.

6. The system of claim 1, wherein any of said actuators comprises a servo driver, said servo driver being communicatively coupled to a corresponding said interface controller; one of the servo drivers corresponds to one degree of freedom.

7. A robot control method is applied to an FPGA and comprises the following steps:

8. The method of claim 7, further comprising:

acquiring sensing data generated by a sensor through the interface controller;

uploading the sensory data to the controller.