CN113377370A - File processing method and device, electronic equipment and storage medium - Google Patents
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Abstract
The embodiment of the invention provides a file processing method and a file processing device, wherein the method comprises the following steps: acquiring a module file in a firmware interface system and an entry address of the module file during operation, and compiling and decompiling the module file to obtain a source code instruction which is in assembly language and corresponds to the module file; the source code instruction carries corresponding address offset, and is processed into the source code instruction with the link information according to the entry address and the address offset, so that the module file is automatically processed to obtain the source code instruction with the link information, the problem that a real environment cannot be completely simulated during debugging on a virtual machine is solved, developers are helped to quickly and directly find the actual running address of the code of each module file, and the problems of crash and the like of a certain address are accurately positioned.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a file processing method, a file processing apparatus, an electronic device, and a readable storage medium.
Background
UEFI (Unified Extensible Firmware Interface) is a personal computer System specification that defines a software Interface between an operating System and System Firmware, and is used as an alternative to BIOS (Basic Input Output System). The extensible firmware interface is responsible for power-on self-test, contacting the operating system and providing an interface for connecting the operating system with the hardware.
In UEFI, many programs are not a complete executable file, but are divided into relatively independent module files, such as DLL (Dynamic Link Library) files. The entry address of each module in operation is dynamically loaded, so that the address of each module in operation is not fixed, and debugging is particularly inconvenient.
Currently, there is a debugger for UEFI on the x86 (a series of intel 8086-based and backward-compatible central processor instruction set architectures) platform, whose essence is the virtual machine of UEFI, on which execution on a real physical machine is simulated. However, RSIC architectures such as ARM (Advanced Reduced Instruction Set Computing Machines) and MIPS (Microprocessor with out Interlocked pipeline architecture, Microprocessor without internal interlocking pipeline stage) do not have debuggers for UEFI. Moreover, the effect of the simulation program execution can only simulate specific software behaviors, and some hardware-related behaviors cannot be completed. The debugging method can only check out the errors of pure software and some driving problems related to hardware, and cannot be checked through a simulator.
In the development and debugging process under UEFI, the address of the code of each module which actually runs is difficult to find, so that the problem that the cause of the dead halt is difficult to locate exists.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present invention is to provide a file processing method, a file processing apparatus, an electronic device, and a readable storage medium, so as to solve the problem that it is difficult to find an address where a code of each module actually runs, and thus it is difficult to locate a cause of a crash.
In order to solve the above problem, the present invention provides a file processing method, including:
acquiring a module file in a firmware interface system and an entry address of the module file during operation;
compiling and decompiling the module file to obtain a source code instruction which adopts assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and processing the source code instruction into a source code instruction with link information according to the entry address and the address offset.
Optionally, the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file includes:
compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and performing decompiling processing on the binary file by using a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
Optionally, before the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file, the method further includes:
calling the compiler corresponding to the processor platform.
Optionally, the processing the source code instruction into a source code instruction with link information according to the entry address and the address offset includes:
determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
Optionally, the obtaining an entry address of the module file at runtime includes:
and searching the entry address of the module file in the running process from the log information of the firmware interface system.
Correspondingly, the invention also provides a file processing device, which comprises:
the acquisition module is used for acquiring a module file in a firmware interface system and an entry address of the module file during operation;
the instruction processing module is used for compiling and decompiling the module file to obtain a source code instruction which is in assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and the address processing module is used for processing the source code instruction into the source code instruction with the link information according to the entry address and the address offset.
Optionally, the instruction processing module includes:
the compiling submodule is used for compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and the decompiling submodule is used for performing decompiling processing on the binary file by a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
Optionally, the apparatus further comprises:
and the compiler calling module is used for calling the compiler corresponding to the processor platform before compiling and decompiling the module file to obtain the source code instruction which adopts assembly language and corresponds to the module file.
Optionally, the address processing module includes:
the address determination submodule is used for determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and the address adding submodule is used for adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
Optionally, the obtaining module includes:
and the address searching submodule is used for searching the entry address of the module file in operation from the log information of the firmware interface system.
Accordingly, the present invention also provides an electronic device comprising a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured for execution by the one or more processors, the one or more programs including instructions for:
acquiring a module file in a firmware interface system and an entry address of the module file during operation;
compiling and decompiling the module file to obtain a source code instruction which adopts assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and processing the source code instruction into a source code instruction with link information according to the entry address and the address offset.
Optionally, the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file includes:
compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and performing decompiling processing on the binary file by using a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
Optionally, before the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file, the method further includes:
calling the compiler corresponding to the processor platform.
Optionally, the processing the source code instruction into a source code instruction with link information according to the entry address and the address offset includes:
determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
Optionally, the obtaining an entry address of the module file at runtime includes:
and searching the entry address of the module file in the running process from the log information of the firmware interface system.
Accordingly, the present invention also provides a readable storage medium, wherein when the instructions in the storage medium are executed by a processor of the electronic device, the electronic device can execute the file processing method.
According to the embodiment of the invention, compiling and decompiling processing are carried out on a module file in a firmware interface system by acquiring the module file and an entry address of the module file during operation, so as to obtain a source code instruction which adopts assembly language and corresponds to the module file; the source code instruction carries corresponding address offset, and is processed into the source code instruction with the link information according to the entry address and the address offset, so that the module file is automatically processed to obtain the source code instruction with the link information, the problem that a real environment cannot be completely simulated during debugging on a virtual machine is solved, developers are helped to quickly and directly find the actual running address of the code of each module file, and the problems of crash and the like of a certain address are accurately positioned.
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FIG. 1 is a flowchart illustrating steps of a file processing method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating a file processing flow;
FIG. 3 is a flowchart illustrating steps of a file processing method according to another embodiment of the present invention;
FIG. 4 is a block diagram illustrating an embodiment of a file processing apparatus according to another embodiment of the present invention;
FIG. 5 illustrates a block diagram of an electronic device for file processing, according to an example embodiment.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, a flowchart illustrating steps of a file processing method according to an embodiment of the present invention is shown, which may specifically include the following steps:
In this embodiment of the present invention, the firmware interface system includes UEFI or the like, or any other suitable firmware interface system, such as PMIN, BIOS, or the like, which is not limited in this embodiment of the present invention. The module file includes a DLL file, etc., or any other suitable file, which is not limited in this embodiment of the present invention. When the module file runs on a real physical machine, the module file can be dynamically loaded into a certain space of a memory, and the initial address of the space is recorded as the entry address of the module file during running.
For example, under UEFI, a script tool applying the method of the present invention is run, and the name and entry address of the module file are transferred into the script tool, so as to obtain the module file and the corresponding entry address.
In this embodiment of the present invention, optionally, in an implementation manner of obtaining the entry address of the module file during running, the obtaining may include: and searching the entry address of the module file in the running process from the log information of the firmware interface system.
The log information of the firmware interface system stores the entry address of the module file during historical operation, and the entry address can be found by searching the log information.
102, compiling and decompiling the module file to obtain a source code instruction which is in assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset.
In the embodiment of the present invention, the module file is processed to obtain the source code instruction in assembly language corresponding to the module file, and the source code instruction can be implemented by using a compiling tool. The module file is compiled and decompiled, and can be converted into a source code instruction in assembly language, and the source code instruction carries a corresponding address offset.
For example, as shown in the schematic diagram of the file processing flow shown in fig. 2, the module file is a (#. dll) file, and the (#. s) file is obtained through compiling and decompiling, that is, a source code file in assembly language, where the source code file includes source code instructions and address offsets corresponding to each instruction.
In this embodiment of the present invention, optionally, before performing the compiling and decompiling processing on the module file to obtain the source code instruction in the assembly language corresponding to the module file, the method may further include: calling the compiler corresponding to the processor platform.
The processor platforms include x86, ARM, MIPS, Loongarch, etc., or any other suitable platform, and different processor platforms are adapted to different compilers, for example, a gcc (GNU Compiler Collection) compiling method may be adopted under the Loongarch platform. Judging the processor platform, and calling the compiler corresponding to the processor platform can realize the application to various processing platforms.
And 103, processing the source code instruction into a source code instruction with link information according to the entry address and the address offset.
In the embodiment of the invention, the main content of the link is to correctly link mutually-referenced parts among the modules. It works to modify some instruction references to other symbolic addresses. The link information mainly includes address and space allocation, symbol resolution and redirection and other related information.
In the embodiment of the present invention, the link information of the source code instruction lacks an address corresponding to each instruction, so that the first source code instruction can be found according to the entry address, and the address corresponding to each source code instruction can be determined according to the address offset of each instruction. And obtaining link information according to the source code instruction and the address of each instruction, and adding the link information to the corresponding source code instruction to obtain the source code instruction with the link information.
For example, as shown in fig. 2, the source code instruction included in the (#. s) file has no link information, and according to the entry address and the address offset of each instruction, the address corresponding to each instruction can be determined, so as to generate corresponding link information, and the source code instruction is processed into the source code instruction with the link information, that is, the (#. ld) link script file is obtained.
According to the embodiment of the invention, compiling and decompiling processing are carried out on a module file in a firmware interface system by acquiring the module file and an entry address of the module file during operation, so as to obtain a source code instruction which adopts assembly language and corresponds to the module file; the source code instruction carries corresponding address offset, and is processed into the source code instruction with the link information according to the entry address and the address offset, so that the module file is automatically processed to obtain the source code instruction with the link information, the problem that a real environment cannot be completely simulated during debugging on a virtual machine is solved, developers are helped to quickly and directly find the actual running address of the code of each module file, and the problems of crash and the like of a certain address are accurately positioned.
Referring to fig. 3, a flowchart illustrating steps of a file processing method according to another embodiment of the present invention is shown, which may specifically include the following steps:
In the embodiment of the present invention, the specific implementation manner of this step may refer to the description in the foregoing embodiment, and details are not described herein.
In the embodiment of the invention, the module file is a program to be translated, a computer cannot directly understand and execute the program, the computer can only understand the binary system, and the module file can be processed into a corresponding binary system file through the compiling processing of the compiler. For example, a module file (. dll file) under UEFI is compiled by a gcc compiler to obtain a binary file (. bin file).
And 203, performing decompiling processing on the binary file by using a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
In the embodiment of the invention, the binary file is subjected to decompilation processing by the compiler, so that a corresponding decompilated file adopting an assembly language can be obtained, wherein the decompilated file comprises a source code instruction, and the decompilated file has no link information. For example, a binary file (. bin file) is processed by a gcc compiler into a disassembled file (. s file) without linking information.
And 204, determining the actual operating address corresponding to each source code instruction according to the entry address and the address offset.
In the embodiment of the invention, the actual operating address corresponding to each source code instruction can be determined according to the entry address and the address offset of each source code instruction. For example, if the entry address is 0x0E647240 and the address offset of a source code instruction is 1, the address of the source code instruction is 0x0E 647241.
In the embodiment of the invention, the actual operating address is added to the corresponding source code instruction to obtain the source code instruction with the link information. For example, the disassembled file without the link information is processed into a link file with link information (ld file) according to the actual operation address corresponding to each instruction.
According to the embodiment of the invention, a module file in a firmware interface system and an entry address of the module file during operation are obtained, the module file is compiled by a compiler to obtain a binary file corresponding to the module file, the binary file is decompiled by the compiler to obtain a decompiled file which is corresponding to the module file and adopts assembly language, wherein the decompiled file comprises source code instructions, an actual operation address corresponding to each source code instruction is determined according to the entry address and address offset, the actual operation address is added into the source code instructions to obtain the source code instructions with link information, so that the module file is automatically processed to obtain the source code instructions with the link information, and the problem that a real environment cannot be completely simulated during debugging on a virtual machine is avoided, therefore, developers can quickly and directly find the address where the code of each module file actually runs, and problems such as halt at a certain address and the like can be accurately positioned.
It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the illustrated order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments of the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
Referring to fig. 4, a block diagram of a file processing apparatus according to another embodiment of the present invention is shown, and specifically includes the following modules:
an obtaining module 301, configured to obtain a module file in a firmware interface system and an entry address of the module file during operation;
the instruction processing module 302 is configured to perform compiling and decompiling processing on the module file to obtain a source code instruction in assembly language corresponding to the module file; wherein the source code instruction carries a corresponding address offset;
and the address processing module 303 is configured to process the source code instruction into a source code instruction with link information according to the entry address and the address offset.
Optionally, the instruction processing module includes:
the compiling submodule is used for compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and the decompiling submodule is used for performing decompiling processing on the binary file by a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
Optionally, the apparatus further comprises:
and the compiler calling module is used for calling the compiler corresponding to the processor platform before compiling and decompiling the module file to obtain the source code instruction which adopts assembly language and corresponds to the module file.
Optionally, the address processing module includes:
the address determination submodule is used for determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and the address adding submodule is used for adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
Optionally, the obtaining module includes:
and the address searching submodule is used for searching the entry address of the module file in operation from the log information of the firmware interface system.
According to the embodiment of the invention, compiling and decompiling processing are carried out on a module file in a firmware interface system by acquiring the module file and an entry address of the module file during operation, so as to obtain a source code instruction which adopts assembly language and corresponds to the module file; the source code instruction carries corresponding address offset, and is processed into the source code instruction with the link information according to the entry address and the address offset, so that the module file is automatically processed to obtain the source code instruction with the link information, the problem that a real environment cannot be completely simulated during debugging on a virtual machine is solved, developers are helped to quickly and directly find the actual running address of the code of each module file, and the problems of crash and the like of a certain address are accurately positioned.
For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
Fig. 5 is a block diagram illustrating a structure of an electronic device 700 for file processing according to an example embodiment. For example, the electronic device 700 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, and the like.
Referring to fig. 5, electronic device 700 may include one or more of the following components: a processing component 702, a memory 704, a power component 706, a multimedia component 708, an audio component 710, an input/output (I/O) interface 712, a sensor component 714, and a communication component 716.
The processing component 702 generally controls overall operation of the electronic device 700, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing element 702 may include one or more processors 720 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 702 may include one or more modules that facilitate interaction between the processing component 702 and other components. For example, the processing component 702 can include a multimedia module to facilitate interaction between the multimedia component 708 and the processing component 702.
The memory 704 is configured to store various types of data to support operation at the device 700. Examples of such data include instructions for any application or method operating on the electronic device 700, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 704 may be implemented by any type or combination of volatile or non-volatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.
The power component 704 provides power to the various components of the electronic device 700. Power components 704 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power for electronic device 700.
The multimedia component 708 includes a screen that provides an output interface between the electronic device 700 and a user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 708 includes a front facing camera and/or a rear facing camera. The front camera and/or the rear camera may receive external multimedia data when the electronic device 700 is in an operation mode, such as a photographing mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.
The audio component 710 is configured to output and/or input audio signals. For example, the audio component 710 includes a Microphone (MIC) configured to receive external audio signals when the electronic device 700 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal may further be stored in the memory 704 or transmitted via the communication component 716. In some embodiments, audio component 710 also includes a speaker for outputting audio signals.
The I/O interface 712 provides an interface between the processing component 702 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.
The sensor assembly 714 includes one or more sensors for providing various aspects of status assessment for the electronic device 700. For example, the sensor assembly 714 may detect an open/closed state of the device 700, the relative positioning of components, such as a display and keypad of the electronic device 700, the sensor assembly 714 may also detect a change in the position of the electronic device 700 or a component of the electronic device 700, the presence or absence of user contact with the electronic device 700, orientation or acceleration/deceleration of the electronic device 700, and a change in the temperature of the electronic device 700. The sensor assembly 714 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 714 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 714 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.
The communication component 716 is configured to facilitate wired or wireless communication between the electronic device 700 and other devices. The electronic device 700 may access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 714 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 714 further includes a Near Field Communication (NFC) module to facilitate short-range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
In an exemplary embodiment, the electronic device 700 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components for performing the above-described methods.
In an exemplary embodiment, a non-transitory computer readable storage medium comprising instructions, such as the memory 704 comprising instructions, executable by the processor 720 of the electronic device 700 to perform the above-described method is also provided. For example, the non-transitory computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.
A non-transitory computer readable storage medium in which instructions, when executed by a processor of a terminal, enable the terminal to perform a file processing method, the method comprising:
acquiring a module file in a firmware interface system and an entry address of the module file during operation;
compiling and decompiling the module file to obtain a source code instruction which adopts assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and processing the source code instruction into a source code instruction with link information according to the entry address and the address offset.
Optionally, the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file includes:
compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and performing decompiling processing on the binary file by using a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
Optionally, before the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file, the method further includes:
calling the compiler corresponding to the processor platform.
Optionally, the processing the source code instruction into a source code instruction with link information according to the entry address and the address offset includes:
determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
Optionally, the obtaining an entry address of the module file at runtime includes:
and searching the entry address of the module file in the running process from the log information of the firmware interface system.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The foregoing describes in detail a file processing method and a file processing apparatus provided by the present invention, and the present document applies specific examples to explain the principles and embodiments of the present invention, and the descriptions of the foregoing examples are only used to help understand the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (12)
1. A file processing method, comprising:
acquiring a module file in a firmware interface system and an entry address of the module file during operation;
compiling and decompiling the module file to obtain a source code instruction which adopts assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and processing the source code instruction into a source code instruction with link information according to the entry address and the address offset.
2. The method according to claim 1, wherein the compiling and decompiling the module file to obtain a source code instruction in assembly language corresponding to the module file comprises:
compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and performing decompiling processing on the binary file by using a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
3. The method according to claim 2, wherein before the compiling and decompiling the module file to obtain the source code instruction in the assembly language corresponding to the module file, the method further comprises:
calling the compiler corresponding to the processor platform.
4. The method of any of claims 1-3, wherein processing the source code instructions into source code instructions with linking information according to the entry address and address offset comprises:
determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
5. The method according to any one of claims 1 to 3, wherein the obtaining the entry address of the module file at runtime comprises:
and searching the entry address of the module file in the running process from the log information of the firmware interface system.
6. A document processing apparatus, characterized by comprising:
the acquisition module is used for acquiring a module file in a firmware interface system and an entry address of the module file during operation;
the instruction processing module is used for compiling and decompiling the module file to obtain a source code instruction which is in assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and the address processing module is used for processing the source code instruction into the source code instruction with the link information according to the entry address and the address offset.
7. The apparatus of claim 6, wherein the instruction processing module comprises:
the compiling submodule is used for compiling the module file by a compiler to obtain a binary file corresponding to the module file;
and the decompiling submodule is used for performing decompiling processing on the binary file by a compiler to obtain a decompiled file which corresponds to the module file and adopts assembly language, wherein the decompiled file comprises the source code instruction.
8. The apparatus of claim 7, further comprising:
and the compiler calling module is used for calling the compiler corresponding to the processor platform before compiling and decompiling the module file to obtain the source code instruction which adopts assembly language and corresponds to the module file.
9. The apparatus of claim 6, wherein the address processing module comprises:
the address determination submodule is used for determining an actual operating address corresponding to each source code instruction according to the entry address and the address offset;
and the address adding submodule is used for adding the actual operation address into the source code instruction to obtain the source code instruction with the link information.
10. The apparatus of claim 6, wherein the obtaining module comprises:
and the address searching submodule is used for searching the entry address of the module file in operation from the log information of the firmware interface system.
11. An electronic device comprising a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors the one or more programs including instructions for:
acquiring a module file in a firmware interface system and an entry address of the module file during operation;
compiling and decompiling the module file to obtain a source code instruction which adopts assembly language and corresponds to the module file; wherein the source code instruction carries a corresponding address offset;
and processing the source code instruction into a source code instruction with link information according to the entry address and the address offset.
12. A readable storage medium, characterized in that instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform a file processing method according to one or more of method claims 1-5.
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