CN113358980B - Fault element identification method suitable for fault self-clearing type direct current power distribution network - Google Patents

Fault element identification method suitable for fault self-clearing type direct current power distribution network Download PDF

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CN113358980B
CN113358980B CN202110783338.9A CN202110783338A CN113358980B CN 113358980 B CN113358980 B CN 113358980B CN 202110783338 A CN202110783338 A CN 202110783338A CN 113358980 B CN113358980 B CN 113358980B
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CN113358980A (en
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李博通
刘涛
杨昕陆
王文鑫
石林
陈晓龙
温伟杰
苏江
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Tianjin University
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/081Locating faults in cables, transmission lines, or networks according to type of conductors
    • G01R31/086Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution networks, i.e. with interconnected conductors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/088Aspects of digital computing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00Systems supporting electrical power generation, transmission or distribution
    • Y04S10/50Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
    • Y04S10/52Outage or fault management, e.g. fault detection or location

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Abstract

The invention relates to a fault element identification method suitable for a fault self-clearing type direct current power distribution network, and provides a fault element identification method aiming at a direct current power distribution mode of combining a fault self-clearing converter with a quick isolating switch, wherein a bus virtual voltage characteristic quantity is constructed according to the fault characteristics of buses at different fault positions to identify a fault line; according to the switching process of partial sub-modules of the hybrid converter, an auxiliary identification criterion is constructed based on capacitance charge transfer quantity, and the fault bus is identified.

Description

Fault element identification method suitable for fault self-clearing type direct current power distribution network
Technical Field
The invention belongs to the technical field of electricity, relates to an electric power system and automatic relay protection thereof, and particularly relates to a fault element identification method suitable for a fault self-clearing type direct current power distribution network.
Background
The direct current distribution network generally adopts a voltage source type converter, the fault current rising speed is high, zero crossing does not exist, and the fault current clearing difficulty is large. The direct current circuit breaker is limited by cost, action speed, reliability and the like, and the direct current circuit breaker does not reach the degree of mature application at present.
At present, a direct current distribution mode of combining a fault self-clearing type converter with a quick isolating switch becomes one of important research and application directions. According to principle division, the principle of identifying fault elements of a direct-current power distribution network can be divided into a voltage-current method, a boundary method, a traveling wave method, a distance measurement method, a longitudinal connection method and the like.
Most of the above principles are directed to analyzing faults inside and outside a line area, and pay less attention to bus faults in a direct current distribution network, and sensors are required to be arranged at two ends of a line or along the line to measure electrical quantities. These sensors cause some electrical noise and additional losses, and also add significant construction costs.
Therefore, the invention researches a fault element identification method only depending on the outlet current of the converter and the DC bus voltage aiming at the bipolar fault of the fault self-clearing type converter power distribution network, and can greatly reduce the use of line sensors.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, and provides a fault element identification method aiming at a direct current distribution mode of combining a fault self-clearing converter with a quick isolating switch, wherein a bus virtual voltage characteristic quantity is constructed according to the fault characteristics of each bus at different fault positions to identify a fault line; according to the switching process of partial sub-modules of the hybrid converter, an auxiliary identification criterion is constructed based on capacitance charge transfer quantity, and the fault bus is identified.
The technical problem to be solved by the invention is realized by the following technical scheme:
a fault element identification method suitable for a fault self-clearing type direct current power distribution network is characterized by comprising the following steps: the identification method comprises the following steps:
step A: analyzing the fault characteristics of each bus under the condition that bipolar faults occur at different fault positions of the fault self-clearing type direct current power distribution network:
(1) When a line internal fault occurs:
the analysis is carried out based on the four-terminal direct current distribution system model shown in fig. 1, each Line in the distribution system is connected with two buses, the Line is called to be related to the two connected buses, and if a bipolar fault occurs on the Line1 between the current converters M1 and M2, namely, the fault point is positioned at f in fig. 1 12 Analyzing a bus associated with a fault line and a bus not associated with the fault line in the power distribution system;
for the bus 3 not associated with the faulty Line, the column write voltage equations for the positive lines Line2 and Line3 connected thereto hold the equations (1), (2):
Figure BDA0003157817680000021
Figure BDA0003157817680000022
the formula (3) is obtained by performing a null calculation on the formula (1) and the formula (2), removing the line current amount, and performing an integration operation:
Figure BDA0003157817680000023
wherein L is 1 =L s –L m
Generalizing to other buses m not associated with the faulty line, equation (4) holds:
Figure BDA0003157817680000024
in the formula (I), the compound is shown in the specification,
Figure BDA0003157817680000025
indicating the lengths of the remaining lines except the line connected to the bus n among the lines connected to the bus m;
for the bus 1 associated with the faulty Line, the following equation set (5) holds for the Line equations of the positive lines Line1 and Line4 connected thereto:
Figure BDA0003157817680000026
similarly, the equation group (5) is subjected to element-eliminating integral calculation and simplified to obtain an equation (6):
Figure BDA0003157817680000027
generalizing to other buses m associated with the faulty line, there is always a formula (17) established:
Figure BDA0003157817680000031
in the formula (I), the compound is shown in the specification,
Figure BDA0003157817680000032
representing the length of a non-fault line in a line connected with the bus m, and N representing the total number of buses in the distribution network;
comparing equation (4) with equation (7), the left side of the equation contains the same variables, and the left side of the equation is defined as the bus virtual voltage u mf
Figure BDA0003157817680000033
Wherein, m =1, \ 8230, N;
when x ≠ 0, equation (9) holds:
Figure BDA0003157817680000034
(2) When a line end fault or a bus fault occurs:
still analyzing the fault associated bus, calculating the connected outlet line voltage equation, eliminating elements, integrating and the like, and obtaining the formulas (10) and (11) by adopting an inductive method:
Figure BDA0003157817680000035
Figure BDA0003157817680000036
after bipolar faults occur in the power distribution network, the virtual voltage of each bus is related to the fault position, when the faults occur in the circuits, the virtual voltage of two buses is obviously greater than that of the other buses, and when the faults occur in the buses or the faults occur at the ports of the related circuits, the virtual voltage of only one bus is obviously greater than that of the bus;
and B: aiming at bus faults and line end faults in a power distribution network, the switching process of partial sub-modules of the hybrid converter is analyzed, and a criterion for accurately identifying fault buses and fault lines is provided:
after a fault occurs, the converter enters a blocking state to remove fault current, no current exists in a power distribution network after the fault current is removed, and a main identification method is used for determining that the fault is near a bus, so that a disconnecting switch on two sides of the bus and a related line of the bus is firstly opened, the capacitors of submodules in the converter can only be charged in the blocking state, in order to enable the converter to provide certain capacitor discharge current, a part of full-bridge submodules need to be switched into a switching state from the blocking state, and in order to prevent the capacitors of the rest submodules from being recharged, the rest submodules are in the blocking or switching-off state, the switching of the submodules designed by the invention is to switch in the full-bridge of the part of one phase of the converter at proper time, the rest submodules of the phase are in the switching-off state, and the rest two phases of the submodules still keep the blocking state, by taking a figure 2 as an example, a loop 1 is a fault loop for discharging the capacitors of the submodules, a loop 1 is analyzed, and the fault current distribution network (12) is established according to KVL formula:
u auL +u adL +u auC +u adC +u R =0 (12)
is provided with
Figure BDA0003157817680000041
Equation (12) can be simplified as:
Figure BDA0003157817680000042
in the formula u L Representing equivalent bridge arm inductance voltage after the sub-module capacitor is put into use; u. of C Representing equivalent capacitor voltage after sub-module capacitor is put into operation(ii) a R represents the loop 1 resistance; l and C respectively represent the equivalent inductance and the equivalent capacitance of the loop 1, and the calculation formula is shown as formula (15):
Figure BDA0003157817680000043
at the moment, the second-order circuit is in zero input response and under-damping condition, and the discharge current expression of the A-phase input submodule obtained through calculation satisfies the expression (16):
Figure BDA0003157817680000044
since the current is small at the beginning of oscillation, the partial voltage of the resistor in the whole loop is small, i.e. u C +u L The current is approximately equal to 0, and the currents of the upper bridge arm and the lower bridge arm are the same because no current is fed in at the alternating current side in the whole process; and because the upper and lower bridge arms input the same amount of capacitance, the capacitance voltage input by each bridge arm and the bridge arm inductance are offset, namely, the equation (17) is satisfied:
Figure BDA0003157817680000045
for simplifying the analysis, assume that the sum of the capacitor voltages of the full-bridge sub-modules of the upper and lower bridge arms of the B phase is u buFC 、u bdFC The sum of the capacitor voltages of the full-bridge sub-modules of the C-phase upper bridge arm and the C-phase lower bridge arm is u cuFC 、u cdFC At this time, whether the bridge arm of the B phase and the C phase is charged by the alternating current side depends only on the line voltage u ab And u ac Taking the B-phase bridge arm as an example, the charging path on the ac side is as shown in path 2 and path 3 of fig. 3, and when the a-phase full-bridge submodule is put into operation, if the line voltage u is equal to ab Less than path 2 voltage drop and line voltage u ba If the voltage drop is less than 3 times of the path, the B-phase submodule cannot be charged, the C-phase bridge arm also has a similar charging path, therefore, if the B-phase submodule and the C-phase bridge arm submodule are kept locked and are not charged on the alternating current side after the A-phase submodule is put into use, the putting-in time of the A-phase submodule needs to satisfy the formula (18), the upper inequality and the lower inequality of the equation set in the formula take the intersection,
Figure BDA0003157817680000051
substituting formula (17) into formula (18) yields:
Figure BDA0003157817680000052
when the A phase module is put into use, the system phase requirement meets theta epsilon (theta 12 ) Or theta e (theta) 34 ) Wherein:
Figure BDA0003157817680000053
in the formula, k is an integer,
and C: according to the analysis of bipolar faults at different positions in the steps A and B, fault element identification criteria and an operation process suitable for the fault self-clearing type direct current power distribution network are provided:
designing a fault element identification characteristic quantity based on bus virtual voltage as shown in formula (21):
Figure BDA0003157817680000054
in the formula u fmax1 、u fmax2 Respectively representing the first and second large bus virtual voltage values after the bus virtual voltages are sorted in descending order, and completing the identification of the internal faults of the line according to the characteristic quantity;
assuming that the input time of the phase A sub-module is delta t, the charge transfer amount can be calculated according to the formula (22) to set an auxiliary setting value, and in order to improve the identification accuracy of the fault element, a reliability coefficient k is selected rel2 =0.7,
Figure BDA0003157817680000055
And finishing the identification of the bus fault and the line end fault according to the charge transfer quantity of the sub-module capacitor.
2. The method according to claim 1, wherein the fault component identification method is applied to a fault self-clearing type direct current distribution network, and comprises the following steps: the specific operation flow of the fault identification is as follows:
1) Collecting wave recording information after each bus fault, wherein the wave recording information comprises current flowing to the bus from an outlet of a current converter and voltage to ground of the bus;
2) Calculating the virtual voltage of each bus according to the formula (14);
3) Sorting the bus virtual voltages in descending order, and calculating the characteristic quantity k according to the formula (21) u
4) If k is u When the current converter is completely blocked, disconnecting switches on two sides of the fault line are opened to complete fault isolation;
5) If k is u <0.05, if the virtual voltage of the bus m is far more than the virtual voltages of the rest buses, identifying that a bipolar fault occurs near the bus m, and then turning to step 6);
6) Turning on isolating switches on two sides of all associated lines of the bus, randomly selecting 2 full-bridge submodules of an upper bridge arm and a lower bridge arm of one phase to be put into use, cutting off the rest submodules of the bridge arm of the phase, and locking the other two-phase submodules; in order to reduce overcurrent influence of capacitor discharge on other devices of the converter, the capacitor input time delta t =1ms of the full-bridge submodule is set, and the input phase time is selected and calculated according to the formula (20);
7) And collecting bus current information, and calculating the capacitance charge transfer amount in the input time. If the charge transfer quantity is larger than the setting value, the capacitor is considered to form a discharge loop through a fault point on the bus, the bus fault is identified, the converter is locked again, the bus isolating switch is opened, and fault isolation is completed;
8) If the charge transfer amount in the delta t time is smaller than the setting value, the bus is considered to have no fault, then other line isolation switches close to the bus side are closed in sequence, the sub-module investment is carried out according to the step 6), and the judgment is carried out again, when the charge transfer amount is larger than the setting value after a certain line isolation switch is closed, the line is considered to have a fault, the converter is locked again, the isolation switches on the two sides of the line are opened, the fault isolation is completed, and then other isolation switches are closed.
The invention has the advantages and beneficial effects that:
1. the fault element identification method is suitable for the fault self-clearing type direct current distribution network, can realize accurate identification of fault elements and accurate fault location, has strong transition resistance capability, and reduces the investment of line sensors.
2. Compared with the prior art, the fault element identification method for the fault self-clearing type direct current power distribution network only utilizes the electrical quantities of the converter station outlet and the bus, is simple and easy to realize in principle, low in cost and high in fault location precision.
3. The method is suitable for identifying the fault element of the fault self-clearing type direct current power distribution network, and the line electric quantity is not required to be measured, so that the investment of a line sensor is reduced, and the construction investment of the power distribution network is greatly reduced.
Drawings
FIG. 1 is a diagram of a DC distribution network topology of the present invention;
FIG. 2 is a diagram of a phase A input partial full bridge sub-module according to the present invention;
fig. 3 is a flow chart of identifying a faulty component in the dc distribution system according to the present invention.
Detailed Description
The present invention is further illustrated by the following specific examples, which are intended to be illustrative, not limiting and are not intended to limit the scope of the invention.
A fault element identification method suitable for a fault self-clearing type direct current power distribution network is characterized by comprising the following steps: the identification method comprises the following steps:
step A: analyzing the fault characteristics of each bus under the condition that bipolar faults occur at different fault positions of the fault self-clearing type direct current power distribution network:
(1) When a line internal fault occurs:
the analysis is based on the four-terminal dc distribution system model shown in fig. 1, and each line in the distribution system is connected with two buses, and the line is referred to as being associated with the two connected buses.
If a bipolar fault occurs in Line1 between converters M1 and M2, i.e. the fault point is located at f in fig. 1 12 Analyzing a bus associated with a fault line and a bus not associated with the fault line in the power distribution system;
for the bus 3 not associated with the faulty Line, the column write voltage equations for the positive lines Line2 and Line3 connected thereto hold the equations (1), (2):
Figure BDA0003157817680000071
Figure BDA0003157817680000072
the formula (1) and the formula (2) are subjected to elimination calculation, line current amount is eliminated, and integration operation is performed to obtain a formula (3):
Figure BDA0003157817680000073
wherein L is 1 =L s –L m
Generalizing to other buses m not associated with the fault line, equation (4) always holds:
Figure BDA0003157817680000074
in the formula (I), the compound is shown in the specification,
Figure BDA0003157817680000075
the lengths of the remaining lines except for the line connected to the bus n among the lines connected to the bus m are shown.
For the bus 1 associated with the faulty Line, the following equation set (5) holds for the Line equations of the positive lines Line1 and Line4 connected thereto:
Figure BDA0003157817680000081
similarly, the elimination integral calculation and simplification are carried out on the equation group (5) to obtain the formula (6):
Figure BDA0003157817680000082
generalizing to other buses m associated with the faulty line, there is always the following equation (17):
Figure BDA0003157817680000083
in the formula (I), the compound is shown in the specification,
Figure BDA0003157817680000084
indicating the length of the non-faulted line of the lines connected to bus m and N indicating the total number of buses in the distribution network.
Comparing equation (4) with equation (7), the left side of the equation contains the same variables, and the left side of the equation is defined as the bus virtual voltage u mf
Figure BDA0003157817680000085
Wherein m =1, \ 8230, N.
When x ≠ 0, equation (9) holds:
Figure BDA0003157817680000086
(2) When a line end fault or a bus fault occurs:
still analyzing the fault associated bus, calculating the connected outgoing line voltage equation, eliminating elements, integrating and the like, and obtaining the formulas (10) and (11) by adopting an inductive method:
Figure BDA0003157817680000087
Figure BDA0003157817680000088
after bipolar faults occur in the power distribution network, the virtual voltage of each bus is related to the fault position, when the faults occur in the lines, the virtual voltage of two buses is obviously greater than that of the other buses, and when the bus faults or the faults occur at the ports of the related lines, the virtual voltage of only one bus is obviously greater than that of the bus.
And B: aiming at bus faults and line end faults in a power distribution network, the switching process of partial submodules of a hybrid converter is analyzed, and a criterion for accurately identifying fault buses and fault lines is provided:
after the fault occurs, the converter enters a locking state to remove fault current, and no current exists in the power distribution network after the fault current is removed. The main identification method determines that the fault is near the bus, so the bus and the isolating switches at two sides of the associated line should be opened first. In a blocking state, the capacitor of the sub-module in the converter can only be charged, in order to provide a certain capacitor discharge current for the converter, a part of the full-bridge sub-module needs to be converted from the blocking state into an input state, and simultaneously, in order to prevent the capacitor of the rest sub-modules from being charged again, the rest sub-modules need to be in a blocking or cutting state. The submodule switching scheme designed by the invention is to put part of the full-bridge submodule of a certain phase of the converter into operation at the right time, the rest submodules of the phase are in a cut-off state, and the rest two phases of submodules still keep a locking state.
Taking fig. 2 as an example, the circuit 1 is a fault circuit of sub-module capacitor discharge, and the circuit 1 is analyzed, and equation (12) is established according to KVL:
u auL +u adL +u auC +u adC +u R =0 (12)
is provided with
Figure BDA0003157817680000091
Equation (12) can be simplified as:
Figure BDA0003157817680000092
in the formula u L Representing equivalent bridge arm inductance voltage after the sub-module capacitor is put into use; u. of C Representing equivalent capacitance voltage after the sub-module capacitor is put into use; r represents the loop 1 resistance; l and C respectively represent the equivalent inductance and the equivalent capacitance of the loop 1, and the calculation formula is shown as formula (15):
Figure BDA0003157817680000093
the second order circuit is now zero input response and is in an underdamped condition. Calculating to obtain a phase A input submodule discharge current expression satisfying the formula (16):
Figure BDA0003157817680000094
since the current is small in the initial period of oscillation, the partial voltage of the resistor in the whole loop is small, i.e. u C +u L 0. In the whole process, no current is fed into the alternating current side, so that the currents of the upper bridge arm and the lower bridge arm are the same; and because the upper and lower bridge arms input the same amount of capacitance, the capacitance voltage input by each bridge arm and the bridge arm inductance are counteracted, namely, the equation (17) is established:
Figure BDA0003157817680000101
for simplifying the analysis, assume that the sum of the capacitor voltages of the full-bridge sub-modules of the upper and lower bridge arms of the B phase is u buFC 、u bdFC The sum of the capacitor voltages of the full-bridge sub-modules of the C-phase upper bridge arm and the C-phase lower bridge arm is u cuFC 、u cdFC Then the bridge arm of B and C phases isWhether or not it is charged by the AC side depends only on the line voltage u ab And u ac The size of (2). Taking the B-phase bridge arm as an example, the charging paths on the ac side are shown as path 2 and path 3 in fig. 3. When the A-phase full-bridge submodule is partially switched in, if the line voltage u ab Less than path 2 voltage drop and line voltage u ba And if the voltage drop is less than 3 times of the path, the B-phase submodule cannot be charged, and the C-phase bridge arm also has a similar charging path. Therefore, if the bridge arm sub-modules of the B and C phases are kept locked and the AC sides are not charged after the sub-modules of the A phase are put into use, the putting time of the sub-modules of the A phase needs to satisfy the formula (18), and the upper inequality and the lower inequality of an equation set in the formula are intersected.
Figure BDA0003157817680000102
Substituting formula (17) into formula (18) yields:
Figure BDA0003157817680000103
when the A phase module is put into use, the system phase requirement meets theta epsilon (theta 12 ) Or theta epsilon (theta) 34 ). Wherein:
Figure BDA0003157817680000104
wherein k is an integer.
And C: and B, according to the analysis of bipolar faults at different positions in the steps A and B, providing a fault element identification criterion and an operation process suitable for the fault self-clearing type direct current power distribution network.
Designing a fault element identification characteristic quantity based on the bus virtual voltage as shown in formula (21):
Figure BDA0003157817680000105
in the formula u fmax1 、u fmax2 Respectively representing all bus virtual voltagesAnd the bus virtual voltage values of the first maximum and the second maximum after descending sorting.
And completing the identification of the internal faults of the line according to the characteristic quantity.
Assuming that the input time of the phase A submodule is delta t, the charge transfer amount can be calculated according to the formula (22) to set an auxiliary setting value. To improve the accuracy of the identification of faulty components, the reliability factor k is selected rel2 =0.7。
Figure BDA0003157817680000111
And finishing the identification of the bus fault and the line end fault according to the sub-module capacitance charge transfer quantity.
Fig. 3 shows a block diagram of the fault identification scheme, and the specific operation flow is as follows:
1) Collecting wave recording information after each bus fault, wherein the wave recording information comprises current flowing to the bus from an outlet of a current converter and voltage to ground of the bus;
2) Calculating the virtual voltage of each bus according to the formula (14);
3) Sorting the bus virtual voltages in descending order, and calculating the characteristic quantity k according to the formula (21) u
4) If k is u When the current converter is completely blocked, disconnecting switches on two sides of the fault line are opened to complete fault isolation;
5) If k is u <0.05, if the virtual voltage of the bus m is far greater than the virtual voltages of the rest buses, identifying that a bipolar fault occurs near the bus m, and then turning to step 6);
6) Opening isolating switches on two sides of all associated lines of the bus, randomly selecting 2 full-bridge submodules of an upper bridge arm and a lower bridge arm of one phase to be put into use, cutting off the rest submodules of the bridge arm of the phase, and locking the other two-phase submodules; in order to reduce the overcurrent influence of capacitor discharge on other devices of the converter, the capacitor input time delta t =1ms of the full-bridge submodule is set, and the input phase moment is calculated according to the formula (20);
7) And collecting bus current information, and calculating the capacitance charge transfer amount in the input time. If the charge transfer quantity is larger than the setting value, the capacitor is considered to form a discharge loop through a fault point on the bus, the bus fault is identified, the converter is locked again, the bus isolating switch is opened, and fault isolation is completed;
8) And if the charge transfer amount in the delta t time is smaller than the setting value, the bus is considered to have no fault, then other line isolation switches close to the bus side in sequence, the sub-module investment is carried out and the judgment is carried out again according to the step 6), when the charge transfer amount is larger than the setting value after a certain line isolation switch is closed, the line is considered to have a fault, the current converter is locked again, the isolation switches on the two sides of the line are opened, the fault isolation is completed, and then other isolation switches are closed.
Although the embodiments of the present invention and the accompanying drawings are disclosed for illustrative purposes, those skilled in the art will appreciate that: various substitutions, changes and modifications are possible without departing from the spirit and scope of the invention and the appended claims, and therefore the scope of the invention is not limited to the disclosure of the embodiments and the accompanying drawings.

Claims (2)

1. A fault element identification method suitable for a fault self-clearing type direct current power distribution network is characterized by comprising the following steps: the identification method comprises the following steps:
step A: analyzing the fault characteristics of each bus under the condition that bipolar faults occur at different fault positions of the fault self-clearing type direct current power distribution network:
(1) When a line internal fault occurs:
analyzing the four-terminal direct current power distribution system model, wherein each Line in the power distribution system is connected with two buses, the Line is called to be associated with the two connected buses, and if the Line1 between the converters M1 and M2 has a bipolar fault, namely, the fault point is positioned at f 12 Analyzing a bus associated with a fault line and a bus not associated with the fault line in the power distribution system;
for the bus 3 not associated with the faulty Line, the column write voltage equations for the positive lines Line2 and Line3 connected thereto hold the equations (1), (2):
Figure FDA0003810486610000011
Figure FDA0003810486610000012
the formula (3) is obtained by performing a null calculation on the formula (1) and the formula (2), removing the line current amount, and performing an integration operation:
Figure FDA0003810486610000013
wherein L is 1 =L s –L m
Generalizing to other buses m not associated with the fault line, equation (4) always holds:
Figure FDA0003810486610000014
in the formula (I), the compound is shown in the specification,
Figure FDA0003810486610000015
indicating the lengths of the remaining lines except the line connected to the bus n among the lines connected to the bus m;
for the bus 1 associated with the faulty Line, the following equation set (5) holds for the Line1 and Line4 column circuit equations of the positive lines connected thereto:
Figure FDA0003810486610000016
similarly, the equation group (5) is subjected to element-eliminating integral calculation and simplified to obtain an equation (6):
Figure FDA0003810486610000021
generalizing to other buses m associated with the faulty line, there is always a formula (17) established:
Figure FDA0003810486610000022
in the formula (I), the compound is shown in the specification,
Figure FDA0003810486610000023
representing the length of a non-fault line in a line connected with the bus m, and N representing the total number of buses in the distribution network;
comparing equation (4) with equation (7), the left side of the equation contains the same variables, and the left side of the equation is defined as the bus virtual voltage u mf
Figure FDA0003810486610000024
Wherein, m =1, \ 8230, N;
when x ≠ 0, equation (9) holds:
Figure FDA0003810486610000025
(2) When a line end fault or a bus fault occurs:
still analyzing the fault associated bus, performing elimination and integral calculation on an outlet line voltage equation connected with the fault associated bus, and obtaining an equation (10) and an equation (11) by adopting an inductive method:
Figure FDA0003810486610000026
Figure FDA0003810486610000027
after bipolar faults occur in the power distribution network, the virtual voltage of each bus is related to the fault position, when the faults occur in the circuits, the virtual voltage of two buses is obviously greater than that of the other buses, and when the faults occur in the buses or the faults occur at the ports of the related circuits, the virtual voltage of only one bus is obviously greater than that of the bus;
and B: aiming at bus faults and line end faults in a power distribution network, the switching process of partial submodules of a hybrid converter is analyzed, and a criterion for accurately identifying fault buses and fault lines is provided:
after a fault occurs, the converter enters a blocking state to eliminate fault current, no current exists in a distribution network after the fault current is eliminated, a main identification method is used for determining that the fault is close to a bus, therefore, a disconnecting switch on two sides of the bus and a related line of the bus should be opened firstly, sub-module capacitors in the converter can only be charged in the blocking state, in order to enable the converter to provide certain capacitor discharging current, a part of full-bridge sub-modules need to be switched into a switching state from the blocking state, in order to prevent the rest of sub-module capacitors from being charged again, the rest of the sub-modules should be in the blocking or switching state, the sub-modules are switched to timely switch in the partial full-bridge sub-modules of a certain phase of the converter, the rest of the sub-modules of the phase are in the switching state, the rest of the two-phase of the sub-modules still keep the blocking state, a loop 1 is a fault loop for capacitor discharging of the sub-modules, the loop 1 is analyzed, and the following formula (12) is established:
u auL +u adL +u auC +u adC +u R =0 (12)
is provided with
Figure FDA0003810486610000031
Equation (12) can be simplified as:
Figure FDA0003810486610000032
in the formula u L Representing sub-module capacitance inputThen equivalent bridge arm inductance voltage; u. of C Representing equivalent capacitance voltage after the sub-module capacitor is put into use; r represents the loop 1 resistance; l and C respectively represent the equivalent inductance and the equivalent capacitance of the loop 1, and the calculation formula is shown as formula (15):
Figure FDA0003810486610000033
at the moment, the second-order circuit has zero input response and is under-damped, and the A-phase input submodule discharge current expression which is obtained by calculation satisfies the expression (16):
Figure FDA0003810486610000034
since the current is small in the initial period of oscillation, the partial voltage of the resistor in the whole loop is small, i.e. u C +u L The current is approximately equal to 0, and the currents of the upper bridge arm and the lower bridge arm are the same because no current is fed in at the alternating current side in the whole process; and because the upper and lower bridge arms input the same amount of capacitance, the capacitance voltage input by each bridge arm and the bridge arm inductance are counteracted, namely, the equation (17) is established:
Figure FDA0003810486610000035
for simplifying the analysis, assume that the sum of the capacitor voltages of the full-bridge sub-modules of the upper and lower bridge arms of the B phase is u buFC 、u bdFC The sum of the capacitor voltages of the full-bridge sub-modules of the C-phase upper bridge arm and the C-phase lower bridge arm is u cuFC 、u cdFC At this time, whether the bridge arm of the B phase and the C phase is charged by the alternating current side depends only on the line voltage u ab And u ac The bridge arm of the B phase, the charging path 2 and the charging path 3 of the AC side, when the full-bridge submodule part of the A phase is put in, if the line voltage u is ab Less than path 2 voltage drop and line voltage u ba If the voltage drop is less than 3 voltage drops of the path, the B-phase submodule cannot be charged, the C-phase bridge arm also has a similar charging path, and therefore, if the A-phase submodule is put into use, the B-phase bridge arm submodule and the C-phase bridge arm submodule are kept locked and are connectedIf the charging is not performed on the alternating current side, the input time of the phase A sub-module needs to satisfy the formula (18), the intersection of the upper inequality and the lower inequality of the equation set in the formula is taken,
Figure FDA0003810486610000041
substituting equation (17) into equation (18) yields:
Figure FDA0003810486610000042
when the A phase module is put into use, the system phase requirement meets the requirement of theta epsilon (theta 12 ) Or theta e (theta) 34 ) Wherein:
Figure FDA0003810486610000043
in the formula, k is an integer,
and C: according to the analysis of bipolar faults at different positions in the steps A and B, fault element identification criteria and an operation process suitable for the fault self-clearing type direct current power distribution network are provided:
designing a fault element identification characteristic quantity based on the bus virtual voltage as shown in formula (21):
Figure FDA0003810486610000044
in the formula u fmax1 、u fmax2 Respectively representing the first and second large bus virtual voltage values after the bus virtual voltages are sorted in descending order, and completing the identification of the internal faults of the line according to the characteristic quantity;
assuming that the input time of the phase A sub-module is delta t, the charge transfer amount can be calculated according to the formula (22) to set an auxiliary setting value, and in order to improve the identification accuracy of the fault element, a reliability coefficient k is selected rel2 =0.7,
Figure FDA0003810486610000045
And finishing the identification of the bus fault and the line end fault according to the sub-module capacitance charge transfer quantity.
2. The method of identifying a faulty component for use in a fault self-clearing dc power distribution network according to claim 1, wherein: the specific operation flow of the fault identification is as follows:
1) Collecting wave recording information after each bus has a fault, wherein the wave recording information comprises current flowing to the bus from an outlet of the converter and voltage to ground of the bus;
2) Calculating the virtual voltage of each bus according to the formula (14);
3) Sorting the bus virtual voltages in descending order, and calculating the characteristic quantity k according to the formula (21) u
4) If k is u When the current converter is completely blocked, disconnecting switches on two sides of the fault line are opened to complete fault isolation;
5) If k is u <0.05, if the virtual voltage of the bus m is far more than the virtual voltages of the rest buses, identifying that a bipolar fault occurs near the bus m, and then turning to step 6);
6) Opening isolating switches on two sides of all associated lines of the bus, randomly selecting 2 full-bridge submodules of an upper bridge arm and a lower bridge arm of one phase to be put into use, cutting off the rest submodules of the bridge arm of the phase, and locking the other two-phase submodules; in order to reduce the overcurrent influence of capacitor discharge on other devices of the converter, the capacitor input time delta t =1ms of the full-bridge submodule is set, and the input phase moment is calculated according to the formula (20);
7) Collecting bus current information, and calculating the capacitance charge transfer amount in the input time; if the charge transfer quantity is larger than the setting value, the capacitor is considered to form a discharge loop through a fault point on the bus, the bus fault is identified, the converter is locked again, the bus isolating switch is opened, and fault isolation is completed;
8) And if the charge transfer amount in the delta t time is smaller than the setting value, the bus is considered to have no fault, then other line isolation switches close to the bus side in sequence, the sub-module investment is carried out and the judgment is carried out again according to the step 6), when the charge transfer amount is larger than the setting value after a certain line isolation switch is closed, the line is considered to have a fault, the current converter is locked again, the isolation switches on the two sides of the line are opened, the fault isolation is completed, and then other isolation switches are closed.
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