CN113347116B - QoS scheduling delay jitter processing method and device - Google Patents

QoS scheduling delay jitter processing method and device Download PDF

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CN113347116B
CN113347116B CN202110663951.7A CN202110663951A CN113347116B CN 113347116 B CN113347116 B CN 113347116B CN 202110663951 A CN202110663951 A CN 202110663951A CN 113347116 B CN113347116 B CN 113347116B
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message output
queue
uncongested
buffer
output queue
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CN113347116A (en
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吴海振
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Hangzhou DPTech Technologies Co Ltd
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Hangzhou DPTech Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/50Queue scheduling
    • H04L47/56Queue scheduling implementing delay-aware scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/12Avoiding congestion; Recovering from congestion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/50Queue scheduling
    • H04L47/62Queue scheduling characterised by scheduling criteria
    • H04L47/6295Queue scheduling characterised by scheduling criteria using multiple queues, one for each individual QoS, connection, flow or priority

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  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The disclosure relates to a QoS scheduling delay jitter processing method, a QoS scheduling delay jitter processing device, an electronic device and a computer readable medium. The method comprises the following steps: if QoS scheduling delay jitter exists, acquiring the congestion states of a plurality of message output queues at fixed time, wherein the congestion states comprise congestion and non-congestion; extracting the queue buffer quantity of the uncongested message output queue; extracting a cache threshold value based on the identification of the uncongested message output queue; and when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, releasing the queue buffer of the uncongested message output queue according to a preset strategy. The QoS scheduling delay jitter processing method, the QoS scheduling delay jitter processing device, the electronic equipment and the computer readable medium can detect and find the QoS scheduling delay jitter phenomenon in real time and can quickly and effectively solve the QoS queue delay jitter phenomenon.

Description

QoS scheduling delay jitter processing method and device
Technical Field
The present disclosure relates to the field of computer information processing, and in particular, to a QoS scheduling delay jitter processing method and apparatus, an electronic device, and a computer readable medium.
Background
Congestion management refers to how to manage and control when a network is congested, and a processing method is to use a proper queue technology to ensure priority guarantee of key services. When an egress interface is congested, a proper queue scheduling mechanism can be used to preferentially guarantee the QoS parameters of a certain type of message, where a queue is referred to as an egress queue, which is a series of pointers pointing to a specified buffer, and is used to keep the message in the buffer before the interface can send the message, until the interface can continue to send the message, so the queue scheduling mechanism is used when the egress port is congested, and another main function is to reorder the message.
In a particular situation, the delay and jitter of the message will be very severe. Under the condition of persistent flow congestion, queues of messages are repeatedly switched, so that the messages have caches in certain queues, and if the caches cannot be released in time, QoS scheduling is extremely unstable, and a large amount of delay is generated.
To solve the problem, the existing solution is to find the occurrence of the delay phenomenon through the detection of the testing instrument, and then make the switch repair itself in a waiting manner. The latency is very long. Or by cutting off the flow, but it is clear that these solutions are not advisable. Or the speed limit burst value of the outlet is configured to be a larger value to be reconfigured back, and the scheme can quickly solve the problem, but cannot allow the user to perform such complicated operation, and the problem is always exposed.
Therefore, a new QoS scheduling delay jitter handling method, apparatus, electronic device and computer readable medium are needed.
The above information disclosed in this background section is only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not constitute prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
In view of the above, the present disclosure provides a QoS scheduling delay jitter processing method, apparatus, electronic device and computer readable medium, which can detect and find a QoS scheduling delay jitter phenomenon in real time and can also quickly and effectively solve the QoS queue delay jitter phenomenon.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows, or in part will be obvious from the description, or may be learned by practice of the disclosure.
According to an aspect of the present disclosure, a QoS scheduling delay jitter processing method is provided, which includes: if QoS scheduling delay jitter exists, acquiring the congestion states of a plurality of message output queues at fixed time, wherein the congestion states comprise congestion and non-congestion; extracting the queue buffer quantity of the uncongested message output queue; extracting a cache threshold value based on the identification of the uncongested message output queue; and when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, releasing the queue buffer of the uncongested message output queue according to a preset strategy.
In an exemplary embodiment of the present disclosure, further comprising: and respectively setting a buffer threshold value for each message output queue in the plurality of message output queues.
In an exemplary embodiment of the present disclosure, the setting a buffer threshold value for each of a plurality of packet output queues respectively includes: acquiring an outlet speed limit burst value of each message output queue in the plurality of message output queues; and respectively setting a buffer threshold value for each message output queue in the plurality of message output queues based on the outlet speed limit burst value.
In an exemplary embodiment of the present disclosure, setting a buffer threshold for each of a plurality of message output queues based on the egress speed limit burst value respectively includes: determining a detection sensitivity for each of the plurality of message output queues; and determining the buffer threshold value of each message output queue based on the detection sensitivity and the outlet speed limit burst value.
In one exemplary embodiment of the present disclosure, there is QoS scheduling delay jitter, including: extracting output messages of equipment and identifiers of message output queues corresponding to the output messages in an SP scheduling mode; and determining that QoS scheduling delay jitter exists when the identifier of the message output queue is not unique.
In an exemplary embodiment of the disclosure, determining that QoS scheduling delay jitter exists when the identification of the packet output queue is not unique comprises: and determining that QoS scheduling delay jitter exists when the identifier of the message output queue is not unique and the message output queue with higher priority is not empty.
In an exemplary embodiment of the present disclosure, extracting a queue buffer number of an uncongested packet output queue includes: and extracting the queue buffer quantity of the uncongested message output queue through a register.
In an exemplary embodiment of the present disclosure, releasing a queue buffer of an uncongested packet output queue according to a predetermined policy includes: extracting an outlet speed limit burst value of an uncongested message output queue; when the queue buffer quantity is larger than or equal to the outlet speed limit burst value, configuring the uncongested message output queue as the maximum burst value to release the queue buffer.
In an exemplary embodiment of the present disclosure, after releasing a queue buffer of an uncongested packet output queue according to a predetermined policy, the method further includes: adding a set mark to an uncongested message output queue; scanning the uncongested message output queue at fixed time according to the setting mark; and after the uncongested message output queue is set, restoring the uncongested message output queue to be the initial burst value.
According to an aspect of the present disclosure, a QoS scheduling delay jitter processing apparatus is provided, the apparatus including: the timing module is used for acquiring the congestion states of a plurality of message output queues at fixed time if QoS scheduling delay jitter exists, wherein the congestion states comprise congestion and non-congestion; the quantity module is used for extracting the queue buffer quantity of the uncongested message output queue; the extracting module is used for extracting a cache threshold value based on the identification of the uncongested message output queue; and the releasing module is used for releasing the queue buffer of the uncongested message output queue according to a preset strategy when the queue buffer quantity of the uncongested message output queue exceeds a buffer threshold value.
In an exemplary embodiment of the present disclosure, further comprising: and the threshold module is used for setting a buffer threshold value for each message output queue in the plurality of message output queues respectively.
According to an aspect of the present disclosure, an electronic device is provided, the electronic device including: one or more processors; storage means for storing one or more programs; when executed by one or more processors, cause the one or more processors to implement a method as above.
According to an aspect of the disclosure, a computer-readable medium is proposed, on which a computer program is stored, which program, when being executed by a processor, carries out the method as above.
According to the QoS scheduling delay jitter processing method, the QoS scheduling delay jitter processing device, the electronic equipment and the computer readable medium, if QoS scheduling delay jitter exists, the congestion states of a plurality of message output queues are acquired at regular time, wherein the congestion states comprise congestion and non-congestion; extracting the queue buffer quantity of the uncongested message output queue; extracting a cache threshold value based on the identification of the uncongested message output queue; when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, the QoS scheduling delay jitter phenomenon can be detected and found in real time in a mode of releasing the queue buffer of the uncongested message output queue according to a preset strategy, and the QoS queue delay jitter phenomenon can be solved quickly and effectively.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The above and other objects, features and advantages of the present disclosure will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings. The drawings described below are merely some embodiments of the present disclosure, and other drawings may be derived from those drawings by those of ordinary skill in the art without inventive effort.
Fig. 1 is a system block diagram illustrating a QoS scheduling delay jitter handling method and apparatus according to an example embodiment.
Fig. 2 is a flow chart illustrating a QoS scheduling delay jitter handling method according to an example embodiment.
Fig. 3 is a flowchart illustrating a QoS scheduling delay jitter handling method according to another exemplary embodiment.
Fig. 4 is a flowchart illustrating a QoS scheduling delay jitter handling method according to another exemplary embodiment.
Fig. 5 is a block diagram illustrating a QoS scheduling delay jitter processing apparatus according to an exemplary embodiment.
FIG. 6 is a block diagram illustrating an electronic device in accordance with an example embodiment.
FIG. 7 is a block diagram illustrating a computer-readable medium in accordance with an example embodiment.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus, a repetitive description thereof will be omitted.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and so forth. In other instances, well-known methods, devices, implementations, or operations have not been shown or described in detail to avoid obscuring aspects of the disclosure.
The block diagrams shown in the figures are functional entities only and do not necessarily correspond to physically separate entities. I.e. these functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor means and/or microcontroller means.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first component discussed below may be termed a second component without departing from the teachings of the disclosed concept. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It is to be understood by those skilled in the art that the drawings are merely schematic representations of exemplary embodiments, and that the blocks or processes shown in the drawings are not necessarily required to practice the present disclosure and are, therefore, not intended to limit the scope of the present disclosure.
When a message is delayed and jittered, the existing scheme is to wait for the self-repair of an egress queue, and has the disadvantages that if the setting of an egress burst value is very small, the waiting time is very long, the phenomenon is a large amount of service delay, the mode of cutting off flow can cause serious network disconnection, and the generation of problems which cannot be solved in real time by configuring the burst value is not a good method.
The inventors of the present application found that the causes of the occurrence of the delay and jitter phenomena are as follows: firstly, common messages are input into two inlets at a linear speed, priority mapping is not carried out on port messages 1 and 2, a queue 0 is defaulted, an sp scheduling mode is used for an outlet, speed limit is not carried out on the outlet, when the speed limit is not carried out on the outlet, a default smaller burst value is obtained, and at the moment, the phenomena that the outlet messages 1 and 2 respectively account for 50 percent are avoided.
And then, under the condition of continuous flow, modifying an input port trust port mode, mapping the message 1 to an output queue 7, and mapping the message 2 to a queue output 0, wherein the phenomenon should be that the message 1 accounts for 100 percent, and the message 2 accounts for 0 percent. The actual phenomenon is that message 2 will continuously go out from the outlet at a small rate. But a delay jitter phenomenon of the egress packet 1 is generated.
The inventor of the present application finds that the reason is that messages 1 and 2 are already cached in the default queue 0 before the configuration is changed, the message 1 starts to go to the queue 7 after the configuration is modified, and the scheduling is performed preferentially, and when the queue 7 is full, the egress bandwidth is just met, but the egress is allowed to occur suddenly, so that the queue 0 has a scheduling opportunity with a small probability, and then the messages in the queue 0 are slowly released. Then finally, both messages 1 and 2 will send out ports, and message 1 will generate a small amount of delay. The phenomenon displayed on the test instrument is a packet loss phenomenon. In fact, there is no packet loss, only the outgoing of the message is slow, and the normal recovery can be realized only when the queue 0 releases all the messages.
To solve this abnormal delay and jitter, two problems need to be solved, one is how to detect the occurrence of the problem and the other is how to quickly release the buffer of the queue under persistent traffic. Based on the above problem analysis, the inventor of the present application proposes a QoS scheduling delay jitter processing method in the present disclosure, which uses a timer to detect the buffer condition of each queue at regular time, and if a buffer abnormality is detected, configures an egress speed limit burst value of the port as a maximum value to quickly release the buffer, so that the port returns to normal. This way, the phenomena of delay and jitter of the QoS link in a congested situation can be solved, and the following is detailed with the help of specific embodiments.
Fig. 1 is a system block diagram illustrating a QoS scheduling delay jitter processing method, apparatus, electronic device and computer readable medium according to an example embodiment.
As shown in fig. 1, the system architecture 10 may include terminal devices 101, 102, 103, a network 104, and a message forwarding device 105. The network 104 is used to provide a medium for communication links between the terminal devices 101, 102, 103 and the message forwarding device 105. Network 104 may include various connection types, such as wired, wireless communication links, or fiber optic cables, among others.
A user may use the terminal devices 101, 102, 103 to interact with the message forwarding device 105 over the network 104 to receive or send messages, etc. The terminal devices 101, 102, 103 may have various communication client applications installed thereon, such as a shopping application, a web browser application, a search application, an instant messaging tool, a mailbox client, social platform software, and the like.
The terminal devices 101, 102, 103 may be various electronic devices having a display screen and supporting web browsing, including but not limited to smart phones, tablet computers, laptop portable computers, desktop computers, and the like.
The message forwarding device 105 may be a switch that provides various message forwarding services; if there is QoS scheduling delay jitter, the message forwarding device 105 may, for example, periodically obtain the congestion status of a plurality of message output queues, where the congestion status includes congestion and non-congestion; the message forwarding device 105 may, for example, extract the queue buffer number of the uncongested message output queue; the message forwarding device 105 may extract the buffer threshold, for example, based on the identity of the uncongested message output queue; the message forwarding device 105 may release the queue buffer of the uncongested message output queue according to a predetermined policy, for example, when the number of queue buffers of the uncongested message output queue exceeds a buffer threshold.
The message forwarding device 105 may also, for example, set a buffer threshold for each of a plurality of message output queues separately.
After releasing the queue buffer of the uncongested message output queue according to the predetermined policy, the message forwarding device 105 may also add a set flag to the uncongested message output queue, for example; scanning the uncongested message output queue at fixed time according to the setting mark; and after the uncongested message output queue is set, restoring the uncongested message output queue to be the initial burst value.
It should be noted that the QoS scheduling delay jitter processing method provided by the embodiment of the present disclosure may be executed by the message forwarding device 105, and accordingly, the QoS scheduling delay jitter processing apparatus may be disposed in the message forwarding device 105.
Fig. 2 is a flow chart illustrating a QoS scheduling delay jitter handling method according to an example embodiment. The QoS scheduling delay jitter processing method 20 includes at least steps S202 to S208.
As shown in fig. 2, in S202, if there is QoS scheduling delay jitter, the congestion states of the multiple packet output queues are periodically obtained, where the congestion states include congestion and non-congestion. Under the condition of persistent flow congestion, queues of messages are repeatedly switched, so that the messages have caches in certain queues, and if the caches cannot be released in time, QoS scheduling is extremely unstable, and a large amount of delay is generated.
As can be seen from the above analysis, when the buffer of the congested queue is full, the QoS scheduling delay jitter phenomenon is generated only when there are other non-empty packet output queues, so that the uncongested packet output queue needs to be emptied as soon as possible.
More specifically, the QoS scheduling delay jitter is determined as follows: extracting output messages of equipment and identifiers of message output queues corresponding to the output messages in an SP scheduling mode; and determining that QoS scheduling delay jitter exists when the identifier of the message output queue is not unique.
Wherein, the SP (Strict Priority) schedules to preferentially send the packets in the higher Priority queue according to the Priority from high to low, and then sends the packets in the lower Priority queue when the higher Priority queue is empty. Queue 7 has the highest priority and queue 0 has the lowest priority.
RR (Round Robin), RR based on fair scheduling of packets (Round Robin), and based on fair scheduling of packets, each queue schedules a packet and then transfers to the next queue.
More specifically, when the identifier of the packet output queue is not unique, determining that QoS scheduling delay jitter exists includes: and determining that QoS scheduling delay jitter exists when the identifier of the message output queue is not unique and the message output queue with higher priority is not empty.
In S204, the queue buffer number of the uncongested packet output queue is extracted. The method comprises the following steps: and extracting the queue buffer quantity of the uncongested message output queue through a register. The register functions to store binary codes and is formed by combining flip-flops having a storage function. One flip-flop can store 1-bit binary codes, so a register for storing n-bit binary codes needs to be formed by n flip-flops.
In S206, a buffer threshold is extracted based on the identity of the uncongested message output queue. Each message output queue corresponds to a respective buffer threshold, and the buffer threshold may be stored in a register or a preset table, which is not limited in this application.
In S208, when the number of queue buffers of the uncongested message output queue exceeds the buffer threshold, the queue buffer of the uncongested message output queue is released according to a predetermined policy.
In one embodiment, for example, the exit speed limit burst value of the uncongested message output queue is extracted; when the queue buffer quantity is larger than or equal to the outlet speed limit burst value, configuring the uncongested message output queue as the maximum burst value to release the queue buffer.
In one embodiment, for example, the exit speed limit burst value of the uncongested message output queue is extracted; when the queue buffer quantity is less than the exit speed limit burst value, the uncongested message output queue is not processed, so that the uncongested message output queue is self-repaired.
According to the QoS scheduling delay jitter processing method, if QoS scheduling delay jitter exists, the congestion states of a plurality of message output queues are acquired at regular time, and the congestion states comprise congestion and non-congestion; extracting the queue buffer quantity of the uncongested message output queue; extracting a cache threshold value based on the identification of the uncongested message output queue; when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, the QoS scheduling delay jitter phenomenon can be detected and found in real time in a mode of releasing the queue buffer of the uncongested message output queue according to a preset strategy, and the QoS queue delay jitter phenomenon can be solved quickly and effectively.
It should be clearly understood that this disclosure describes how to make and use particular examples, but the principles of this disclosure are not limited to any details of these examples. Rather, these principles can be applied to many other embodiments based on the teachings of the present disclosure.
Fig. 3 is a flowchart illustrating a QoS scheduling delay jitter handling method according to another exemplary embodiment. The process 30 shown in fig. 3 is a detailed description of "setting a buffer threshold value for each of a plurality of packet output queues, respectively".
As shown in fig. 3, in S302, an exit speed limit burst value of each of the plurality of message output queues is obtained. According to different grades of the message output queues, different exit speed limit burst values can be set for each message output queue. The exit speed limit burst value is used for representing the maximum message speed value of the message output queue under the burst condition.
In S304, a detection sensitivity is determined for each of the plurality of message output queues. The detection sensitivity may be considered as the buffer release time t, and may be, for example, default t is 1s, and the smaller the value of t, the higher the detection sensitivity, and different sensitivities may be set for each packet output queue according to the level of the packet output queue.
In S306, a buffer threshold of each packet output queue is determined based on the detection sensitivity and the egress speed limit burst value. The setting of the buffer threshold value X may be set through the egress speed limit burst value Y, where the two values are in a direct relationship, the buffer threshold value X is configured to be tY, t is buffer release time, default t is 1s, and the smaller the value of t is, the higher the detection sensitivity is, where the unit of X and Y may be kbits.
Fig. 4 is a flowchart illustrating a QoS scheduling delay jitter handling method according to another exemplary embodiment. The flow 40 shown in fig. 4 is a supplementary description of the flow shown in fig. 2.
As shown in fig. 4, in S402, a set flag is added to the uncongested message output queue.
In S404, the uncongested packet output queue is scanned at regular time according to the set flag.
In S406, after the uncongested packet output queue has been set, it is restored to the initial burst value.
The queue buffer state of the uncongested queue is read at regular time, and the buffer of the congested queue is always full, so that the uncongested queue is obtained, and whether the buffer value exceeds a certain threshold value is detected. The threshold value X can be set through an outlet speed limit burst value Y, the outlet speed limit burst value Y and the outlet speed limit burst value Y are in a direct proportion relation, a cache threshold value X is configured to be tY, t is cache release time, default t is 1s, the smaller the value of t is, the higher the detection sensitivity is, a register reading method is used for reading the cache value X of each queue in real time, after the value exceeds the threshold value, the next operation is triggered, and the unit of X and Y is kbits. And issuing configured port speed limit burst configuration after detecting that the speed limit burst configuration exceeds the threshold value, acquiring the burst value configuration of the port, not needing the configuration if the burst value exceeds a preset value Y > Xmax, wherein t <1, the problem is quickly repaired by self, if the burst value is less than the preset value, configuring the maximum burst value, setting a mark, scanning at the next time and detecting the mark at the same time, and if the mark is set, configuring the maximum burst value into the preset burst value.
The QoS scheduling delay jitter processing method disclosed by the invention can be used for rapidly and effectively solving the phenomena of QoS queue delay and jitter by scanning the queue blocking state at fixed time through the timer and configuring a mode that the port speed limit allows a burst value to rapidly release the queue buffer.
Those skilled in the art will appreciate that all or part of the steps implementing the above embodiments are implemented as computer programs executed by a CPU. When executed by the CPU, performs the functions defined by the above-described methods provided by the present disclosure. The program may be stored in a computer readable storage medium, which may be a read-only memory, a magnetic or optical disk, or the like.
Furthermore, it should be noted that the above-mentioned figures are only schematic illustrations of the processes involved in the methods according to exemplary embodiments of the present disclosure, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.
The following are embodiments of the disclosed apparatus that may be used to perform embodiments of the disclosed methods. For details not disclosed in the embodiments of the apparatus of the present disclosure, refer to the embodiments of the method of the present disclosure.
Fig. 5 is a block diagram illustrating a QoS scheduling delay jitter processing apparatus according to an exemplary embodiment. As shown in fig. 5, the QoS scheduling delay jitter processing apparatus 50 includes: a timing module 502, a quantity module 504, an extraction module 506, a release module 508, and a threshold module 510.
The timing module 502 is configured to obtain congestion states of a plurality of message output queues at a fixed time if QoS scheduling delay jitter exists, where the congestion states include congestion and non-congestion; for example, in the SP scheduling mode, the output packet of the device and the identifier of the packet output queue corresponding to the output packet are extracted; and determining that QoS scheduling delay jitter exists when the identifier of the message output queue is not unique.
More specifically, when the identifier of the packet output queue is not unique, determining that QoS scheduling delay jitter exists includes: and determining that QoS scheduling delay jitter exists when the identifier of the message output queue is not unique and the message output queue with higher priority is not empty.
The quantity module 504 is configured to extract a queue buffer quantity of an uncongested packet output queue; the queue buffer number of the uncongested message output queue may be extracted, for example, by a register.
The extracting module 506 is configured to extract a cache threshold based on the identifier of the uncongested packet output queue;
the releasing module 508 is configured to release the queue buffer of the uncongested message output queue according to a predetermined policy when the queue buffer number of the uncongested message output queue exceeds the buffer threshold. For example, the exit speed limit burst value of the uncongested message output queue is extracted; when the queue buffer quantity is larger than or equal to the outlet speed limit burst value, configuring the uncongested message output queue as the maximum burst value to release the queue buffer.
The threshold module 510 is configured to set a buffer threshold for each of the plurality of message output queues.
According to the QoS scheduling delay jitter processing device disclosed by the invention, if QoS scheduling delay jitter exists, the congestion states of a plurality of message output queues are acquired at regular time, wherein the congestion states comprise congestion and non-congestion; extracting the queue buffer quantity of the uncongested message output queue; extracting a cache threshold value based on the identification of the uncongested message output queue; when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, the QoS scheduling delay jitter phenomenon can be detected and found in real time in a mode of releasing the queue buffer of the uncongested message output queue according to a preset strategy, and the QoS queue delay jitter phenomenon can be solved quickly and effectively.
FIG. 6 is a block diagram illustrating an electronic device in accordance with an example embodiment.
An electronic device 600 according to this embodiment of the disclosure is described below with reference to fig. 6. The electronic device 600 shown in fig. 6 is only an example and should not bring any limitations to the function and scope of use of the embodiments of the present disclosure.
As shown in fig. 6, the electronic device 600 is embodied in the form of a general purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one memory unit 620, a bus 630 that couples various system components including the memory unit 620 and the processing unit 610, a display unit 640, and the like.
Wherein the storage unit stores program code that is executable by the processing unit 610 such that the processing unit 610 performs the steps described in this specification in accordance with various exemplary embodiments of the present disclosure. For example, the processing unit 610 may perform the steps as shown in fig. 2, 3, 4.
The storage unit 620 may include readable media in the form of volatile storage units, such as a random access memory unit (RAM)6201 and/or a cache storage unit 6202, and may further include a read-only memory unit (ROM) 6203.
The memory unit 620 may also include a program/utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.
Bus 630 may be one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.
The electronic device 600 may also communicate with one or more external devices 600' (e.g., keyboard, pointing device, bluetooth device, etc.), such that a user can communicate with devices with which the electronic device 600 interacts, and/or any device (e.g., router, modem, etc.) with which the electronic device 600 can communicate with one or more other computing devices. Such communication may occur via an input/output (I/O) interface 650. Also, the electronic device 600 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network such as the Internet) via the network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 via the bus 630. It should be appreciated that although not shown in the figures, other hardware and/or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, as shown in fig. 7, the technical solution according to the embodiment of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, or a network device, etc.) to execute the above method according to the embodiment of the present disclosure.
The software product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The computer readable storage medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable storage medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations for the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In situations involving remote computing devices, the remote computing devices may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to external computing devices (e.g., through the internet using an internet service provider).
The computer readable medium carries one or more programs which, when executed by a device, cause the computer readable medium to perform the functions of: if QoS scheduling delay jitter exists, acquiring the congestion states of a plurality of message output queues at fixed time, wherein the congestion states comprise congestion and non-congestion; extracting the queue buffer quantity of the uncongested message output queue; extracting a cache threshold value based on the identification of the uncongested message output queue; and when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, releasing the queue buffer of the uncongested message output queue according to a preset strategy.
Those skilled in the art will appreciate that the modules described above may be distributed in the apparatus according to the description of the embodiments, or may be modified accordingly in one or more apparatuses unique from the embodiments. The modules of the above embodiments may be combined into one module, or further split into multiple sub-modules.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.
Exemplary embodiments of the present disclosure are specifically illustrated and described above. It is to be understood that the present disclosure is not limited to the precise arrangements, instrumentalities, or instrumentalities described herein; on the contrary, the disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims (9)

1. A QoS scheduling delay jitter processing method, comprising:
if QoS scheduling delay jitter exists, acquiring the congestion states of a plurality of message output queues at regular time, wherein the congestion states comprise congestion and non-congestion, and the QoS scheduling delay jitter exists;
extracting the queue buffer quantity of the uncongested message output queue;
extracting a cache threshold value based on the identification of the uncongested message output queue;
and when the queue buffer quantity of the uncongested message output queue exceeds the buffer threshold value, releasing the queue buffer of the uncongested message output queue according to a preset strategy.
2. The method of claim 1, further comprising:
and respectively setting a buffer threshold value for each message output queue in the plurality of message output queues.
3. The method of claim 2, wherein setting a buffer threshold for each of a plurality of message output queues, respectively, comprises:
acquiring an outlet speed limit burst value of each message output queue in the plurality of message output queues;
and respectively setting a buffer threshold value for each message output queue in the plurality of message output queues based on the outlet speed limit burst value.
4. The method of claim 3, wherein setting a buffer threshold for each of a plurality of message output queues based on the egress rate limit burst value comprises:
determining a detection sensitivity for each of the plurality of message output queues;
and determining the buffer threshold value of each message output queue based on the detection sensitivity and the outlet speed limit burst value.
5. The method of claim 1, wherein extracting the queue buffer number of the uncongested message output queue comprises:
and extracting the queue buffer quantity of the uncongested message output queue through a register.
6. The method of claim 1, wherein releasing the queue buffer of the uncongested message output queue according to a predetermined policy comprises:
extracting an outlet speed limit burst value of an uncongested message output queue;
when the queue buffer quantity is larger than or equal to the outlet speed limit burst value, configuring the uncongested message output queue as the maximum burst value to release the queue buffer.
7. The method of claim 1, wherein after releasing queue buffers of uncongested message output queues according to a predetermined policy, further comprising:
adding a set mark to an uncongested message output queue;
scanning the uncongested message output queue at fixed time according to the setting mark;
and after the uncongested message output queue is set, restoring the uncongested message output queue to be the initial burst value.
8. A QoS scheduling delay jitter processing apparatus, comprising:
the timing module is used for acquiring the congestion states of a plurality of message output queues at regular time if QoS scheduling delay jitter exists, wherein the congestion states comprise congestion and non-congestion, the QoS scheduling delay jitter exists comprises the steps of extracting output messages of equipment and identifiers of the corresponding message output queues in an SP scheduling mode, and determining that the QoS scheduling delay jitter exists when the identifiers of the message output queues are not unique and the message output queues with higher priorities are not empty;
the quantity module is used for extracting the queue buffer quantity of the uncongested message output queue;
the extracting module is used for extracting a cache threshold value based on the identification of the uncongested message output queue;
and the releasing module is used for releasing the queue buffer of the uncongested message output queue according to a preset strategy when the queue buffer quantity of the uncongested message output queue exceeds a buffer threshold value.
9. The apparatus of claim 8, further comprising:
and the threshold module is used for setting a buffer threshold value for each message output queue in the plurality of message output queues respectively.
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