CN113345375A

CN113345375A - Pixel driving circuit, driving method and display device

Info

Publication number: CN113345375A
Application number: CN202110592004.3A
Authority: CN
Inventors: 翁祖伟; 黄宇鹏; 翁彬; 刘葆; 黄巧红
Original assignee: BOE Technology Group Co Ltd; Fuzhou BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Fuzhou BOE Optoelectronics Technology Co Ltd
Priority date: 2021-05-28
Filing date: 2021-05-28
Publication date: 2021-09-03
Anticipated expiration: 2041-05-28

Abstract

The embodiment of the invention provides a pixel driving circuit, a driving method and a display device, relates to the technical field of display, and aims to solve the problem of uneven display of the display device caused by IR (infrared) voltage drop on a power line. The pixel driving circuit comprises a driving sub-circuit, a writing sub-circuit, a light-emitting control sub-circuit and a compensation sub-circuit. The driving sub-circuit is configured to control a driving current flowing through the first terminal and the second terminal thereof. The write sub-circuit is configured to apply an initialization voltage to the first node, and control a voltage of the first terminal of the drive sub-circuit to be a data voltage. The light emission control sub-circuit is configured to apply a power supply voltage to the first terminal of the driving sub-circuit and to turn on the first node with the control terminal of the driving sub-circuit. The compensation sub-circuit is configured to couple a voltage variation of the first terminal of the driving sub-circuit to the first node, causing the voltage of the first node to vary to the driving voltage.

Description

Pixel driving circuit, driving method and display device

Technical Field

The invention relates to the technical field of display, in particular to a pixel driving circuit, a driving method and a display device.

Background

In the field of display technology, Organic Light-emitting diode (OLED) display devices have been increasingly used for high-performance display due to their advantages of wide color gamut, high contrast, energy saving, foldability, etc.

The OLED display device may include a plurality of pixels and pixel driving circuits coupled to the plurality of pixels in one-to-one correspondence. The pixel driving circuit may include a power line through which a power voltage may be transmitted to a plurality of pixels in the OLED display device, and for example, the power line may supply the power voltage to the respective pixels of the same column.

In the case where the power line is long (for example, in a large-sized OLED display device), a large IR drop (IR drop) is generated on the power line, so that the voltage received by the subsequent pixel is lower than the voltage received by the previous pixel, and this may cause the OLED display device to display non-uniformly.

Disclosure of Invention

Embodiments of the present invention provide a pixel driving circuit, a driving method, and a display device, so as to solve the problem of non-uniform display of the display device caused by IR drop on a power line.

In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:

in a first aspect, a pixel driving circuit is provided, which includes a driving sub-circuit, a writing sub-circuit, a light emission control sub-circuit, and a compensation sub-circuit. The driving sub-circuit includes a control terminal, a first terminal, and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal according to a voltage of the control terminal. The write sub-circuit is coupled to the first node and the driving sub-circuit, and configured to apply an initialization voltage provided by the initialization signal terminal to the first node and control a voltage of the first terminal of the driving sub-circuit to be a data voltage. The light emission control sub-circuit is coupled to the first node and the first terminal and the control terminal of the driving sub-circuit, and configured to apply a power voltage to the first terminal of the driving sub-circuit and to turn on the first node and the control terminal of the driving sub-circuit in response to a driving control signal. The compensation sub-circuit is coupled with the first node and the first end of the driving sub-circuit and is configured to couple a voltage variation of the first end of the driving sub-circuit to the first node so that the voltage of the first node is changed from an initialization voltage to a driving voltage, wherein the voltage variation is a difference value of a data voltage and a power supply voltage.

In some embodiments, the write sub-circuit is specifically configured to write a data signal to the control terminal of the drive sub-circuit such that the data signal is transmitted through the emission control sub-circuit to the first node, the compensation sub-circuit being charged under the action of the data signal and a supply voltage applied to the first terminal of the drive sub-circuit; and applying an initialization voltage to the first node, continuously writing a data signal into the control end of the driving sub-circuit, and controlling the voltage of the first end of the driving sub-circuit to be discharged to a data voltage through the first end and the second end of the driving sub-circuit.

In some embodiments, the write sub-circuit being configured to control the voltage of the first terminal of the drive sub-circuit to discharge to the data voltage via the second terminal of the drive sub-circuit comprises: the write sub-circuit is configured to turn on the second terminal of the drive sub-circuit with the initialization signal terminal.

In some embodiments, the write sub-circuit includes at least one of a first transistor, a second transistor, and a third transistor, the first transistor including a first pole, a second pole, and a control pole, wherein the first pole of the first transistor is coupled to the second terminal of the drive sub-circuit, and the second pole of the first transistor is coupled to the initialization signal terminal; the second transistor comprises a first pole, a second pole and a control pole, wherein the first pole of the second transistor is coupled with the first node, and the second pole of the second transistor is coupled with the initialization signal end; the third transistor includes a first pole, a second pole, and a control pole, wherein the first pole of the third transistor is coupled to the data signal terminal, the second pole of the third transistor is coupled to the control terminal of the driving sub-circuit, and the data signal terminal is configured to provide the data signal.

In some embodiments, the control electrode of the first transistor and the control electrode of the third transistor are coupled to the scan signal terminal.

In some embodiments, the compensation sub-circuit comprises a capacitor; two ends of the capacitor are respectively coupled with the first node and the first end of the driving sub-circuit.

In some embodiments, the light emitting sub-circuit includes at least one of a fourth transistor and a fifth transistor. The fourth transistor comprises a first pole, a second pole and a control pole, wherein the first pole of the fourth transistor is coupled with the first node, the second pole of the fourth transistor is coupled with the control end of the driving sub-circuit, the control pole of the fourth transistor is coupled with the driving control signal end, and the driving control signal end is configured to provide the driving control signal; a first pole of the fifth transistor is coupled to the power supply voltage terminal, a second pole of the fifth transistor is coupled to the first terminal of the driving sub-circuit, a control pole of the fifth transistor is coupled to the driving control signal terminal, and the power supply voltage terminal is configured to provide the power supply voltage.

In some embodiments, the drive sub-circuit comprises a drive transistor; the driving transistor comprises a first pole, a second pole and a control pole, the first pole of the driving transistor is a first end of the driving sub-circuit, the second pole of the driving transistor is a second end of the driving sub-circuit, and the control pole of the driving transistor is a control end of the driving sub-circuit.

In a second aspect, a pixel driving circuit is provided, which includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and a driving transistor. The first transistor comprises a first pole, a second pole and a control pole; the second transistor comprises a first pole, a second pole and a control pole; the third transistor comprises a first pole, a second pole and a control pole; the fourth transistor comprises a first pole, a second pole and a control pole; the fifth transistor includes a first electrode, a second electrode, and a control electrode. The first pole of the first transistor is coupled with the second pole of the driving transistor, and the second pole of the first transistor is coupled with the initialization signal end; the first pole of the second transistor is coupled with the first node, and the second pole of the second transistor is coupled with the initialization signal end; a first pole of the third transistor is coupled with the data signal end, and a second pole of the third transistor is coupled with the control pole of the driving transistor; a first pole of the fourth transistor is coupled with the first node, a second pole of the fourth transistor is coupled with the control pole of the driving transistor, and the control pole of the fourth transistor is coupled with the driving control signal end; a first pole of the fifth transistor is coupled to the power voltage terminal, a second pole of the fifth transistor is coupled to the first pole of the driving transistor, and a control pole of the fifth transistor is coupled to the driving control signal terminal.

In a third aspect, a display device is provided, which includes the pixel driving circuit provided in any one of the above embodiments.

In a fourth aspect, a driving method of a pixel driving circuit is provided, wherein the pixel driving circuit includes: a driving sub-circuit, a writing sub-circuit, a light emission control sub-circuit, a compensation sub-circuit, and a first node. The driving method of the pixel driving circuit comprises the following steps: the writing sub-circuit applies an initialization voltage provided by the initialization signal end to the first node and controls the voltage of the first end of the driving sub-circuit to be a data voltage; the light emission control sub-circuit applies a first power supply voltage to a first terminal of the driving sub-circuit in response to the driving control signal; the compensation sub-circuit couples a voltage variation of a first end of the driving sub-circuit to the first node, so that the voltage of the first node is changed from an initialization voltage to a driving voltage, wherein the voltage variation is a difference value between a data voltage and a first power voltage; the light emission control sub-circuit turns on the first node with the control terminal of the driving sub-circuit in response to the driving control signal to apply the driving voltage to the control terminal of the driving sub-circuit.

In the pixel driving circuit provided by the embodiment of the invention, the driving current for driving the light emitting device to emit light is independent of the power supply voltage and is dependent on the initialization voltage and the data voltage. The initialization voltage is only referenced to the power plane, does not generate current through the light emitting device, does not need to flow through the light emitting device, and has small IR drop. Therefore, it is possible to solve the problem of display unevenness of the display device due to an IR drop on the power line transmitting the power supply voltage.

It is to be understood that the pixel driving circuit according to the second aspect may have the same structure as the pixel driving circuit according to the first aspect, the display device according to the third aspect includes the pixel driving circuit, and the driving method of the pixel circuit according to the fourth aspect is used for driving the pixel driving circuit, so that the beneficial effects achieved by the driving method refer to the beneficial effects of the pixel driving circuit, and are not repeated herein.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a structural diagram of a display device according to an embodiment of the present invention;

fig. 2 is a structural diagram of a sub-pixel in a display device according to an embodiment of the present invention;

FIG. 3 is a diagram of signal lines for providing signals to each sub-pixel in the display panel according to the embodiment of the invention;

fig. 4 is a structural diagram of a pixel driving circuit according to an embodiment of the invention;

fig. 5 is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the invention;

fig. 6 is a signal timing diagram of a pixel driving circuit according to an embodiment of the invention;

fig. 7A is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the invention;

fig. 7B is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the invention;

fig. 7C is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the invention;

fig. 8 is a flowchart of a driving method of a pixel driving circuit according to an embodiment of the invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention.

Unless the context requires otherwise, throughout the description and the claims, the term "comprise" and its other forms, such as the third person's singular form "comprising" and the present participle form "comprising" are to be interpreted in an open, inclusive sense, i.e. as "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be included in any suitable manner in any one or more embodiments or examples.

In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present disclosure, "a plurality" means two or more unless otherwise specified.

In describing some embodiments, expressions of "coupled" and "connected," along with their derivatives, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, some embodiments may be described using the term "coupled" to indicate that two or more elements are in direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents herein.

"at least one of A, B and C" has the same meaning as "A, B or at least one of C," each including the following combination of A, B and C: a alone, B alone, C alone, a and B in combination, a and C in combination, B and C in combination, and A, B and C in combination.

"A and/or B" includes the following three combinations: a alone, B alone, and a combination of A and B.

"plurality" means at least two.

The use of "adapted to" or "configured to" herein is meant to be an open and inclusive language that does not exclude devices adapted to or configured to perform additional tasks or steps.

Additionally, the use of "based on" means open and inclusive, as a process, step, calculation, or other action that is "based on" one or more stated conditions or values may in practice be based on additional conditions or values beyond those stated.

As used herein, "about," "approximately," or "approximately" includes the stated values as well as average values that are within an acceptable range of deviation for the particular value, as determined by one of ordinary skill in the art in view of the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system).

Example embodiments are described herein with reference to cross-sectional and/or plan views as idealized example figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

Some embodiments of the present invention provide a display device. The display device is a product having an image display function, and may be, for example: the display, the television, the billboard, the Digital photo frame, the laser printer with the display function, the telephone, the mobile phone, the Personal Digital Assistant (PDA), the Digital camera, the portable video camera, the viewfinder, the navigator, the vehicle, the large-area wall, the household electrical appliance, the information inquiry equipment (such as the business inquiry equipment and the monitor of the departments of electronic government affairs, bank, hospital, electric power, etc.).

Fig. 1 shows a structural diagram of a display device. As shown in fig. 1, the display apparatus 1 may include a display panel DP, and the display apparatus 1 may further include a driving circuit coupled to the display panel DP, the driving circuit being configured to supply an electrical signal to the display panel DP. Illustratively, the driving circuit may include: a Source Driver IC (Source Driver IC) configured to supply a data driving signal (also referred to as a data signal) to the display panel. The driving circuit may further include a Timing Controller (TCON) or the like coupled to the source driver.

The display panel DP may be an OLED (Organic Light Emitting Diode) display panel, a QLED (Quantum Dot Light Emitting Diode) display panel, a micro LED (including a miniLED or a micro LED, where the LED is a Light Emitting Diode) display panel, or the like.

The display panel DP has a display Area (AA) and a peripheral Area S. Wherein, the peripheral area S is at least positioned at one side outside the AA area. The display panel comprises a plurality of sub-pixels P arranged in an AA area. Illustratively, the plurality of subpixels P may be arranged in an array. For example, the sub-pixels arranged in a row along the y-direction in fig. 1 are referred to as the same row of sub-pixels, and the sub-pixels arranged in a row along the x-direction in fig. 1 are referred to as the same column of sub-pixels.

Illustratively, the plurality of subpixels P includes a first color subpixel, a second color subpixel, and a third color subpixel; for example, the first color, the second color, and the third color are three primary colors; for example, the first, second, and third colors are red, green, and blue, respectively; that is, the plurality of sub-pixels includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel.

Fig. 2 shows the structure of the sub-pixel P. Referring to fig. 2, the subpixel P may include a light emitting device 10 and a pixel driving circuit 20 supplying a driving current to the light emitting device 10. The light emitting device 10 may be an electroluminescent device, such as an Organic Light Emitting Diode (OLED). The driving principle of the electroluminescent device is as follows: the electroluminescent device is driven by current, and the magnitude of the current determines the display gray scale.

Fig. 3 is a schematic diagram of signal lines for supplying signals to each sub-pixel in the display panel. Fig. 3 shows the gate line 11, the data line 12, the first power line 13, the second power line 14, and the initialization signal line 15. In some embodiments, the gate line 11 is configured to provide a scan signal to the pixel driving circuit, the data line 12 is configured to provide a data signal Vdata to the pixel driving circuit, the first power line 13 is configured to provide a constant first power signal ELVDD to the pixel driving circuit, the second power line 14 is configured to provide a constant second power signal ELVSS to the pixel driving circuit, and the initialization signal line 15 is configured to provide an initialization signal Vinit to the pixel driving circuit.

Fig. 4 shows the structure of the pixel drive circuit. Referring to fig. 3 and 4, the pixel driving circuit 20 may include a driving sub-circuit 100, a writing sub-circuit 200, a light emission controlling sub-circuit 300, a compensation sub-circuit 400, and a first node D.

The driving sub-circuit 100 includes a first terminal 110, a second terminal 120, and a control terminal 130. The driving sub-circuit 100 is configured to control a driving current flowing through the first terminal 110 and the second terminal 120 according to a voltage of the control terminal 130. Wherein the driving current may be configured to drive the light emitting device to emit light, the magnitude of the driving current being different, and the luminance of the light emitting device to emit light being different.

The write sub-circuit 200 is coupled to the first node D and the drive sub-circuit 100. The write sub-circuit 200 is configured to apply an initialization voltage provided from the initialization signal terminal to the first node D and control a voltage driving the first terminal 110 of the sub-circuit 100 to be a data voltage.

Illustratively, the write sub-circuit 200 may be coupled to the control terminal 130 of the driving sub-circuit 100, so as to couple the write sub-circuit 200 to the driving sub-circuit 100. The write sub-circuit 200 may also be coupled to the second terminal 120 of the driving sub-circuit 100, so as to couple the write sub-circuit 200 to the driving sub-circuit 100.

For example, the write sub-circuit 200 may be coupled to the initialization signal terminal through the initialization signal line 15, so that the initialization signal Vinit provided by the initialization signal terminal may be transmitted to the first node D through the write sub-circuit 200, and at this time, the initialization voltage applied to the first node D by the write sub-circuit 200 is the initialization signal Vinit provided by the initialization signal terminal.

Illustratively, the write sub-circuit 200 may also be coupled to the data line 12, such that the data signal Vdata may be transmitted to the pixel driving circuit through the write sub-circuit 200.

The data voltage may be a data signal Vdata, which may also be related to the data signal Vdata, which is different from the data voltage applied to the first terminal 110 of the driving sub-circuit 100, such that the data voltage corresponds to the information to be displayed.

The light-emitting control sub-circuit 300 is coupled to the first node D, the first terminal 110 of the driving sub-circuit 100, and the control terminal 130 of the driving sub-circuit 100. The light emission control sub-circuit 300 is configured to apply a power supply voltage to the first terminal 110 of the driving sub-circuit 100 and to conduct the first node D with the control terminal 130 of the driving sub-circuit 100 in response to the driving control signal.

Illustratively, the light emission control sub-circuit 300 may be coupled to the first power line 13 such that the first power signal ELVDD may be transmitted to the pixel driving circuit through the light emission control sub-circuit 300, and thus, the power voltage applied to the first terminal 110 of the driving sub-circuit 100 by the light emission control sub-circuit 300 may be the first power signal ELVDD.

The compensation sub-circuit 400 is coupled to the first node D and the first terminal 110 of the driving sub-circuit 100. The compensation sub-circuit 400 is configured to couple a voltage variation of the first terminal of the driving sub-circuit 100 to the first node D such that the voltage of the first node D is varied from the initialization voltage to the driving voltage. The voltage variation is a difference between the data voltage and the power voltage, and accordingly, the driving voltage may be equal to the initialization voltage minus the voltage variation. Illustratively, the driving voltage Vd ═ Vinit-Vdata + ELVDD.

As also described above, the first node D and the control terminal 130 of the driving sub-circuit 100 can be made conductive by the light emission control sub-circuit 300, and therefore, the potential at the control terminal 130 of the driving sub-circuit 100 can be made the same as the potential at the first node D, that is, the potential at the control terminal 130 of the driving sub-circuit 100 can be made the driving voltage Vd. Illustratively, Vd ═ Vinit-Vdata + ELVDD.

In some embodiments, the drive sub-circuit may comprise a drive transistor. The driving transistor comprises a first pole, a second pole and a control pole. The first pole of the driving transistor may be a first terminal of the driving sub-circuit, the second pole of the driving transistor may be a second terminal of the driving sub-circuit, and the control pole of the driving transistor may be a control terminal of the driving sub-circuit. Thus, the driving current flowing through the first terminal and the second terminal of the driving sub-circuit is the driving current flowing through the first pole and the second pole of the driving transistor. Also, the current flowing through the first and second electrodes of the driving transistor can be determined by the following formula:

where Cox is the channel capacitance per unit area of the drive transistor, u is the channel mobility of the drive transistor, W is the channel width of the drive transistor, L is the channel length of the drive transistor, Vgs is the voltage between the gate and source of the drive transistor, e.g., between the control and first electrodes of the drive transistor, and Vth is the threshold voltage of the drive transistor. Accordingly, the voltage between the gate and the source of the driving transistor is the difference between the initialization voltage and the data voltage. Exemplarily, Vgs-Vdata.

Substituting Vgs into the above equation, the following result can be obtained:

it can be seen that the power supply voltage (e.g., ELVDD) does not appear in the result obtained by the above formula, and the driving current is independent of the power supply voltage and is dependent only on the initialization voltage, the data voltage, and the threshold voltage of the driving transistor. Since the initialization voltage is the initialization reference power plane and does not generate a current through the light emitting device (e.g., organic light emitting diode), the current is substantially zero on the initialization signal line for transmitting the initialization voltage, the IR drop on the initialization signal line is small, and the influence on the normal display of the display panel is small. Thus, the problem of display non-uniformity of the display device caused by an IR drop on a power line (e.g., a first power line for transmitting the power supply voltage ELVDD) is solved.

In some embodiments, the write sub-circuit 200 is specifically configured to write the data signal Vdata to the control terminal 130 of the driving sub-circuit 100, such that the data signal Vdata is transmitted to the first node D via the light emission control sub-circuit 300, and thus the compensation sub-circuit 400 can be charged under the action of the data signal Vdata and the power voltage applied by the first terminal 110 of the driving sub-circuit 100. The write sub-circuit 200 is further configured to apply an initialization voltage to the first node D and to continue writing the data signal Vdata to the control terminal 130 of the drive sub-circuit 100, controlling the voltage of the first terminal 110 of the drive sub-circuit 100 to discharge to the data voltage via the first terminal 110 and the second terminal 120 of the drive sub-circuit 100.

Illustratively, the compensation sub-circuit 400 is configured to couple the voltage variation of the first node D to the first terminal 110 of the driving sub-circuit 100 such that the voltage of the first terminal 110 of the driving sub-circuit 100 varies from the power supply voltage to the intermediate voltage, and then, through the control of the write sub-circuit 200, such that the voltage of the first terminal 110 of the driving sub-circuit 100 is discharged from the intermediate voltage to the data voltage via the first terminal 110 and the second terminal 120 of the driving sub-circuit 100. Where the voltage variation is the difference between the initialization voltage and the data signal Vdata, and accordingly, the intermediate voltage may be equal to the power supply voltage minus the voltage variation, illustratively, the intermediate voltage Vm is ELVDD-Vdata + Vinit. Then, under the control of the write sub-circuit 200, the data signal Vdata continues to be written to the control terminal 130 of the drive sub-circuit 100, and the voltage of the first terminal 110 of the drive sub-circuit 100 is controlled to be discharged to the data voltage via the first terminal 110 and the second terminal 120 of the drive sub-circuit 100.

In some embodiments, the writing sub-circuit 200 being configured to control the voltage of the first terminal 110 of the driving sub-circuit 100 to discharge to the data voltage via the second terminal 120 of the driving sub-circuit 100 comprises: the write sub-circuit 200 is configured to turn on the second terminal 120 of the driving sub-circuit 100 with the initialization signal terminal. Thus, the voltage at the first terminal 110 of the driving sub-circuit 100 can be discharged to the data voltage via the second terminal 120 of the driving sub-circuit 100 and the initialization signal terminal.

At this time, when the driving sub-circuit 100 is a driving transistor, since the data signal Vdata is written to the control electrode of the driving transistor, the voltage of the first electrode of the driving transistor, i.e., the first terminal 110 of the driving sub-circuit 100, is allowed to discharge to the data voltage Vdata-Vth, where Vth is the threshold voltage of the driving transistor. In this way, in the subsequent step, as described above, since the compensation sub-circuit 400 may couple the voltage variation of the first terminal 110 of the driving sub-circuit 100, i.e., the difference between the data voltage and the power voltage, to the first node D, such that the voltage of the first node D is the driving voltage, illustratively, the driving voltage Vd ═ Vinit-Ve + ELVDD, where Ve is the data voltage; also, the light emitting control sub-circuit 300 may turn on the first node D and the control terminal 130 of the driving sub-circuit 100, so that the voltage at the control terminal 130 of the driving sub-circuit 100 and the voltage at the first node D are the same as the driving voltage Vd, i.e., the voltage at the control terminal 130 of the driving sub-circuit 100 may be Vd ═ Vinit-Vdata + Vth + ELVDD, and accordingly, Vgs ═ Vinit-Vdata + Vth. Substituting the formula described above for the calculation, the following results can be obtained:

it can be seen that the current flowing through the first and second poles of the driving transistor is only related to the initialization voltage and the data signal Vdata, and not only the power voltage (e.g., ELVDD) does not occur, but also the threshold voltage Vth of the driving transistor does not occur, and thus, the drift (or variation) of the threshold voltage Vth of the driving transistor has no influence on the current flowing through the light emitting device, so that the problem of display non-uniformity of the display device caused by the difference of the threshold voltages Vth of the driving transistors Td is further solved on the basis of solving the problem of display non-uniformity of the display device caused by the IR drop on the first power line, and the display effect can be further improved.

Fig. 5 shows a specific pixel driving circuit, which may include: a driving sub-circuit 100, a writing sub-circuit 200, a light emission control sub-circuit 300, a compensation sub-circuit 400, and a first node D. The pixel driving circuit may be implemented as a specific implementation of the pixel driving circuit provided in fig. 4, and may not be limited to implementing the functions that can be implemented by each sub-circuit in fig. 4.

Referring to fig. 5, in the pixel driving circuit, the write sub-circuit 200 may include at least one of a first transistor T1, a second transistor T2, and a third transistor T3. Illustratively, the write sub-circuit 200 includes a first transistor T1, a second transistor T2, and a third transistor T3.

The first transistor T1 includes a first electrode, a second electrode, and a control electrode. A first pole of the first transistor T1 may be coupled to the second terminal 120 of the driving sub-circuit 100, and a second pole of the first transistor T1 may be coupled to the initialization signal terminal Vinit.

The second transistor T2 includes a first pole, a second pole, and a control pole. A first pole of the second transistor T2 is coupled to the first node D, and a second pole of the second transistor T2 is coupled to the initialization signal terminal Vinit.

The third transistor T3 includes a first pole, a second pole, and a control pole. The first pole of the third transistor T3 is coupled to the data signal terminal Vdata, and the second pole of the third transistor T3 is coupled to the control terminal 130 of the driving sub-circuit 100. Therein, the data signal terminal Vdata is configured to provide the data signal Vdata such that the data signal Vdata can be written into the pixel driving circuit through the writing sub-circuit 200, for example, the data signal Vdata is written into the control terminal 130 of the driving sub-circuit 100 through the writing sub-circuit 200.

In some embodiments, the control electrodes of the first transistor T1 and the third transistor T3 are both coupled to the Scan signal line terminal Scan 1. In this way, only one scanning signal line terminal may be used, and the first transistor T1 and the third transistor T3 may be controlled with only one signal line, and the structure of the pixel driving circuit may be made simpler than when the first transistor T1 and the third transistor T3 are separately controlled using two sets of signals.

The compensation sub-circuit 400 may include a capacitor C1. Both ends of the capacitor C1 may be coupled to the first node D and the first end of the driving sub-circuit 100, respectively. Illustratively, the capacitor C1 includes a first plate L1 and a second plate L2, the first plate L1 may be coupled to the first node D, and the second plate L2 may be coupled to the first terminal 110 of the driving sub-circuit 100.

The light emitting sub-circuit 300 may include at least one of a fourth transistor T4 and a fifth transistor T5.

The fourth transistor T4 may include a first pole, a second pole, and a control pole. A first pole of the fourth transistor T4 is coupled to the first node D, and a second pole of the fourth transistor T4 is coupled to the control terminal 130 of the driving sub-circuit 100. The gate T43 of the fourth transistor T4 is coupled to the driving control signal terminal EM. Among them, the driving control signal terminal EM may be configured to provide a driving control signal such that the fourth transistor T4 and the fifth transistor T5 may be turned on or off in response to the driving control signal. Illustratively, in response to the driving control signal, the fourth transistor T4 is turned on, the fifth transistor T5 is turned on, and thus the light emitting sub-circuit 300 may apply the power voltage to the first terminal 110 of the driving sub-circuit 100 through the turned-on fifth transistor T5 and turn on the first node D with the control terminal 130 of the driving sub-circuit 100 through the turned-on fourth transistor T4 in response to the driving control signal.

The pixel driving sub-circuit may include a driving transistor Td. The driving transistor Td may include a first electrode, a second electrode, and a control electrode. Wherein a first pole of the driving transistor Td may be the first terminal 110 of the driving sub-circuit 100, a second pole of the driving transistor Td may be the second terminal 120 of the driving sub-circuit 100, and a control pole of the driving transistor Td may be the control terminal 130 of the driving sub-circuit 100.

It should be noted that the embodiments of the present invention do not limit the types of transistors in the pixel driving circuit. For example, the transistors (T1, T2, T3, T4, T5, Td) may be P-type transistors or may be N-type transistors, and in the present embodiment, the transistors in the pixel driving circuit are each a P-type transistor as an example.

The first electrode of the transistor may be a drain, and the second electrode may be a source; alternatively, the first pole may be a source and the second pole may be a drain. The embodiments of the present invention are not limited in this regard.

In addition, the transistors in the pixel circuit can be divided into an enhancement transistor and a depletion transistor according to the conduction manner of the transistors. The invention is not limited in this regard.

On this basis, the circuit states of the pixel driving circuit shown in fig. 5 at different operation stages will be described in detail by taking the light emitting device as an OLED as an example in conjunction with the signal timing chart shown in fig. 6.

The timing of the pixel drive circuit may include three stages: an initialization phase t1, a data input and compensation phase t2, and a display phase t 3.

In the initialization stage T1, referring to fig. 7A and table 1, when the Scan signal terminal Scan1 is at a low level, the Scan signal terminal Scan2 is at a high level, and the emission control line EM is at a low level, the first transistor T1, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on, and the second transistor T2 is turned off. At this time, the control electrode of the driving transistor Td is coupled to the data signal terminal Vdata through the third transistor T3, so that the voltage of the control electrode of the driving transistor Td, i.e., the node a, is Vdata. The node B (e.g., an anode of the light emitting device) is coupled to the initialization signal terminal Vinit through the first switching transistor T1, so that the voltage of the node B is the initialization voltage Vinit. The first pole of the driving transistor Td is coupled to the power voltage terminal ELVDD through the fifth transistor T5 such that the voltage of the first pole of the driving transistor Td, i.e., the node C, is the power voltage ELVDD.

TABLE 1

	Voltage at point A	Voltage at point B	Voltage at point C	Voltage at point D
					time period t1	Vdata	Vinit	ELVDD	Vdata

In the data input and compensation phase T2, referring to fig. 7B and table 2, the Scan signal terminal Scan1 is at a low level, the Scan signal terminal Scan2 is at a low level, the emission control line EM is at a high level, the first transistor T1, the second transistor T2 and the third transistor T3 are turned on, and the fourth transistor T4 and the fifth transistor T5 are turned off. At this time, the control electrode of the driving transistor Td is coupled to the data signal terminal Vdata through the third transistor T3, so that the voltage of the control electrode of the driving transistor Td, i.e., the node a, is Vdata. The node B (e.g., an anode of the light emitting device) is coupled to the initialization signal terminal Vinit through the first transistor T1, so that the voltage of the node B is the initialization voltage Vinit. The first plate L1 of the capacitor C1 is coupled to the first node D, and the first node D is coupled to the initialization signal terminal Vinit through the second transistor T2, such that the voltage of the first node D is the initialization voltage Vinit, and the voltage of the first plate L1 of the capacitor C1 is also the initialization voltage Vinit. Since the voltage difference across the capacitor C1 cannot abruptly change, the capacitor C1 may couple the voltage variation of the first plate L1 to the second plate L2, i.e., couple the voltage variation of the first node D to the first terminal 110 of the driving sub-circuit 100, i.e., the node C, so that the voltage of the first terminal 110 of the driving sub-circuit 100, i.e., the node C, becomes ELVDD-Vdata + Vinit.

The respective voltage values may be set so that 2Vdata-ELVDD-Vinit < Vth, and Vinit-ELVSS < Voled. Voled is the turn-on voltage of the organic light emitting diode. Illustratively, Voled is 0.5V to 0.7V, Vth-1V, ELVDD 7V, ELVSS-2V, Vinit-2V, Vdata 0V to 2V.

On this basis, for the driving transistor Td, since Vgs ═ Vdata- (ELVDD-Vdata + Vinit) — 2Vdata-ELVDD-Vinit < Vth, the driving transistor Td is turned on, and the voltage of the first pole of the driving transistor Td is discharged through the path of the driving transistor Td and the first transistor T1 to be turned off when the data voltage is Vdata-Vth. At this time, the voltage of the first pole of the driving transistor Td, i.e., the node C, is Vdata-Vth.

TABLE 2

In the display period t3, referring to fig. 7C and table 3, the Scan signal terminal Scan1 is at a high level, the Scan signal terminal Scan2 is at a high level, and the emission control line EM is at a low level. At this time, the fourth transistor T4 and the fifth transistor T5 are turned on, and the first transistor T1, the second transistor T2, and the third transistor T3 are turned off. The first pole of the driving transistor Td is coupled to the power voltage terminal ELVDD through the first transistor T1 such that the voltage of the first pole of the driving transistor Td, i.e., the node C, is ELVDD, i.e., the voltage of the second plate L2 of the capacitor C1 becomes ELVDD. Since the voltage difference across the capacitor C1 cannot abruptly change, the capacitor C1 may couple the voltage variation amount of the first pole of the driving transistor Td, i.e., the voltage variation amount of the second plate L2, to the first node D, i.e., the first plate L1 of the capacitor C1, so that the voltage of the first node D, i.e., the first plate L1 of the capacitor C1, becomes Vinit-Vdata + Vth + ELVDD. Also, since the first node D is coupled to the control electrode of the driving transistor Td through the fourth transistor T4, the voltage of the control electrode of the driving transistor Td is Vinit-Vdata + Vth + ELVDD. Where Vinit may be a negative pressure and Vdata may be a positive pressure. For the driving transistor Td, Vgs ═ Vinit-Vdata + Vth + ELVDD — ELVDD ═ Vinit-Vdata + Vth < Vth. Accordingly, the driving transistor Td is turned on, and the light emitting device (e.g., organic light emitting diode) may be caused to emit light.

TABLE 3

It will be appreciated that the same row of sub-pixels of the display panel has the same circuit state for the same period of time, e.g., the initialization phase t1 for the same row of sub-pixels for the same period of time, i.e., the initialization signal is input to the same row of sub-pixels for the period of time.

In every two adjacent rows of sub-pixels, an operation phase of the sub-pixel in the next row is after the same operation phase of the sub-pixel in the current row. For example, the initialization phase t1 for the next row of sub-pixels may be after the initialization phase t1 for the current row of sub-pixels, and the initialization phase t1 for the next row of sub-pixels may be after the initialization phase t1 for the current row of sub-pixels, and so on, to enable row-by-row refreshing of pixel data in the display panel.

An embodiment of the present invention further provides a driving method of a pixel driving circuit, where the pixel driving circuit may be the pixel driving circuit provided in any of the embodiments, the pixel driving circuit includes a driving sub-circuit, a writing sub-circuit, a light-emitting control sub-circuit, a compensation sub-circuit, and a first node, and each structure has the same characteristics as the response structure set forth in any of the embodiments, and is not described herein again.

Referring to fig. 8, the driving method of the pixel driving circuit includes the steps of:

s110 (optional), the write sub-circuit writes an initialization voltage to the anode of the light emitting device.

In some embodiments, referring to fig. 5, in response to the Scan signal provided from the Scan signal terminal Scan1, the first transistor T1 is turned on, so that the initialization signal Vinit output from the initialization signal terminal is transmitted to the anode of the light emitting device.

S120 (optional), the write sub-circuit writes the data signal to the control terminal of the driving sub-circuit, so that the data signal is transmitted to the first node through the light-emitting control sub-circuit, and the compensation sub-circuit is charged under the action of the data signal and the power voltage applied to the first terminal of the driving sub-circuit.

In some embodiments, in response to the Scan signal provided by the Scan signal terminal Scan1, the first transistor T1 and the third transistor T3 are turned on, so that the data signal Vdata output from the data signal terminal is transmitted to the control terminal 130 of the driving sub-circuit 100 through the third transistor T3.

S130, the write sub-circuit applies the initialization voltage provided by the initialization signal terminal to the first node, and controls the voltage of the first terminal of the driving sub-circuit to be the data voltage.

In some embodiments, in response to the Scan signals provided from the Scan signal terminal Scan1 and the Scan signal terminal Scan2, the first transistor T1, the second transistor T2, and the third transistor T3 are turned on such that the first node D is coupled to the initialization signal terminal through the second transistor T2, and the initialization voltage is written to the first node D; the control terminal 130 of the driving sub-circuit 100 is coupled to the data signal terminal through the third transistor T3, and the data signal Vdata is written into the control terminal 130 of the driving sub-circuit 100; and the voltage driving the first terminal 110 of the sub-circuit 100 is discharged to the data voltage through the first transistor T1.

S140, the light emission control sub-circuit applies a power voltage to the first terminal of the driving sub-circuit in response to the driving control signal.

In some embodiments, in response to the driving control signal, the fifth transistor T5 is turned on, and the first terminal 110 of the driving sub-circuit 100 is coupled to the power voltage terminal through the fifth transistor T5, so that the power voltage is written to the first terminal 110 of the driving sub-circuit 100.

S150, the compensation sub-circuit couples the voltage variation of the first end of the driving sub-circuit to the first node, so that the voltage of the first node is changed from the initialization voltage to the driving voltage.

The voltage variation is a difference between the data voltage and the first power voltage.

And S160, the light-emitting control sub-circuit responds to the driving control signal and conducts the first node with the control end of the driving sub-circuit so as to apply the driving voltage to the control end of the driving sub-circuit.

In some embodiments, in response to the driving control signal, the fourth transistor T4 is turned on, the first node D is turned on with the control terminal 130 of the driving sub-circuit 100, and the voltage of the control terminal 130 of the driving sub-circuit 100 becomes the voltage of the first node D, i.e., the driving voltage.

The present invention does not particularly limit the order between the above steps, and a plurality of steps may be simultaneously performed. Illustratively, S110 and S120 may be performed simultaneously, and S150 and S160 may be performed simultaneously.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims

1. A pixel driving circuit, comprising:

a drive sub-circuit comprising: the driving sub-circuit is configured to control driving current flowing through the first terminal and the second terminal according to voltage of the control terminal;

a write sub-circuit coupled to the first node and the driving sub-circuit, configured to apply an initialization voltage provided by an initialization signal terminal to the first node, and control a voltage of the first terminal of the driving sub-circuit to be a data voltage;

a light emission control sub-circuit coupled to the first node and the first and control terminals of the driving sub-circuit, and configured to apply a power voltage to the first terminal of the driving sub-circuit in response to a driving control signal and to turn on the first node and the control terminal of the driving sub-circuit;

a compensation sub-circuit coupled to the first node and the first terminal of the driving sub-circuit, and configured to couple a voltage variation of the first terminal of the driving sub-circuit to the first node so that a voltage of the first node varies from an initialization voltage to a driving voltage, wherein the voltage variation is a difference between the data voltage and the power supply voltage.

2. The pixel driving circuit according to claim 1,

the write sub-circuit is specifically configured to write a data signal to the control terminal of the drive sub-circuit such that the data signal is transmitted to the first node via the emission control sub-circuit, the compensation sub-circuit being charged by the data signal and the power supply voltage applied to the first terminal of the drive sub-circuit; and applying an initialization voltage to the first node, continuously writing the data signal into the control end of the driving sub-circuit, and controlling the voltage of the first end of the driving sub-circuit to be discharged to the data voltage through the first end and the second end of the driving sub-circuit.

3. The pixel driving circuit according to claim 2,

the write sub-circuit being configured to control the voltage of the first terminal of the drive sub-circuit to discharge to the data voltage via the second terminal of the drive sub-circuit comprises:

the write sub-circuit is configured to turn on a second terminal of the drive sub-circuit with the initialization signal terminal.

4. The pixel driving circuit according to claim 3,

the write subcircuit includes: at least one of a first transistor, a second transistor, and a third transistor;

the first transistor comprises a first pole, a second pole and a control pole, wherein the first pole of the first transistor is coupled with the second end of the driving sub-circuit, and the second pole of the first transistor is coupled with the initialization signal end;

the second transistor comprises a first pole, a second pole and a control pole, wherein the first pole of the second transistor is coupled with the first node, and the second pole of the second transistor is coupled with the initialization signal terminal;

the third transistor includes a first pole, a second pole, and a control pole, wherein the first pole of the third transistor is coupled to a data signal terminal, the second pole of the third transistor is coupled to the control terminal of the driving sub-circuit, and the data signal terminal is configured to provide the data signal.

5. The pixel driving circuit according to claim 4,

a control electrode of the first transistor and a control electrode of the third transistor are both coupled to a scan signal terminal.

6. The pixel driving circuit according to any one of claims 1 to 5,

the compensation sub-circuit comprises: a capacitor; two ends of the capacitor are respectively coupled with the first node and the first end of the driving sub-circuit.

7. The pixel driving circuit according to any one of claims 1 to 5,

the light emitting sub-circuit includes: at least one of a fourth transistor and a fifth transistor;

the fourth transistor comprises a first pole, a second pole, and a control pole, wherein the first pole of the fourth transistor is coupled to the first node, the second pole of the fourth transistor is coupled to the control terminal of the driving sub-circuit, the control pole of the fourth transistor is coupled to a driving control signal terminal, and the driving control signal terminal is configured to provide the driving control signal;

a first pole of the fifth transistor is coupled to a power supply voltage terminal, a second pole of the fifth transistor is coupled to the first terminal of the driving sub-circuit, a control pole of the fifth transistor is coupled to the driving control signal terminal, and the power supply voltage terminal is configured to provide the power supply voltage.

8. The pixel driving circuit according to any one of claims 1 to 5,

the driving sub-circuit includes: a drive transistor;

the driving transistor comprises a first pole, a second pole and a control pole, the first pole of the driving transistor is the first end of the driving sub-circuit, the second pole of the driving transistor is the second end of the driving sub-circuit, and the control pole of the driving transistor is the control end of the driving sub-circuit.

9. A pixel driving circuit, comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, and a driving transistor;

the first transistor comprises a first pole, a second pole and a control pole; the second transistor comprises a first pole, a second pole and a control pole; the third transistor comprises a first pole, a second pole and a control pole; the fourth transistor comprises a first pole, a second pole and a control pole; the fifth transistor comprises a first pole, a second pole and a control pole;

a first pole of the first transistor is coupled with a second pole of the driving transistor, and the second pole of the first transistor is coupled with an initialization signal end; a first pole of the second transistor is coupled to the first node, and a second pole of the second transistor is coupled to the initialization signal terminal; a first pole of the third transistor is coupled to a data signal terminal, and a second pole of the third transistor is coupled to a control pole of the driving transistor; a first pole of the fourth transistor is coupled to the first node, a second pole of the fourth transistor is coupled to the control pole of the driving transistor, and the control pole of the fourth transistor is coupled to a driving control signal terminal; a first pole of the fifth transistor is coupled to a power voltage terminal, a second pole of the fifth transistor is coupled to the first pole of the driving transistor, and a control pole of the fifth transistor is coupled to the driving control signal terminal.

10. A display device comprising the pixel driving circuit according to any one of claims 1 to 9.

11. A driving method of a pixel driving circuit, the pixel driving circuit comprising: a driving sub-circuit, a writing sub-circuit, a light emission control sub-circuit, a compensation sub-circuit, and a first node;

the driving method of the pixel driving circuit includes:

the writing sub-circuit applies an initialization voltage provided by an initialization signal end to the first node and controls the voltage of the first end of the driving sub-circuit to be a data voltage;

the light emission control sub-circuit applies a first power supply voltage to a first terminal of the driving sub-circuit in response to a driving control signal;

the compensation sub-circuit couples a voltage variation of a first end of the driving sub-circuit to the first node, so that the voltage of the first node is changed from an initialization voltage to a driving voltage, wherein the voltage variation is a difference value between the data voltage and the first power supply voltage;

the light emitting control sub-circuit responds to the driving control signal and conducts the first node and the control end of the driving sub-circuit to apply the driving voltage to the control end of the driving sub-circuit.