CN113327891A - Preparation method of display panel - Google Patents

Preparation method of display panel Download PDF

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Publication number
CN113327891A
CN113327891A CN202110537599.2A CN202110537599A CN113327891A CN 113327891 A CN113327891 A CN 113327891A CN 202110537599 A CN202110537599 A CN 202110537599A CN 113327891 A CN113327891 A CN 113327891A
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China
Prior art keywords
edge
metal wiring
wiring layer
layer
film
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CN202110537599.2A
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Chinese (zh)
Inventor
陈皓
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TCL China Star Optoelectronics Technology Co Ltd
TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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Priority to CN202110537599.2A priority Critical patent/CN113327891A/en
Publication of CN113327891A publication Critical patent/CN113327891A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1296Multistep manufacturing methods adapted to increase the uniformity of device parameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention provides a preparation method of a display panel, which comprises the steps of forming a first covering film on a first metal wiring layer, and then forming a conducting layer for connecting the first metal wiring layer and a second metal wiring layer, wherein the conducting layer comprises a vertical part contacted with the side surface of a substrate, a first transverse part contacted with the first metal wiring layer and the first covering film, and a second transverse part contacted with the second metal wiring layer. The first metal wiring layer is provided with a first wiring edge, the first covering film is provided with a first covering film edge, and the first covering film edge is farther away from the side face of the substrate than the first wiring edge so that the first wiring edge is exposed out of the first covering film edge. Because the first mask membrane edge is even level and smooth, so the conducting layer that forms is even and level and smooth at first mask membrane edge also to the conducting layer also can improve with the local roughness of first wiring edge overlap joint, and then has improved the diffusion homogeneity of conducting layer, and the effect of switching on is better.

Description

Preparation method of display panel
Technical Field
The invention relates to the technical field of display, in particular to a preparation method of a display panel.
Background
In the display field, a borderless or narrow-bezel display is becoming mainstream. For displays such as Liquid Crystal Displays (LCDs), Organic Light-emitting displays (OLEDs), and Light-emitting diode (LED) displays, the larger the screen size, the higher the manufacturing difficulty and the manufacturing cost per unit area. Therefore, large displays are usually formed by splicing a plurality of small and medium-sized displays.
At present, the panel is diversified, wherein the resolution and the color saturation of the Mini LED are close to that of an OLED and are superior to that of an LCD; and the power consumption is lower, and is lighter and thinner. The optimal mode for seamless splicing of the Mini/Micro LED is a Back Bonding mode. The Back Bonding is to place the TFT and the LED chip on the front side, place the driving chip on the Back side of the glass, transfer the conductive material on the side and corner of the glass to make the Pad on the front and Back sides of the glass conductive, and then perform the module process.
However, when the conductive material is transferred, since the Pad on the front surface of the glass is formed by arranging one metal wire, that is, the edge of the Pad is not flat, and the leveling property of the conductive material is poor, the boundary between the transferred conductive material and the Pad is jagged, that is, the conductive layer is not uniformly diffused, and thus poor conduction is easily caused.
Disclosure of Invention
The invention aims to provide a preparation method of a display panel, aiming at improving the diffusion uniformity of a conducting layer and improving the conduction effect.
The invention provides a preparation method of a display panel, which comprises the following steps:
providing a substrate, wherein the substrate comprises a front surface, a back surface and a side surface positioned between the front surface and the back surface, and the substrate comprises a display area positioned on the front surface and a non-display area close to the side surface;
forming a first metal wiring layer in a non-display area on the front surface of the substrate, and forming a second metal wiring layer on the back surface of the substrate, wherein the first metal wiring layer is provided with a first wiring edge which is close to and extends along the side surface;
forming a first cover film on the first metal wiring layer, wherein the first cover film has a first cover film edge extending along the first wiring edge, and the first cover film edge is farther from the side surface than the first wiring edge, so that the first wiring edge is exposed out of the first cover film edge;
forming a conductive layer connecting the first metal wiring layer and the second metal wiring layer, the conductive layer including a vertical portion in contact with the side surface, a first lateral portion in contact with the first metal wiring layer and the first capping film, and a second lateral portion in contact with the second metal wiring layer.
Further preferably, the preparation method further comprises: a second covering film is formed below the second metal wiring layer, the second metal wiring layer has a second wiring edge which is close to and extends along the side face, and the second covering film has a second covering film edge which extends along the second wiring edge, the second covering film edge is farther from the side face than the second wiring edge.
Further preferably, the step of forming the first cover film includes:
attaching a covering film above the first metal wiring layer, wherein the covering film covers the first metal wiring layer;
and cutting off the part of the covering film close to the side surface by adopting laser to form the first covering film and expose the upper surface of the part of the first metal wiring.
Further preferably, the preparation method further comprises:
pre-curing the conductive layer;
tearing off the first covering film;
and carrying out secondary curing on the conductive layer.
Further preferably, the second metal wiring layer has a second wiring edge near and extending along the side surface, and after the step of forming the conductive layer, the first lateral portion is located on the front surface and is in contact with the first cover film edge, a part of the upper surface of the first metal wiring layer, and the first wiring edge; the second lateral portion is located on the back surface and is in contact with the second wiring edge and a portion of the lower surface of the second metal wiring layer.
Further preferably, after the step of forming the conductive layer, the first lateral portion is located on the front surface and is in contact with the first cover film edge, a part of the upper surface of the first metal wiring layer, and the first wiring edge; the second lateral portion is located on the back surface and is in contact with the second wiring edge, a part of the lower surface of the second metal wiring layer, and the second cover film edge.
Further preferably, the preparation method further comprises:
forming a chip on film positioned on the back surface and connected with the second metal wiring layer;
and forming a driving chip which is positioned on the back and is bound with the chip on film.
Further preferably, the preparation method further comprises:
forming a thin film transistor layer on the substrate, wherein the thin film transistor layer is electrically connected with the first metal wiring layer;
and forming a light-emitting unit on the thin film transistor layer, wherein the light-emitting unit is electrically connected with the thin film transistor layer.
Further preferably, the material of the first cover film includes polyimide.
Further preferably, the horizontal distance between the first wiring edge and the first masking film edge is 15 to 25 micrometers.
The invention has the beneficial effects that: a first metal wiring layer is formed in a non-display area on the front surface of a substrate, a second metal wiring layer is formed on the back surface of the substrate, a first covering film is formed on the first metal wiring layer, and a conductive layer connecting the first metal wiring layer and the second metal wiring layer is formed. The conductive layer includes a vertical portion in contact with a side surface of the substrate, a first lateral portion in contact with the first metal wiring layer and the first capping film, and a second lateral portion in contact with the second metal wiring layer. The first metal wiring layer is provided with a first wiring edge which is close to and extends along the side face of the substrate, the first covering film is provided with a first covering film edge which extends along the first wiring edge, and the first covering film edge is farther away from the side face of the substrate than the first wiring edge so that the first wiring edge is exposed out of the first covering film edge. Because the first mask membrane edge is even level and smooth, so the conducting layer that forms is even and level and smooth at first mask membrane edge also to the conducting layer also can improve with the local roughness of first wiring edge overlap joint, and then has improved the diffusion homogeneity of conducting layer, and can improve the effect of switching on of first metal wiring layer and second metal wiring layer.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
Fig. 1 is a schematic flow chart of a method for manufacturing a display panel according to a first embodiment of the present invention;
FIGS. 2a-2e are schematic structural diagrams of a display panel according to a first embodiment of the present invention during a manufacturing process thereof;
fig. 3 is a schematic flow chart of a method for manufacturing a display panel according to a second embodiment of the present invention;
fig. 4a-4b are schematic structural diagrams of a display panel provided by a second embodiment of the invention in a manufacturing process.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "first", "second" and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
Referring to fig. 1, fig. 1 is a schematic flow chart of a manufacturing method of a display panel according to a first embodiment of the invention, and fig. 2a to 2e are schematic structural diagrams of the display panel according to the first embodiment of the invention in a manufacturing process. The method of manufacturing the display panel includes the following steps S1-S7.
Please refer to steps S1-S2 in fig. 1 and fig. 2 a.
Step S1: a substrate 10 is provided, the substrate 10 comprising a front side 11, a back side 12 and a side 13 between the front side 11 and the back side 12, the substrate 10 comprising a display area 101 at the front side 11 and a non-display area 102 adjacent to the side 13.
In this embodiment, the substrate 10 is a plastic substrate or a glass substrate, the substrate 10 is cut from a large substrate, and then the right-angle side of the substrate 10 is polished to make the right-angle side of the substrate 10 polished to a round angle, which is beneficial to reducing the scratch of the substrate 10.
It should be noted that the display region 101 may be located in the middle of the substrate 10, and the non-display region 102 may be located at an edge portion of the substrate 10, that is, near the side 13 of the substrate 10. The non-display area 102 may be located at one side of the substrate 10, that is, other three-side narrow frames are implemented; the non-display region 102 may also be located at two sides of the substrate 10, i.e. implementing other two-sided narrow borders. Only the non-display region 102 on one side of the substrate 10 is shown in this embodiment.
Step S2: a first metal wiring layer 111 is formed on the non-display area 102 of the front surface 11 of the substrate, and a second metal wiring layer 121 is formed on the back surface 12 of the substrate, and the first metal wiring layer 111 has a first wiring edge 1111 adjacent to and extending along the side surface 13.
In this embodiment, the first metal wiring layer 111 may be a wiring of a data line and/or a scan line, and the second metal wiring layer 121 may be referred to as a fan-out circuit. The first and second metal wiring layers 111 and 121 may be formed using a patterning process. The first metal wiring layer 111 has a first wiring edge 1111 near the side surface 13 and extending along the side surface 13, and the side surface 13 extends in a direction perpendicular to the paper surface in the figure. Since the first metal wiring layer 111 is formed by arranging a plurality of metal wires (the metal wires generally extend in a direction perpendicular to the side surface 13), the first wiring edge 1111 is not a flat surface (a non-planar structure), and the leveling property of the conductive material is poor, so that the first wiring edge 1111 is printed with the conductive material to form a saw-tooth shape, which may cause poor contact between the conductive material and the first wiring edge 1111.
Before step S2, the preparation method further includes: 1) forming a thin film transistor layer on the substrate 10, the thin film transistor layer being electrically connected to the first metal wiring layer 111; 2) a light emitting unit 110 is formed on the thin film transistor layer, and the light emitting unit 110 is electrically connected to the thin film transistor layer. The thin film transistor layer is located in the display region 101, between the substrate 10 and the light emitting unit 110, and is electrically connected to the first metal wiring layer 111 beside the non-display region 102. The thin film transistor layer comprises thin film transistors formed by metal layers and interlayer insulating layers, such as a switch thin film transistor and a drive thin film transistor. The light emitting unit 110 includes a Mini LED or a Micro LED, and the light emitting unit 110 is electrically connected to a thin film transistor layer below the light emitting unit 110, and the thin film transistor layer may control light emission of the light emitting unit 110.
Please refer to step S3 in fig. 1 and fig. 2b-2 c.
Step S3: a first cover film 112 is formed on the first metal wiring layer 111, the first cover film 112 has a first cover film edge 1121 extending along the first wiring edge 1111, and the first cover film edge 1121 is farther from the side 13 than the first wiring edge 1111, so that the first wiring edge 1111 is exposed out of the first cover film edge 1121.
In this embodiment, the material of the first covering film 112 includes polyimide, and the first covering film 112 has special properties such as high strength, high toughness, wear resistance, high temperature resistance, corrosion resistance, and the like. The thickness of the first covering film 112 is 0.2-0.3 mm, the width is determined according to the distance between the light emitting unit 110 and the side surface 13, and the attaching precision is +/-50 um. Specifically, the step of forming the first cover film 112 includes: 1) as shown in fig. 2b, a covering film 112 'is attached above the first metal wiring layer 111, and the covering film 112' covers the first metal wiring layer 111; 2) a portion of the cover film 112' near the side surface 13 (i.e., the right portion) is cut off by laser to form the first cover film 112 as shown in fig. 2c, and the first metal wiring layer 111 is exposed at the upper surface of the right portion. Specifically, the film can be cut by adopting carbon dioxide laser with the wavelength of 10.6 microns so as to avoid burning the substrate 10 and the first metal wiring layer 111 in the film cutting process, and the laser cutting precision is +/-10 microns. The horizontal distance between the first connection edge 1111 and the first cover film edge 1121 is 15 to 25 micrometers, preferably 20 micrometers, so that the contact area between the conductive material and the first metal connection layer 111 can be increased, that is, the conductive material can be printed on the exposed upper surface of the first metal connection layer 111 when the conductive material is printed subsequently.
In the embodiment, the first cover film 112 has a first cover film edge 1121 that is close to the side 13 and extends along the first connection edge 1111, and since the first cover film edge 1121 of the first cover film 112 is flat, the subsequent transfer printing of the conductive material on the first cover film edge 1121 is flat and uniform, and the first cover film edge 1121 can prevent the conductive material from being printed on the light emitting unit 110 when the conductive material is transferred.
Please refer to step S4 in fig. 1 and fig. 2 d.
Step S4: a conductive layer 131 connecting the first and second metal wiring layers 111 and 121 is formed, the conductive layer 131 including a vertical portion 1311 contacting the side 13, a first lateral portion 1312 contacting the first metal wiring layer 111 and the first capping film 112, and a second lateral portion 1313 contacting the second metal wiring layer 121.
In the present embodiment, a conductive material may be printed by transfer to form a conductive layer 131 connecting the first and second metal wiring layers 111 and 121, and the conductive layer 131 includes a vertical portion 1311 on the side surface 13, a first lateral portion 1312 on the front surface 11, and a second lateral portion 1313 on the back surface 12. Specifically, the second metal wiring layer 121 has a second wiring edge 1211 adjacent to and extending along the side surface 13, and the first transverse portion 1312 is in contact with the first cover film edge 1121, a part of the upper surface of the first metal wiring layer 111, and the first wiring edge 1111; the vertical outlet portion 1311 is in contact with the side face 13; the second lateral direction 1313 portion contacts the second wire edge 1211 and a portion of the lower surface of the second metal wire layer 121.
In this embodiment, the conductive layer 131 may be made of conductive silver paste, which has poor leveling property. If the first cover film 112 is not provided, the conductive silver paste is directly printed on the structure of fig. 2a, a saw-tooth shape is generated at a position where the conductive silver paste contacts the first connection edge 1111, that is, the conductive silver paste is not uniformly diffused, which can be said to be a poor contact.
In the manufacturing method of this embodiment, the first covering film 112 located on the first metal wiring layer 111 is formed, and the first metal wiring layer 111 exposes a portion of the upper surface close to the side surface 13, when the conductive layer 131 is formed, since the first covering film edge 1121 of the first covering film 112 is flat, the conductive layer 131 is also flat at the first covering film edge 1121 when the conductive material is transferred, so that the flatness of the conductive layer 131 at the first wiring edge 1111 is also improved, which is equivalent to improving the diffusion uniformity of the conductive layer 131, and the poor contact between the conductive layer 131 and the first wiring edge 1111 can be reduced, thereby improving the conduction effect between the first metal wiring layer 111 and the second metal wiring layer 121.
Please refer to steps S5-S7 in fig. 1 and fig. 2 e.
Step S5: the conductive layer 131 is pre-cured.
Step S6: the first cover film 112 is torn off.
Step S7: the conductive layer 131 is secondarily cured.
In this embodiment, the conductive layer 131 may be pre-cured at a temperature of 60 to 80 ℃ for 2 to 3min, and then the first covering film 112 is mechanically torn off, and the conductive layer 131 is secondarily cured at a temperature of 150 to 170 ℃ for 20 to 30 min.
In this embodiment, after step S7, the preparation method may further include: 1) forming a flip-chip film 122 located on the back surface 12 and connected to the second metal wiring layer 121; 2) a driving chip 123 is formed on the back surface 12 and bonded to the flip-chip film 122. The flip-chip film 122 may be connected to the second metal wiring layer 121 through an anisotropic conductive film, and the formed structure is shown in fig. 2 e.
Referring to fig. 3, fig. 3 is a schematic flow chart of a manufacturing method of a display panel according to a second embodiment of the invention, and fig. 4a to 4b are simultaneously referred to, and fig. 4a to 4b are schematic structural diagrams of the display panel according to the second embodiment of the invention in a manufacturing process. For ease of understanding, the same structures in the present embodiment as those in the first embodiment are given the same reference numerals. The preparation method comprises the following steps S100-S800.
Step S100: a substrate 10 is provided, the substrate 10 comprising a front side 11, a back side 12 and a side 13 between the front side 11 and the back side 12, the substrate 10 comprising a display area 101 at the front side and a non-display area 102 adjacent to the side.
The step S100 is the same as the step S1 in the first embodiment, and is not described herein again.
Step S200: a first metal wiring layer 111 is formed on the non-display area 102 of the front surface 11 of the substrate, and a second metal wiring layer 121 is formed on the back surface 12 of the substrate, and the first metal wiring layer 111 has a first wiring edge 1111 adjacent to and extending along the side surface 13, and the second metal wiring layer 121 has a second wiring edge 1211 adjacent to and extending along the side surface 13.
The step S200 is the same as the step S2 in the first embodiment, and is not described herein again.
Step S300: a first cover film 112 is formed on the first metal wiring layer 111, the first cover film 112 has a first cover film edge 1121 extending along the first wiring edge 1111, and the first cover film edge 1121 is farther from the side 13 than the first wiring edge 1111, so that the first wiring edge 1111 is exposed out of the first cover film edge 1121.
The step S300 is the same as the step S3 in the first embodiment, and is not described herein again.
Step S400: a second cover film 124 is formed under the second metal wiring layer 121, the second metal wiring layer 121 has a second wiring edge 1211 close to and extending along the side 13, and the second cover film 124 has a second cover film edge 1241 extending along the second wiring edge 1211, the second cover film edge 1241 being farther from the side 13 than the second wiring edge 1211.
The specific process of forming the second capping film 124 in step S400 is the same as the specific process of forming the first capping film 112 in the first embodiment, and the structure after step S400 is completed is shown in fig. 4 a.
Step S500: a conductive layer 131 connecting the first and second metal wiring layers 111 and 121 is formed, the conductive layer 131 including a vertical portion 1311 contacting the side 13, a first lateral portion 1312 contacting the first metal wiring layer 111 and the first capping film 112, and a second lateral portion 1313 contacting the second metal wiring layer 121 and the second capping film 124.
This step S500 is the same as step S4 in the first embodiment, the first lateral portion 1312 is located on the front surface 11 and contacts the first cover film edge 1121, part of the upper surface of the first metal wiring layer 111, and the first wiring edge 1111; the second lateral portion 1313 is located on the rear surface 12 and contacts the second wiring edge 1211, a portion of the lower surface of the second metal wiring layer 121, and the second cover film edge 1241.
Since the second cover film 124 is formed on the lower surface of the second metal wiring layer 121, the conductive layer 131 printed subsequently is uniformly and smoothly formed on the second cover film edge 1241, and the flatness of the conductive layer 131 on the second wiring edge 1211 is improved, so that the diffusion uniformity of the conductive layer 131 is improved, and the conduction effect is improved.
Step S600: the conductive layer 131 is pre-cured.
Step S700: the first and second cover films 112 and 124 are torn off.
Step S800: the conductive layer 131 is secondarily cured.
The structure after completion of step S800 is shown in fig. 4 b.
According to the preparation method of the display panel provided by the embodiment of the invention, the first metal wiring layer 111 on the front surface 11 of the substrate and the second metal wiring layer 121 on the back surface 12 of the substrate are connected through the conductive layer 131, because the first covering film 112 is formed on the upper surface of the first metal wiring layer 111 and the second covering film 124 is formed on the lower surface of the second metal wiring layer 121, and the edge 1121 and the edge 1241 of the first covering film are flat, when a conductive material is printed, the flatness of the conductive material at the first wiring edge 1111 and the second wiring edge 1211 can be improved, so that the diffusion uniformity of the conductive layer 131 is improved, and the conduction effect can be improved.
The above description of the embodiments is only for helping understanding the technical solution of the present invention and its core idea; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A method for manufacturing a display panel, comprising:
providing a substrate, wherein the substrate comprises a front surface, a back surface and a side surface positioned between the front surface and the back surface, and the substrate comprises a display area positioned on the front surface and a non-display area close to the side surface;
forming a first metal wiring layer in a non-display area on the front surface of the substrate, and forming a second metal wiring layer on the back surface of the substrate, wherein the first metal wiring layer is provided with a first wiring edge which is close to and extends along the side surface;
forming a first cover film on the first metal wiring layer, wherein the first cover film has a first cover film edge extending along the first wiring edge, and the first cover film edge is farther from the side surface than the first wiring edge, so that the first wiring edge is exposed out of the first cover film edge;
forming a conductive layer connecting the first metal wiring layer and the second metal wiring layer, the conductive layer including a vertical portion in contact with the side surface, a first lateral portion in contact with the first metal wiring layer and the first capping film, and a second lateral portion in contact with the second metal wiring layer.
2. The method for manufacturing a display panel according to claim 1, further comprising: a second covering film is formed below the second metal wiring layer, the second metal wiring layer has a second wiring edge which is close to and extends along the side face, and the second covering film has a second covering film edge which extends along the second wiring edge, the second covering film edge is farther from the side face than the second wiring edge.
3. The method for manufacturing a display panel according to claim 1, wherein the step of forming the first cover film includes:
attaching a covering film above the first metal wiring layer, wherein the covering film covers the first metal wiring layer;
and cutting off the part of the covering film close to the side surface by adopting laser to form the first covering film and expose the upper surface of the part of the first metal wiring.
4. The method for manufacturing a display panel according to claim 1, further comprising:
pre-curing the conductive layer;
tearing off the first covering film;
and carrying out secondary curing on the conductive layer.
5. The manufacturing method of a display panel according to claim 1, wherein the second metal wiring layer has a second wiring edge near and extending along the side surface, and after the step of forming the conductive layer, the first lateral portion is located on the front surface and is in contact with the first cover film edge, a part of the upper surface of the first metal wiring layer, and the first wiring edge; the second lateral portion is located on the back surface and is in contact with the second wiring edge and a portion of the lower surface of the second metal wiring layer.
6. The manufacturing method of a display panel according to claim 2, wherein after the step of forming the conductive layer, the first lateral portion is located on the front surface and is in contact with the first cover film edge, a part of the upper surface of the first metal wiring layer, and the first wiring edge; the second lateral portion is located on the back surface and is in contact with the second wiring edge, a part of the lower surface of the second metal wiring layer, and the second cover film edge.
7. The method for manufacturing a display panel according to claim 4, further comprising:
forming a chip on film positioned on the back surface and connected with the second metal wiring layer;
and forming a driving chip which is positioned on the back and is bound with the chip on film.
8. The method for manufacturing a display panel according to claim 1, further comprising:
forming a thin film transistor layer on the substrate, wherein the thin film transistor layer is electrically connected with the first metal wiring layer;
and forming a light-emitting unit on the thin film transistor layer, wherein the light-emitting unit is electrically connected with the thin film transistor layer.
9. The method for manufacturing a display panel according to claim 1, wherein a material of the first cover film includes polyimide.
10. The method of manufacturing a display panel according to claim 1, wherein a horizontal distance between the first wiring edge and the first cover film edge is 15 to 25 μm.
CN202110537599.2A 2021-05-18 2021-05-18 Preparation method of display panel Pending CN113327891A (en)

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