CN113327533B - Compensation data restoration method and compensation data restoration device for display device - Google Patents

Compensation data restoration method and compensation data restoration device for display device Download PDF

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CN113327533B
CN113327533B CN202110550508.9A CN202110550508A CN113327533B CN 113327533 B CN113327533 B CN 113327533B CN 202110550508 A CN202110550508 A CN 202110550508A CN 113327533 B CN113327533 B CN 113327533B
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data
compensation data
scale compensation
compensation
gray
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CN113327533A (en
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王文礼
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TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The method can realize that the display device is in a compensation off state by firstly erasing flag bit data in initial gray-scale compensation data and restarting a time sequence controller, and then can realize synchronous execution of acquiring image data and erasing other data in the initial gray-scale compensation data by acquiring the image data and synchronously erasing other data in the initial gray-scale compensation data, thereby effectively reducing the time occupied by the compensation data or compensation table repair of the display device.

Description

Compensation data restoration method and compensation data restoration device for display device
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a compensation data restoration method and a compensation data restoration device for a display device.
Background
A liquid crystal display device (LCD, liquid Crystal Display) generally has a problem of display unevenness (Mura), which requires corresponding compensation data or a compensation table generated based on the compensation data to compensate for some gray scales to weaken or improve the display unevenness.
When the compensation data or the compensation table is ready, the compensation data or the compensation table needs to be burned into a flash memory of the liquid crystal display device through corresponding equipment so as to prepare for calling a timing controller (Tcon).
However, when the compensation data or the compensation table written into the flash memory is not suitable for gray scale compensation of the liquid crystal display device, the compensation data or the compensation table written into the flash memory needs to be repaired.
For a single compensation (Mono Demura) repair mode corresponding to 3 gray scale binding points with resolution of 4K and below, the size of the compensation data or the compensation table burnt into the flash memory is about 640KB. Before repair, the compensation data or the compensation table burned into the flash memory needs to be erased, and the timing controller is restarted to make the liquid crystal display device in a compensation Off (Demura Off) state.
The total repair time of the whole compensation data or the compensation table is about 35S, wherein the time required for erasing the compensation data or the compensation table recorded in the flash memory is about 4S, and the time required for restarting the timing controller is about 1S, so that the two processes of erasing and restarting are about 5S, and the total repair time is 14.3%. In summary, this results in an excessive total repair time of the liquid crystal display device, which affects the efficiency of the compensation data or the compensation table repair.
It should be noted that the above description of the background art is only for the purpose of facilitating a clear and complete understanding of the technical solutions of the present application. Therefore, the technical solutions referred to above are not considered to be known to those skilled in the art, simply because they appear in the background of the present application.
Disclosure of Invention
The application provides a compensation data restoration method and a compensation data restoration device for a display device, so as to relieve the technical problem that the compensation data or a compensation table of the display device is too long in restoration occupation time.
In a first aspect, the present application provides a compensation data restoration method of a display device, including: erasing the flag bit data in the initial gray-scale compensation data and restarting the time sequence controller, wherein the initial gray-scale compensation data is stored in the flash memory; acquiring image data and synchronously erasing other data in the initial gray-scale compensation data; and generating corresponding target gray-scale compensation data based on the image data.
In some embodiments, erasing flag bit data in the initial gray scale compensation data and restarting the timing controller, the step of storing the initial gray scale compensation data in the flash memory includes: determining flag bit data, wherein the flag bit data is used for reading and/or identifying initial gray level compensation data by a time sequence controller; determining a storage address of the flag bit data in the flash memory; and erasing the flag bit data based on the storage address of the flag bit data.
In some embodiments, erasing flag bit data in the initial gray scale compensation data and restarting the timing controller, the step of storing the initial gray scale compensation data in the flash memory includes: determining that the flag bit data is at least one of a magic number, a cyclic redundancy check code and a header configuration file; determining the storage address of the sector where the flag bit data is located; and erasing the flag bit data based on the memory address of the sector in which the flag bit data is located.
In some embodiments, the step of acquiring image data and synchronously erasing other data in the initial gray-scale compensation data comprises: acquiring image data of gray scales of binding points corresponding to a display device; determining storage addresses of other data in the initial gray-scale compensation data; and erasing other data in the initial gray-scale compensation data based on the storage addresses of the other data in the initial gray-scale compensation data.
In some embodiments, the step of acquiring image data and synchronously erasing other data in the initial gray-scale compensation data comprises: determining the storage addresses of sectors where other data in the initial gray-scale compensation data are located; and erasing the storage content of the sector where the other data in the initial gray-scale compensation data are located based on the storage address of the sector where the other data in the initial gray-scale compensation data are located.
In some embodiments, the initial gray-scale compensation data includes flag bit data and other data; the step of storing the initial gray-scale compensation data in the flash memory comprises the following steps: storing flag bit data in one group of sectors of the flash memory; other data is stored in another set of sectors of the flash memory, wherein the other set of sectors is different from the one set of sectors.
In some embodiments, the step of generating corresponding target gray-scale compensation data based on the image data includes, after: burning the gray-scale compensation data of the mark to the flash memory; restarting the time schedule controller; and evaluating the compensation effect corresponding to the target gray-scale compensation data.
In some embodiments, the step of evaluating the compensation effect corresponding to the target gray-scale compensation data includes: evaluating the compensation effect corresponding to the gray-scale compensation data of the target; if the compensation effect meets the brightness uniformity display effect, ending the compensation data restoration process; and if the compensation effect does not meet the brightness uniformity display effect, repairing the compensation data again.
In a second aspect, the present application provides a compensation data repair device, where the compensation data repair device is applied to a display device, and the compensation data repair device operates according to the compensation data repair method in any one of the foregoing embodiments.
In some embodiments, the compensation data repairing device includes an erasure restarting module, a synchronization processing module and a generating module, where the erasure restarting module is used to erase flag bit data in initial gray-scale compensation data and restart the timing controller, and the initial gray-scale compensation data is stored in the flash memory; the synchronous processing module is used for acquiring image data and synchronously erasing other data in the initial gray-scale compensation data; the generation module is used for generating corresponding target gray-scale compensation data based on the image data.
According to the compensation data restoration method and the compensation data restoration device for the display device, the display device can be in the compensation closing state by firstly erasing the flag bit data in the initial gray-scale compensation data and restarting the time sequence controller, and then the synchronous operation of obtaining the image data and erasing other data in the initial gray-scale compensation data can be realized by obtaining the image data and synchronously erasing other data in the initial gray-scale compensation data, so that the time occupied by the compensation data or compensation table restoration of the display device is effectively reduced.
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Technical solutions and other advantageous effects of the present application will be made apparent from the following detailed description of specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a flowchart of a compensation data repairing method of a display device according to an embodiment of the present application.
Fig. 2 is a schematic diagram illustrating a working process of a compensation data repairing method of a display device according to an embodiment of the present application.
Fig. 3 is a schematic diagram illustrating a working process of a compensation data repairing method in a conventional technical scheme.
Fig. 4 is a schematic structural diagram of a compensation data repairing apparatus according to an embodiment of the present application.
Fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
Referring to fig. 1 to 5, as shown in fig. 1, the present embodiment provides a compensation data repairing method of a display device, which includes the following steps:
step S10: and erasing the flag bit data in the initial gray-scale compensation data and restarting the time sequence controller, wherein the initial gray-scale compensation data is stored in the flash memory.
Step S20: and acquiring image data and synchronously erasing other data in the initial gray-scale compensation data.
Step S30: based on the image data, corresponding target gray-scale compensation data is generated.
It can be appreciated that in the method for repairing compensation data of a display device provided in this embodiment, the display device is in a compensation off state by firstly erasing flag bit data in initial gray-scale compensation data and restarting the timing controller, and then by acquiring image data and synchronously erasing other data in the initial gray-scale compensation data, synchronous execution of acquiring the image data and erasing other data in the initial gray-scale compensation data can be realized, so that the time occupied by repairing the compensation data or the compensation table of the display device is effectively reduced.
In this embodiment, the time schedule controller needs a fixed time for restarting, and the fixed time may be about 1 second. The time required to erase the flag bit data in the initial gray-scale compensation data is about 0.6 ms. Therefore, when the flag bit in the initial gray-scale compensation data is erased and the timing controller is restarted, the timing controller cannot recognize the initial gray-scale compensation data at this time, and the display device is in a compensation off state.
The time required to erase the other data in the initial gray-scale compensation data is about 4 seconds. The time required to acquire image data is typically about 20 seconds. Therefore, when the two are processed in parallel, the time taken for repairing the compensation data or the compensation table of the display device can be saved by about 4 seconds.
In one embodiment, erasing the flag bit data in the initial gray scale compensation data and restarting the timing controller, the step of storing the initial gray scale compensation data in the flash memory includes: determining flag bit data, wherein the flag bit data is used for reading and/or identifying initial gray level compensation data by a time sequence controller; determining a storage address of the flag bit data in the flash memory; and erasing the flag bit data based on the storage address of the flag bit data.
It can be appreciated that in this embodiment, it is necessary to determine the specific content of the flag bit data and the storage address thereof in the flash memory, and then erase the flag bit data when the controller of the flash memory responds to the request of the erase command of the flag bit data.
In one embodiment, erasing the flag bit data in the initial gray scale compensation data and restarting the timing controller, the step of storing the initial gray scale compensation data in the flash memory includes: determining that the flag bit data is at least one of a magic number, a cyclic redundancy check code and a header configuration file; determining the storage address of the sector where the flag bit data is located; and erasing the flag bit data based on the memory address of the sector in which the flag bit data is located.
It is understood that in this embodiment, the flag bit data may be at least one of a Magic number (Magic Nmuber), a cyclic redundancy check (CRC, cyclic Redundancy Check), and a Header (Header) configuration file. Wherein the magic numbers may be used to mark the format of the file or protocol. The cyclic redundancy check is a channel coding technique for generating short fixed bit check codes according to data such as network data packets or computer files, and is mainly used for detecting or checking errors possibly occurring after data transmission or storage, and can utilize the principles of division and remainder to perform error detection.
In one embodiment, the step of acquiring image data and synchronously erasing other data in the initial gray-scale compensation data comprises: acquiring image data of gray scales of binding points corresponding to a display device; determining storage addresses of other data in the initial gray-scale compensation data; and erasing other data in the initial gray-scale compensation data based on the storage addresses of the other data in the initial gray-scale compensation data.
It can be understood that the obtained image data is unprocessed original image data corresponding to a display image of the display device at a preset gray level or a specific gray level. The preset gray scale or the specific gray scale is the known gray scale of the display device.
In one embodiment, the step of acquiring image data and synchronously erasing other data in the initial gray-scale compensation data comprises: determining the storage addresses of sectors where other data in the initial gray-scale compensation data are located; and erasing the storage content of the sector where the other data in the initial gray-scale compensation data are located based on the storage address of the sector where the other data in the initial gray-scale compensation data are located.
In one embodiment, the initial gray-scale compensation data includes flag bit data and other data; the step of storing the initial gray-scale compensation data in the flash memory comprises the following steps: storing flag bit data in one group of sectors of the flash memory; other data is stored in another set of sectors of the flash memory, wherein the other set of sectors is different from the one set of sectors.
In one embodiment, the step of generating the corresponding target gray-scale compensation data based on the image data includes: burning the gray-scale compensation data of the mark to the flash memory; restarting the time schedule controller; and evaluating the compensation effect corresponding to the target gray-scale compensation data.
In one embodiment, the step of evaluating the compensation effect corresponding to the target gray-scale compensation data includes: evaluating the compensation effect corresponding to the gray-scale compensation data of the target; if the compensation effect meets the brightness uniformity display effect, ending the compensation data restoration process; and if the compensation effect does not meet the brightness uniformity display effect, repairing the compensation data again.
As shown in fig. 2, based on the above embodiment, the working procedure of the compensation data repair method is as follows:
after the data compensation and repair of the display device are started, the operation of erasing the bit data of about 0.6MS is performed, then the operation of restarting the time sequence controller of about 1S is performed, then the operation of erasing other data of about 4S is performed in parallel, the operation of acquiring and processing image data is performed, then the target gray-scale compensation data is calculated and obtained according to the image data, the target gray-scale compensation data is burnt into the flash memory of the display device, and the time sequence controller is restarted again, so that the process is finished preliminarily.
Compared with the conventional compensation data restoration process shown in fig. 3, fig. 3 is a 1S restart timing controller that performs continuous erasing of initial gray-scale compensation data for about 4S until all the initial gray-scale compensation data is completely erased. The method and the device for erasing the initial gray-scale compensation data in the subsection mode firstly use less time to erase the flag bit data, then the erasing operation of other data of the initial gray-scale compensation data is required to be executed in a most time mode, the obtaining and processing operation of the image data are synchronous, and most time can be saved.
In one embodiment, the present embodiment provides a compensation data repairing device, where the compensation data repairing device is applied to a display device, and the compensation data repairing device operates according to the compensation data repairing method in any one of the above embodiments.
It can be understood that, in the compensation data repairing device provided in this embodiment, the display device is in the compensation off state by firstly erasing the flag bit data in the initial gray-scale compensation data and restarting the timing controller, and then by acquiring the image data and synchronously erasing other data in the initial gray-scale compensation data, the synchronization of acquiring the image data and erasing other data in the initial gray-scale compensation data can be realized, so that the time occupied by repairing the compensation data or the compensation table of the display device is effectively reduced.
As shown in fig. 4, in one embodiment, the compensation data repairing apparatus includes an erase restart module 100, a synchronization processing module 200, and a generating module 300, where the erase restart module 100 is configured to erase flag bit data in initial gray-scale compensation data stored in the flash memory 20 and restart the timing controller 30; the synchronization processing module 200 is configured to acquire image data and synchronously erase other data in the initial gray-scale compensation data; the generating module 300 is configured to generate corresponding target gray-scale compensation data based on the image data.
The erase restart module 100 is electrically connected to the synchronization processing module 200, and the synchronization processing module 200 is electrically connected to the generating module 300. After the erase restart module 100 completes its operation, the synchronization processing module 200 is notified to perform the operation, and the generating module 300 generates corresponding target gray-scale compensation data according to the image data output by the synchronization processing module 200.
It is understood that the erase restart module 100 may be configured to erase the flag bit data in the initial gray scale compensation data and/or restart the timing controller 30.
In one embodiment, the compensation data repairing apparatus further includes a writing module 400, and the writing module 400 is configured to write the target gray-scale compensation data to the corresponding storage space in the flash memory 20. The writing module 400 may be electrically connected to the generating module 300, the flash memory 20, and the erase restarting module 100. After the writing operation in this embodiment is completed, the writing module 400 may notify the erase restart module 100 to restart the timing controller 30 again.
The writing module 400 may include a writer 401, where the writer 401 is electrically connected to the flash memory 20, and is used for writing corresponding gray-scale compensation data into the flash memory 20.
As shown in fig. 5, in one embodiment, the display device may include a display panel 10, a flash memory 20, a timing controller 30 and an image signal generator 40, wherein the display panel 10 may be electrically connected to the timing controller 30 and the image signal generator 40, and the timing controller 30 may be electrically connected to the flash memory 20.
The flash memory 20 is disposed on one printed circuit board 21, and the timing controller 30 is disposed on the other printed circuit board. The flash memory 20 may be used to store initial gray-scale compensation data and target gray-scale compensation data. The timing controller 30 may be, but is not limited to, for reading and/or identifying the initial gray-scale compensation data or the target gray-scale compensation data based on the flag bit data.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
The foregoing describes the method and device for repairing compensation data of the display device provided in the embodiments of the present application in detail, and specific examples are applied to illustrate the principles and embodiments of the present application, where the foregoing description of the embodiments is only used to help understand the technical solution and core idea of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. A compensation data restoration method of a display device, comprising:
erasing flag bit data in the initial gray-scale compensation data and restarting the time sequence controller to control the display device to be in a compensation closing state, wherein the initial gray-scale compensation data is stored in the flash memory;
acquiring image data and synchronously erasing other data in the initial gray-scale compensation data; and
based on the image data, corresponding target gray-scale compensation data is generated.
2. The method of claim 1, wherein the step of erasing flag bit data in the initial gray-scale compensation data stored in the flash memory and resetting the timing controller comprises:
determining the flag bit data, wherein the flag bit data is used for reading and/or identifying the initial gray level compensation data by the time sequence controller;
determining a storage address of the flag bit data in the flash memory; and
and erasing the flag bit data based on the storage address of the flag bit data.
3. The method of claim 2, wherein the step of erasing flag bit data in the initial gray-scale compensation data stored in the flash memory and resetting the timing controller comprises:
determining that the flag bit data is at least one of a magic number, a cyclic redundancy check code and a header configuration file;
determining the storage address of the sector where the flag bit data are located; and
and erasing the zone bit data based on the storage address of the sector where the zone bit data is located.
4. The method of claim 1, wherein the step of acquiring image data and synchronously erasing other data in the initial gray-scale compensation data comprises:
acquiring image data of gray scales of binding points corresponding to the display device;
determining storage addresses of other data in the initial gray-scale compensation data; and
and erasing other data in the initial gray-scale compensation data based on the storage addresses of other data in the initial gray-scale compensation data.
5. The method of claim 4, wherein the step of acquiring image data and synchronously erasing other data in the initial gray-scale compensation data comprises:
determining the storage addresses of sectors where other data in the initial gray-scale compensation data are located;
and erasing the storage content of the sector where the other data in the initial gray-scale compensation data are located based on the storage addresses of the sectors where the other data in the initial gray-scale compensation data are located.
6. The compensation data restoration method according to claim 1, wherein the initial gray-scale compensation data includes the flag bit data and the other data; the step of storing the initial gray-scale compensation data in the flash memory comprises the following steps:
storing the flag bit data in one set of sectors of the flash memory;
the other data is stored in another set of sectors of the flash memory, the another set of sectors being different from the one set of sectors.
7. The compensation data restoration method according to any one of claims 1 to 6, wherein after the step of generating the corresponding target gray-scale compensation data based on the image data, it includes:
burning the target gray-scale compensation data to the flash memory;
restarting the timing controller; and
and evaluating the compensation effect corresponding to the target gray-scale compensation data.
8. The method of claim 7, wherein the step of evaluating the compensation effect corresponding to the target gray-scale compensation data comprises:
evaluating the compensation effect corresponding to the target gray-scale compensation data;
if the compensation effect meets the brightness uniformity display effect, ending the compensation data restoration process;
and if the compensation effect does not meet the brightness uniformity display effect, carrying out compensation data restoration again.
9. A compensation data repair device for a display device, the compensation data repair device operating according to the compensation data repair method of any one of claims 1 to 8.
10. The compensation data restoration device according to claim 9, wherein the compensation data restoration device includes:
the erasing restarting module is used for erasing the flag bit data in the initial gray-scale compensation data and restarting the time sequence controller, and the initial gray-scale compensation data is stored in the flash memory;
the synchronous processing module is used for acquiring image data and synchronously erasing other data in the initial gray-scale compensation data; and
and the generation module is used for generating corresponding target gray-scale compensation data based on the image data.
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