CN113326171A - Memory data processing method and device and electronic equipment - Google Patents
Memory data processing method and device and electronic equipment Download PDFInfo
- Publication number
- CN113326171A CN113326171A CN202110739696.XA CN202110739696A CN113326171A CN 113326171 A CN113326171 A CN 113326171A CN 202110739696 A CN202110739696 A CN 202110739696A CN 113326171 A CN113326171 A CN 113326171A
- Authority
- CN
- China
- Prior art keywords
- state data
- memory block
- memory
- block
- pointer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Memory System (AREA)
Abstract
The embodiment of the application provides a memory data processing method and device and electronic equipment, relates to the technical field of memories, and aims to search for abnormal memory blocks in an automatic scanning mode, so that the efficiency of searching for the abnormal memory blocks is improved. The memory data processing method comprises the following steps: traversing memory blocks in the chunk-structured memory data, and acquiring a block size, P-state data and C-state data corresponding to each memory block, where the P-state data is used to indicate whether a previous memory block is in use, and the C-state data is used to indicate whether a current memory block is in use; and determining whether the block size, the P state data and the C state data corresponding to each memory block meet preset conditions, if so, determining that the current memory block is normal, and if not, determining that the current memory block is abnormal.
Description
Technical Field
The present application relates to the field of memory technologies, and in particular, to a method and an apparatus for processing memory data, and an electronic device.
Background
When a program process in the existing electronic equipment runs by using a memory allocated by a dlmalloc memory allocator, a problem that the process exits due to local crash of the process caused by a memory problem is solved, in this case, the memory of the process needs to be analyzed, however, the memory space of the process is large, and the method for searching for an abnormal memory block by manpower is low in efficiency.
Disclosure of Invention
A memory data processing method, a memory data processing device, an electronic device and a storage medium can search for abnormal memory blocks in an automatic scanning mode, and therefore efficiency of searching for the abnormal memory blocks is improved.
In a first aspect, a method for processing memory data is provided, including:
traversing memory blocks in the chunk-structured memory data, and acquiring a block size, P-state data and C-state data corresponding to each memory block, where the P-state data is used to indicate whether a previous memory block is in use, and the C-state data is used to indicate whether a current memory block is in use;
and determining whether the block size, the P state data and the C state data corresponding to each memory block meet preset conditions, if so, determining that the current memory block is normal, and if not, determining that the current memory block is abnormal.
In a possible implementation manner, the process of traversing the memory chunks in the chunk-structured memory data and acquiring the chunk size, the P-state data, and the C-state data corresponding to each memory chunk includes:
if the P state data corresponding to the memory block is 1 and the C state data is 1, acquiring the block size, the P state data and the C state data corresponding to the memory block, wherein 1 represents that the memory block is in use, and 0 represents that the memory block is idle;
if the P state data corresponding to the memory block is 0 and the C state data is 1, acquiring the block size, the P state data, the C state data and pre _ foot data corresponding to the memory block, wherein the pre _ foot data represents the block size of a previous block;
the process of determining whether the block size, the P-state data, and the C-state data corresponding to each memory block satisfy the preset conditions includes:
if the P state data corresponding to the memory block is 1 and the C state data is 1, determining whether the block size, the P state data and the C state data corresponding to the memory block meet preset conditions;
if the P-state data and the C-state data corresponding to the memory block are 0 and 1, determining whether the block size, the P-state data, the C-state data, and the pre _ root data corresponding to the memory block satisfy the predetermined condition.
In a possible implementation manner, the process of traversing the memory chunks in the chunk-structured memory data and acquiring the chunk size, the P-state data, and the C-state data corresponding to each memory chunk further includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer and a bk pointer corresponding to the memory block, where the fd pointer is used to point to a previous idle memory block in the linked list, and the bk pointer is used to point to a next idle memory block in the linked list;
the process of determining whether the block size, the P-state data, and the C-state data corresponding to each memory block satisfy the preset conditions further includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition.
In a possible implementation manner, if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of acquiring the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer, a bk pointer and a subscript index corresponding to the memory block, where the subscript index is a number of a sub-box in which the memory block is located;
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index corresponding to the memory block satisfy the predetermined condition.
In a second aspect, there is provided a memory data processing apparatus, including:
the traversal module is configured to traverse memory blocks in the chunk-structured memory data, and acquire a block size, P-state data, and C-state data corresponding to each memory block, where the P-state data is used to indicate whether a previous memory block is in use, and the C-state data is used to indicate whether a current memory block is in use;
an exception determining module, configured to determine whether a block size, P-state data, and C-state data corresponding to each memory block meet preset conditions, if yes, determine that the current memory block is normal, and if not, determine that the current memory block is abnormal.
In a possible implementation, the traversal module is specifically configured to:
if the P state data corresponding to the memory block is 1 and the C state data is 1, acquiring the block size, the P state data and the C state data corresponding to the memory block, wherein 1 represents that the memory block is in use, and 0 represents that the memory block is idle;
if the P state data corresponding to the memory block is 0 and the C state data is 1, acquiring the block size, the P state data, the C state data and pre _ foot data corresponding to the memory block, wherein the pre _ foot data represents the block size of a previous block;
the anomaly determination module is specifically configured to:
if the P state data corresponding to the memory block is 1 and the C state data is 1, determining whether the block size, the P state data and the C state data corresponding to the memory block meet preset conditions;
if the P-state data and the C-state data corresponding to the memory block are 0 and 1, determining whether the block size, the P-state data, the C-state data, and the pre _ root data corresponding to the memory block satisfy the predetermined condition.
In a possible implementation manner, the traversal module is further specifically configured to:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer and a bk pointer corresponding to the memory block, where the fd pointer is used to point to a previous idle memory block in the linked list, and the bk pointer is used to point to a next idle memory block in the linked list;
the anomaly determination module is further specifically configured to:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition.
In a possible implementation manner, if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of acquiring the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer, a bk pointer and a subscript index corresponding to the memory block, where the subscript index is a number of a sub-box in which the memory block is located;
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index corresponding to the memory block satisfy the predetermined condition.
In a third aspect, a memory data processing apparatus is provided, including:
a processor and a memory for storing at least one instruction which is loaded and executed by the processor to implement the memory data processing method of the first aspect.
In a fourth aspect, an electronic device is provided, which includes the memory data processing apparatus of the second or third aspect.
In a fifth aspect, there is provided a computer-readable storage medium having stored therein a computer program which, when run on a computer, causes the computer to execute the memory data processing method of the first aspect.
According to the memory data processing method and device, the electronic device and the storage medium in the embodiment of the application, the abnormal memory blocks are determined by traversing the block size, the P state data and the C state data corresponding to each memory block and judging whether the data meet the preset conditions, namely, the memory blocks in the internal field are searched in an automatic scanning mode without manual searching, and the efficiency of searching the abnormal memory blocks is improved.
Drawings
Fig. 1 is a schematic flowchart of a memory data processing method according to an embodiment of the present application;
fig. 2 is a schematic flowchart of another memory data processing method according to an embodiment of the present application;
fig. 3 is a schematic flowchart of another memory data processing method according to an embodiment of the present application;
fig. 4 is a schematic flowchart of another memory data processing method according to an embodiment of the present application;
fig. 5 is a block diagram of a memory data processing apparatus according to an embodiment of the present disclosure.
Detailed Description
The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.
As shown in fig. 1, an embodiment of the present application provides a memory data processing method, where the memory data processing method may be used for memory data that needs to be subjected to problem analysis, for example, when a process in a mobile phone of a user exits due to a memory problem that is crashed, memory data related to the process is uploaded to a server for analyzing the problem, and the server may execute the memory data processing method provided in the embodiment of the present application to determine a location of an abnormal memory block, where the memory data processing method includes:
Specifically, the dlmalloc memory allocator manages the memory using chunk structure memory data, the chunks in the chunk structure are divided into two types, the chunks smaller than 256 bytes are called small chunks, the chunks greater than or equal to 256 bytes are called tree chunks, although the data structures of the chunks of different types are different, for maintaining consistency, the first several members of the chunks of different data structures have the same structure and logic, for example, the head area of each chunk includes a chunk size bit, a P-state data bit, and a C-state data bit, the P-state data bit may be a 0 th bit, and the value of the bit is 0 and indicates that the previous chunk is in an idle state, and the value of the bit is 1 and indicates that the previous chunk is in an in-use state, and the C-state data bit may be a 1 st bit, and the value of the bit is 0 and indicates that the current chunk is in an idle state, when the value of the bit is 1, the current memory block is in the in-use state, the previous memory block is the previous adjacent memory block of the current memory block, and the area except the specific bit range containing the P-state bit and the C-state bit in the head area is used for representing the block size. Therefore, the block size, the P-state data, and the C-state data corresponding to each memory block may be obtained according to a fixed position, for a normal memory block, a certain rule may be satisfied between the block size, the P-state data, and the C-state data, that is, a preset condition is satisfied, and if a corresponding preset condition is not satisfied between the data, the memory block is an abnormal memory block, so in this embodiment of the present application, it may be determined whether the memory block is an abnormal memory block according to a relationship between the data by obtaining the block size, the P-state data, and the C-state data corresponding to the memory block, and the above-mentioned processes of traversing the memory block and determining the memory block abnormality may be automatically performed without manual search, for the process of obtaining data, the process of obtaining data may be implemented by traversing based on an address, for the process of determining the memory block abnormality may be performed by presetting a preset condition between the data, and comparing the acquired data with a preset condition, if the preset condition is met, determining that the memory block is normal, and if the preset condition is not met, determining that the memory block is abnormal. The preset conditions refer to preset corresponding relations, and include: the P state data is 1, and the C state data is 1, and the corresponding block size belongs to a first range; the P-state data is 0, and the C-state data is 1, the corresponding block size belongs to the second range; the P-state data is 1, and the C-state data is 0, and the corresponding block size belongs to a third range, wherein the first range, the second range, and the third range may be the same or different. In step 102, it is determined whether the block size, the P-state data, and the C-state data meet any of the preset conditions, and if so, it is determined that the block size, the P-state data, and the C-state data meet the preset conditions, and if not, it is determined that the block size, the P-state data, and the C-state data do not meet the preset conditions.
In the memory data processing method in the embodiment of the application, the abnormal memory block is determined by traversing the block size, the P-state data and the C-state data corresponding to each memory block and judging whether the data meet the preset condition, that is, the memory block in the internal field is searched in an automatic scanning manner, manual searching is not needed, and the efficiency of searching the abnormal memory block is improved.
In a possible implementation manner, as shown in fig. 2, the step 101 of traversing the memory chunks in the chunk-structured memory data, and acquiring the chunk size, the P-state data, and the C-state data corresponding to each memory chunk includes:
step 1013, obtaining a block size, P state data, C state data, and pre _ foot data corresponding to the memory block, where the pre _ foot data represents a block size of a previous block;
the process of determining whether the block size, the P-state data, and the C-state data corresponding to each memory block satisfy the preset conditions in step 102 includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 1, entering step 1021, determining whether the block size, the P-state data and the C-state data corresponding to the memory block meet preset conditions, if so, entering step 103, determining that the current memory block is normal, and if not, entering step 104, determining that the current memory block is abnormal;
if the P-state data and the C-state data corresponding to the memory block are 0 and 1, step 1022 is performed, and it is determined whether the block size, the P-state data, the C-state data, and the pre _ root data corresponding to the memory block satisfy preset conditions, if yes, step 103 is performed, it is determined that the current memory block is normal, and if not, step 104 is performed, and it is determined that the current memory block is abnormal.
Specifically, the pre _ foot is a member of the dlmalloc memory block data structure, and if the previous memory block is free, i.e. the P-state data is 0, the pre _ foot data represents the size of the previous memory block, so as to conveniently obtain the head address of the previous memory block from the current memory block, thereby performing fast merge, and if the previous memory block is in use, i.e. the P-state data is 1, the pre _ foot data represents the mstate information of the previous memory block, the FOOTERS macro is 1, and at this time, the pre _ foot data stores a cross check value for checking when the memory is released through the [ free () ] function. Therefore, in step 1011, if it is determined that the P-state data is 1, then it is not necessary to subsequently acquire and determine the pre _ foot data, and if it is determined that the P-state data is 0, then it is determined that the pre _ foot data is subsequently acquired, and it is determined whether the content including the block size, the P-state data, the C-state data, and the pre _ foot data meets the preset condition, so as to determine the abnormal memory block. In step 1021, the preset conditions include: the P-state data is 1, and the C-state data is 1, the corresponding block size belongs to the first range. In step 1021, it is determined whether the block size, the P-state data, and the C-state data satisfy the preset conditions. In step 1022, the preset conditions include: the P-state data is 0 and the C-state data 1, the corresponding block size, belongs to the second range and the corresponding pre _ foot data belongs to the fourth range. In step 1022, it is determined whether the block size, the P-state data and the C-state data, and the pre _ foot data satisfy the above preset conditions.
In a possible implementation manner, as shown in fig. 3, the step 101 of traversing the memory chunks in the chunk-structured memory data, and acquiring the chunk size, the P-state data, and the C-state data corresponding to each memory chunk further includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, step 1014 is performed, where the block size, the P-state data, the C-state data, an fd pointer and a bk pointer corresponding to the memory block are obtained, where the fd pointer is used to point to a previous idle memory block in the linked list (where the previous one is the previous one in the linked list and the physical address may not be adjacent), and the bk pointer is used to point to a next idle memory block in the linked list (where the next one is the previous one in the linked list and the physical address may not be adjacent);
the step 102 of determining whether the block size, the P-state data, and the C-state data corresponding to each memory block satisfy the preset conditions further includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, go to step 1023, determine whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset conditions, if yes, go to step 103, determine that the current memory block is normal, if not, go to step 104, determine that the current memory block is abnormal.
Specifically, when the current memory block is idle, the fd pointer and the bk pointer are used to maintain a linked list, and when the current memory is in use, the fd pointer and the bk pointer are used to store actual data, so that in step 1011, if the state of C is determined to be 1, the contents of the fd pointer and the bk pointer do not need to be subsequently acquired and determined, and if the state of C is determined to be 0, the fd pointer and the bk pointer are subsequently acquired, and it is determined whether the contents including the block size, the P state data, the C state data, and the fd pointer and the bk pointer meet preset conditions, so as to determine the abnormal memory block, thereby increasing a criterion of one dimension, and improving the accuracy of searching the abnormal memory block. In step 1023, the preset conditions include: the P state data is 1, and the C state data is 0, the corresponding block size belongs to the third range, the corresponding fd pointer belongs to the first pointer range, and the corresponding bk pointer belongs to the second pointer range. In step 1023, it is determined whether the block size, P-state data, and C-state data, and fd and bk pointers satisfy the above preset conditions.
In one possible implementation, as shown in fig. 4, if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process entering step 1014 of acquiring the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, then step 1014 is performed, where the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index of the memory block are obtained, where the index of the index is the number of the sub-box where the memory block is located;
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the step 1023 is performed to determine whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the predetermined condition, which includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, go to step 1023 to determine whether the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index corresponding to the memory block satisfy the predetermined condition.
Specifically, for the subscript index, it is not necessary to determine each state, and it is only necessary to obtain and determine whether the contents including the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the subscript index satisfy the preset conditions in the idle linked list. In step 1023, the preset conditions include: the P-state data is 1, and the C-state data is 0, the corresponding block size belongs to the third range, the corresponding fd pointer belongs to the first pointer range, the corresponding bk pointer belongs to the second pointer range, and the corresponding index belongs to the preset number range. In step 1023, it is determined whether the block size, P-state data, and C-state data, as well as the fd and bk pointers, and the subscript index satisfy the above preset conditions.
It should be noted that, in the embodiment corresponding to fig. 3 and 4, in step 1011, only three combinations of P-state data and C-state data are given, because the free memory block is not necessarily preceded by a free block, otherwise dlmalloc merges the two, and thus, memory scanning can be implemented by traversing the memory block based on the three cases.
As shown in fig. 5, an embodiment of the present application further provides a memory data processing apparatus, including: the traversal module 1 is configured to traverse memory blocks in the chunk-structured memory data, and acquire a block size, P-state data, and C-state data corresponding to each memory block, where the P-state data is used to indicate whether a previous memory block is in use, and the C-state data is used to indicate whether a current memory block is in use; the anomaly determination module 2 is configured to determine whether the block size, the P-state data, and the C-state data corresponding to each memory block meet preset conditions, if yes, determine that the current memory block is normal, and if not, determine that the current memory block is abnormal.
The memory data processing apparatus may apply the memory data processing method in any of the embodiments, and the specific process and principle thereof are not described herein again.
In a possible implementation, the traversal module 1 is specifically configured to: if the P state data corresponding to the memory block is 1 and the C state data is 1, acquiring the block size, the P state data and the C state data corresponding to the memory block, wherein 1 represents that the memory block is in use, and 0 represents that the memory block is idle; if the P state data corresponding to the memory block is 0 and the C state data is 1, acquiring the block size, the P state data, the C state data and pre _ foot data corresponding to the memory block, wherein the pre _ foot data represents the block size of a previous block; the anomaly determination module 2 is specifically configured to: if the P state data corresponding to the memory block is 1 and the C state data is 1, determining whether the block size, the P state data and the C state data corresponding to the memory block meet preset conditions; if the P-state data and the C-state data corresponding to the memory block are 0 and 1, determining whether the block size, the P-state data, the C-state data, and the pre _ root data corresponding to the memory block satisfy the predetermined condition.
In a possible implementation, the traversing module 1 is further specifically configured to: if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer and a bk pointer corresponding to the memory block, where the fd pointer is used to point to a previous idle memory block in the linked list, and the bk pointer is used to point to a next idle memory block in the linked list; the anomaly determination module 2 is further specifically configured to: if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition.
In a possible implementation manner, if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of acquiring the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block includes: if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer, a bk pointer and a subscript index corresponding to the memory block, where the subscript index is a number of a sub-box in which the memory block is located; if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition includes: if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index corresponding to the memory block satisfy the predetermined condition.
It should be understood that the above partition of the memory data processing apparatus shown in fig. 5 is only a logical function partition, and the actual implementation may be wholly or partially integrated into one physical entity, or may be physically separated. And these modules can be realized in the form of software called by processing element; or may be implemented entirely in hardware; and part of the modules can be realized in the form of calling by the processing element in software, and part of the modules can be realized in the form of hardware. For example, either one of the traversal module 1 and the abnormality determination module 2 may be a processing element that is separately set up, or may be integrated into the memory data processing apparatus, for example, be implemented in a certain chip of the memory data processing apparatus, or may be stored in a memory of the memory data processing apparatus in the form of a program, and a certain processing element of the memory data processing apparatus calls and executes the functions of the above modules. Other modules are implemented similarly. In addition, all or part of the modules can be integrated together or can be independently realized. The processing element described herein may be an integrated circuit having signal processing capabilities. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in the form of software.
For example, traversal module 1 and anomaly determination module 2 these modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Application Specific Integrated Circuits (ASICs), or one or more microprocessors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs), among others. As another example, when one of the above modules is implemented in the form of a Processing element scheduler, the Processing element may be a general purpose processor, such as a Central Processing Unit (CPU) or other processor capable of invoking programs. As another example, these modules may be integrated together, implemented in the form of a system-on-a-chip (SOC).
An embodiment of the present application further provides a memory data processing apparatus, including: the memory comprises a processor and a memory, wherein the memory is used for storing at least one instruction, and the instruction is loaded by the processor and executed to realize the memory data processing method in any embodiment. The process and principle of the memory data processing method are the same as those of the above embodiments, and are not described herein again.
The number of processors may be one or more, and the processors and the memory may be connected by a bus or other means. The memory, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as program instructions/modules corresponding to the memory data processing apparatus in the embodiments of the present application. The processor executes various functional applications and data processing by executing non-transitory software programs, instructions and modules stored in the memory, i.e., implements the methods in any of the above-described method embodiments. The memory may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; and necessary data, etc. Further, the memory may include high speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid state storage device.
An embodiment of the present application further provides an electronic device, including the memory data processing apparatus in any of the above embodiments. The electronic device may be, for example, a server, and when a user encounters a situation that a process exits due to native crash in a process of using, for example, a mobile phone, a smart watch, a smart television, a smart vehicle-mounted system, or other electronic devices, memory space data of the process concerned may be uploaded to the electronic device (server) provided in the embodiment of the present application, and the memory data processing method is executed by a memory data processing device in the server, so as to more efficiently find out an abnormal memory block from the uploaded memory space data.
An embodiment of the present application further provides a computer-readable storage medium, where a computer program is stored, and when the computer program runs on a computer, the computer is enabled to execute the memory data processing method in any of the above embodiments.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the procedures or functions described in accordance with the present application are generated, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optic, digital subscriber line) or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk), among others.
In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, and means that there may be three relationships, for example, a and/or B, and may mean that a exists alone, a and B exist simultaneously, and B exists alone. Wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (11)
1. A method for processing memory data, comprising:
traversing memory blocks in the chunk-structured memory data, and acquiring a block size, P-state data and C-state data corresponding to each memory block, where the P-state data is used to indicate whether a previous memory block is in use, and the C-state data is used to indicate whether a current memory block is in use;
and determining whether the block size, the P state data and the C state data corresponding to each memory block meet preset conditions, if so, determining that the current memory block is normal, and if not, determining that the current memory block is abnormal.
2. The memory data processing method according to claim 1,
the process of traversing the memory blocks in the chunk structure memory data and acquiring the block size, the P-state data and the C-state data corresponding to each memory block includes:
if the P state data corresponding to the memory block is 1 and the C state data is 1, acquiring the block size, the P state data and the C state data corresponding to the memory block, wherein 1 represents that the memory block is in use, and 0 represents that the memory block is idle;
if the P state data corresponding to the memory block is 0 and the C state data is 1, acquiring the block size, the P state data, the C state data and pre _ foot data corresponding to the memory block, wherein the pre _ foot data represents the block size of a previous block;
the process of determining whether the block size, the P-state data, and the C-state data corresponding to each memory block satisfy the preset conditions includes:
if the P state data corresponding to the memory block is 1 and the C state data is 1, determining whether the block size, the P state data and the C state data corresponding to the memory block meet preset conditions;
if the P-state data and the C-state data corresponding to the memory block are 0 and 1, determining whether the block size, the P-state data, the C-state data, and the pre _ root data corresponding to the memory block satisfy the predetermined condition.
3. The memory data processing method according to claim 2,
the process of traversing the memory blocks in the chunk-structured memory data and acquiring the block size, the P-state data, and the C-state data corresponding to each memory block further includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer and a bk pointer corresponding to the memory block, where the fd pointer is used to point to a previous idle memory block in the linked list, and the bk pointer is used to point to a next idle memory block in the linked list;
the process of determining whether the block size, the P-state data, and the C-state data corresponding to each memory block satisfy the preset conditions further includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition.
4. The memory data processing method according to claim 3,
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of acquiring the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer, a bk pointer and a subscript index corresponding to the memory block, where the subscript index is a number of a sub-box in which the memory block is located;
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index corresponding to the memory block satisfy the predetermined condition.
5. A memory data processing apparatus, comprising:
the traversal module is configured to traverse memory blocks in the chunk-structured memory data, and acquire a block size, P-state data, and C-state data corresponding to each memory block, where the P-state data is used to indicate whether a previous memory block is in use, and the C-state data is used to indicate whether a current memory block is in use;
an exception determining module, configured to determine whether a block size, P-state data, and C-state data corresponding to each memory block meet preset conditions, if yes, determine that the current memory block is normal, and if not, determine that the current memory block is abnormal.
6. The memory data processing device of claim 5,
the traversal module is specifically configured to:
if the P state data corresponding to the memory block is 1 and the C state data is 1, acquiring the block size, the P state data and the C state data corresponding to the memory block, wherein 1 represents that the memory block is in use, and 0 represents that the memory block is idle;
if the P state data corresponding to the memory block is 0 and the C state data is 1, acquiring the block size, the P state data, the C state data and pre _ foot data corresponding to the memory block, wherein the pre _ foot data represents the block size of a previous block;
the anomaly determination module is specifically configured to:
if the P state data corresponding to the memory block is 1 and the C state data is 1, determining whether the block size, the P state data and the C state data corresponding to the memory block meet preset conditions;
if the P-state data and the C-state data corresponding to the memory block are 0 and 1, determining whether the block size, the P-state data, the C-state data, and the pre _ root data corresponding to the memory block satisfy the predetermined condition.
7. The memory data processing device of claim 6,
the traversal module is further specifically configured to:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer and a bk pointer corresponding to the memory block, where the fd pointer is used to point to a previous idle memory block in the linked list, and the bk pointer is used to point to a next idle memory block in the linked list;
the anomaly determination module is further specifically configured to:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition.
8. The memory data processing device of claim 7,
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of acquiring the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block includes:
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, obtaining a block size, P-state data, C-state data, an fd pointer, a bk pointer and a subscript index corresponding to the memory block, where the subscript index is a number of a sub-box in which the memory block is located;
if the P-state data corresponding to the memory block is 1 and the C-state data is 0, the process of determining whether the block size, the P-state data, the C-state data, the fd pointer, and the bk pointer corresponding to the memory block satisfy the preset condition includes:
if the P-state data and the C-state data corresponding to the memory block are 1 and 0, determining whether the block size, the P-state data, the C-state data, the fd pointer, the bk pointer, and the index corresponding to the memory block satisfy the predetermined condition.
9. A memory data processing apparatus, comprising:
a processor and a memory for storing at least one instruction which is loaded and executed by the processor to implement the memory data processing method of any one of claims 1 to 4.
10. An electronic device, characterized in that it comprises a memory data processing device according to any one of claims 5 to 9.
11. A computer-readable storage medium, in which a computer program is stored which, when run on a computer, causes the computer to execute the memory data processing method according to any one of claims 1 to 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110739696.XA CN113326171B (en) | 2021-06-30 | 2021-06-30 | Memory data processing method and device and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110739696.XA CN113326171B (en) | 2021-06-30 | 2021-06-30 | Memory data processing method and device and electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113326171A true CN113326171A (en) | 2021-08-31 |
| CN113326171B CN113326171B (en) | 2023-10-13 |
Family
ID=77423638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110739696.XA Active CN113326171B (en) | 2021-06-30 | 2021-06-30 | Memory data processing method and device and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113326171B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106339258A (en) * | 2016-08-10 | 2017-01-18 | 西安诺瓦电子科技有限公司 | Management method and device for shared memory of programmable logic device and microprocessor |
| CN106681829A (en) * | 2016-12-09 | 2017-05-17 | 上海斐讯数据通信技术有限公司 | Memory management method and system |
| US20180074885A1 (en) * | 2016-09-09 | 2018-03-15 | Oracle International Corporation | Memory quarantine |
| CN109375985A (en) * | 2018-09-06 | 2019-02-22 | 新华三技术有限公司成都分公司 | Dynamic memory management method and device |
| CN111512266A (en) * | 2018-03-27 | 2020-08-07 | 英特尔公司 | System, apparatus, and method for handshake protocol for low power state transitions |
-
2021
- 2021-06-30 CN CN202110739696.XA patent/CN113326171B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106339258A (en) * | 2016-08-10 | 2017-01-18 | 西安诺瓦电子科技有限公司 | Management method and device for shared memory of programmable logic device and microprocessor |
| US20180074885A1 (en) * | 2016-09-09 | 2018-03-15 | Oracle International Corporation | Memory quarantine |
| CN106681829A (en) * | 2016-12-09 | 2017-05-17 | 上海斐讯数据通信技术有限公司 | Memory management method and system |
| CN111512266A (en) * | 2018-03-27 | 2020-08-07 | 英特尔公司 | System, apparatus, and method for handshake protocol for low power state transitions |
| CN109375985A (en) * | 2018-09-06 | 2019-02-22 | 新华三技术有限公司成都分公司 | Dynamic memory management method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113326171B (en) | 2023-10-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11556812B2 (en) | Method and device for acquiring data model in knowledge graph, and medium | |
| CN109815240B (en) | Method, apparatus, device and storage medium for managing index | |
| CN114116065B (en) | Method and device for acquiring topological graph data object and electronic equipment | |
| CN111078276B (en) | Application redundant resource processing method, device, equipment and storage medium | |
| CN113641544B (en) | Method, apparatus, device, medium and product for detecting application state | |
| US20140012879A1 (en) | Database management system, apparatus, and method | |
| CN112650692A (en) | Heap memory allocation method, device and storage medium | |
| CN115525793A (en) | Computer-implemented method, system, and storage medium | |
| CN112799763A (en) | Function management method, management device, terminal equipment and readable storage medium | |
| CN109299613B (en) | Database partition authority setting method and terminal equipment | |
| CN113326171B (en) | Memory data processing method and device and electronic equipment | |
| CN116226134A (en) | Method and device for writing data into file and data writing database | |
| US8935200B2 (en) | Dynamic database dump | |
| CN115065366A (en) | Compression method, device and equipment of time sequence data and storage medium | |
| CN110852077B (en) | Method, device, medium and electronic equipment for dynamically adjusting Word2Vec model dictionary | |
| CN112131257B (en) | Data query method and device | |
| CN113094415B (en) | Data extraction method, data extraction device, computer readable medium and electronic equipment | |
| CN112434195A (en) | Data analysis method and device, electronic equipment and computer readable storage medium | |
| US20210208998A1 (en) | Function analyzer, function analysis method, and function analysis program | |
| CN108733678B (en) | Data searching method, device and related equipment | |
| CN114115696A (en) | Memory deduplication method and device and storage medium | |
| US10127128B2 (en) | Performance engineering platform using probes and searchable tags | |
| CN112181539B (en) | File processing method, device, equipment and medium | |
| CN114428789B (en) | Data processing method and device | |
| CN115934317A (en) | Distributed data processing method and device, electronic equipment and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |