CN113296691A

CN113296691A - Data processing system, method, device and electronic equipment

Info

Publication number: CN113296691A
Application number: CN202010734749.4A
Authority: CN
Inventors: 方兴; 黄子龙; 吕涛; 陈继承; 李志超
Original assignee: Alibaba Group Holding Ltd
Current assignee: Alibaba Group Holding Ltd
Priority date: 2020-07-27
Filing date: 2020-07-27
Publication date: 2021-08-24
Anticipated expiration: 2040-07-27

Abstract

The embodiment of the application provides a data processing system, wherein, the NVMe bridge device is only responsible for processing data processing commands and forwarding and processing data access request information, that is: the mapping module in the NVMe bridge equipment is used for mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information; and provides the second data processing command to the NVMe system device. The proxy module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information used for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and after the data access is carried out, providing a data access return result to the NVMe system equipment. The NVMe bridge equipment does not need to cache data in a host or NVMe system equipment, so that the delay problem is reduced, extra power consumption is reduced, and resources are saved.

Description

Data processing system, method, device and electronic equipment

Technical Field

The present application relates to the field of computer technologies, and in particular, to a data processing system, a method, an apparatus, and an electronic device, and also relates to a computer storage medium.

Background

In recent years, with the development of information technology, the usage amount of NVMe (Non-Volatile Memory express) hard disks in the field of data storage is increasing. Compared with the traditional mechanical hard disk, the NVMe hard disk has great improvement in bandwidth and delay performance. Generally, NVMe hard disk latency is below 100us (microseconds). However, in a cloud computing scenario, because the NVMe hard disks have poor operability and maintainability, an NVMe bridge device needs to be introduced between the host device and the NVMe hard disks to solve the problem that the NVMe hard disks have poor operability and maintainability in the cloud computing scenario.

In the existing NVMe bridge device, the address space of the host device needs to be mapped to the memory space of the NVMe bridge device, and meanwhile, the NVMe bridge device also needs to cache the command, the address and the data in the memory space of the host device to the memory space of the NVMe bridge device, so that the NVMe hard disk can obtain the command, the address and the data from the memory space of the NVMe bridge device. Therefore, when the NVMe hard disk accesses the host device, commands, addresses and data need to be copied from the memory space of the NVMe bridge device, which may cause additional latency, and the additional latency may have a large impact on the performance of the NVMe hard disk. Meanwhile, because NVMe bridge devices require a large amount of memory, additional power consumption is also caused, thereby causing resource waste.

Disclosure of Invention

The embodiment of the application provides a data processing system, which is used for solving the problem of time delay caused by using NVMe bridge equipment to access data between an NVMe hard disk and host equipment in the prior art. And simultaneously, the extra power consumption is reduced, thereby saving resources.

An embodiment of the present application provides a data processing system, including: the system comprises host equipment, NVMe system equipment and NVMe bridge equipment; the NVMe bridge equipment comprises a mapping module and an agent module;

the mapping module is specifically configured to receive a first data processing command sent by the host device, map first address space information included in the first data processing command, obtain a second data processing command including second address space information, and provide the second data processing command to the NVMe system device; the second address space information is obtained by mapping the first address space information; the first address space information is physical address space information of the host equipment;

the NVMe system equipment is used for receiving the second data processing command and sending first request information for accessing data in the host equipment to the proxy module based on the second data processing command;

the proxy module is configured to receive the first request information, modify the second address space information according to the first request information, obtain target address space information used for accessing data in the host device, and perform data access in the host device based on the target address space information; and after the data access is carried out, providing a data access return result to the NVMe system equipment.

Optionally, the agent module is further configured to: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request message refers to a request message used by the NVMe system device to access a cache command in the memory space of the NVMe bridge device.

Optionally, after receiving request information sent by the NVMe system device, the agent module determines whether the request information is the first request information or the second request information;

if the request information is the first request information, forwarding the request information to the host equipment so as to access the data in the memory space of the host equipment; and otherwise, forwarding the request information to the NVMe bridge equipment to access the cache command in the memory space of the NVMe bridge equipment.

Optionally, the first data processing command refers to a submission queue command related to data access stored in the host device;

the mapping module receives a first data processing command sent by the host device, maps first address space information contained in the first data processing command, and obtains a second data processing command containing second address space information, including:

receiving the submission queue command sent by the host device;

and mapping first address space information related in the submission queue command to obtain a second data processing command containing second address space information.

Optionally, the mapping the first address space information included in the first data processing command to obtain a second data processing command including second address space information includes:

obtaining first address space information involved in the submit queue command;

modifying physical address area field information corresponding to first address space information related in the submission queue command to obtain modified address area field information; and using the command containing the modified address area field information as the second data processing command containing the second address space information.

Optionally, before modifying the physical address area field information corresponding to the first address space information related in the submission queue command, the NVMe bridge device determines whether the first address space information is physical area page input information, and provides a determination result to the mapping module;

if the judgment result shows that the first address space information is physical area page input information, the modification of the physical address area field information corresponding to the first address space information related in the submission queue command comprises the following steps: carrying out zero assignment on partial bit fields of the field information of the physical address area;

if the judgment result shows that the first address space information is not the physical area page input information, the modification of the physical address area field information corresponding to the first address space information related in the submission queue command comprises the following steps: and carrying out non-zero assignment on partial bit fields of the field information of the physical address area.

Optionally, the modifying, by the proxy module, the second address space information according to the first request information to obtain target address space information for accessing data in the host device includes:

the agent module judges whether the assignment result of the partial bit field is non-zero assignment;

if the assignment result is not non-zero assignment, modifying the in-page offset information according to a preset mapping table of the physical channel/virtual channel, and confirming the modified in-page offset information as the target address space information;

otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording label information for accessing the host equipment and a value corresponding to the non-zero assignment of the identification information of the partial bit field; and confirming the modified in-page offset information, the label information and the value corresponding to the non-zero assignment of the identification information of the partial bit field as the target address space information.

Optionally, after performing the data access, providing a data access return result to the NVMe system device includes:

obtaining a data access return result which is returned by the host device and aims at the first request information;

judging whether the data access return result is data which needs to be accessed finally or intermediate address information, wherein the intermediate address information is a return result which needs the NVMe system equipment to send out the first request information again;

if the data access return result is data which needs to be accessed finally, directly providing the data which needs to be accessed finally to the NVMe system equipment so that the data which needs to be accessed finally can be stored by the NVMe system equipment;

and if the data access return result is intermediate address information, modifying the intermediate address information, and providing the modified intermediate address information to the NVMe system equipment so that the NVMe system equipment can send out the first request information again.

Optionally, the modifying the intermediate address information and providing the modified intermediate address information to the NVMe system device includes:

judging whether the intermediate address information is the last address of a physical area page or not;

if the intermediate address information is not the last address of the physical area page, carrying out zero assignment on partial bit fields of the intermediate address information to obtain modified intermediate address information; providing the modified intermediate address information to the NVMe system device;

if the intermediate address information is the last address of the physical area page, subtracting 1 assignment from the value corresponding to the non-zero assignment to a part of bit domains of the intermediate address information to obtain modified intermediate address information; providing the modified intermediate address information to the NVMe system device.

Optionally, after mapping the first address space information related to the submit queue command, the mapping module caches the second address space information in the memory space of the NVMe bridge device.

Optionally, the mapping module is further configured to obtain a data cache address space sent by the host device, map the data cache address space, and provide the mapped data cache address space to the host device, so as to cache the mapped data cache address space in the memory space of the host device.

Optionally, the NVMe bridge device further includes a transit module; the switching module is used for connecting the host device and the NVMe bridge device so as to forward a data processing command and data access request information between the host device and the NVMe bridge device.

An embodiment of the present application provides a data processing method, including:

receiving a first data processing command sent by host equipment;

mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information, and providing the second data processing command to the NVMe system equipment;

the second address space information is obtained by mapping the first address space information; the first address space information is physical address space information of the host device.

the receiving a first data processing command sent by a host device, mapping first address space information contained in the first data processing command, and obtaining a second data processing command containing second address space information, includes:

receiving the submission queue command sent by the host device;

obtaining first address space information involved in the submit queue command;

Optionally, before modifying the physical address area field information corresponding to the first address space information related in the submission queue command, a determination result provided by the NVMe bridge device for determining whether the first address space information is physical area page input information is obtained;

the modifying the physical address area field information corresponding to the first address space information involved in the submission queue command includes:

if the judgment result is that the first address space information is physical area page input information, carrying out zero assignment on partial bit fields of the physical address area field information; and if the judgment result is that the first address space information is not the physical area page input information, carrying out non-zero assignment on part of bit fields of the physical address area field information.

Optionally, the method further includes: after mapping the first address space information related in the submission queue command, caching the second address space information in the memory space of the NVMe bridge device.

Optionally, the method further includes: and obtaining a data cache address space sent by the host equipment, mapping the data cache address space, and providing the mapped data cache address space for the host equipment so as to cache the mapped data cache address space in the memory space of the host equipment.

receiving first request information for accessing data in host equipment, which is sent by NVMe system equipment;

modifying second address space information provided by a mapping module according to the first request information to obtain target address space information for accessing data in the host equipment; the second address space information is address space information obtained by mapping physical address space information of the host equipment by using the mapping module;

and performing data access in the host equipment based on the target address space information, obtaining a data access return result, and providing the data access return result for the NVMe system equipment.

Optionally, the method further includes: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request message refers to a request message used by the NVMe system device to access a cache command in the memory space of the NVMe bridge device.

Optionally, after receiving request information sent by the NVMe system device, determining whether the request information is the first request information or the second request information;

Optionally, the modifying, according to the first request information, the second address space information provided by the mapping module to obtain target address space information for accessing data in the host device includes:

obtaining modification result information of physical address area field information corresponding to physical address space information of the host equipment, which is provided by the mapping module;

if the modification result information is not the non-zero assignment, modifying the in-page offset information according to a preset mapping table of the physical channel/virtual channel, and confirming the modified in-page offset information as the target address space information;

Optionally, the providing the data access return result to the NVMe system device includes:

Correspondingly, an embodiment of the present application provides a data processing apparatus, including:

the command receiving unit is used for receiving a first data processing command sent by the host equipment;

a mapping unit, configured to map first address space information included in the first data processing command, and obtain a second data processing command including second address space information;

a command providing unit configured to provide the second data processing command to the NVMe system device;

the request receiving unit is used for receiving first request information for accessing data in the host equipment, which is sent by the NVMe system equipment;

the modification unit is used for modifying the second address space information provided by the mapping module according to the first request information to obtain target address space information used for accessing data in the host equipment; the second address space information is address space information obtained by mapping physical address space information of the host equipment by using the mapping module;

a return result obtaining unit, configured to perform data access in the host device based on the target address space information, and obtain a data access return result;

a return result providing unit, configured to provide the data access return result to the NVMe system device.

Correspondingly, an embodiment of the present application provides an electronic device, including:

a processor;

a memory for storing a computer program to be executed by the processor for performing the above-mentioned data processing method.

Correspondingly, the embodiment of the application provides a computer storage medium, wherein a computer program is stored in the computer storage medium, and the computer program is run by a processor to execute the data processing method.

Compared with the prior art, the embodiment of the application has the following advantages:

an embodiment of the present application provides a data processing system, including: the system comprises host equipment, NVMe system equipment and NVMe bridge equipment; the NVMe bridge equipment comprises a mapping module and an agent module; the mapping module is specifically configured to receive a first data processing command sent by the host device, map first address space information included in the first data processing command, obtain a second data processing command including second address space information, and provide the second data processing command to the NVMe system device; the second address space information is the address space information obtained by the mapping of the first address space information; the first address space information is physical address space information of the host equipment; the NVMe system equipment is used for receiving a second data processing command and sending first request information for accessing data in the host equipment to the proxy module based on the second data processing command; the proxy module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information used for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and after the data access is carried out, providing a data access return result to the NVMe system equipment. In the data processing system of this embodiment, the NVMe bridge device is only responsible for processing the data processing command and forwarding and processing the data access request information, and processing the data processing command means: the mapping module in the NVMe bridge equipment is used for mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information; and providing the second data processing command to the NVMe system device; forwarding and processing data access request information refers to: the proxy module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information used for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and after the data access is carried out, providing a data access return result to the NVMe system equipment. The NVMe bridge equipment in the system of the embodiment does not need to cache data in the host or the NVMe system equipment, so that the delay problem is reduced, extra power consumption is reduced, and resources are saved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings.

FIG. 1 is a block diagram of a data processing system according to a first embodiment of the present application;

fig. 1A is a schematic process diagram of a system for processing access to a host device by an NVMe system device according to a first embodiment of the present application;

FIG. 1B is a schematic diagram illustrating storage locations of data information and command information according to a first embodiment of the present application;

fig. 2 is a flowchart of a data processing method according to a second embodiment of the present application;

fig. 3 is a flowchart of a data processing method according to a third embodiment of the present application;

fig. 4 is a schematic diagram of a data processing apparatus according to a fourth embodiment of the present application;

fig. 5 is a schematic diagram of a data processing apparatus according to a fifth embodiment of the present application;

fig. 6 is a schematic view of an electronic device according to a sixth embodiment of the present application.

Detailed Description

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is capable of implementation in many different ways than those herein set forth and of similar import by those skilled in the art without departing from the spirit of this application and is therefore not limited to the specific implementations disclosed below.

The application provides a data processing system, two data processing methods, two data processing devices, an electronic device and a computer medium.

First embodiment

In order to more clearly show the data processing system provided by the present application, some terms related to the present embodiment will be introduced.

NVMe, all known as Non-Volatile Memory express, is a Non-Volatile Memory host controller interface specification. Is a logical device interface specification. The system is based on a bus transmission protocol specification (corresponding to an application layer in a communication protocol) of a device logic interface and is used for accessing a nonvolatile memory medium attached through a PCI-express (PCIe) bus, wherein the PCI-express (peripheral component interconnect express) is a high-speed serial computer expansion bus standard.

The NVMe aims to fully utilize the low latency and parallelism of a PCIe channel and the parallelism of a current processor, a platform and an application, greatly improve the read-write performance of the solid state disk and reduce the problem of high latency under controllable storage cost.

Prp (physical Region page), which is a physical (memory) Region page, in this embodiment, a physical Region page. SQ/CQ (Submission/Completion Queue), is a commit/Completion Queue command stored in the host device that is involved in data access. Dma (direct Memory access) is a direct Memory storage, and hpa (host Physical address) is a Physical (Memory) address of the host device. PF/VF is the physical channel/virtual channel.

Fig. 1 is a schematic diagram of a system according to a first embodiment of the present application. The system comprises: host device, NVMe system device and NVMe bridge device. The NVMe bridge equipment comprises a mapping module and a proxy module.

The mapping module is specifically configured to receive a first data processing command sent by the host device, map first address space information included in the first data processing command, obtain a second data processing command including second address space information, and provide the second data processing command to the NVMe system device. The mapping module may be disposed in a processor system of the NVMe bridge device. In this embodiment, an NVMe hard disk device is specifically used as an example of an NVMe system device, which illustrates how the NVMe system device interacts with a host device and an NVMe bridge device to perform data processing. In fact, in the present application, the NVMe system device may also be a device in an NVMe over fabric or NVMe over TCP application scenario. NVMe Over Fabrics replaces PCIe transport with Fabric technologies such as RDMA or Fibre Channel (FC) architectures, NVMe Over TCP involves high performance file or data storage.

In this embodiment, the second address space information is address space information obtained by mapping the first address space information; the first address space information is physical address space information of the host equipment; the physical address space information of the host device may also be referred to as memory address space information of the host device.

Specifically, the mapping module receives a first data processing command sent by the host device, and the first data processing command refers to a submission queue command related to data access stored in the host device. Therefore, the mapping module receives a first data processing command sent by the host device, maps first address space information included in the first data processing command, and obtains a second data processing command including second address space information, which may refer to: first, a commit queue command sent by a host device is received. And then mapping the first address space information related in the submission queue command to obtain a second data processing command containing second address space information.

More specifically, as mapping the first address space information included in the first data processing command, obtaining the second data processing command including the second address space information may be: first, first address space information involved in a commit queue command is obtained. Then, modifying the physical address area field information corresponding to the first address space information related in the submitted queue command to obtain modified address area field information; the command containing the modified address field information is treated as a second data processing command containing second address space information.

In this embodiment, before the mapping module modifies the physical address area field information corresponding to the first address space information related to the submission queue command, the mapping module notifies the NVMe bridge device to determine whether the first address space information is physical area page input information, where determining whether the first address space information is physical area page input information may refer to determining whether the first address space information is a physical memory page entry, where the physical memory page entry is: PRP _ Entry. After the NVMe bridge equipment judges, the judgment result is provided for the mapping module, so that the mapping module modifies the physical address area field information corresponding to the first address space information related in the submission queue command in the subsequent process.

The mapping module modifies the physical address area field information corresponding to the first address space information related in the submitted queue command according to the judgment result, and the method comprises the following steps: and if the judgment result is that the first address space information is the physical area page input information, carrying out zero assignment on part of bit fields of the physical address area field information. And if the judgment result is that the first address space information is not the physical area page input information, carrying out non-zero assignment on partial bit fields of the physical address area field information. Here, the non-zero assignment corresponds to a value of N, which is essentially the depth information value of the PRP List. The PRP List is a physical memory page List.

For example, as shown in fig. 1A, it is a schematic process diagram of the system of this embodiment for processing the NVMe hard disk device to access the host device. At the beginning stage in fig. 1A, the NVMe bridge device determines whether the first address space information is physical area page input information, i.e., whether SQ PRP1/PRP2 in the figure is PRP Entry. If SQ PRP1/PRP2 is not PRP Entry, then PRP _ Entry _ M [55-M:0] ═ PRP Entry is performed; PRP _ Entry _ M [55:55-M +1] ═ N; PRP _ Entry _ M [63:56] ═ RequestID. If SQ PRP1/PRP2 is PRP Entry, then PRP _ Entry _ M [55-M:0] ═ PRP Entry is performed; PRP _ Entry _ M [55:55-M +1] ═ 0; PRP _ Entry _ M [63:56] ═ RequestID. This example is illustrated by modifying the 64-bit PRP field, with M representing the number of bits used for the PRP List depth.

A second data processing command comprising second address space information is obtained by assigning a value to a partial bit field (PRP _ Entry _ M [55:55-M +1]) of the physical address space field information, and modifying the physical address space field information corresponding to the first address space information involved in the submit queue command.

The final mapping module obtains a second data processing command containing second address space information. And forwarding the second data processing command to the NVMe hard disk device. The second address space information contained by the second data processing command herein is actually referred to as a modified PRP field.

And the NVMe hard disk device is used for receiving the second data processing command and sending first request information for accessing the data in the host device to the proxy module based on the second data processing command. The request message is in the form of a TLP for direct memory access, which is a form specified for the request message required for data processing by the PCIe device. This process actually means that the NVMe hard disk device initiates a DMA request based on the modified PRP field pointing to the address.

The proxy module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information used for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and after the data access is carried out, providing a data access return result to the NVMe hard disk device. The target address space information actually refers to address space information where data are located inside the host device when the NVMe hard disk device performs data access on the host device.

In the above process, the receiving of the first request information by the proxy module actually means that the proxy module intercepts a TLP sent by the NVMe hard disk device, and takes the intercepted TLP as the received first request information.

And after receiving the first request information, the agent module modifies the second address space information according to the first request information to obtain target address space information for accessing data in the host equipment. As one embodiment of modifying the second address space information according to the first request information to obtain target address space information for accessing data in the host device: firstly, whether the assignment result of the mapping module to a part of the bit field is non-zero assignment is judged. Then, target address space information for accessing data in the host device is obtained according to the judgment result of whether the non-zero assignment is performed.

Specifically, obtaining the target address space information for accessing data in the host device according to the determination result of whether the assignment is non-zero may refer to: and if the assignment result is not the non-zero assignment, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and confirming the modified offset information in the page as target address space information.

Otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording label information used for accessing the host equipment and a value corresponding to the non-zero assignment of the identification information of the partial bit field; and confirming the modified offset information in the page, the label information and the identification information of the partial bit field as the target address space information corresponding to the non-zero assignment. And the identification information of the partial bit field is PF/VF ID coding information.

The specific above process is described as follows: with continued reference to FIG. 1A, NVMe hard disk device initiates address using modified PRP

After intercepting a TLP sent by an NVMe hard disk device, the proxy module determines whether PRP _ Entry _ M [55:55-M +1] ═ 0 is true, that is: whether the assignment result of the partial bit field is a non-zero assignment. If PRP _ Entry _ M [55:55-M +1] ═ 0 holds, i.e.: if the assignment result of part of the bit fields is not non-zero assignment, the page base offset is modified according to the PF/VF ID mapping table, namely: and restoring the Page base offset corresponding to the PF/VF again according to the PF/VF ID mapping table. If PRP _ Entry _ M [55:55-M +1] < 0 > does not hold, except that the PF/VF ID mapping table is restored to the Page base offset corresponding to the PF/VF again, the value corresponding to the Request tag, Data _ Addr _ Flag [ i ] and the non-zero assignment is recorded. The page base offset is intra-page offset information, the PF/VF ID mapping table is a mapping table of a preset physical channel/virtual channel, the Request tag is tag information for accessing a host device, the identification information of the partial bit field is Data _ Addr _ Flag [ i ], and Data _ Addr _ Flag [ i ] is the bit field of the PRP _ Entry _ M [55:55-M +1], which is the nesting depth of the PRP List. The Request ID is the bit field PRP _ Entry _ M [63:56], and the non-zero assignment corresponds to a value of N. The Request tag is stored in order to associate a response packet returned by the host device with a Request packet sent by the NVMe hard disk device, so that data in the response packet is modified by using data stored in the Request packet sent by the NVMe hard disk device before.

Regarding the modification of page base offset according to the PF/VF ID mapping table, it is realized by modifying the PRP field. The mapping module modifies the Page base offset field into PF/VF ID + Data _ Addr _ Flag + reserved field, wherein the reserved field refers to the bit field PRP _ Entry _ M [55-M:0], and the reserved field refers to a part of the PRP field which does not need to be modified. The NVMe hard disk device sends a DMA request using the address pointed by the modified PRP field, that is: and the NVMe hard disk equipment sends out first request information based on the second data processing command. And after intercepting the TLP sent by the NVMe hard disk device, the proxy module accesses the host device space according to the PF/VF ID of the address field. In the process, the proxy module judges whether the page of the DMA request is Data or a new PRP entry address pointed by the PRP list according to the Data _ Addr _ Flag. When Data _ Addr _ Flag is 0, that is: PRP _ Entry _ M [55:55-M +1] ═ 0 indicates that the address points to the final data. Otherwise, it indicates that the address points to the nesting depth of the PRP List.

When the page of the DMA request is not data, the entry in units of 8 bytes is included in the page. Wherein, if PRP _ Entry _ M [55:55-M +1] is greater than 1, i.e. N is greater than 1, then the last Entry is PRP list and the previous entries of the last Entry are PRP Entry. If PRP _ Entry _ M [55:55-M +1] is 1, i.e., N equals 1, then all entries in the page are of the PRP Entry type.

In addition, after the data access is performed, the agent module may provide the data access return result to the NVMe hard disk device as follows.

First, a data access return result for the first request information returned by the host device is obtained.

And then, judging whether the data access return result is data which needs to be accessed finally or intermediate address information, wherein the intermediate address information is the return result which needs the NVMe hard disk equipment to send the first request information again.

If the data access return result is the data which needs to be accessed finally, the data which needs to be accessed finally is directly provided for the NVMe hard disk equipment so that the data which needs to be accessed finally can be stored by the NVMe hard disk equipment; and if the data access return result is the intermediate address information, modifying the intermediate address information, and providing the modified intermediate address information to the NVMe hard disk device so that the NVMe hard disk device can send the first request information again.

Specifically, the intermediate address information is modified, and the modified intermediate address information is provided to the NVMe hard disk device, including the following processes:

judging whether the intermediate address information is the last address of the physical area page or not;

if the intermediate address information is not the last address of the physical area page, carrying out zero assignment on partial bit fields of the intermediate address information to obtain modified intermediate address information; and providing the modified intermediate address information to the NVMe hard disk device.

If the intermediate address information is the last address of the physical area page, carrying out value subtraction 1 assignment on a part of bit domains of the intermediate address information according to the non-zero assignment to obtain modified intermediate address information; and providing the modified intermediate address information to the NVMe hard disk device.

The modification of the intermediate address information is specifically as follows: after the agent module sends the data access request information to the host device, the host device returns a data access return result, and the agent module intercepts the data access return result. And the data access return result is the completion message.

When the agent module receives a completion message corresponding to the recorded Request tag returned by the host equipment, namely the completion message is matched with the recorded Request tag, the PRP field in the completion message is modified into a PF/VF ID + Data _ Addr _ Flag [ i ] -1+ reserved field. Specifically, when the PRP field is modified, it needs to be determined whether the completion packet returned by the host device is the last completion packet, that is: judging whether the intermediate address information is the last address of the physical area page or not, if so, executing PRP _ Entry _ M [55-M:0] ═ PRP Entry; PRP _ Entry _ M [55:55-M +1] ═ N-1; PRP _ Entry _ M [63:56] ═ RequestID. If not, PRP _ Entry _ M [55-M:0] ═ PRP Entry is performed; PRP _ Entry _ M [55:55-M +1] ═ 0; PRP _ Entry _ M [63:56] ═ RequestID. After the PRP field is modified, the agent module provides the modified PRP field to the NVMe hard disk device so that the NVMe hard disk device can send out the first request information again.

In the above process, it is necessary to determine whether the data access return result is data that needs to be accessed finally or intermediate address information. The following definitions are made for the data and the intermediate address information that are to be accessed finally: if the completion message returned by the host equipment is not matched with the recorded Request tag, the returned result of data access is confirmed to be the data which needs to be accessed finally; and if the completion message returned by the host equipment is matched with the recorded Request tag, confirming that the returned result of the data access is the intermediate address information.

The agent module receives first request information sent by the NVMe hard disk device for accessing data in the host device, and also receives second request information sent by the NVMe hard disk device for accessing the memory space of the NVMe bridge device. In this embodiment, the second request information is request information that the NVMe hard disk device uses to access a cache command in the memory space of the NVMe bridge device.

FIG. 1B is a schematic diagram illustrating storage locations of data information and command information in the present embodiment. As can be seen in fig. 1B, from the visual angle of the memory of the NVMe hard disk device controller, data information is cached in the memory space of the host device, and the data information includes SQ Buffer and CQ Buffer in the figure, that is, the commit Buffer queue and the complete Buffer queue.

And the command information is cached in the memory space of the NVMe bridge equipment. Specifically, the data information is cached in the memory space of the host device, and the command information is cached in the memory space of the NVMe bridge device based on the mapping module. The command information includes Admin SQ/CQ illustrated in the figure, namely: commit management queue/completion management queue, and I/O SQ and I/O CQ, namely: commit the input/output queue, and complete the input/output queue.

Specifically, the mapping module, after mapping first address space information related in the submission queue command, caches second address space information in the memory space of the NVMe bridge device. The second address space information is one type of command information.

Meanwhile, the mapping module is further configured to obtain a data cache address space sent by the host device, map the data cache address space, and provide the mapped data cache address space to the host device, so as to cache the mapped data cache address space in a memory space of the host device. The mapped data cache address space is one type of data information.

In this embodiment, the command information may refer to the first data processing command and the second data processing command. Thus, when the data processing system of the embodiment is used for data processing, the NVMe bridge device is only responsible for processing the data processing command and forwarding and processing the data access request information, and provides the data processing command to the NVMe hard disk device. And as for the forwarding of the data information, the forwarding is actually only performed between the host device and the NVMe hard disk device, so that the NVMe bridge device does not need to cache the data information again, and then forwards the data information to the NVMe hard disk device. Thus, latency problems can be reduced. Meanwhile, the NVMe bridge equipment does not need to cache data information, so that the NVMe bridge equipment does not need to hang a large-capacity external memory, extra power consumption is reduced, and resources are saved.

The agent module is responsible for receiving the first request message and the second request message. Therefore, after receiving the request information sent by the NVMe hard disk device, it is necessary to determine in advance whether the request information is the first request information or the second request information.

And if the request information is the first request information, forwarding the request information to the host equipment so as to access the data in the memory space of the host equipment. Otherwise, forwarding the request information to the NVMe bridge device to access the cache command in the memory space of the NVMe bridge device. Of course, when the request message is the second request message, the request message is forwarded to the NVMe bridge device.

In addition, the NVMe bridge equipment also comprises a switching module and a traversing module; the switching module is used for connecting the host device and the NVMe bridge device so as to forward the data processing command and the data access request information between the host device and the NVMe bridge device. The traversal module is used for connecting the mapping module and the NVMe hard disk device, so that the second data processing command mapped by the mapping module is forwarded to the NVMe hard disk device through the traversal module. Meanwhile, PCIe interfaces are adopted among the modules, between the modules and host equipment and between the modules and NVMe hard disk equipment. In addition, the command forwarding of the mapping module and the switching module and the traversing module in the substrate are realized through the first interface.

In the data processing system of this embodiment, the NVMe bridge device is only responsible for processing the data processing command and forwarding and processing the data access request information, and processing the data processing command means: the mapping module in the NVMe bridge equipment is used for mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information; and providing the second data processing command to the NVMe hard disk device; forwarding and processing data access request information refers to: the proxy module is used for receiving the first request information, modifying the second address space information according to the first request information, obtaining target address space information used for accessing data in the host equipment, and performing data access in the host equipment based on the target address space information; and after the data access is carried out, providing a data access return result to the NVMe hard disk device. Therefore, the NVMe bridge equipment in the system of the embodiment does not need to cache data in the host or the NVMe hard disk equipment, so that the delay problem is reduced, extra power consumption is reduced, and resources are saved.

Second embodiment

A second embodiment of the present application provides a data processing method. The main execution body of the method is the mapping module in the first embodiment, and since the steps executed by the mapping module are described in detail in the system of the first embodiment, the description is relatively simple here, and relevant points can be referred to the description of relevant parts of the first embodiment. The embodiments described below are merely illustrative. Fig. 2 is a flowchart of a data processing method according to a second embodiment of the present application, which is described below with reference to fig. 2.

The present embodiment provides a data processing method, including:

step S201: and receiving a first data processing command sent by the host device.

In this embodiment, the first data processing command refers to a commit queue command related to data access stored in the host device. Therefore, the first data processing command sent by the receiving host device refers to a commit queue command sent by the receiving host device.

Step S202: and mapping the first address space information contained in the first data processing command to obtain a second data processing command containing second address space information, and providing the second data processing command to the NVMe hard disk device.

The second address space information is the address space information obtained by the mapping of the first address space information; the first address space information is physical address space information of the host device.

Since the first data processing command refers to a commit queue command related to data access stored in the host device, mapping the first address space information included in the first data processing command to obtain the second data processing command including the second address space information may be: and mapping the first address space information related in the submission queue command to obtain a second data processing command containing second address space information.

Specifically, one embodiment of mapping first address space information contained in a first data processing command to obtain a second data processing command containing second address space information:

first, first address space information involved in a commit queue command is obtained. Then, modifying the physical address area field information corresponding to the first address space information related in the submitted queue command to obtain modified address area field information; the command containing the modified address field information is treated as a second data processing command containing second address space information.

Before modifying the physical address area field information corresponding to the first address space information related to the submission queue command, obtaining a judgment result provided by the NVMe bridge device for judging whether the first address space information is physical area page input information, and modifying the physical address area field information corresponding to the first address space information related to the submission queue command according to the judgment result.

Specifically, the physical address area field information corresponding to the first address space information related in the submission queue command is modified according to the judgment result as follows: and if the judgment result is that the first address space information is the physical area page input information, carrying out zero assignment on part of bit fields of the physical address area field information. And if the judgment result is that the first address space information is not the physical area page input information, carrying out non-zero assignment on partial bit fields of the physical address area field information.

Further, after mapping the first address space information involved in the submit queue command, the second address space information is provided to the NVMe bridge device memory space, so that the second address space information is cached in the NVMe bridge device memory space.

In addition, a data cache address space sent by the host device is obtained, the data cache address space is mapped, and the mapped data cache address space is provided for the host device so as to cache the mapped data cache address space in the memory space of the host device.

Third embodiment

A third embodiment of the present application provides a data processing method. The execution main body of the method is the agent module in the first embodiment, and since the steps executed by the agent module are described in detail in the system of the first embodiment, the description is relatively simple here, and relevant points can be referred to the description of relevant parts of the first embodiment. The embodiments described below are merely illustrative. Fig. 3 is a flowchart of a data processing method according to a third embodiment of the present application, which is described below with reference to fig. 3.

The present embodiment provides a data processing method, including:

step S301: first request information for accessing data in the host equipment, which is sent by the NVMe hard disk equipment, is received.

In the above process, the agent module may receive, in addition to the first request information for accessing data in the host device sent by the NVMe hard disk device, second request information for accessing the memory space of the NVMe bridge device by the NVMe hard disk device. The second request message is request message of the NVMe hard disk device for accessing a cache command in the memory space of the NVMe bridge device.

Besides receiving first request information sent by the NVMe hard disk device for accessing data in the host device, the agent module can also receive second request information sent by the NVMe hard disk device for accessing the memory space of the NVMe bridge device. Therefore, after receiving the request information sent by the NVMe hard disk device, it is determined whether the request information is the first request information or the second request information.

Specifically, if the request information is first request information, forwarding the request information to the host device to access data in a memory space of the host device; otherwise, forwarding the request information to the NVMe bridge device to access the cache command in the memory space of the NVMe bridge device.

Step S302: and modifying the second address space information provided by the mapping module according to the first request information to obtain target address space information for accessing data in the host equipment.

In this embodiment, the second address space information is address space information obtained by mapping physical address space information of the host device by using the mapping module.

As one way to obtain target address space information for accessing data in the host device by modifying the second address space information provided by the mapping module according to the first request information: firstly, obtaining modification result information of physical address area field information corresponding to physical address space information of host equipment, which is provided by a mapping module; and then judging whether the non-zero assignment is performed based on the modification result, and performing different processing according to the judgment result of whether the non-zero assignment is performed to obtain the target address space information.

Specifically, if the modification result information is not a non-zero assignment, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and confirming the modified offset information in the page as target address space information;

otherwise, modifying the offset information in the page according to a preset mapping table of the physical channel/virtual channel, and recording label information used for accessing the host equipment and a value corresponding to the non-zero assignment of the identification information of the partial bit field; and confirming the modified offset information in the page, the label information and the identification information of the partial bit field as the target address space information corresponding to the non-zero assignment.

Step S303: and performing data access in the host equipment based on the target address space information, obtaining a data access return result, and providing the data access return result for the NVMe hard disk equipment.

Specifically, the data access return result is provided to the NVMe hard disk device, which may be as follows: first, a data access return result for the first request information returned by the host device is obtained. And then judging whether the data access return result is data which needs to be accessed finally or intermediate address information. The intermediate address information refers to a return result of the first request information which needs to be sent again by the NVMe hard disk device;

and if the data access return result is the data which needs to be accessed finally, directly providing the data which needs to be accessed finally to the NVMe hard disk device for the NVMe hard disk device to store the data which needs to be accessed finally. And if the data access return result is the intermediate address information, modifying the intermediate address information, and providing the modified intermediate address information to the NVMe hard disk device so that the NVMe hard disk device can send the first request information again.

More specifically, as one embodiment of modifying the intermediate address information and providing the modified intermediate address information to the NVMe hard disk device: and judging whether the intermediate address information is the last address of the physical area page.

If the intermediate address information is not the last address of the physical area page, carrying out zero assignment on partial bit fields of the intermediate address information to obtain modified intermediate address information; providing the modified intermediate address information to NVMe hard disk equipment;

Fourth embodiment

In the second embodiment described above, a data processing method is provided, and correspondingly, a fourth embodiment of the present application provides a data processing apparatus. Fig. 4 is a schematic diagram of a data processing apparatus according to a fourth embodiment of the present application. Since the apparatus embodiments are substantially similar to the method embodiments, they are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for relevant points. The device embodiments described below are merely illustrative.

The present embodiment provides a data processing apparatus, including:

a command receiving unit 401, configured to receive a first data processing command sent by a host device;

a mapping unit 402, configured to map first address space information included in the first data processing command, and obtain a second data processing command including second address space information;

a command providing unit 403, configured to provide the second data processing command to the NVMe system device;

the command receiving unit is specifically configured to: receiving the submission queue command sent by the host device;

the mapping unit is specifically configured to: and mapping first address space information related in the submission queue command to obtain a second data processing command containing second address space information.

Optionally, the mapping unit is specifically configured to:

obtaining first address space information involved in the submit queue command;

Optionally, the mapping unit is further configured to: before modifying the physical address area field information corresponding to the first address space information related in the submission queue command, obtaining a judgment result provided by the NVMe bridge device for judging whether the first address space information is physical area page input information;

Optionally, the mobile terminal further includes a first storage unit, where the first storage unit is specifically configured to: after mapping the first address space information related in the submission queue command, caching the second address space information in the memory space of the NVMe bridge device.

Optionally, the system further comprises a second storage unit;

the mapping unit is specifically configured to: obtaining a data cache address space sent by the host device, and mapping the data cache address space;

the second storage unit is specifically configured to: and providing the mapped data cache address space to the host device for caching the mapped data cache address space in the memory space of the host device.

Fifth embodiment

In the third embodiment described above, a data processing method is provided, and correspondingly, a fifth embodiment of the present application provides a data processing apparatus. Fig. 5 is a schematic diagram of a data processing apparatus according to a fifth embodiment of the present application. Since the apparatus embodiments are substantially similar to the method embodiments, they are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for relevant points. The device embodiments described below are merely illustrative.

The present embodiment provides a data processing apparatus, including:

a request receiving unit 501, configured to receive first request information for accessing data in a host device, where the first request information is sent by an NVMe system device;

a modifying unit 502, configured to modify the second address space information provided by the mapping module according to the first request information, and obtain target address space information for accessing data in the host device; the second address space information is address space information obtained by mapping physical address space information of the host equipment by using the mapping module;

a return result obtaining unit 503, configured to perform data access in the host device based on the target address space information, and obtain a data access return result;

a return result providing unit 504, configured to provide the data access return result to the NVMe system device.

Optionally, the system further comprises a second request information receiving unit; the second request information receiving unit is specifically configured to: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request message refers to a request message used by the NVMe system device to access a cache command in the memory space of the NVMe bridge device.

Optionally, the system further comprises a judging unit and a forwarding unit; the judging unit is specifically configured to: after request information sent by the NVMe system equipment is received, judging whether the request information is the first request information or the second request information;

the forwarding unit is specifically configured to: if the request information is the first request information, forwarding the request information to the host equipment so as to access the data in the memory space of the host equipment; and otherwise, forwarding the request information to the NVMe bridge equipment to access the cache command in the memory space of the NVMe bridge equipment.

Optionally, the modifying unit is specifically configured to:

Optionally, the returned result providing unit is specifically configured to:

Sixth embodiment

Corresponding to the methods of the second to third embodiments of the present application, a sixth embodiment of the present application further provides an electronic device. Fig. 6 is a schematic view of an electronic device according to a sixth embodiment of the present application.

The electronic device includes:

a processor 601; and

a memory 602 for storing a computer program to be executed by the processor for performing the methods of the second to third embodiments.

Seventh embodiment

In correspondence with the methods of the second to third embodiments of the present application, a seventh embodiment of the present application further provides a storage medium storing a computer program that is executed by a processor to perform the methods of the second to third embodiments.

Although the present application has been described with reference to the preferred embodiments, it is not intended to limit the present application, and those skilled in the art can make variations and modifications without departing from the spirit and scope of the present application, therefore, the scope of the present application should be determined by the claims that follow.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory. The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

1. Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer-readable medium does not include non-transitory computer-readable storage media (non-transitory computer readable storage media), such as modulated data signals and carrier waves.

2. As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

Claims

1. A data processing system, comprising: the system comprises host equipment, NVMe system equipment and NVMe bridge equipment; the NVMe bridge equipment comprises a mapping module and an agent module;

2. The system of claim 1, wherein the agent module is further configured to: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request message refers to a request message used by the NVMe system device to access a cache command in the memory space of the NVMe bridge device.

3. The system according to claim 2, wherein the agent module determines whether the request information is the first request information or the second request information after receiving the request information sent by the NVMe system device;

4. The system of claim 1, wherein the first data processing command is a commit queue command stored in the host device that relates to data access;

receiving the submission queue command sent by the host device;

5. The system of claim 4, wherein mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information comprises:

obtaining first address space information involved in the submit queue command;

6. The system according to claim 5, wherein before modifying the physical address area field information corresponding to the first address space information involved in the submission queue command, the NVMe bridge device determines whether the first address space information is physical area page input information, and provides the determination result to the mapping module;

7. The system of claim 6, wherein the agent module modifies the second address space information according to the first request information to obtain target address space information for accessing data in the host device, comprising:

8. The system of claim 7, wherein providing the data access return to the NVMe system device after the data access comprises:

9. The system of claim 8, wherein the modifying the intermediate address information and providing the modified intermediate address information to the NVMe system device comprises:

10. The system of claim 4, wherein the mapping module caches the second address space information in the NVMe bridge device memory space after mapping the first address space information involved in the submit queue command.

11. The system according to claim 4, wherein the mapping module is further configured to obtain a data cache address space sent by the host device, map the data cache address space, and provide the mapped data cache address space to the host device, so as to cache the mapped data cache address space in the memory space of the host device.

12. The system of claim 1, wherein the NVMe bridge apparatus further comprises a patching module; the switching module is used for connecting the host device and the NVMe bridge device so as to forward a data processing command and data access request information between the host device and the NVMe bridge device.

13. A data processing method, comprising:

receiving a first data processing command sent by host equipment;

14. The method of claim 13, wherein the first data processing command is a commit queue command stored in the host device that relates to data access;

receiving the submission queue command sent by the host device;

15. The method of claim 14, wherein mapping first address space information contained in the first data processing command to obtain a second data processing command containing second address space information comprises:

obtaining first address space information involved in the submit queue command;

16. The method according to claim 15, wherein before modifying the physical address area field information corresponding to the first address space information involved in the submission queue command, a determination result provided by the NVMe bridge device to determine whether the first address space information is physical area page input information is obtained;

17. The method of claim 14, further comprising: after mapping the first address space information related in the submission queue command, caching the second address space information in the memory space of the NVMe bridge device.

18. The method of claim 14, further comprising: and obtaining a data cache address space sent by the host equipment, mapping the data cache address space, and providing the mapped data cache address space for the host equipment so as to cache the mapped data cache address space in the memory space of the host equipment.

19. A data processing method, comprising:

20. The method of claim 19, further comprising: receiving second request information of the NVMe system equipment for accessing the memory space of the NVMe bridge equipment; the second request message refers to a request message used by the NVMe system device to access a cache command in the memory space of the NVMe bridge device.

21. The method according to claim 20, wherein after receiving request information sent by the NVMe system device, determining whether the request information is the first request information or the second request information;

22. The method of claim 19, wherein modifying the second address space information provided by the mapping module according to the first request information to obtain target address space information for accessing data in the host device comprises:

23. The method of claim 22, wherein providing the data access return to the NVMe system device comprises:

24. The method of claim 23, wherein the modifying the intermediate address information and providing the modified intermediate address information to the NVMe system device comprises:

25. A data processing apparatus, comprising:

26. A data processing apparatus, comprising:

27. An electronic device, comprising:

a processor;

a memory for storing a computer program for execution by the processor to perform the method of any one of claims 13 to 24.

28. A computer storage medium, characterized in that the computer storage medium stores a computer program which is executed by a processor for performing the method of any one of claims 13-24.