CN113268439A

CN113268439A - Memory address searching method and device, electronic equipment and storage medium

Info

Publication number: CN113268439A
Application number: CN202110580065.8A
Authority: CN
Inventors: 邱海港
Original assignee: Beijing Kingsoft Cloud Network Technology Co Ltd
Current assignee: Beijing Kingsoft Cloud Network Technology Co Ltd
Priority date: 2021-05-26
Filing date: 2021-05-26
Publication date: 2021-08-17

Abstract

The application provides a method and a device for searching a memory address, an electronic device and a storage medium, wherein the method comprises the following steps: acquiring a first memory address from a target memory address set, wherein the target memory address set comprises memory addresses distributed for a target database; searching a first position corresponding to a first hash value of a first memory address in the target linked list, and storing the memory address released for the target database in the position corresponding to the hash value of the released memory address in the target linked list; and under the condition that the matched address of the first memory address is not found at the first position, determining the first memory address as an unreleased memory address, wherein the matched address of the first memory address is the same as the first memory address and is not matched with the memory address allocated for the target database. By the method and the device, the problem that in the related technology, the searching speed is low due to the fact that the number of the memory addresses is too large in the searching mode of the memory addresses is solved.

Description

Memory address searching method and device, electronic equipment and storage medium

Technical Field

The present application relates to the field of internet technologies, and in particular, to a method and an apparatus for searching a memory address, an electronic device, and a storage medium.

Background

At present, in business logic (for example, use of memory cache) of a database such as MySQL (a relational database management system), memory spaces used for querying data, updating data, and the like are all generated by malloc (memory allocation function) allocation, that is, all memory spaces are completed by dynamic application.

The service logic uses temporary memory, and after a transaction or a connection is completed, the dynamically applied memory space is completely released (free). During a transaction, a large number of memory applications are released (millions of malloc memory times in 10 minutes), and a large amount of memory fragments are caused by frequent application release for a long time. Taking MySQL as an example, after a period of use, the memory occupied by the MySQL procedure grows too fast, thereby affecting the utilization rate of the memory.

In order to improve the utilization rate of the memory, the memory which is not released after the application can be searched in a mode of matching the memory addresses of malloc and free, so that an analysis basis is provided for the use of the memory and the like. In the frequent malloc and free processes, a large number of repeated addresses exist in the memory address of the malloc. After the memory addresses of malloc and free are printed, the number can reach millions or more, wherein the number of repeated addresses can reach even tens of thousands. In tens of thousands of levels of repeated addresses, free addresses are filtered one by one, and the searching speed is slow.

Therefore, the problem of slow search speed caused by the overlarge number of the memory addresses exists in the search mode of the memory addresses in the related technology.

Disclosure of Invention

The application provides a method and a device for searching a memory address, electronic equipment and a storage medium, which are used for at least solving the problem that the searching speed is slow due to the fact that the number of the memory addresses is too large in the searching mode of the memory address in the related technology.

According to an aspect of the embodiments of the present application, a method for searching a memory address is provided, including: acquiring a first memory address from a target memory address set, wherein the target memory address set comprises memory addresses distributed for a target database; searching a first position corresponding to a first hash value of the first memory address in a target linked list, wherein the memory address released for the target database is stored in the target linked list at the position corresponding to the hash value of the released memory address; and determining the first memory address as an unreleased memory address under the condition that a matching address of the first memory address is not found in the first position, wherein the matching address of the first memory address is the same as the first memory address and is not matched with the memory address allocated to the target database.

Optionally, before the obtaining the first memory address from the target memory address set, the method further includes: acquiring a target log file, wherein a first log for allocating a memory address to the target database and a second log for releasing the memory address to the target database are stored in the target log file; and distributing the first log to a first log file, and distributing the second log to a second log file, wherein the target memory address set is obtained by reading the first log file, and the target linked list is generated after reading the second log file.

Optionally, the searching at the first position corresponding to the first hash value of the first memory address in the target linked list includes: searching a memory address stored in a first node located at the first position in the target linked list; and searching memory addresses stored in child nodes located at various positions in the first child list under the condition that the memory addresses stored in the first node are different from the first memory address and the first node has an associated first child list, wherein the first child list is used for storing the memory addresses of which the hash values corresponding to the memory addresses released for the target database are the first hash values.

Optionally, after the searching is performed at the first position corresponding to the first hash value of the first memory address in the target linked list, the method further includes: determining to find a matching address of the first memory address under the condition that the memory address stored in the first node is the same as the first memory address; modifying the memory address stored in the first node into a target identifier; under the condition that the memory address stored in a first child node located at a first child position in the first child chain table is the same as the first memory address, determining to find out a matching address of the first memory address; modifying the memory address stored in the first child node into a target identifier; the target identifier is used for indicating that the memory address stored by the current node is matched with the memory address allocated to the target database.

Optionally, in the process of searching for the memory addresses stored in the child nodes located at the respective positions in the first child chain table, the method further includes: and deleting the second child node from the first child chain table under the condition that the memory address stored in the second child node located at the second child position in the first child chain table is the target identifier.

Optionally, before the searching is performed at the first position corresponding to the first hash value of the first memory address in the target linked list, the method further includes: acquiring a second hash value of a second memory address, wherein the second memory address is a memory address released for the target database; and under the condition that a third memory address is stored in a second node located at a second position corresponding to the second hash value in the target linked list, storing the second memory address into a second sublink list associated with the second node, wherein the second sublink list is used for storing the memory address of the second hash value corresponding to the hash value in the memory addresses released for the target database.

Optionally, the target pointer of the second node points to a head node of the second child chain table; said storing the second memory address into a second sublink table associated with the second node comprises: storing the second memory address into a third child node, wherein the third child node is a node generated for storing the second memory address; updating the third child node to be a head node of the second child chain table and updating the target pointer to point to the third child node.

Optionally, after the searching is performed at the first position corresponding to the first hash value of the first memory address in the target linked list, the method further includes: and generating a target statistical result according to all unreleased memory addresses in the target memory address set, wherein the target statistical result is used for describing all unreleased memory spaces in the memory space allocated for the target database.

According to another aspect of the embodiments of the present application, there is provided a device for searching a memory address, including: the system comprises a first obtaining unit, a second obtaining unit and a third obtaining unit, wherein the first obtaining unit is used for obtaining a first memory address from a target memory address set, and the target memory address set comprises memory addresses distributed for a target database; the searching unit is used for searching a first position corresponding to a first hash value of the first memory address in a target linked list, wherein the memory address released for the target database is stored in the position corresponding to the hash value of the released memory address in the target linked list; a first determining unit, configured to determine that the first memory address is an unreleased memory address when a matching address of the first memory address is not found in the first location, where the matching address of the first memory address is a memory address that is the same as the first memory address and does not match a memory address allocated to the target database.

Optionally, the apparatus further comprises: a second obtaining unit, configured to obtain a target log file before obtaining the first memory address from the target memory address set, where the target log file stores a first log that allocates a memory address to the target database and a second log that releases a memory address for the target database; a distribution unit, configured to distribute the first log to a first log file, and distribute the second log to a second log file, where the target memory address set is obtained by reading the first log file, and the target linked list is generated after reading the second log file.

Optionally, the search unit includes: the first searching module is used for searching a memory address stored in a first node located at the first position in the target linked list; a second searching module, configured to search, when the memory address stored in the first node is different from the first memory address and the first node has an associated first sublink table, the memory addresses stored in the child nodes located at various positions in the first sublink table, where the first sublink table is used to store the memory address of which the hash value corresponding to the memory address released for the target database is the first hash value.

Optionally, the apparatus further comprises: a second determining unit, configured to determine, after the searching is performed at the first location in the target linked list corresponding to the first hash value of the first memory address, a matching address of the first memory address to be searched when the memory address stored in the first node is the same as the first memory address; modifying the memory address stored in the first node into a target identifier; a third determining unit, configured to determine, when a memory address stored in a first child node located in a first child position in the first child link table is the same as the first memory address, a matching address for finding the first memory address; modifying the memory address stored in the first child node into a target identifier; the target identifier is used for indicating that the memory address stored by the current node is matched with the memory address allocated to the target database.

Optionally, the apparatus further comprises: a deleting unit, configured to, in the process of searching for the memory address stored in the child node located at each position in the first child chain table, delete the second child node from the first child chain table when the memory address stored in the second child node located at the second child position in the first child chain table is the target identifier.

Optionally, the apparatus further comprises: a third obtaining unit, configured to obtain a second hash value of a second memory address before searching for the first location in the target linked list corresponding to the first hash value of the first memory address, where the second memory address is a memory address released for the target database; a storage unit, configured to store a second memory address into a second sublink table associated with a second node when a third memory address is stored in the second node located at a second position corresponding to the second hash value in the target linked list, where the second sublink table is used to store a memory address of the second hash value corresponding to a hash value released for the memory address of the target database.

Optionally, the target pointer of the second node points to a head node of the second child chain table; the memory cell includes: a storage module, configured to store the second memory address into a third child node, where the third child node is a node generated for storing the second memory address; an update module to update the third child node to be a head node of the second child chain table and to update the target pointer to point to the third child node.

Optionally, the apparatus further comprises: and a generating unit, configured to generate a target statistical result according to all unreleased memory addresses in the target memory address set after searching a first position corresponding to the first hash value of the first memory address in the target linked list, where the target statistical result is used to describe all unreleased memory spaces in the memory space allocated to the target database.

According to another aspect of the embodiments of the present application, there is also provided an electronic device, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory communicate with each other through the communication bus; wherein the memory is used for storing the computer program; a processor for performing the method steps in any of the above embodiments by running the computer program stored on the memory.

According to a further aspect of the embodiments of the present application, there is also provided a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to perform the method steps of any of the above embodiments when the computer program is executed.

In the embodiment of the application, a first memory address is acquired from a target memory address set by using a linked list to store the memory address released by the database according to a hash value, wherein the target memory address set comprises memory addresses allocated to a target database; searching a first position corresponding to a first hash value of a first memory address in a target linked list, wherein the memory address released for the target database is stored in the target linked list at the position corresponding to the hash value of the released memory address; under the condition that the matching address of the first memory address is not found at the first position, the first memory address is determined to be an unreleased memory address, wherein the matching address of the first memory address is the same as the first memory address and is not matched with the memory address allocated for the target database, and the memory address released for the database is stored in the linked list according to the hash value, so that the purpose of reducing the number of the memory addresses required to be found for finding the memory address can be achieved, the technical effect of improving the finding speed of the memory address is achieved, and the problem of slow finding speed caused by the overlarge number of the memory addresses in the finding mode of the memory address in the related technology is solved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.

Fig. 1 is a schematic diagram of a hardware environment of an optional memory address lookup method according to an embodiment of the present application;

fig. 2 is a schematic flowchart of a method for searching an optional memory address according to an embodiment of the present disclosure;

fig. 3 is a schematic diagram of an optional memory address lookup method according to an embodiment of the present application;

FIG. 4 is a diagram illustrating an alternative method for searching for a memory address according to an embodiment of the present disclosure;

fig. 5 is a schematic flowchart of another optional memory address lookup method according to an embodiment of the present application;

fig. 6 is a block diagram illustrating a structure of an alternative memory address lookup apparatus according to an embodiment of the present disclosure;

fig. 7 is a block diagram of an alternative electronic device according to an embodiment of the present application.

Detailed Description

In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

According to an aspect of the embodiments of the present application, a method for searching a memory address is provided. Optionally, in this embodiment, the method for searching for a memory address may be applied to a hardware environment formed by the terminal 102 and the server 104 as shown in fig. 1. As shown in fig. 1, the server 104 is connected to the terminal 102 through a network, and may be configured to provide services (e.g., game services, application services, etc.) for the terminal or a client installed on the terminal, and may be configured with a database on the server or separately from the server, and configured to provide data storage services for the server 104.

The network may include, but is not limited to, at least one of: wired networks, wireless networks. The wired network may include, but is not limited to, at least one of: wide area networks, metropolitan area networks, local area networks, which may include, but are not limited to, at least one of the following: WIFI (Wireless Fidelity), bluetooth. The terminal 102 may not be limited to a PC, a mobile phone, a tablet computer, etc.

The method for searching for a memory address in the embodiment of the present application may be executed by the server 104, or may be executed by the terminal 102, or may be executed by both the server 104 and the terminal 102. The method for searching for the memory address performed by the terminal 102 according to the embodiment of the present application may also be performed by a client installed thereon.

Taking the method for searching for a memory address in this embodiment executed by the server 104 as an example, fig. 2 is a schematic flow chart of a method for searching for a selectable memory address according to this embodiment, and as shown in fig. 2, the flow of the method may include the following steps:

step S202 is to acquire a first memory address from a target memory address set, where the target memory address set includes a memory address allocated to a target database.

The method for searching for a memory address in this embodiment may be applied to a scenario in which an unreleased memory address is searched from memory addresses allocated to a database, for example, a scenario in which an unreleased memory address is searched from memory addresses of a malloc database such as MySQL. In this embodiment, whether the malloc memory is released after being detected is applied to a database (for example, MySQL) is described as an example, and the method for searching the memory address in this embodiment is also applicable to other similar scenarios.

The target device may first obtain a target set of memory addresses (e.g., load the memory addresses of malloc into memory) that includes the memory addresses allocated for the target database. The target device may be a target server, e.g. a database server, which may be a database server running a database application of a target database.

The target memory address set may include memory addresses allocated to the target database within a certain time period, for example, the target memory address set may include memory addresses allocated to the target database within the target time period, and for example, the target memory address set may include memory addresses allocated to the target database within the target time period and memory addresses allocated to the target database which remain unmatched within a time period before the target time period.

For each memory address in the target memory address set, the target device may sequentially determine whether a memory address matching the memory address exists in the memory addresses released by the target database. For example, the target device may obtain a first memory address from the target memory address set, where the first memory address may be any one memory address in the target memory address set.

Step S204, a first location in the target linked list corresponding to the first hash value of the first memory address is searched, wherein the memory address released for the target database is stored in the target linked list at the location corresponding to the hash value of the released memory address.

The target device may store the memory addresses released for the target database using the target linked list, and each memory address released for the target database may be stored in a position in the target linked list corresponding to the hash value of the released memory address. One position in the target linked list may be a node of the target linked list. One or more memory addresses released for the target database may or may not be stored at one location in the target linked list.

Optionally, the memory address released for the target database may also be stored in the target array, and the storage manner may also be: the memory address released for the target database is stored in the target data at the position corresponding to the hash value of the released memory address, and the memory address is stored through the linked list, so that the operation flexibility is higher compared with an array.

Here, when there are a plurality of memory addresses stored in one location, the plurality of memory addresses may be the same memory address or different memory addresses. The plurality of memory addresses at the same position may be stored separately by a target separator (e.g., a space, an asterisk, etc.), or may be stored in a sublink manner, and correspondingly, only one memory address may be stored in a node at each position in the target linked list and a child node at each child position in the sublink.

For the first memory address, the target device may first perform hash calculation on the first memory address to obtain a first hash value. The first hash value may be a hash value obtained by performing hash remainder on the target value by the first memory address, where the target value is the total number of nodes included in the target linked list. Each hash value may correspond to a location in the target linked list, and the target device may perform a lookup at a first location in the target linked list corresponding to the first hash value, e.g., at the first location in the target linked list having the first hash value as a subscript.

In step S206, when the matching address of the first memory address is not found in the first location, the first memory address is determined to be an unreleased memory address, where the matching address of the first memory address is the same as the first memory address and is not matched with the memory address allocated to the target database.

Due to frequent memory application and release, the memory address allocated to the target database may have a plurality of duplicate addresses, and the memory address released for the target database may also have a plurality of duplicate addresses, and the target device may determine whether a matching address of the first memory address, that is, a memory address that is the same as the first memory address and that has not been matched with the memory address allocated to the target database, is found from the first location.

If the matching address of the first memory address is found in the first location, the target device may mark the matching address of the first memory address as a matched state, for example, update the matching address of the first memory address to a target identifier, or add a specific identifier (for example, add 0) before or after the matching address of the first memory address to identify that the memory address has been matched with the memory address allocated for the target database.

If the matching address of the first memory address is not found in the first location, the target device may determine that the first memory address is an unreleased memory address, and print the first memory address. The memory address can be printed asynchronously and output to the target log, and the target log can be a log in a disk or a log in a memory.

After the first memory address, if there are other memory addresses in the target memory address set, the target device may determine in a similar manner whether the memory address is an unreleased memory address. After all memory addresses in the target memory address set have been matched, the target device may obtain all unreleased memory addresses in the target memory address set.

Through the steps S202 to S206, a first memory address is obtained from a target memory address set, where the target memory address set includes a memory address allocated to a target database; searching a first position corresponding to a first hash value of a first memory address in a target linked list, wherein the memory address released for the target database is stored in the target linked list at the position corresponding to the hash value of the released memory address; under the condition that the matched address of the first memory address is not found at the first position, the first memory address is determined to be an unreleased memory address, wherein the matched address of the first memory address is the same as the first memory address and is not matched with the memory address allocated for the target database, the problem of slow searching speed caused by the overlarge number of the memory addresses in a searching mode of the memory addresses in the related technology is solved, and the searching speed of the memory addresses is improved.

As an optional embodiment, before acquiring the first memory address from the target memory address set, the method further includes:

s11, acquiring a target log file, wherein the target log file stores a first log for allocating memory addresses to a target database and a second log for releasing the memory addresses to the target database;

and S12, distributing the first log to a first log file and distributing the second log to a second log file, wherein the target memory address set is obtained by reading the first log file, and the target linked list is generated after reading the second log file.

In this embodiment, a log (i.e., a first log) of memory address allocation operations for the target database and a log (i.e., a second log) of memory address release operations for the target database may be added. All logs that start to be output are in one log file (i.e., a target log file), and the target device may first acquire the target log file.

All logs are inconvenient to search when being in a log file. To increase the speed of the lookup, the target device may distribute the first log and the second log into different log files, i.e., the first log to the first log file and the second log to the second log file.

The log distribution is performed according to keywords included in the logs, the first log may include a first keyword corresponding to memory address distribution, the second log may include a second keyword corresponding to memory address release, the target device may distribute the logs having the first keyword in the target log file to the first log file, and distribute the logs having the second keyword in the target log file to the second log file, thereby obtaining the first log file and the second log file.

The target memory address set may be obtained by reading the first log file, for example, the first log file may be read into the memory to obtain the first memory address set (i.e., the target memory address set). The target linked list is generated after reading the second log file, for example, the second log file may be read into a memory to obtain a second memory address set, where the second memory address set includes memory addresses allocated to the target database; and storing the memory addresses in the second memory address set to the positions corresponding to the hash values in the target linked list to obtain the target linked list.

Illustratively, the logs of the memory addresses of malloc and free operations may be added in the database program, and the memory addresses of malloc and free may be printed first in the database program. Here, the malloc printing format includes a thread address thread, a type malloc, a module type key stored in the database, a size of the application memory, and an address ptr of the application memory, and the free printing format includes a thread address thread, a type free, and an address ptr of the application memory.

For example, for a memory address of a malloc, the thread address is 7fffec218700, the type is malloc, the module type key of the memory in the database is 154, the size of the applied memory is 8224, the address ptr of the applied memory is 7ff4b400edd0, and the memory address of the printed malloc is as follows:

thread＝7fffec218700malloc key＝154size＝8224ptr＝7ff4b400edd0

for another example, for a memory address of one free, the thread address of which is 7fffec218700, the type of which is free, and the address ptr of the application memory of which is 7ff4b4007af0, the memory address of the free for printing is as follows:

thread＝7fffec218700free ptr＝7ff4b4007af0

for the memory addresses of the printed malloc and free, different files for distributing the logs of the malloc and free can be generated, for example, the corresponding logs can be distributed into different files through the keywords of the malloc and the free, and two files of malloc.txt and free.txt can be generated. After the log is distributed, the memory address of malloc can be loaded into the memory, and the memory address of free can be loaded into the memory, for example, the malloc.txt and free.txt are read into the memory at one time, so that the file can be analyzed more quickly.

According to the embodiment, the log for allocating the memory address to the database and the log for releasing the memory address to the database are distributed to different files, so that log processing can be conveniently carried out, and the convenience of searching the memory address is improved.

As an optional embodiment, the searching at the first location corresponding to the first hash value of the first memory address in the target linked list includes:

s21, searching a memory address stored in a first node at a first position in a target linked list;

s22, when the memory address stored in the first node is different from the first memory address and the first node has an associated first sublink table, searching for the memory addresses stored in the child nodes located at each position in the first sublink table, where the first sublink table is used to store the memory address whose hash value corresponding to the memory address released by the target database is the first hash value.

In this embodiment, the memory addresses with the same hash value may be stored in a sub-chain table. In searching for the first location, the target device may first search for a memory address stored in a first node located at the first location in the target linked list. If the memory address stored in the first node is the same as the first memory address, the target device may directly determine that the memory address is a matching address of the first memory address, or the target device may further determine whether the memory address is a matching address of the first memory address based on other identifiers.

For example, the memory address of free may be computed as a hash value, stored in a hash chain (an example of a target chain). Defining a structural body for storing memory addresses in a hash chain table as follows:

if the memory address stored in the first node is different from the first memory address and the first node has an associated first sub-chain table (the target chain table is a master chain table, and the sub-chain table associated with the node in the target chain table is a slave chain table), the target device may continue to search for the memory addresses stored in the child nodes located at various positions in the first sub-chain table, and determine whether the memory addresses are the same as the first memory address and are not matched with other memory addresses allocated to the target database.

It should be noted that, if the memory address stored in the first node is the same as the first memory address, but the memory address is already matched with the memory address allocated to the target database, the memory addresses stored in the child nodes located at various positions in the first child chain table may also be continuously searched.

Through the embodiment, the linked list is used for storing the memory addresses with the same hash value, so that the convenience of memory address storage can be improved.

As an optional embodiment, after searching a first location in the target linked list corresponding to the first hash value of the first memory address, the method further includes:

s31, determining the matching address of the first memory address to be found under the condition that the memory address stored in the first node is the same as the first memory address; modifying the memory address stored in the first node into a target identifier;

s32, determining a matching address for the first memory address found when the memory address stored in the first child node located at the first child position in the first child list is the same as the first memory address; modifying the memory address stored in the first child node into a target identifier;

the target identifier is used for indicating that the memory address stored by the current node is matched with the memory address allocated for the target database.

In order to determine whether the matching address in the target linked list matches the memory address allocated to the target address, the matched memory address may be modified to a specific identifier, for example, a target identifier, where the target identifier is used to indicate that the memory address stored in the current node matches the memory address allocated to the target database.

If the memory address stored in the first node is the same as the first memory address, the matching address of the first memory address can be determined to be found, and the memory address stored in the first node is modified into the target identifier. Otherwise, if the memory address stored in the first node is different from the first memory address and the first node has an associated first sublink, the first sublink may be continuously searched until the memory address identical to the first memory address is found, or all the subspaces in the first sublink are found.

If the memory address stored in the first child node located at the first child position in the first child list is the same as the first memory address, it may be determined that a matching address of the first memory address is found. And the target device may delete the first child node, or modify the memory address stored in the first child node to the target identifier without performing the node deletion operation.

By the embodiment, the memory address matched with the memory address allocated to the database is modified into the specific identifier, so that the efficiency of searching the memory address can be improved.

As an optional embodiment, in the process of searching for the memory address stored in the child node located at each position in the first child chain table, the method further includes:

s41, when the memory address stored in the second child node located at the second child position in the first child chain table is the target identifier, delete the second child node from the first child chain table.

In order to reduce the memory usage and the number of memory addresses to be searched, the node where the memory address in the first sublink that matches the memory address allocated to the database is located may be deleted. For the nodes in the target linked list, because the nodes may need to be associated with the sub-chain table, the nodes in the target linked list are not deleted no matter whether the nodes have the associated sub-chain table or not for the convenience of linked list operation.

In order to keep consistent with a target linked list and facilitate programming (whether a node belongs to a main linked list or a slave linked list is not required to be checked, and the slave linked list needs to be traversed circularly), for nodes in a sub-chain list, only a matched memory address is modified into a target identifier when being found for the first time, the nodes are not deleted, and in the following traversal process, if the memory address stored in a sub-node located at a certain sub-position in the sub-chain list is the target identifier, the sub-node is deleted from the sub-chain list. For example, if a memory address stored in a second child node located at a second child position in the first child list is a target identifier, the target device may delete the second child node from the first child list.

Optionally, in the process of searching for the memory address stored in the first node and the memory addresses stored in the child nodes located at various positions in the first child chain table, when the target identifier is found for the first time, since the target identifier may be the memory address stored in the node in the target chain table, the target identifier may be ignored, and when the target identifier is found for the second time, the node (which must be stored in a certain child node) storing the target identifier is deleted.

Illustratively, for the hash chain table as shown in fig. 3, the length of the hash chain table is 17, i.e., the size of the hash chain table is 17 × sizeof (nodefree), and the node at the position with the sequence number of 14 has an associated slave chain table, which contains 4 slave nodes. When the memory address is searched, the hash value of the memory address of the malloc is calculated, the hash value is searched in the hash chain table, if the address is found out, the address is free, and if the address is not found out, the memory address can be printed.

For example, look up 7ff4b4012120, calculate the hash value of this memory address to be 5(7ff4b 4012120% 17), look up at the location with sequence number 5, see if the address stored at this location is 7ff4b4012120, can find this address, and do not print the information. Further, the memory address it stores may be modified to 0 (an example of a target identification).

Then 7ff4b4010ff0 is searched, the hash value of the memory address is calculated to be 8(7ff4b4010ff 0% 17), then the position with the sequence number of 8 is searched, whether the address stored in the position is 7ff4b4010ff0 is checked, the address is not found, and the record is printed when the linked list is not searched, namely the 7ff4b4010ff0 is not released.

Then 7ff4b4011d60 is searched, the hash value of the memory address is calculated to be 14(7ff4b4010ff 0% 17), then the position with the sequence number of 14 is searched, whether the address stored in the position is 7ff4b4011d60 is checked, the address stored in the position can be found, the address stored in the position is modified to be 0, and the hash linked list is used as the value and is not emptied.

The second lookup 7ff4b4011d60 calculates the hash value of the memory address as 14, and looks up at the location with sequence number 14. Since the address stored in the hash linked list is modified to be 0, the address is not equal, the next node (the node in the linked list) is searched, whether the address stored at the position is 7ff4b4011d60 or not is checked, if the node marked with the number 4 in fig. 3 meets the query condition, the address stored at the node is modified to be 0, and the linked list is not modified at this time.

The third search 7ff4b4011d60 calculates the hash value of the memory address to be 14, and searches at the position with sequence number 14. And (4) continuously searching because the addresses stored in the hash chain table are modified into 0 and are unequal. If the address stored by the second node is 0, the node is deleted (for example, the next pointer of the storage node in the hash chain table points to the next node of the deleted node), the next node (i.e., the node labeled 3 in fig. 3) is continuously traversed, whether the storage address is 7ff4b4011d60 is judged, and if the address can be found, the address stored by the node is modified to 0.

Here, the assignment of the address entry to 0 is to keep consistent with the primary hash chain table (programming is uniform), and since the primary hash chain table cannot release space, the address needs to be cleared of 0. In addition, whether the address item is assigned to be 0 or not is convenient for programming, whether the node belongs to the main chain table or the slave chain table (the slave chain table needs to be circularly traversed) does not need to be checked, and whether the node is the main chain table or not can be judged only by encountering 0 in the second traversal.

By the embodiment, the nodes taking the memory addresses stored in the secondary linked list as the target identifiers are deleted when the secondary linked list is traversed, so that the occupation of the memory can be reduced, the number of the memory addresses required to be searched can be reduced, and the efficiency of searching the memory addresses is improved.

As an optional embodiment, before performing the lookup at the first location corresponding to the first hash value of the first memory address in the target linked list, the method further includes:

s51, acquiring a second hash value of a second memory address, wherein the second memory address is a memory address released for the target database;

s52, when a third memory address is stored in a second node located at a second position corresponding to the second hash value in the target linked list, storing the second memory address into a second sublink table associated with the second node, where the second sublink table is used to store a memory address whose hash value corresponding to the second hash value is a memory address released for the target database.

The memory addresses released for the target database may be stored in the target linked list (and the slave linked list of the target linked list) prior to performing the memory address lookup. The second set of memory addresses includes memory addresses released for the target database, e.g., memory addresses released for the target database within the target time period. The target device may obtain a memory address from the second memory address set to obtain a second memory address, where the second memory address may be any one of memory addresses released for the target database.

The target device may obtain a second hash value of the second memory address, where the second hash value may be a hash value obtained by performing hash remainder on the target value by the second memory address, and the target value is the total number of nodes included in the target linked list. Each hash value may correspond to a location in the target linked list that corresponds to a second location in the target linked list, e.g., the second location is a location in the target linked list that is subscripted to the second hash value, and a node in the target linked list that is at the second location is a second node. The target device may first determine whether a memory address is stored in the second node.

The target device may store the second memory address in the second node if the second node does not have the memory address stored therein. If the second node stores the third memory address, the identifier is the memory address released by the target database, and the memory addresses with the corresponding hash values as the second hash values at least comprise two (the second memory address and the third memory address), and a plurality of memory addresses can be stored in a slave linked list mode. Here, the second memory address and the third memory address may be the same memory address or different memory addresses, which is not limited in this embodiment.

And the slave linked list associated with the second node is a second sub-chain list, and the second sub-chain list is used for storing the memory address of which the corresponding hash value is the second hash value in the memory addresses released for the target database. The target device may store a second memory address in the second sublink table. For example, a new child node may be added at the end of the second child list, and the second memory address may be added to the new child node.

As an alternative embodiment, the target pointer of the second node points to the head node of the second child chain table. The same or similar structure as described above may be used in the target linked list to store the memory address, and each node in the target linked list may point to the head node of the slave linked list associated with the node through a target pointer (e.g., a next pointer). Correspondingly, storing the second memory address in a second sublink associated with the second node includes:

s61, storing the second memory address into a third child node, where the third child node is a node generated for storing the second memory address;

s62, the third child node is updated to be the head node of the second child chain table, and the target pointer is updated to point to the third child node.

When a second memory address is stored in a second child table, a new child node storing the second memory address may be added to the head of the second child table. Optionally, the second memory address may be stored in a third child node, where the third child node is a node generated for storing the second memory address, and may be a newly allocated block of memory; the third child node is then updated to the head node of the second child list, and the target pointer is updated to point to the third child node.

For example, the current address may be stored in a new malloc block of memory (nodeHash- > next, nodeHash being a node in the primary linked list):

nodetmp＝nodeHash->next；

nodeHash＝nodeHash->next＝(NODEFREE*)malloc(sizeof(NODEFREE))；

nodeHash->next＝nodetmp；

the first node of the node newly applied each time after the node in the hash chain table, namely the first node of the node inserted last after the node in the hash chain table, avoids the traversal of the chain table, and the insertion efficiency is O (1).

Illustratively, initialization of the hash chain may be accomplished by traversing data in memory of a free file (e.g., free. And after initializing the hash chain table, the length of the hash chain table is 17, and the memory address of free is subjected to remainder by using the length of the hash chain table to calculate the storage position of the memory address.

For example, store 7ff4b4012120, calculate the hash value of the memory address to be 5(7ff4b 4012120% 17), and store the memory address in the space with sequence number 5 in the hash chain table. Then 7ff4b4011d60 is stored, the hash value of the memory address is calculated to be 14(7ff4b4011d 60% 17), and the memory address is stored in the space (nodeHash) with the sequence number of 14.

If there are multiple addresses 7ff4b4011d60, the location of sequence number 14 forms a linked list (slave linked list). When the memory address 7ff4b4011d60 of the second free is stored, the current address can be stored in the new malloc block memory, and the new malloc memory can be inserted in the following manner: and the node inserted last is always the first node behind the node in the hash chain table. As shown in fig. 4, in the linked list formed at the position with the sequence number 14, the addition sequence of the nodes with the

numbers

1, 2, 3 and 4 is the same as the sequence of the numbers.

With the present embodiment, the insertion efficiency of the node can be improved by keeping the last inserted node at the first node (i.e., the head node of the secondary linked list) after the node in the primary linked list.

Optionally, in this embodiment, after all the memory addresses in the target memory address set are searched, the address space applied for searching the memory addresses may be released. For example, releasing the address space of the application after the execution is completed may include, but is not limited to: and releasing the space of a target linked list (such as a hash linked list), releasing the space of the repeated nodes, and sequentially releasing the repeated nodes by forming a linked list through next.

and S71, generating a target statistical result according to all unreleased memory addresses in the target memory address set, wherein the target statistical result is used for describing all unreleased memory spaces in the memory space allocated for the target database.

After all the memory addresses in the target memory address set are searched, the target device may obtain all the memory addresses that are not released. The target device may count the memory space corresponding to each unreleased memory address, and determine all unreleased memory spaces in the memory space allocated to the target database, so as to obtain a target statistical result, where the target statistical result may include, but is not limited to, information including at least one of the following: the size of the memory space, the type of the memory space.

Because each unreleased memory address corresponds to the memory space requested, when allocating memory spaces for different threads, the memory spaces allocated for different threads may be different even if the allocated memory addresses are the same, because the memory sizes requested are different. Since the memory space is released and then allocated again, the target device can determine the unreleased memory space corresponding to the unreleased memory address, that is, the memory space indicated by the log allocated with the memory address for the last time, by recording the sequence of the log (that is, the first log) for allocating the memory address operation to the target database.

By the embodiment, the statistical results describing all unreleased memory spaces in the memory spaces allocated to the database are generated, so that the memory spaces can be conveniently analyzed and processed, and the utilization rate of the memory spaces is further improved.

The following explains a method for searching a memory address in the embodiment of the present application with reference to an optional example. In this example, the target database is MySQL.

The method for searching the memory address in this example is a scheme for detecting whether the malloc memory is released or not in a database, and by increasing logs of the malloc and free operation memory addresses and then by means of hash and linked list, in millions and millions of levels of memory addresses, the memory address without free is searched by the search performance being the speed of O (N), and the memory leakage and the use and use amount of the memory are detected.

As shown in fig. 5, the flow of the memory address lookup method in this optional example may include the following steps:

step S502, printing the memory addresses of malloc and free in the database program;

step S504, the logs of malloc and free are distributed to different files (malloc.txt and free.txt);

step S506, loading the memory address of malloc into the memory, and loading the memory address of free into the memory;

step S508, the memory address of free is calculated as a hash value and stored in a hash chain table;

step S510, calculating the memory address of malloc as a hash value in the same manner, and searching the hash chain table, if yes, it indicates that the address is free, and if no, it indicates that the address is not free.

After the operation is finished, the applied address space can be released, and the unreleased memory space, the size, the type and the like can be counted.

According to the method, free addresses are stored through a hash chain table, repeated addresses are stored through the chain table, the last node is stored at the head of the chain table, when the repeated addresses of the chain table are searched, the head address is firstly modified to be 0, and the head address is traversed and then deleted next time, so that millions and more matching searches can be quickly completed (the searching performance is O (1)).

According to another aspect of the embodiments of the present application, there is also provided a method for searching for a memory address, where the method for searching for a memory address provided in this embodiment is similar to the foregoing method, and is different from the following method: the linked list is used to store the memory address allocated for the target database and the look-up is the memory address released for the target database.

Optionally, in this embodiment, the method for searching for a memory address may include the following steps: sequentially acquiring each memory address from a target address set (similar to the second memory address set) to obtain a first target address (the first target address is any memory address in the target address set), wherein the target address set comprises memory addresses released for a target database; searching a first target position corresponding to a first target hash value of a first target address in a target address linked list, wherein a memory address distributed for a target database is stored in the target address linked list at a position corresponding to the hash value of the distributed memory address; determining a matching address of a first target address on a first target position, wherein the matching address of the first target address is a memory address which is the same as the first target address and is not matched with a memory address released for a target database; and determining the memory address which is not matched with the memory address released for the target database in the target address linked list as the unreleased memory address.

Optionally, before sequentially obtaining each memory address from the target address set, the method further includes: acquiring a target log file, wherein a first log for allocating a memory address to a target database and a second log for releasing the memory address to the target database are stored in the target log file; and distributing the first log to a first log file, and distributing the second log to a second log file, wherein the target address set is obtained by reading the second log file, and the target address linked list is generated after reading the first log file.

Optionally, the searching at the first target position corresponding to the hash value of the first target address in the target address linked list includes: searching a memory address stored in a first target node positioned at a first target position in a target address linked list; and under the condition that the memory address stored in the first target node is different from the first target address, searching the memory addresses stored in the child nodes positioned at all positions in the first target child chain table, wherein the first target child chain table is a child chain table associated with the first target node, and the first target child chain table is used for storing the memory address of which the corresponding hash value in the memory addresses allocated for the target database is the first target hash value.

Optionally, after searching for a first target position corresponding to the hash value of the first target address in the target address linked list, the method further includes: under the condition that the memory address stored in the first target node is the same as the first target address, determining to find a matching address of the first target address; modifying the memory address stored in the first target node into a target address identifier; under the condition that the memory address stored in a first target child node located at a first target child position in a first target child chain table is the same as the first target address, determining to find out a matching address of the first target address; modifying the memory address stored in the first target child node into a target address identifier; the target address identifier is used for indicating that the memory address stored by the current node is matched with the memory address released for the target database.

Optionally, in the process of searching for the memory address stored in the child node located at each position in the first target child chain table, the method further includes: and under the condition that the memory address stored in a second target child node located at a second target child position in the first target child chain table is the target address identifier, deleting the second target child node from the first target child chain table.

Optionally, before searching for the first target position corresponding to the hash value of the first target address in the target address linked list, the method further includes: acquiring a second target hash value of a second target address, wherein the second target address is a memory address allocated for the target database; and under the condition that a third target address is stored in a second target node located at a second target position corresponding to a second target hash value in the target address linked list, storing the second target address into a second target sublink list associated with the second target node, wherein the second target sublink list is used for storing a memory address of which the hash value corresponding to the memory address allocated for the target database is the second target hash value, and the third target address is a memory address allocated for the target database.

Optionally, the target node pointer of the second target node points to a head node of the second target child chain table; storing the second target address into a second target child chain table associated with the second target node comprises: storing the second target address into a third target child node, wherein the third target child node is a node generated for storing the second target address; the third target child node is updated to the head node of the second target child chain table, and the target node pointer is updated to point to the third target child node.

Optionally, after determining a memory address in the target address linked list, which is not matched with a memory address released for the target database, as an unreleased memory address, the method further includes: and generating a target search result according to the unreleased memory address, wherein the target search result is used for describing unreleased memory space in the memory space allocated for the target database.

It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.

Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium (e.g., a ROM (Read-Only Memory)/RAM (Random Access Memory), a magnetic disk, an optical disk) and includes several instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the methods according to the embodiments of the present application.

According to another aspect of the embodiment of the present application, a device for searching a memory address is further provided, which is used for implementing the method for searching a memory address. Fig. 6 is a block diagram of a structure of an optional memory address lookup apparatus according to an embodiment of the present application, and as shown in fig. 6, the apparatus may include:

a first obtaining unit 602, configured to obtain a first memory address from a target memory address set, where the target memory address set includes a memory address allocated for a target database;

a searching unit 604, connected to the first obtaining unit 602, configured to search for a first location in the target linked list corresponding to a first hash value of the first memory address, where the memory address released for the target database is stored in the target linked list at the location corresponding to the hash value of the released memory address;

a first determining unit 606, connected to the searching unit 604, configured to determine that the first memory address is an unreleased memory address when a matching address of the first memory address is not found at the first location, where the matching address of the first memory address is a memory address that is the same as the first memory address and is not matched with the memory address allocated to the target database.

It should be noted that the first obtaining unit 602 in this embodiment may be configured to execute the step S202, the searching unit 604 in this embodiment may be configured to execute the step S204, and the first determining unit 606 in this embodiment may be configured to execute the step S206.

Acquiring a first memory address from a target memory address set through the module, wherein the target memory address set comprises memory addresses distributed for a target database; searching a first position corresponding to a first hash value of a first memory address in the target linked list, and storing the memory address released for the target database in the position corresponding to the hash value of the released memory address in the target linked list; under the condition that the matched address of the first memory address is not found at the first position, the first memory address is determined to be an unreleased memory address, the matched address of the first memory address is the same as the first memory address and is not matched with the memory address allocated for the target database, the problem that the searching speed is low due to the fact that the number of the memory addresses is too large in the searching mode of the memory addresses in the related technology is solved, and the searching speed of the memory addresses is improved.

As an alternative embodiment, the apparatus further comprises:

the second obtaining unit is used for obtaining a target log file before the first memory address is obtained from the target memory address set, wherein the target log file stores a first log for allocating the memory address to the target database and a second log for releasing the memory address to the target database;

and the distribution unit is used for distributing the first log to the first log file and distributing the second log to the second log file, wherein the target memory address set is obtained by reading the first log file, and the target linked list is generated after reading the second log file.

As an alternative embodiment, the lookup unit 604 includes:

the first searching module is used for searching a memory address stored in a first node positioned at a first position in a target linked list;

the second searching module is configured to search the memory addresses stored in the child nodes located at various positions in the first child chain table under the condition that the memory address stored in the first node is different from the first memory address and the first node has an associated first child chain table, where the first child chain table is used to store the memory address of which the hash value corresponding to the memory address released for the target database is the first hash value.

As an alternative embodiment, the apparatus further comprises:

a second determining unit, configured to determine a matching address for the first memory address to be found when the memory address stored in the first node is the same as the first memory address after the first location corresponding to the first hash value of the first memory address in the target linked list is found; modifying the memory address stored in the first node into a target identifier;

a third determining unit, configured to determine to find a matching address of the first memory address when the memory address stored in the first child node located in the first child position in the first child list is the same as the first memory address; modifying the memory address stored in the first child node into a target identifier;

As an alternative embodiment, the apparatus further comprises:

and the deleting unit is used for deleting the second child node from the first child chain table under the condition that the memory address stored in the second child node located at the second child position in the first child chain table is the target identifier in the process of searching the memory address stored in the child node located at each position in the first child chain table.

As an alternative embodiment, the apparatus further comprises:

a third obtaining unit, configured to obtain a second hash value of a second memory address before searching a first location in the target linked list corresponding to the first hash value of the first memory address, where the second memory address is a memory address released for the target database;

and the storage unit is used for storing the second memory address into a second sublink table associated with the second node under the condition that a third memory address is stored in the second node which is positioned at a second position corresponding to the second hash value in the target linked list, wherein the second sublink table is used for storing the memory address of which the hash value corresponding to the memory address released for the target database is the second hash value.

As an alternative embodiment, the target pointer of the second node points to the head node of the second sublink table; the memory cell includes:

the storage module is used for storing the second memory address into a third child node, wherein the third child node is a node generated for storing the second memory address;

and the updating module is used for updating the third child node as the head node of the second child chain table and updating the target pointer to point to the third child node.

As an alternative embodiment, the apparatus further comprises:

and the generating unit is used for searching a first position corresponding to the first hash value of the first memory address in the target linked list, and then generating a target statistical result according to all unreleased memory addresses in the target memory address set, wherein the target statistical result is used for describing all unreleased memory spaces in the memory space allocated for the target database.

It should be noted here that the modules described above are the same as the examples and application scenarios implemented by the corresponding steps, but are not limited to the disclosure of the above embodiments. It should be noted that the modules described above as a part of the apparatus may be operated in a hardware environment as shown in fig. 1, and may be implemented by software, or may be implemented by hardware, where the hardware environment includes a network environment.

According to another aspect of the embodiments of the present application, there is also provided an electronic device for implementing the above method for searching for a memory address, where the electronic device may be a server, a terminal, or a combination thereof.

Fig. 7 is a block diagram of an alternative electronic device according to an embodiment of the present application, as shown in fig. 7, including a processor 702, a communication interface 704, a memory 706 and a communication bus 708, where the processor 702, the communication interface 704 and the memory 706 communicate with each other via the communication bus 708, where,

a memory 706 for storing computer programs;

the processor 702, when executing the computer program stored in the memory 706, performs the following steps:

acquiring a first memory address from a target memory address set, wherein the target memory address set comprises memory addresses distributed for a target database;

searching a first position corresponding to a first hash value of a first memory address in a target linked list, wherein the memory address released for the target database is stored in the target linked list at the position corresponding to the hash value of the released memory address;

and under the condition that a matching address of the first memory address is not found at the first position, determining the first memory address as an unreleased memory address, wherein the matching address of the first memory address is the same as the first memory address and is not matched with the memory address allocated for the target database.

Alternatively, in this embodiment, the communication bus may be a PCI (Peripheral Component Interconnect) bus, an EISA (Extended Industry Standard Architecture) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 7, but this is not intended to represent only one bus or type of bus. The communication interface is used for communication between the electronic equipment and other equipment.

The memory may include RAM, and may also include non-volatile memory (non-volatile memory), such as at least one disk memory. Alternatively, the memory may be at least one memory device located remotely from the processor.

As an example, the memory 706 may include, but is not limited to, the first obtaining unit 602, the lookup unit 604, and the first determining unit 606 in the lookup apparatus including the memory address. In addition, the present invention may also include, but is not limited to, other module units in the foregoing memory address lookup apparatus, which is not described in detail in this example.

The processor may be a general-purpose processor, and may include but is not limited to: a CPU (Central Processing Unit), an NP (Network Processor), and the like; but also a DSP (Digital Signal Processing), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component.

Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and this embodiment is not described herein again.

It can be understood by those skilled in the art that the structure shown in fig. 7 is only an illustration, and the device implementing the method for searching for a memory address may be a terminal device, and the terminal device may be a terminal device such as a smart phone (e.g., an Android phone, an iOS phone, etc.), a tablet computer, a palmtop computer, a Mobile Internet Device (MID), a PAD, and the like. Fig. 7 does not limit the structure of the electronic device. For example, the electronic device may also include more or fewer components (e.g., network interfaces, display devices, etc.) than shown in FIG. 7, or have a different configuration than shown in FIG. 7.

Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disk, ROM, RAM, magnetic or optical disk, and the like.

According to still another aspect of an embodiment of the present application, there is also provided a storage medium. Optionally, in this embodiment, the storage medium may be configured to execute a program code of any one of the above memory address lookup methods in this embodiment of the present application.

Optionally, in this embodiment, the storage medium may be located on at least one of a plurality of network devices in a network shown in the above embodiment.

Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps:

Optionally, the specific example in this embodiment may refer to the example described in the above embodiment, which is not described again in this embodiment.

Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing program codes, such as a U disk, a ROM, a RAM, a removable hard disk, a magnetic disk, or an optical disk.

The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.

The integrated unit in the above embodiments, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in the above computer-readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a storage medium, and including instructions for causing one or more computer devices (which may be personal computers, servers, network devices, or the like) to execute all or part of the steps of the method described in the embodiments of the present application.

In the above embodiments of the present application, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed client may be implemented in other manners. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, and may also be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution provided in the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The foregoing is only a preferred embodiment of the present application and it should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims

1. A method for searching a memory address, comprising:

searching a first position corresponding to a first hash value of the first memory address in a target linked list, wherein the memory address released for the target database is stored in the target linked list at the position corresponding to the hash value of the released memory address;

and determining the first memory address as an unreleased memory address under the condition that a matching address of the first memory address is not found in the first position, wherein the matching address of the first memory address is the same as the first memory address and is not matched with the memory address allocated to the target database.

2. The method of claim 1, wherein prior to said retrieving the first memory address from the set of target memory addresses, the method further comprises:

acquiring a target log file, wherein a first log for allocating a memory address to the target database and a second log for releasing the memory address to the target database are stored in the target log file;

and distributing the first log to a first log file, and distributing the second log to a second log file, wherein the target memory address set is obtained by reading the first log file, and the target linked list is generated after reading the second log file.

3. The method of claim 1, wherein the looking up at the first location in the target linked list corresponding to the first hash value of the first memory address comprises:

searching a memory address stored in a first node located at the first position in the target linked list;

and searching memory addresses stored in child nodes located at various positions in the first child list under the condition that the memory addresses stored in the first node are different from the first memory address and the first node has an associated first child list, wherein the first child list is used for storing the memory addresses of which the hash values corresponding to the memory addresses released for the target database are the first hash values.

4. The method of claim 3, wherein after the performing the lookup at the first location in the target linked list corresponding to the first hash value for the first memory address, the method further comprises:

determining to find a matching address of the first memory address under the condition that the memory address stored in the first node is the same as the first memory address; modifying the memory address stored in the first node into a target identifier;

under the condition that the memory address stored in a first child node located at a first child position in the first child chain table is the same as the first memory address, determining to find out a matching address of the first memory address; modifying the memory address stored in the first child node into a target identifier;

the target identifier is used for indicating that the memory address stored by the current node is matched with the memory address allocated to the target database.

5. The method of claim 4, wherein in the step of searching the memory addresses stored in the child nodes located at the respective positions in the first child chain table, the method further comprises:

and deleting the second child node from the first child chain table under the condition that the memory address stored in the second child node located at the second child position in the first child chain table is the target identifier.

6. The method of claim 1, wherein prior to the performing the lookup at the first location in the target linked list corresponding to the first hash value for the first memory address, the method further comprises:

acquiring a second hash value of a second memory address, wherein the second memory address is a memory address released for the target database;

and under the condition that a third memory address is stored in a second node located at a second position corresponding to the second hash value in the target linked list, storing the second memory address into a second sublink list associated with the second node, wherein the second sublink list is used for storing the memory address of the second hash value corresponding to the hash value in the memory addresses released for the target database.

7. The method of claim 6, wherein the target pointer of the second node points to a head node of the second sublink table;

said storing the second memory address into a second sublink table associated with the second node comprises:

storing the second memory address into a third child node, wherein the third child node is a node generated for storing the second memory address;

updating the third child node to be a head node of the second child chain table and updating the target pointer to point to the third child node.

8. The method of any of claims 1 to 7, wherein after the performing the lookup at the first location in the target linked list corresponding to the first hash value of the first memory address, the method further comprises:

and generating a target statistical result according to all unreleased memory addresses in the target memory address set, wherein the target statistical result is used for describing all unreleased memory spaces in the memory space allocated for the target database.

9. An apparatus for searching a memory address, comprising:

the system comprises a first obtaining unit, a second obtaining unit and a third obtaining unit, wherein the first obtaining unit is used for obtaining a first memory address from a target memory address set, and the target memory address set comprises memory addresses distributed for a target database;

the searching unit is used for searching a first position corresponding to a first hash value of the first memory address in a target linked list, wherein the memory address released for the target database is stored in the position corresponding to the hash value of the released memory address in the target linked list;

a first determining unit, configured to determine that the first memory address is an unreleased memory address when a matching address of the first memory address is not found in the first location, where the matching address of the first memory address is a memory address that is the same as the first memory address and does not match a memory address allocated to the target database.

10. An electronic device comprising a processor, a communication interface, a memory and a communication bus, wherein said processor, said communication interface and said memory communicate with each other via said communication bus,

the memory for storing a computer program;

the processor for performing the method steps of any one of claims 1 to 8 by running the computer program stored on the memory.

11. A computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to carry out the method steps of any one of claims 1 to 8 when executed.