CN113259033A - High-speed wave beam control method in dynamic millimeter wave communication scene based on FPGA - Google Patents
High-speed wave beam control method in dynamic millimeter wave communication scene based on FPGA Download PDFInfo
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Abstract
The invention discloses a high-speed wave beam control method in a dynamic millimeter wave communication scene based on an FPGA (field programmable gate array), which comprises the following steps of: initializing a beam at a receiving end of a communication system through full codebook scanning, and establishing an initial communication beam; establishing data communication between the beam control module and the baseband processing FPGA for triggering a beam tracking process and carrying out beam measurement; establishing a beam training state machine to realize a beam tracking algorithm model; the control of the beam control module on the antenna is realized by transmitting antenna control information through the SPI high-speed serial port; judging the quality of the beam after each beam training is finished, and if the beam selection is judged to be failed, recovering the beam; and after the beam training is finished, selecting the optimal transmission beam for data transmission, and waiting for a training trigger signal of the next period. The invention realizes microsecond-level beam switching interval by defining the SPI high-speed mode write-in protocol control antenna.
Description
Technical Field
The invention relates to a large-scale array antenna beam forming and tracking technology, and belongs to the field of wireless communication.
Background
With the continuous development of information technology, the amount of information is explosively increased, new service scenes appear successively, more severe requirements are provided for the bandwidth of a communication system, the traditional communication frequency band is difficult to meet the requirements gradually, and the millimeter wave frequency band attracts the attention of researchers due to the characteristics of large bandwidth, low time delay and abundant frequency spectrum resources. Communication research on the millimeter wave band has begun to spread widely, and a very important research in the millimeter wave field is about beam forming technology. While the millimeter-wave band has several advantages and disadvantages, it is vulnerable to attenuation, and beamforming techniques counteract attenuation by focusing antenna beam gain in one direction.
Although the beam forming greatly improves the transmission power gain, due to the strong directivity, the beam misalignment is caused when the user moves, so that the received signal power is suddenly reduced, and the communication quality is difficult to maintain. Real-time alignment of beam directions becomes an inevitable problem as the user moves. Currently, many efforts have been made on beam tracking, such as scanning the whole beam codebook and hierarchical searching methods, which have high alignment rate but high training overhead. Methods utilizing side information, such as angle of arrival estimation, channel state information estimation, etc., to reduce overhead, but only staying in a theoretical stage is difficult to implement. To reduce overhead and to be easy to implement, beam tracking methods in conjunction with machine learning are beginning to gain more attention.
In order to ensure that the real-time communication of the user is not disconnected, the beam searching needs to be periodically performed to always control the beam pointing direction in a better direction, which requires a continuous beam training process, the range of each searching needs to be controlled in a smaller range, and the beam switching speed needs to be as fast as possible, so that the whole beam searching process can be fast, and the normal communication use of the user is not influenced. The FPGA can complete the whole process quickly due to the excellent processing performance of the FPGA, and the bandit algorithm combined with historical experience learning can quickly reduce the range of beam searching and reduce the cost. Therefore, the method makes reasonable recommendation by combining with the history training experience of bandit algorithm learning, realizes hardware by using the FPGA, greatly reduces training consumption and training period by combining with the characteristic of high-speed processing, designs options of the bandit algorithm at the same time, further reduces the training beam overhead, realizes the alignment of the beam direction all the time when the user continuously moves, and ensures that the communication link is stable and uninterrupted all the time.
Disclosure of Invention
In communication in the millimeter wave band, beam alignment is required due to the application of the beam forming technique. Since the user is moving in real time, a fast and frequent beam tracking procedure is required, so that the communication link of the user is always stably available. This requires designing a reliable beam control module, achieving the purpose of training beams at high speed in the millimeter wave hardware system, and having higher robustness and a beam recovery mechanism.
The invention aims to provide a high-speed beam control method in a dynamic millimeter wave communication scene based on an FPGA (field programmable gate array). an antenna is controlled by defining an SPI (serial peripheral interface) high-speed mode write-in protocol, so that microsecond-level beam switching intervals are realized. According to the characteristic of the fast beam training, the period of the beam training is shortened, so that the range of each beam training is greatly reduced. Meanwhile, the training experience is continuously learned by using a random selection optimization model method, and the range of the training beam is further narrowed according to the training result.
In order to achieve the purpose, the invention adopts the technical scheme that:
a high-speed wave beam control method in a dynamic millimeter wave communication scene based on an FPGA (field programmable gate array) comprises the following steps:
step 1, initializing a beam at a receiving end of a communication system through full codebook scanning, and establishing an initial communication beam;
step 2, establishing data communication between the beam control module and a baseband module carrying the FPGA through an FIFO data structure and a PXI-trigger register, and triggering a beam tracking process and carrying out beam measurement;
step 3, establishing a beam training state machine to realize a beam tracking algorithm model;
step 4, the control of the beam control module to the antenna is realized by transmitting the antenna control information through the SPI module in FIG. 4;
step 5, judging the quality of the beam after each beam training is finished, and if the beam selection is judged to be failed, recovering the beam;
and 6, selecting the optimal transmission beam for data transmission after the beam training is finished, and waiting for a training trigger signal of the next period.
The step 1 is specifically as follows:
defining a codebook space asWhere M is the size of the codebook, fiRepresenting an antenna response vector; writing the control bit stream corresponding to each code word into a memory in a byte form in advance according to an antenna format; the beam control module at the receiving end of the communication system firstly carries out one-time full scanning on the full codebook, the realization of the full scanning is realized by establishing an initialization state machine, and the state transfer process is as follows: first, the initial wave number i is equal to 0, and the optimal wave number imax0, power p corresponding to the best beammaxEntering an SPI writing process, and writing beam control information into the antenna in multiple stages according to the antenna requirement, receiving and transmitting the control information, and enabling a signal; multiple phase total write nbReading the data written in each stage from the memory module with an initial address of i × nb+of,ofIs an offset address; the number of bytes written in each stage is nbtNumber of bits nbit(ii) a Informing the SPI module to START writing data of the current stage into the antenna through an SPI _ START signal; then, an SPI _ DONE signal fed back by the SPI module is waited, and when the signal is detected to be a high level, the data writing in the current stage is completed; at this time, a judgment is made to see whether all the writing in the multiple stages is completed, if not, the data in the next stage is written in, if so, whether the scanning of the codebook is completed is judged, and if so, the process is ended, and the trigger signal monitor for beam tracking is enteredMeasuring the state, waiting for the process of beam tracking, and updating the optimal beam and the power corresponding to the optimal beam if the scanning is not finished; and updating the optimal beam information and then judging once, judging whether all beam directions are searched, if not, adding 1 to the beam serial number to write in the SPI module again, and if so, writing in the SPI module again by taking the optimal beam as the execution beam serial number.
The step 2 is specifically as follows:
in the beam initialization and beam tracking processes, the performance measurement of the beam is needed, the receiving power is calculated through a baseband module at the receiving end of the communication system, and the performance of the beam direction selected by the current antenna is judged by taking the receiving power as an index; the beam measurement is to measure the performance of all beams in each scanning beam range, and take out the beam with the best measurement result for the communication in the data transmission stage; meanwhile, the beam tracking process is carried out periodically, each period is the time of one communication frame, each frame is provided with a beam training field, when the beam training field starts, the baseband module is required to inform the beam control module of the start of beam tracking in the round, a PXI-trigger register is used for realizing low-delay information transmission, the register is set to be at a high level when an enabling signal is transmitted, and the period is long enough to ensure that the register can be read by the beam control module; the performance of the scanning beam is obtained through the beam measuring process, and the optimal beam and the corresponding power are obtained through performance comparison:
wherein imaxRepresenting the best beam, pmaxIndicating the power, p, corresponding to the best beamiRepresenting the power corresponding to the beam i;
and updating the waiting time tau mu s before the current optimal wave beam in order to compensate the time delay caused by power calculation and PXIe bus transmission on the power acquisition of the current wave beam.
The step 3 is specifically as follows:
entering a wave beam training stage after the initial process is completed, wherein the wave beam training stage is enabled by a training trigger signal and completed by establishing a wave beam training state machine, and the state transfer process comprises the following steps: the beam tracking stage adopts a random selection optimization model, and a plurality of beam behaviors are preset, wherein each behavior is represented as (b)last,o,c),blastRepresents the best beam obtained by the last beam training, and has an initial value of imaxAnd o denotes the first beam in the action relative to blastC represents the number of beams in the action, and the beams in the action are continuous; (b)lastO, c) comprises a beam of (b)last-o,blast-o+1,blast-o+2,…,blast-o + c-1); after training is started, firstly initializing parameters required by a training process, establishing a plurality of parameter arrays for storing deviation values of behaviors, the number of wave beams, average return values, selected turn numbers and UCB values, wherein indexes of each array correspond to behavior numbers one by one; after initialization, selecting a behavior with the maximum UCB value from the UCB array for training, obtaining the corresponding values of the behavior in the offset value array and the beam number array by using the behavior as an index, and generating a candidate beam set of the behavior; the initial value of the UCB should be set to a maximum such that each behavior is trained at least once; the receiving end of the communication system respectively measures the wave beam sets in the behaviors, the antenna writing process of the wave beams is consistent with the process in the wave beam initialization, and the baseband module calculates the energy of the current wave beam receiving signal on the time domain according to the following formula:
wherein y isiEstimating an equalized time domain signal for a receiving end channel, wherein T represents the calculated length of the received signal;
selecting the optimal beam after all the beams in the behavior are measured, and initializing the same beam in the process; the reward for this training then needs to be determined:
wherein r is1And r2Is a constant value, pthrIs a receiving end power threshold; updating an average return array through a current behavior index according to the reward value, updating parameter values corresponding to a behavior selection round array and a UCB value array, and updating a training total round count at the same time:
wherein μ represents the mean return value, nselRepresenting the number of rounds selected for the training act, ntoIndicates the total number of rounds and u indicates the UCB value.
The step 4 is specifically as follows:
the SPI module acquires corresponding byte data from the memory according to the beam index and the data quantity parameter transmitted by the beam initialization and beam training state machine, and then writes the data into the antenna through the serial port by a self-defined high-speed SPI writing protocol; the self-defined SPI writing protocol flow is as follows: obtaining the starting address i x n of the data to be writtenb+ofTotal number of bytes nbtNumber of bits nbitThen n is addedbtAll data are written into the FIFO storage structure; establishing a control to represent the remaining bit number to be written and initializing the control to the total bit number nbitSimultaneously writing a clock signal into the clock interface; the setting control v stores the data written to the antenna in each round and then willThe data is written into the antenna bit by bit, v is data with the size of l bits; setting an initial bit index in v, and writing bit data corresponding to the index one by one; due to the total number of bits n that need to be writtenbitUsually not an integer multiple of l, so the first few bits of the first data to be written are usually invalid bits, and the initial bit index is set as the beginning of the valid bit and takes the value of l- (l × n)bt-nbit) -1; reading data from an FIFO storage structure and storing the data in v, judging whether the total bit number is equal to the residual bit number, if so, indicating that the data is in a write-in starting stage, pulling down a chip selection signal and an antenna enabling signal, and simultaneously, setting the initial bit index of v according to the setting; if the values are not equal, the reading is not read from the FIFO for the first time, and only the initial bit index in v needs to be set as l; writing a clock signal into the antenna in each working period of the FPGA, simultaneously writing bit data corresponding to the current index in v, subtracting 1 from the index, and subtracting 1 from the residual bit number to be written; and judging whether the index is 0 or not, and repeating the process of writing the bit and the clock signal if the index is not 0. If the number of the bits to be written is 0, judging whether the number of the bits to be written is 0 or not, if not, continuing to read data from the FIFO to execute bit writing, and if the number of the bits to be written is 0, indicating that n is nbitAnd when the writing of the bit data is finished, resetting the chip selection signal and the antenna enabling signal, and resetting the chip selection signal later than the chip selection signal according to the response time required by the antenna.
The step 5 is specifically as follows:
setting a minimum communication quality threshold plimRepresents a minimum performance threshold to maintain normal communication quality; setting continuous failure times control nfailIf not, judging whether the training result reaches the standard or not according to the corresponding power value of the optimal beam obtained by the beam training, and if not, judging that the training result reaches the standardfail=nfail+1, while the beam used in the data transmission phase is still the result of the last standard-compliant training, if the criterion n is satisfiedfail0; when n isfailReaches a certain threshold value nlimThe steps of initial beam setup are re-performed to recover the best beam.
The step 6 is specifically as follows:
and in the data transmission stage of each frame, the best beam obtained by training is used for communication, meanwhile, the beam control module stays in the enabling detection stage, the PXI-trigger register signal is continuously detected, and the beam training process is started if the high level is detected.
Has the advantages that: compared with the prior art, the invention has the beneficial effects that:
(1) the invention realizes the intelligent learning beam tracking algorithm based on the FPGA, and reduces the beam switching time to microsecond level by utilizing the high-speed processing characteristic of the FPGA, thereby reducing the training time and the training period.
(2) The invention further greatly reduces the training overhead by combining a reinforcement learning method and fully utilizing the historical experience, thereby realizing the rapid beam tracking, ensuring the real-time beam alignment in the moving state of the user and always stabilizing the communication quality.
(3) The invention realizes the coordination work among the beam control module, the baseband module and the antenna module through the well designed beam control system, and has good robustness.
(4) The beam control module of the invention has flexible design, is easy to replace different beam tracking algorithms and antennas, and can be expanded to a mode of carrying out beam tracking while receiving and transmitting.
Drawings
FIG. 1 is a diagram of beam initialization state transitions;
FIG. 2 is a diagram of beam tracking state transitions;
FIG. 3 is a flow chart of the SPI module;
FIG. 4 is a flow chart of a beam steering system;
FIG. 5 is a diagram of a frame structure in a communication system;
fig. 6 is a diagram of a hardware platform of an embodiment.
Detailed Description
The present invention will be further described with reference to the accompanying drawings.
The invention discloses a high-speed wave beam control method in a dynamic millimeter wave communication scene based on an FPGA (field programmable gate array), which is based on an NI millimeter wave system and controls the switching of wave beams and the interaction process of data through an independent FPGA, thereby realizing the complete wave beam control function. The FPGA receives the power information of the baseband for judging the performance index of the beam, and reads the trigger signal from the baseband to periodically control the beam tracking process. By implementing an intelligent beam tracking method based on a random selection optimization model, the optimal behavior is selected through a UCB strategy in a plurality of defined behaviors to determine a scanning beam range for beam measurement and tracking. By defining a high-speed controllable transmission mode of the SPI serial port, the writing of the antenna phase shift information bit stream with controllable speed is realized. The method specifically comprises the following steps:
step 1: defining a codebook space asWhere M is the size of the codebook, fiRepresenting an antenna response vector; writing the control bit stream corresponding to each code word into a memory in a byte form in advance according to an antenna format; the beam control module at the receiving end of the communication system firstly carries out one-time full scanning on the full codebook, the realization of the full scanning is realized by establishing an initialization state machine, and the state transition process is as shown in fig. 1: first, the initial wave number i is equal to 0, and the optimal wave number imax0, power p corresponding to the best beammaxEntering an SPI writing process, and writing beam control information into the antenna in multiple stages according to the antenna requirement, receiving and transmitting the control information, and enabling a signal; multiple phase total write nbReading the data written in each stage from the memory module with an initial address of i × nb+of,ofIs an offset address; the number of bytes written in each stage is nbtNumber of bits nbit(ii) a Informing the SPI module to START writing data of the current stage into the antenna through an SPI _ START signal; then, an SPI _ DONE signal fed back by the SPI module is waited, and when the signal is detected to be a high level, the data writing in the current stage is completed; at this time, a judgment is made as to whether all the writing of the multiple stages is completed, if not, the data of the next stage is written, if so, whether the scanning of the codebook is completed is judged, and if so, the process is ended and the process is enteredMonitoring the state of a trigger signal of beam tracking, waiting for the process of beam tracking, and updating the optimal beam and the power corresponding to the optimal beam if the scanning is not finished; and updating the optimal beam information and then judging once, judging whether all beam directions are searched, if not, adding 1 to the beam serial number to write in the SPI module again, and if so, writing in the SPI module again by taking the optimal beam as the execution beam serial number.
Step 2: in the beam initialization and beam tracking processes, the performance measurement of the beam is needed, the receiving power is calculated through a baseband module at the receiving end of the communication system, and the performance of the beam direction selected by the current antenna is judged by taking the receiving power as an index; the beam measurement is to measure the performance of all beams in each scanning beam range, and take out the beam with the best measurement result for the communication in the data transmission stage; meanwhile, the beam tracking process is carried out periodically, each period is the time of one communication frame, each frame is provided with a beam training field, when the beam training field starts, the baseband module is required to inform the beam control module of the start of beam tracking in the round, a PXI-trigger register is used for realizing low-delay information transmission, the register is set to be at a high level when an enabling signal is transmitted, and the period is long enough to ensure that the register can be read by the beam control module; the performance of the scanning beam is obtained through the beam measuring process, and the optimal beam and the corresponding power are obtained through performance comparison:
wherein imaxRepresenting the best beam, pmaxIndicating the power, p, corresponding to the best beamiRepresenting the power corresponding to the beam i;
and updating the waiting time tau mu s before the current optimal wave beam in order to compensate the time delay caused by power calculation and PXIe bus transmission on the power acquisition of the current wave beam.
after the initial process is finished, entering a wave beam training stage, enabling the wave beam training stage by a training trigger signal, finishing by establishing a wave beam training state machine, wherein the state transfer process is shown in figure 2, a wave beam tracking stage adopts a random selection optimization model, a plurality of wave beam behaviors are preset, and the expression of each behavior is (b)last,o,c),blastRepresents the best beam obtained by the last beam training, and has an initial value of imaxAnd o denotes the first beam in the action relative to blastC represents the number of beams in the action, and the beams in the action are continuous; (b)lastO, c) comprises a beam of (b)last-o,blast-o+1,blast-o+2,…,blast-o + c-1); after training is started, firstly initializing parameters required by a training process, establishing a plurality of parameter arrays for storing deviation values of behaviors, the number of beams, average return values, selected return numbers and UCB (upper Confidence bound) values, wherein indexes of each array correspond to behavior numbers one by one; after initialization, selecting a behavior with the maximum UCB value from the UCB array for training, obtaining the corresponding values of the behavior in the offset value array and the beam number array by using the behavior as an index, and generating a candidate beam set of the behavior; the initial value of the UCB should be set to a maximum such that each behavior is trained at least once; the receiving end of the communication system respectively measures the wave beam sets in the behaviors, the antenna writing process of the wave beams is consistent with the process in the wave beam initialization, and the baseband module calculates the energy of the current wave beam receiving signal on the time domain according to the following formula:
wherein y isiEstimating equalized time domain signal for receiving end channelAnd T represents the calculated received signal length;
selecting the optimal beam after all the beams in the behavior are measured, and initializing the same beam in the process; the reward for this training then needs to be determined:
wherein r is1And r2Is a constant value, pthrIs a receiving end power threshold; updating an average return array through a current behavior index according to the reward value, updating parameter values corresponding to a behavior selection round array and a UCB value array, and updating a training total round count at the same time:
wherein μ represents the mean return value, nselRepresenting the number of rounds selected for the training act, ntoIndicates the total number of rounds and u indicates the UCB value.
And 4, step 4: the SPI module acquires corresponding byte data from the memory according to the beam index and the data quantity parameter transmitted by the beam initialization and beam training state machine, and then writes the data into the antenna through the serial port by a self-defined high-speed SPI writing protocol; the flow of the custom SPI write protocol is shown in fig. 3, where the starting address of the data to be written is obtained i × nb+ofTotal number of bytes nbtNumber of bits nbitThen n is addedbtAll data are written into the FIFO storage structure; establishing a control to represent the remaining bit number to be written and initializing the control to the total bit number nbitSimultaneously writing a clock signal into the clock interface; setting a control v to store data written into the antenna in each round, and then writing the data into the antenna bit by bit, wherein v is data with the size of l bits; setting the initial ratio in vA bit index, which is written one by one from the bit data corresponding to the index; due to the total number of bits n that need to be writtenbitUsually not an integer multiple of l, so the first few bits of the first data to be written are usually invalid bits, and the initial bit index is set as the beginning of the valid bit and takes the value of l- (l × n)bt-nbit) -1; reading data from an FIFO storage structure and storing the data in v, judging whether the total bit number is equal to the residual bit number, if so, indicating that the data is in a write-in starting stage, pulling down a chip selection signal and an antenna enabling signal, and simultaneously, setting the initial bit index of v according to the setting; if the values are not equal, the reading is not read from the FIFO for the first time, and only the initial bit index in v needs to be set as l; writing a clock signal into the antenna in each working period of the FPGA, simultaneously writing bit data corresponding to the current index in v, subtracting 1 from the index, and subtracting 1 from the residual bit number to be written; and judging whether the index is 0 or not, and repeating the process of writing the bit and the clock signal if the index is not 0. If the number of the bits to be written is 0, judging whether the number of the bits to be written is 0 or not, if not, continuing to read data from the FIFO to execute bit writing, and if the number of the bits to be written is 0, indicating that n is nbitAnd when the writing of the bit data is finished, resetting the chip selection signal and the antenna enabling signal, and resetting the chip selection signal later than the chip selection signal according to the response time required by the antenna.
And 5: setting a minimum communication quality threshold plimRepresents a minimum performance threshold to maintain normal communication quality; setting continuous failure times control nfailIf not, judging whether the training result reaches the standard or not according to the corresponding power value of the optimal beam obtained by the beam training, and if not, judging that the training result reaches the standardfail=nfail+1, while the beam used in the data transmission phase is still the result of the last standard-compliant training, if the criterion n is satisfiedfail0; when n isfailReaches a certain threshold value nlimThe steps of initial beam setup are re-performed to recover the best beam.
Step 6: and in the data transmission stage of each frame, the best beam obtained by training is used for communication, meanwhile, the beam control module stays in the enabling detection stage, the PXI-trigger register signal is continuously detected, and the beam training process is started if the high level is detected.
Fig. 5 is a schematic diagram of a training period, where each communication frame is a training period, and includes a beam training phase and a data transmission phase. The specific implementation case is illustrated based on an NI millimeter wave prototype verifier platform, wherein an FPGA 7902 serves as a baseband processing part, a 7820 serves as a beam control part, a code environment is LabVIEW 2015, and a training period is tsEach training time is trThe number of actions and the beam offset and the number of beams for each action are set. Power values are calculated at 7902:
and establishing a trigger signal to transmit the beam training enabling signal in real time by establishing point-to-point communication FIFO transmission power values of 7902 and 7820. The array antenna adopts a phased array antenna ZMB28-64TRA, and n is written in four stages in one-time direction switchingbitAnd the bit data supports the high-speed mode writing of the SPI serial port. The beam direction is controlled by a phase control matrix H, which contains 64 antenna elements in total. The relationship between the beam direction θ and the phase shift is given by:
wherein,representing a horizontal or vertical phase shift, k0Is the wave number in free space, and d is the element spacing. Typically, d is taken to be λ/2 and 2 π/λ. And calculating a phase shift value according to the angle value, and generating control frame data according to the phase shift value and storing the control frame data into the memory of 7820.
After the FPGA works, an initialization process is carried out, and the offset of all options is initialized to be o1,o2,…onThe number of training times of the options is {0,0, …,0}, and the total number of training times nto0, current waveBeam number i is 0, and optimum beam number imax0, optimum beam corresponding power pmax0. The codebook is designed as
All wave beams of the codebook are switched in sequence, data are written into the antenna in four stages each time, and n is written into the antenna in total in four stagesbReading the data written in each stage from the memory module with an initial address of i × nb+of,ofIs an offset address. The number of bytes written in each stage is nbtNumber of bits nbit. The SPI module is informed by the SPI _ START signal to START writing the data of the current stage to the antenna. Then, the SPI _ DONE signal fed back by the SPI is waited, and when the SPI _ DONE signal is detected to be in a high level, the data writing in the current stage is completed. And at the moment, a judgment is made, whether all writing in the multiple stages is completed or not is performed, if not, data of the next stage is written in, if so, whether scanning of the codebook is completed or not is judged, if so, the process is ended, a trigger signal monitoring state of beam tracking is entered, the process of beam tracking is waited for, and if not, the optimal beam and the power corresponding to the optimal beam are updated. Updating the optimal beam information and then judging once, if all the beam directions are searched, if not, adding 1 to the beam serial number to write in the SPI module again, if so, according to the obtained optimal beam imaxThe best beam is used as the execution beam serial number to execute the SPI module writing again, and the last best beam b is updatedlast=imaxAnd entering a beam tracking stage and waiting for a beam training trigger signal.
When the trigger signal is high level, triggering the beam training process, and every tsAnd triggering once. After initializing the parameters, selecting the best UCB option:
obtaining the starting and ending sequence numbers of the search beam range:
i=blast+oa,ifinal=i+c
beams within the training option range, switching of direction for each beam is achieved by defining the SPI protocol. Selecting wave beam and power, and updating parameters according to the training result. The reward for this training is set as:
go out best
x1And x2For a fixed value, the optimization target is the tracking success rate, i.e. the average reward value:
the training count and the total training count for the options are updated simultaneously:
the UCB value for each option is calculated as follows:
error monitoring is carried out on the training result, whether the selected beam direction reaches the standard is judged, the best beam power is compared with the lowest standard power, if the selected beam direction does not reach the standard, the continuous misalignment times are added by one, nfail=nfail+1, setting the optimal beam direction as the last optimal beam, if reaching the standard nfail0. If the number of consecutive misalignments reaches a certain threshold nfail>nlimThe initialization process is re-entered to scan the codebook to recover the best beam, otherwise, the next training trigger signal is waited.
And in the data transmission stage of each frame, the best beam obtained by training is used for communication, meanwhile, the beam control module stays in the enabling detection stage, the PXI-trigger register signal is continuously detected, and the beam training process is started if the high level is detected.
When live video data is transmitted through the platform, as shown in fig. 6, the receiving end is in a real-time mobile state, an intelligent beam tracking algorithm based on the FPGA is realized by designing the beam control module, continuous alignment of the receiving end and the transmitting end can be realized, the playing of the live video of the receiving end is always kept smooth and clear, and the phenomenon of pause and blur cannot be generated.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.
Claims (7)
1. A high-speed wave beam control method in a dynamic millimeter wave communication scene based on an FPGA is characterized in that: the method comprises the following steps:
step 1, initializing a beam at a receiving end of a communication system through full codebook scanning, and establishing an initial communication beam;
step 2, establishing data communication between the beam control module and a baseband module carrying the FPGA through an FIFO data structure and a PXI-trigger register, and triggering a beam tracking process and carrying out beam measurement;
step 3, establishing a beam training state machine to realize a beam tracking algorithm model;
step 4, the control of the beam control module to the antenna is realized by transmitting the antenna control information through the SPI module in FIG. 4;
step 5, judging the quality of the beam after each beam training is finished, and if the beam selection is judged to be failed, recovering the beam;
and 6, selecting the optimal transmission beam for data transmission after the beam training is finished, and waiting for a training trigger signal of the next period.
2. The method for controlling high-speed beams in the dynamic millimeter wave communication scene based on the FPGA of claim 1, wherein: the step 1 is specifically as follows:
defining a codebook space asWhere M is the size of the codebook, fiRepresenting an antenna response vector; writing the control bit stream corresponding to each code word into a memory in a byte form in advance according to an antenna format; the beam control module at the receiving end of the communication system firstly carries out one-time full scanning on the full codebook, the realization of the full scanning is realized by establishing an initialization state machine, and the state transfer process is as follows: first, the initial wave number i is equal to 0, and the optimal wave number imax0, power p corresponding to the best beammaxEntering an SPI writing process, and writing beam control information into the antenna in multiple stages according to the antenna requirement, receiving and transmitting the control information, and enabling a signal; multiple phase total write nbReading the data written in each stage from the memory module with an initial address of i × nb+of,ofIs an offset address; the number of bytes written in each stage is nbtNumber of bits nbit(ii) a Informing the SPI module to START writing data of the current stage into the antenna through an SPI _ START signal; then, an SPI _ DONE signal fed back by the SPI module is waited, and when the signal is detected to be a high level, the data writing in the current stage is completed; at the moment, a judgment is made, whether all writing in of a plurality of stages is completed or not is performed, if not, data of the next stage is written in, if so, whether scanning of the codebook is completed or not is judged, if so, the process is ended, a trigger signal monitoring state of beam tracking is entered, the process of beam tracking is waited for, and if not, the optimal beam and the power corresponding to the optimal beam are updated; updating the best beam information and then judging once, if all beam directions are searched, if not, adding 1 to the beam serial number to write in the SPI module again, if so, taking the best beam as the execution beam serial number to execute againThe row is written once by the SPI module.
3. The method for controlling high-speed beams in the dynamic millimeter wave communication scene based on the FPGA of claim 1, wherein: the step 2 is specifically as follows:
in the beam initialization and beam tracking processes, the performance measurement of the beam is needed, the receiving power is calculated through a baseband module at the receiving end of the communication system, and the performance of the beam direction selected by the current antenna is judged by taking the receiving power as an index; the beam measurement is to measure the performance of all beams in each scanning beam range, and take out the beam with the best measurement result for the communication in the data transmission stage; meanwhile, the beam tracking process is carried out periodically, each period is the time of one communication frame, each frame is provided with a beam training field, when the beam training field starts, the baseband module is required to inform the beam control module of the start of beam tracking in the round, a PXI-trigger register is used for realizing low-delay information transmission, the register is set to be at a high level when an enabling signal is transmitted, and the period is long enough to ensure that the register can be read by the beam control module; the performance of the scanning beam is obtained through the beam measuring process, and the optimal beam and the corresponding power are obtained through performance comparison:
wherein imaxRepresenting the best beam, pmaxIndicating the power, p, corresponding to the best beamiRepresenting the power corresponding to the beam i;
and updating the waiting time tau mu s before the current optimal wave beam in order to compensate the time delay caused by power calculation and PXIe bus transmission on the power acquisition of the current wave beam.
4. The method for controlling high-speed beams in the dynamic millimeter wave communication scene based on the FPGA of claim 1, wherein: the step 3 is specifically as follows:
entering a wave beam training stage after the initial process is completed, wherein the wave beam training stage is enabled by a training trigger signal and completed by establishing a wave beam training state machine, and the state transfer process comprises the following steps: the beam tracking stage adopts a random selection optimization model, and a plurality of beam behaviors are preset, wherein each behavior is represented as (b)last,o,c),blastRepresents the best beam obtained by the last beam training, and has an initial value of imaxAnd o denotes the first beam in the action relative to blastC represents the number of beams in the action, and the beams in the action are continuous; (b)lastO, c) comprises a beam of (b)last-o,blast-o+1,blast-o+2,…,blast-o + c-1); after training is started, firstly initializing parameters required by a training process, establishing a plurality of parameter arrays for storing deviation values of behaviors, the number of wave beams, average return values, selected turn numbers and UCB values, wherein indexes of each array correspond to behavior numbers one by one; after initialization, selecting a behavior with the maximum UCB value from the UCB array for training, obtaining the corresponding values of the behavior in the offset value array and the beam number array by using the behavior as an index, and generating a candidate beam set of the behavior; the initial value of the UCB should be set to a maximum such that each behavior is trained at least once; the receiving end of the communication system respectively measures the wave beam sets in the behaviors, the antenna writing process of the wave beams is consistent with the process in the wave beam initialization, and the baseband module calculates the energy of the current wave beam receiving signal on the time domain according to the following formula:
wherein y isiEstimating an equalized time domain signal for a receiving end channel, wherein T represents the calculated length of the received signal;
selecting the optimal beam after all the beams in the behavior are measured, and initializing the same beam in the process; the reward for this training then needs to be determined:
wherein r is1And r2Is a constant value, pthrIs a receiving end power threshold; updating an average return array through a current behavior index according to the reward value, updating parameter values corresponding to a behavior selection round array and a UCB value array, and updating a training total round count at the same time:
wherein μ represents the mean return value, nselRepresenting the number of rounds selected for the training act, ntoIndicates the total number of rounds and u indicates the UCB value.
5. The method for controlling high-speed beams in the dynamic millimeter wave communication scene based on the FPGA of claim 1, wherein: the step 4 is specifically as follows:
the SPI module acquires corresponding byte data from the memory according to the beam index and the data quantity parameter transmitted by the beam initialization and beam training state machine, and then writes the data into the antenna through the serial port by a self-defined high-speed SPI writing protocol; the self-defined SPI writing protocol flow is as follows: obtaining the starting address i x n of the data to be writtenb+ofTotal number of bytes nbtNumber of bits nbitThen n is addedbtAll data are written into the FIFO storage structure; establishing a control to represent the remaining bit number to be written and initializing the control to the total bit number nbitSimultaneously writing a clock signal into the clock interface; setting a control v to store data written into the antenna in each round, and then writing the data into the antenna bit by bit, wherein v is data with the size of l bits; setting an initial bit index in v, and writing bit data corresponding to the index one by one; due to the total number of bits n that need to be writtenbitUsually not an integer multiple of l, so the first few bits of the first data to be written are usually invalid bits, and the initial bit index is set as the beginning of the valid bit and takes the value of l- (l × n)bt-nbit) -1; reading data from an FIFO storage structure and storing the data in v, judging whether the total bit number is equal to the residual bit number, if so, indicating that the data is in a write-in starting stage, pulling down a chip selection signal and an antenna enabling signal, and simultaneously, setting the initial bit index of v according to the setting; if the values are not equal, the reading is not read from the FIFO for the first time, and only the initial bit index in v needs to be set as l; writing a clock signal into the antenna in each working period of the FPGA, simultaneously writing bit data corresponding to the current index in v, subtracting 1 from the index, and subtracting 1 from the residual bit number to be written; and judging whether the index is 0 or not, and repeating the process of writing the bit and the clock signal if the index is not 0. If the number of the bits to be written is 0, judging whether the number of the bits to be written is 0 or not, if not, continuing to read data from the FIFO to execute bit writing, and if the number of the bits to be written is 0, indicating that n is nbitAnd when the writing of the bit data is finished, resetting the chip selection signal and the antenna enabling signal, and resetting the chip selection signal later than the chip selection signal according to the response time required by the antenna.
6. The method for controlling high-speed beams in the dynamic millimeter wave communication scene based on the FPGA of claim 1, wherein: the step 5 is specifically as follows:
setting a minimum communication quality threshold plimRepresents a minimum performance threshold to maintain normal communication quality; setting continuous failure times control nfail0, the optimal corresponding power of the beam obtained by the beam trainingJudging whether the training result reaches the standard at the moment, if not, judging whether the training result reaches the standard or not, and if not, judging whether the training result reaches the standardfail=nfail+1, while the beam used in the data transmission phase is still the result of the last standard-compliant training, if the criterion n is satisfiedfail0; when n isfailReaches a certain threshold value nlimThe steps of initial beam setup are re-performed to recover the best beam.
7. The method for controlling high-speed beams in the dynamic millimeter wave communication scene based on the FPGA of claim 1, wherein: the step 6 is specifically as follows:
and in the data transmission stage of each frame, the best beam obtained by training is used for communication, meanwhile, the beam control module stays in the enabling detection stage, the PXI-trigger register signal is continuously detected, and the beam training process is started if the high level is detected.
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