CN113258918A - Cross-board isolation circuit - Google Patents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017545—Coupling arrangements; Impedance matching circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2175—Class D power amplifiers; Switching amplifiers using analogue-digital or digital-analogue conversion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
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Abstract
The invention provides a cross-board isolation circuit, which comprises: the circuit comprises a first circuit, a second circuit and a third circuit which are mutually independent on hardware, wherein a first isolation unit is arranged in the first circuit, a second isolation unit is arranged in the third circuit, and the first isolation unit is connected with the second isolation unit through the second circuit. The cross-board isolation circuit improves the anti-interference capability of long-distance cross-board analog signal transmission, has an inter-board signal isolation function, and improves the reliability and stability of a system. The invention adopts the LVDS interface to obviously improve the transmission stability and the anti-interference capability of the digital signals between the boards.
Description
Technical Field
The invention belongs to the field of electronics, and particularly relates to a cross-board isolation circuit.
Background
The existing power amplifier can adopt a class A type, a class B type, a class AB type and a class D type. When the class-D digital power amplifier works, the output stage MOS tube is in a completely-conducted or completely-closed state, the switching frequency of the output stage MOS tube is usually between 200KHz and 1MHz and is far higher than the frequency of an input signal, and the problem of low power amplifier conversion efficiency caused by the time of entering a linear amplification working area of the MOS tube is solved. Compared with audio power amplifiers which are mature in class A, class B, class AB and the like, the class D power amplifier has the characteristics of higher conversion efficiency, higher output power, lower distortion rate and the like, and mainly comprises modules such as Pulse Width Modulation (PWM), switching amplification, output filtering and the like.
Due to limitations of system architecture and the like, a signal generation circuit and a power amplification circuit (or a power amplifier) for generating an analog input signal are generally manufactured by dividing the signal generation circuit and the power amplification circuit into two circuit boards, and the two circuit boards are used for signal transmission through a signal transmission interface circuit board.
Disclosure of Invention
In view of the above problems, the present invention provides a cross-board isolation circuit.
The invention relates to a cross-board isolation circuit, comprising:
a first circuit, a second circuit, a third circuit,
a first isolation unit is arranged in the first circuit,
a second isolation unit is arranged in the third circuit,
the first isolation unit is connected with the second isolation unit through a second circuit.
Further, in the present invention,
the first isolation unit is a first isolation transformer (ML 4), the second isolation unit is a second isolation transformer (GL 1),
or
The first isolation unit is a first isolation module (ML 5), the second isolation unit is a second isolation module (GL 8),
the second circuit is a transport interface Circuit (CL).
Further, in the present invention,
the first isolation transformer (ML 4) is connected to a second isolation transformer (GL 1) through a first portion of the transmit interface Circuit (CL).
Further, in the present invention,
an output of the first isolation transformer (ML 4) is connected to an input of the second isolation transformer (GL 1) through a first portion of the transmit interface Circuit (CL),
and the input end of the first isolation transformer (ML 4) is provided with a capacitor (C1), and the capacitor (C1) is used for isolating the direct current component in the signal transmitted to the first isolation transformer (ML 4);
a capacitor for isolating a direct current component in a signal transmitted from the first isolation transformer (ML 4) to the second isolation transformer (GL 1) is arranged between the first isolation transformer (ML 4) and the second isolation transformer (GL 1);
the output end of the second isolation transformer (GL 1) is provided with a capacitor for isolating the direct current component in the signal output by the second isolation transformer (GL 1).
Further, in the present invention,
a capacitor (C4) and a capacitor (C5) which are independently arranged are arranged between the first isolation transformer (ML 4) and the second isolation transformer (GL 1);
and the output end of the second isolation transformer (GL 1) is provided with a capacitor (C8) and a capacitor (C9) which are arranged independently.
Further, in the present invention,
the first isolation module (ML 5) is connected to a second isolation module (GL 8) through a second portion of the transmit interface Circuit (CL).
Further, in the present invention,
the first circuit is an analog signal generating circuit (ML),
the third circuit is a power amplifier (GL).
Further, in the present invention,
the analog signal generating circuit (ML) comprises a single-ended analog signal generating circuit (DL) connected to the first isolation transformer (ML 4);
the power amplifier (GL) comprises a pulse width modulation amplification filtering and signal acquisition circuit (PL), and the second isolation transformer (GL 1) is connected with the pulse width modulation amplification filtering and signal acquisition circuit (PL).
Further, in the present invention,
the analog signal generating circuit (ML) includes a CPU (ML 1), and the CPU (ML 1) is connected to the single-ended analog signal generating circuit (DL).
Further, in the present invention,
the power amplifier (GL) comprises an A/D conversion chip (GL 7), and the second isolation module (GL 8) is connected with the A/D conversion chip (GL 7).
Further, in the present invention,
the analog signal generating circuit (ML) includes a CPU (ML 1), the CPU (ML 1) being connected to the first isolation module (ML 5).
The cross-board isolation circuit improves the anti-interference capability of long-distance cross-board analog signal transmission, has an inter-board signal isolation function, and improves the reliability and stability of a system. The invention adopts the LVDS interface to obviously improve the transmission stability and the anti-interference capability of the digital signals between the boards.
The digital power amplification system adopting the cross-board isolation circuit can improve the anti-interference capability of signal transmission at the input end of the digital power amplifier by introducing the cross-board isolation circuit to carry out conversion processing on the input signal. The digital power amplification system can also acquire voltage and current signals output by the power amplifier by building a signal acquisition and conditioning circuit, and feeds back the digital signals to the input end through an analog/digital conversion chip and a high-speed digital differential interface, so that high-reliability data transmission and quantitative data feedback are realized, the amplitude of signals at the input side of the power amplifier is dynamically adjusted, and the closed-loop control of output signals is realized.
The digital power amplification system adopting the cross-board isolation circuit can adopt a D-type digital power amplification chip circuit of a highly integrated PWM hardware circuit and a switch amplification circuit, and compared with the existing D-type digital power amplification circuit designed through discrete components, the digital power amplification system can realize higher circuit integration level, save the space of a circuit board card and improve the reliability of the system. The method for converting the single-ended analog signal into the differential analog signal and transmitting the differential analog signal can improve the anti-interference capability of long-distance cross-board analog signal transmission, realize signal isolation among boards and improve the reliability and stability of the system. The invention adopts the LVDS interface to obviously improve the transmission stability and the anti-interference capability of the digital signals between the boards. The digital power amplification system adopting the trans-board isolation circuit can further adopt a mode of extracting output voltage and current signals of the power amplifier, can form feedback on input signals of the power amplifier, dynamically adjust the amplitude of the input signals, reduce the fault probability of overcurrent, overvoltage and the like on the load side of the power amplifier, and improve the reliability of the power amplifier.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a digital power amplification system with interference rejection closed loop control according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a signal transmission interference rejection and isolation circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a pwm-amp filtering and signal acquisition circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 shows a schematic diagram of a digital power amplification system employing the anti-jamming closed-loop control of the present invention. The physical meaning of each symbol in fig. 1 is, ML: analog signal generation circuit, ML 1: CPU, ML 2: direct digital frequency synthesizer (DDS) circuit, ML 3: current/voltage conversion circuit, ML 4: first isolation transformer, ML 5: first isolation module, CL: transmission interface circuit, GL: power amplifier, GL 1: second isolation transformer, GL 2: class D power amplifier chip, GL 3: LC low-pass filter, GL 4: current sensor, GL 5: third isolation transformer, GL 6: signal filter circuit, GL 7: a/D conversion chip, GL 8: second isolation module, DL: single-ended analog signal generation circuit, SL: signal transmission anti-interference and isolation circuit, PL: pulse Width Modulation (PWM) amplification filtering and signal acquisition circuit, LI: low Voltage Differential Signaling (LVDS) interface and isolation circuit, S1: single-ended analog signal, S2: first differential analog signal, S3: second differential analog signal, S4: first analog signal, S5: first digital signal, S6: third digital signal, S7: fifth digital signal, S8: second analog signal, S9: second digital signal, S10: fourth digital signal, S11: sixth digital signal, I1: current extraction circuit, I2: and an output voltage extraction circuit. The arrows in fig. 1 indicate the signal transmission direction.
As shown in fig. 1, the digital power amplifying system structure of the present invention mainly includes an analog signal generating circuit ML, a transmission interface circuit CL and a power amplifier GL that are isolated from each other in hardware, where the analog signal generating circuit ML, the transmission interface circuit CL and the power amplifier GL are respectively disposed on separate and independent boards or circuit boards. The analog signal generating circuit ML comprises a CPU ML1, a DDS circuit ML2, a current/voltage converting circuit ML3, a first isolation transformer ML4 and a first isolation module ML 5. The power amplifier GL comprises a second isolation transformer GL1, a class-D power amplifier chip GL2, an LC low-pass filter GL3, a current sensor GL4, a third isolation transformer GL5, a signal filtering circuit GL6, an a/D conversion chip GL7, and a second isolation module GL 8.
Referring to fig. 1, it can be seen that the digital power amplifying system structure using the present invention includes: the system comprises a single-ended analog signal generating circuit DL, a signal transmission anti-interference and isolating circuit SL, a PWM (pulse width modulation) amplifying and filtering and signal collecting circuit PL, an LVDS interface and an isolating circuit LI. The single-ended analog signal generating circuit DL comprises a DDS circuit ML2 and a current/voltage conversion circuit ML 3; the signal transmission anti-interference and isolation circuit SL comprises a first isolation transformer ML4, a first part of a transmission interface circuit CL and a second isolation transformer GL 1; the PWM amplification, filtering and signal acquisition circuit PL comprises a D-type power amplifier chip GL2, an LC low-pass filter GL3, a current sensor GL4, a third isolation transformer GL5 and a signal filtering circuit GL 6; the LVDS interface and isolation circuit LI includes a second isolation module GL8, a second portion of the transmission interface circuit CL, and a first isolation module ML 5.
In the digital power amplifying system structure using the present invention, the CPU ML1, the DDS circuit ML2, the current/voltage conversion circuit ML3, and the first isolation transformer ML4 are connected in this order. The first isolation transformer ML4 is connected to the second isolation transformer GL1 through the first portion of the transmit interface circuit CL. The second isolation transformer GL1, the class-D power amplifier chip GL2, the LC low-pass filter GL3, the current sensor GL4, and the third isolation transformer GL5 are sequentially connected, and the LC low-pass filter GL3 is connected to the third isolation transformer GL 5. The current sensor GL4 is connected to the signal filter circuit GL6 through the current extraction circuit I1, and the third isolation transformer GL5 is connected to the signal filter circuit GL6 through the output voltage extraction circuit I2. The signal filtering circuit GL6, the A/D conversion chip GL7 and the second isolation module GL8 are connected in sequence. The second isolation module GL8 is connected to the first isolation module ML5 through the second section of the transmission interface circuit CL, and the first isolation module ML5 is connected to the CPU ML 1.
In the digital power amplifying system structure, the current/voltage conversion circuit ML3 in the single-ended analog signal generating circuit DL sends the single-ended analog signal S1 to the first isolation transformer ML4 in the signal transmission anti-interference and isolation circuit SL. The single-ended analog signal S1 is isolated and signal-converted by the first isolation transformer ML4 to become a first differential analog signal S2. The first differential analog signal S2 is isolated and signal-converted by the second isolation transformer GL1 to become a second differential analog signal S3. The signal filter circuit GL6 receives the output voltage extraction signal of the output voltage extraction circuit I2 to send out a first analog signal S4 (i.e., a filtered output voltage extraction signal), and the signal filter circuit GL6 also receives the output current extraction signal of the current extraction circuit I1 to send out a second analog signal S8 (i.e., a filtered output current extraction signal). The first analog signal S4 is converted into a first digital signal S5 by the a/D conversion chip GL7, and the second analog signal S8 is converted into a second digital signal S9 by the a/D conversion chip GL 7. The first digital signal S5 becomes the third digital signal S6 through the isolation of the second isolation module GL8, and the second digital signal S9 becomes the fourth digital signal S10 through the isolation of the second isolation module GL 8. The third digital signal S6 becomes a fifth digital signal S7 through the isolation by the first isolation module ML5 and is transmitted to the CPU ML1, and the fourth digital signal S10 becomes a sixth digital signal S11 through the isolation by the first isolation module ML5 and is transmitted to the CPU ML 1. The single-ended analog signal S1 is converted into a second differential analog signal S3 through a first isolation transformer ML4 and a second isolation transformer GL1, the anti-jamming capability of system signal transmission is improved, and meanwhile, the single-ended analog signal S1 in the analog signal generating circuit ML and the second differential analog signal S3 in the power amplifier GL are isolated by the first isolation transformer ML4 and the second isolation transformer GL1, so that an isolation effect is achieved.
In fig. 1, from the a/D conversion chip GL7, the connection lines before the devices sequentially pass through the second isolation module GL8, the transmission interface circuit CL, the first isolation module ML5, and finally the CPU ML1, and are arranged according to differential signal traces, and differential signals are transmitted.
Fig. 1 includes two cross-board isolation circuits, the first cross-board isolation circuit is a signal transmission anti-interference and isolation circuit SL, and the second cross-board isolation circuit is an LVDS interface and an isolation circuit LI. The signal transmission anti-interference and isolation circuit SL realizes the conversion from a single-ended analog signal to a differential analog signal and the transmission of the differential analog signal in the digital power amplification system structure. Fig. 2 is a schematic structural diagram of the signal transmission interference rejection and isolation circuit SL. As shown in fig. 2, the signal transmission interference rejection and isolation circuit SL includes: a first isolation transformer ML4, a first part of the transmission interface circuit CL, a second isolation transformer GL 1. The signal transmission anti-interference and isolation circuit SL is connected to the class-D power amplifier chip GL 2.
As can be seen from fig. 2, after the single-ended analog signal S1 is input from the input side of the first isolation transformer ML4, the output side of the first isolation transformer ML4 outputs a pair of differential analog signals: FSK _ P _1 and FSK _ N _ 1. After signal isolation and expected voltage amplitude ratio conversion at the two sides of the primary side and the secondary side by the first isolation transformer ML4 and isolation of direct-current interference signals by the capacitors C4 and C5, the single-ended analog signal S1 is converted into differential analog signals FSK _ P _1 and FSK _ N _1 by the first isolation transformer ML 4. The differential analog signals FSK _ P _1 and FSK _ N _1 are transplate-transmitted to the INPUT side of a second isolation transformer GL1 of the power amplifier GL through a transmission interface circuit CL, the second isolation transformer GL1 converts the differential analog signals FSK _ P _1 and FSK _ N _1 into differential analog signals FSKP +, FSKN-and outputs the differential analog signals FSKP +, FSKN-from the output side of the second isolation transformer GL1, and the differential analog signals FSKP +, FSKN-are isolated from the dc interference signal by capacitors C8 and C9 and then INPUT to INPUT _ a and INPUT _ B pins of the class D power amplifier chip GL2 as INPUT signals of the class D power amplifier chip GL 2.
The signal transmission anti-interference and isolation circuit SL is used for converting the single-ended analog signal S1 in the analog signal generating circuit ML into the first differential analog signal S2, and improving the anti-interference capability of the cross-board transmission of the first differential analog signal S2, and the first isolation transformer ML4 is used for isolating the single-ended analog signal S1 from the first differential analog signal S2. When the function of the single-ended analog signal generating circuit DL is abnormal, or an external environment causes severe interference with a high amplitude to the S1 signal transmission circuit, the signal transmission circuit at the primary side (i.e., the input side) of the first isolation transformer ML4 may be affected, or even a board where the ML circuit is located may be damaged, but the function and performance of the secondary side (i.e., the output side) of the ML4 and other circuit boards may not be affected. The second isolation transformer GL1 also has an isolation function to isolate the first differential analog signal S2 (i.e., the differential analog signals FSK _ P _1 and FSK _ N _ 1) from the second differential analog signal S3 (i.e., the differential analog signals FSKP + and FSKN-), i.e., the second isolation transformer GL1 isolates the signal before being input to the power amplifier GL from the circuit board where the power amplifier GL is located, so that even if the first differential analog signal S2 is distorted during data transmission and interference is introduced, the function and performance of the board and circuit on the secondary side (i.e., output side) of the second isolation transformer GL1 are not affected. The C1, the C4, the C5, the C8 and the C9 can isolate direct current components in the data transmission line, and avoid damaging the function and the performance of a corresponding transmission circuit due to interference of the direct current components. The capacitor C1 is provided on the input side of the first isolation transformer ML4 in the analog signal generating circuit ML. The capacitors C4, C5 are disposed between the first isolation transformer ML4 and the second isolation transformer GL 1. The capacitors C8 and C9 are disposed on the output side of the second isolation transformer GL 1.
Fig. 3 is a schematic structural diagram of a PWM amplification filtering and signal acquisition circuit PL in the digital power amplification system structure according to the present invention. The PWM amplification filtering and signal acquisition circuit PL includes: the power amplifier circuit comprises a class-D power amplifier chip GL2, an LC low-pass filter GL3, a current sensor GL4, a third isolation transformer GL5, a signal filtering circuit GL6, a current extraction circuit I1 and an output voltage extraction circuit I2. The third isolation transformer GL5 may be externally connected to a load.
As shown in fig. 3, the class D power amplifier chip GL2 performs power amplification on the received input signals FSKP + and FSKN-to obtain and output differential analog signals FSKP +1 and FSKN-1, the differential analog signals FSKP +1 and FSKN-1 are received by the LC low-pass filter GL3 and then are filtered to obtain and output differential analog signals FSKP +2 and FSKN-2, and the differential analog signals FSKP +2 and FSKN-2 are transmitted to the input side of the third isolation transformer GL 5. The current sensor GL4 is connected in series to the line for transmitting FSKP +2 signal between the low-pass filter GL3 and the third isolation transformer GL5, the current sensor GL4 senses the output current of the power amplifier accordingly, and records the sensed result as a single-ended analog signal ICHECK, which is transmitted to the current recovery circuit I1. The third isolation transformer GL5 performs isolation transformation processing on the differential analog signals FSKP +2 and FSKN-2 to obtain a single-ended analog signal VCHECK, and the single-ended analog signal VCHECK is transmitted to the output voltage extraction circuit I2. The current extraction circuit I1 and the output voltage extraction circuit I2 respectively perform current extraction and output voltage extraction on the received single-ended analog signals to respectively obtain output current extraction signals and output voltage extraction signals. In the PWM amplifying, filtering and signal collecting circuit PL, a class D power amplifier chip GL2 and an LC low-pass filter GL3 are used for successively carrying out amplitude amplification and filtering processing on the second differential analog signal S3 to obtain differential analog signals FSKP +2 and FSKN-2; the current sensor GL4 is used for accurately acquiring the filtered current (i.e. the output current of the power amplifier) output by the class-D power amplifier chip GL 2; the third isolation transformer GL5 is used for isolating signals between the class-D power amplifier chip GL2 and the load; the signal filter circuit GL6 filters the output current extraction signal and the output voltage extraction signal.
The digital power amplification system with the anti-interference closed-loop control realizes the acquisition of output current and output voltage, and can realize the dynamic adjustment of the output power of the power amplifier along with the different impedances of connected loads, so that the output power of the power amplifier is not influenced by the change of the loads, and the digital power amplification system has higher performance and configuration flexibility.
The LVDS interface and the isolation circuit LI of fig. 1 include a second isolation module GL8 and a first isolation module ML5 disposed across a board through a transmission interface circuit CL (i.e., LVDS interface). The second isolation module GL8 isolates the first digital signal S5 from the third digital signal S6, and also isolates the second digital signal S9 from the fourth digital signal S10, the first digital signal S5 and the second digital signal S9 use a differential routing method, and the third digital signal S6 and the fourth digital signal S10 use a differential routing method. The first isolation module ML5 isolates the third digital signal S6 from the fifth digital signal S7, and also isolates the fourth digital signal S10 from the sixth digital signal S11, and the fifth digital signal S7 and the sixth digital signal S11 use differential routing. The LVDS interface and the isolation circuit LI are transmitted across the board through the LVDS interface, and the anti-interference capability of long-distance signal transmission across the board is improved.
By adopting the cross-board isolation circuit, the cross-board transmission of signals of the system is realized, and the cross-board isolation circuit can:
(1) realize single function circuit modularized design, carry out modularized design to signal generation circuit, isolation transmission interface, power amplifier circuit and output voltage, current signal recovery promptly to the different application scenarios of adaptation, if: the signal generating circuit with single function can be matched with other types of power amplifying circuits, and vice versa;
(2) the space design limitation is broken through, functions required by all systems are realized by adopting a single circuit board card, and the circuit board card occupies a large space and is easy to be limited by space in application; if the space is limited, the corresponding functions and performances that can be realized by a single circuit board card are also limited. Carry out the modularization split to the required function of system, design polylith circuit board card, adopt the mode of "taking building blocks" to make up each functional circuit board card again, realize the required function of system, can improve the expansibility of system design in finite space for the function of system is abundanter, the performance is more powerful. Even under the condition that the single circuit board card and the modularized multi-circuit board card realize the same function and performance, the modularized multi-circuit board card is more flexible in configuration and saves space compared with the single circuit board card. The application range of the system is expanded, and the flexible application of the system is facilitated.
(3) And the maintenance cost is saved. When the single circuit board card is adopted to realize the functions of signal generation, power amplification, output filtering, signal extraction and the like, signals are transmitted among different functional circuits without signal isolation processing, so that when one part of the circuits are broken down and damaged, other electronic devices and board card cables in the circuit board card are likely to be damaged together, the maintainability of the single circuit board card is poor, and the maintenance cost of the system can be improved by integrally replacing the single circuit board card. The design method also has the significance of adopting functional modularization, designing a plurality of circuit board cards and carrying out cross-board data transmission isolation on each circuit board.
The double closed-loop control process of the digital power amplification system adopting the cross-board isolation circuit comprises the following steps: the CPU ML1 accurately collects and quantitatively analyzes the output voltage and current of the power amplifier and then controls and outputs the required S1 signal amplitude to realize the closed-loop control of the system, thereby reducing the probability of the faults of overcurrent, overload and the like at the output end of the power amplifier. The digital power amplification system adopting the cross-board isolation circuit collects voltage and current signals output by the power amplifier by building a signal collecting and conditioning circuit, and feeds back the digital signals to the input end through an analog/digital conversion chip and a high-speed digital differential interface, so that high-reliability data transmission and quantitative data feedback are realized, the signal amplitude at the input side of the power amplifier is dynamically adjusted, and the closed-loop control of the output signals is realized.
The digital power amplification system adopting the cross-board isolation circuit can improve the anti-interference capability of signal transmission at the input end of the digital power amplifier by introducing the cross-board isolation circuit to carry out conversion processing on the input signal. The digital power amplification system can also acquire voltage and current signals output by the power amplifier by building a signal acquisition and conditioning circuit, and feeds back the digital signals to the input end through an analog/digital conversion chip and a high-speed digital differential interface, so that high-reliability data transmission and quantitative data feedback are realized, the amplitude of signals at the input side of the power amplifier is dynamically adjusted, and the closed-loop control of output signals is realized.
The digital power amplification system adopting the cross-board isolation circuit can adopt a D-type digital power amplification chip circuit of a highly integrated PWM hardware circuit and a switch amplification circuit, and compared with the existing D-type digital power amplification circuit designed through discrete components, the digital power amplification system can realize higher circuit integration level, save the space of a circuit board card and improve the reliability of the system. The method for converting the single-ended analog signal into the differential analog signal and transmitting the differential analog signal can improve the anti-interference capability of long-distance cross-board analog signal transmission, realize signal isolation among boards and improve the reliability and stability of the system. The invention adopts the LVDS interface to obviously improve the transmission stability and the anti-interference capability of the digital signals between the boards. The digital power amplification system adopting the trans-board isolation circuit can further adopt a mode of extracting output voltage and current signals of the power amplifier, can form feedback on input signals of the power amplifier, dynamically adjust the amplitude of the input signals, reduce the fault probability of overcurrent, overvoltage and the like on the load side of the power amplifier, and improve the reliability of the power amplifier.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (11)
1. A cross-board isolation circuit, comprising:
a first circuit, a second circuit, a third circuit,
a first isolation unit is arranged in the first circuit,
a second isolation unit is arranged in the third circuit,
the first isolation unit is connected with the second isolation unit through a second circuit.
2. The cross-board isolation circuit of claim 1,
the first isolation unit is a first isolation transformer (ML 4), the second isolation unit is a second isolation transformer (GL 1),
or
The first isolation unit is a first isolation module (ML 5), the second isolation unit is a second isolation module (GL 8),
the second circuit is a transport interface Circuit (CL).
3. The cross-board isolation circuit of claim 2,
the first isolation transformer (ML 4) is connected to a second isolation transformer (GL 1) through a first portion of the transmit interface Circuit (CL).
4. The cross-board isolation circuit of claim 3,
an output of the first isolation transformer (ML 4) is connected to an input of the second isolation transformer (GL 1) through a first portion of the transmit interface Circuit (CL),
and the input end of the first isolation transformer (ML 4) is provided with a capacitor (C1), and the capacitor (C1) is used for isolating the direct current component in the signal transmitted to the first isolation transformer (ML 4);
a capacitor for isolating a direct current component in a signal transmitted from the first isolation transformer (ML 4) to the second isolation transformer (GL 1) is arranged between the first isolation transformer (ML 4) and the second isolation transformer (GL 1);
the output end of the second isolation transformer (GL 1) is provided with a capacitor for isolating the direct current component in the signal output by the second isolation transformer (GL 1).
5. The cross-board isolation circuit of claim 4,
a capacitor (C4) and a capacitor (C5) which are independently arranged are arranged between the first isolation transformer (ML 4) and the second isolation transformer (GL 1);
and the output end of the second isolation transformer (GL 1) is provided with a capacitor (C8) and a capacitor (C9) which are arranged independently.
6. The cross-board isolation circuit of claim 2,
the first isolation module (ML 5) is connected to a second isolation module (GL 8) through a second portion of the transmit interface Circuit (CL).
7. The cross-board isolation circuit of any of claims 3 to 6,
the first circuit is an analog signal generating circuit (ML),
the third circuit is a power amplifier (GL).
8. The cross-board isolation circuit of claim 7,
the analog signal generating circuit (ML) comprises a single-ended analog signal generating circuit (DL) connected to the first isolation transformer (ML 4);
the power amplifier (GL) comprises a pulse width modulation amplification filtering and signal acquisition circuit (PL), and the second isolation transformer (GL 1) is connected with the pulse width modulation amplification filtering and signal acquisition circuit (PL).
9. The cross-board isolation circuit of claim 8,
the analog signal generating circuit (ML) includes a CPU (ML 1), and the CPU (ML 1) is connected to the single-ended analog signal generating circuit (DL).
10. The cross-board isolation circuit of claim 7,
the power amplifier (GL) comprises an A/D conversion chip (GL 7), and the second isolation module (GL 8) is connected with the A/D conversion chip (GL 7).
11. The cross-board isolation circuit of claim 10,
the analog signal generating circuit (ML) includes a CPU (ML 1), the CPU (ML 1) being connected to the first isolation module (ML 5).
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113872892A (en) * | 2021-10-25 | 2021-12-31 | 中铁通信信号勘测设计院有限公司 | Coded signal power amplification and transformation device and coded transmitter |
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| CN113258918B (en) | 2021-09-28 |
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