CN113258548A

CN113258548A - Power supply circuit and power supply system

Info

Publication number: CN113258548A
Application number: CN202110495405.7A
Authority: CN
Inventors: 陈强; 沈剑; 黄嘉曦
Original assignee: Shenzhen Immotor Technology Co ltd
Current assignee: Shenzhen Immotor Technology Co ltd
Priority date: 2021-05-07
Filing date: 2021-05-07
Publication date: 2021-08-13

Abstract

The utility model discloses a power supply circuit and electrical power generating system belongs to power technical field. The power supply circuit includes: the device comprises an NTC resistor, a control circuit, a first resistor and a PMOS (P-channel metal oxide semiconductor) tube; the first end of the NTC resistor and the power supply end of the control circuit are connected with a power supply, the second end of the NTC resistor is respectively connected with the first end of the first resistor and the source electrode of the PMOS tube, the second end of the first resistor and the grid electrode of the PMOS tube are both connected with the control end of the control circuit, and the drain electrode of the PMOS tube is the first output end of the power supply circuit; the control circuit controls the control end of the power supply not to be connected with the ground wire when the power supply does not need to output electric energy through the power supply circuit, and controls the control end of the power supply to be connected with the ground wire when the power supply needs to output electric energy through the power supply circuit. The current of the power supply when just beginning to output electric energy through the power supply circuit can be limited through the NTC resistor, so that the current output by the power supply in the moment of supplying power for the electric equipment cannot be overlarge, and the overload damage of the power supply, the power supply circuit or a wire is avoided.

Description

Power supply circuit and power supply system

Technical Field

The present application relates to the field of power supply technologies, and in particular, to a power supply circuit and a power supply system.

Background

Under the condition that the power supply supplies power to the electric equipment, the power supply circuit is often used for transmitting the electric energy of the power supply to the electric equipment, and the electric equipment can be powered to work.

In the related art, referring to fig. 1, a power supply circuit 100 includes a resistor R, a transistor Q, and an MCU (micro controller Unit). Under the condition that the electric equipment 102 does not need the power supply of the power supply 101, the MCU does not output voltage to the base electrode of the triode Q, the triode Q is turned off, and the power supply 101 does not output electric energy to the electric equipment 102. Under the condition that the electric equipment 102 needs the power supply of the power supply 101, the MCU outputs voltage to the base electrode of the triode Q, the triode Q is conducted, and the power supply 101 outputs electric energy to the electric equipment 102 through the triode Q. The input end of the electric equipment 102 is generally connected with a capacitor C for filtering, at the moment when the triode Q is turned on, the power supply 101 charges the capacitor C first, at this moment, because the charge amount of the capacitor C is zero, the voltage of the capacitor C is zero, that is, the capacitor C is in a short-circuit state at the moment of power-on, at the moment of power-on of the capacitor C, the current output by the power supply 101 is very large, and along with the gradual increase of the charge amount of the capacitor C, the current output by the power supply 101 is gradually reduced.

However, the power source 101, the power supply circuit 100 and the wires are rated, and if the current output by the power source 101 is too large to exceed the rated current of the power source 101, the power supply circuit 100 or the wires, the power source 101, the power supply circuit 100 or the wires may be damaged due to overload.

Disclosure of Invention

The application provides a power supply circuit and a power supply system, which can avoid overload damage of a power supply, the power supply circuit or a lead. The technical scheme is as follows:

in a first aspect, a power supply circuit is provided, which includes: an NTC (Negative Temperature Coefficient) resistor, a control circuit, a first resistor and a PMOS (P-channel Metal-Oxide-Semiconductor) tube;

the first end of the NTC resistor and the power supply end of the control circuit are used for being connected with a power supply, the second end of the NTC resistor is respectively connected with the first end of the first resistor and the source electrode of the PMOS tube, the second end of the first resistor and the grid electrode of the PMOS tube are both connected with the control end of the control circuit, and the drain electrode of the PMOS tube is a first output end of the power supply circuit;

the control circuit is used for controlling the control end of the control circuit not to be connected with the ground wire under the condition that the power supply does not need to output electric energy through the power supply circuit, and controlling the control end of the control circuit to be connected with the ground wire under the condition that the power supply needs to output electric energy through the power supply circuit.

In the application, the power supply outputs electric energy to the NTC resistor and the control circuit, and under the condition that the power supply needs to output the electric energy through the power supply circuit, the control circuit controls the control end of the control circuit to be connected with the ground wire, at the moment, the PMOS tube is conducted, and the first output end of the power supply circuit supplies power to the electric equipment. Because the NTC resistance is bigger when being in the normal temperature state, also is bigger at the moment of conducting the PMOS pipe, so the current output by the power supply is smaller at the moment of conducting the PMOS pipe, thus the current of the power supply when the power supply just begins to output electric energy through the power supply circuit can be limited through the NTC resistance, the current output by the power supply at the moment of supplying power to the electric equipment is not too big, and the overload damage of the power supply, the power supply circuit or the wire can be avoided.

Optionally, the power supply circuit further includes a slow start circuit, where the slow start circuit includes a first capacitor and a second resistor;

the first polar plate of the first capacitor is connected with the second end of the NTC resistor and the source electrode of the PMOS tube respectively, the second polar plate of the first capacitor is connected with the first end of the second resistor, and the second end of the second resistor is connected with the second end of the first resistor and the grid electrode of the PMOS tube respectively. .

Optionally, the slow start circuit further includes a third resistor;

the first end of the third resistor is connected with the second end of the first resistor, and the second end of the third resistor is respectively connected with the second end of the second resistor and the grid electrode of the PMOS tube.

Optionally, the control circuit includes an MCU (micro controller unit), an NMOS (Negative-channel Metal-Oxide-Semiconductor) transistor, a fourth resistor, and a fifth resistor;

the power end of the MCU is used for being connected with the power supply, the control end of the MCU is connected with the grid electrode of the NMOS tube, the fourth resistor is connected between the grid electrode and the source electrode of the NMOS tube, the fifth resistor is connected between the source electrode and the drain electrode of the NMOS tube, the source electrode of the NMOS tube is connected with the ground wire, and the drain electrode of the NMOS tube is connected with the second end of the first resistor;

the MCU is used for controlling the NMOS tube to be switched off under the condition that the power supply does not need to output electric energy through the power supply circuit, and controlling the NMOS tube to be switched on under the condition that the power supply needs to output electric energy through the power supply circuit.

Optionally, the power supply circuit further includes an electrostatic Discharge (ESD) protection circuit;

the first end of the ESD protection circuit is connected with the drain electrode of the PMOS tube, the second end of the ESD protection circuit is connected with the ground wire, and the second end of the ESD protection circuit is the second output end of the power supply circuit.

Optionally, the ESD protection circuit comprises a varistor;

the first end of the piezoresistor is connected with the drain electrode of the PMOS tube, the second end of the piezoresistor is connected with the ground wire, and the second end of the piezoresistor is the second output end of the power supply circuit.

Optionally, the power supply circuit further comprises a filter circuit;

the first end of the filter circuit is connected with the drain electrode of the PMOS tube, the second end of the filter circuit is connected with the ground wire, and the second end of the filter circuit is the second output end of the power supply circuit.

Optionally, the filter circuit comprises a second capacitor;

the first polar plate of the second capacitor is connected with the drain electrode of the PMOS tube, the second polar plate of the second capacitor is connected with the ground wire, and the second polar plate of the second capacitor is the second output end of the power supply circuit.

In a second aspect, a power supply circuit is provided, the power supply circuit comprising: the circuit comprises a control circuit, a first resistor, a slow start circuit and a P-channel metal oxide semiconductor PMOS (P-channel metal oxide semiconductor) tube, wherein the slow start circuit comprises a first capacitor and a second resistor;

the power supply end of the control circuit, the first end of the first resistor, the first pole plate of the first capacitor and the source electrode of the PMOS tube are all used for being connected with a power supply, the second pole plate of the first capacitor is connected with the first end of the second resistor, the second end of the first resistor, the second end of the second resistor and the grid electrode of the PMOS tube are all connected with the control end of the control circuit, and the drain electrode of the PMOS tube is a first output end of the power supply circuit;

In the application, a power supply outputs electric energy to a first resistor, a first capacitor, a source electrode of a PMOS (P-channel metal oxide semiconductor) tube and a power supply end of a control circuit, the control circuit controls the control end of the control circuit to be connected with a ground wire under the condition that the power supply needs to output electric energy through a power supply circuit, as a gradually reduced current flows through a second resistor when a first capacitor is charged, the voltage on a grid electrode of the PMOS tube is gradually reduced, as the voltage output by the power supply exists on the source electrode of the PMOS tube, the PMOS tube enters an incomplete conduction state under the condition that the absolute value of the voltage difference between the source electrode and the grid electrode of the PMOS tube is larger than the starting threshold value of the PMOS tube, a gradually increased current starts to flow through a drain electrode of the PMOS tube until the first capacitor is fully charged and no current flows through a second resistor, at the voltage on the grid electrode of the PMOS tube is pulled to be very low, and the absolute value of the voltage difference between the source electrode and the grid electrode of the PMOS tube is larger than the conducting threshold value of the PMOS tube, the PMOS tube is completely conducted, the first output end of the power supply circuit outputs constant current, and the power supply can normally supply power for the electric equipment at the moment. Therefore, the PMOS tube is gradually changed from the incomplete conduction state to the complete conduction state, so that the current output by the power supply is gradually increased, the current of the power supply at the beginning of outputting electric energy through the power supply circuit can be limited, the current output by the power supply at the moment of supplying power to the electric equipment is not too large, and the overload damage of the power supply, the power supply circuit or a lead can be avoided.

Optionally, the slow start circuit further includes a third resistor;

Optionally, the power supply circuit further comprises an NTC resistor;

the first end of the NTC resistor is used for being connected with the power supply, and the second end of the NTC resistor is respectively connected with the first end of the first resistor, the first polar plate of the first capacitor and the source electrode of the PMOS tube.

Optionally, the control circuit includes an MCU, an NMOS transistor, a fourth resistor, and a fifth resistor.

Optionally, the power supply circuit further comprises an ESD protection circuit;

Optionally, the ESD protection circuit comprises a varistor;

Optionally, the power supply circuit further comprises a filter circuit;

Optionally, the filter circuit comprises a second capacitor;

In a third aspect, a power supply system is provided, which comprises a power supply and the above power supply circuit.

It is to be understood that, the beneficial effects of the third aspect may be referred to the relevant description of the first aspect and the second aspect, and are not described herein again.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a power supply circuit provided in the related art;

fig. 2 is a schematic structural diagram of a first power supply circuit provided in an embodiment of the present application;

fig. 3 is a schematic structural diagram of a second power supply circuit provided in an embodiment of the present application;

fig. 4 is a schematic structural diagram of a third power supply circuit provided in an embodiment of the present application;

fig. 5 is a schematic structural diagram of a fourth power supply circuit provided in the embodiment of the present application;

fig. 6 is a schematic structural diagram of a fifth power supply circuit provided in an embodiment of the present application;

fig. 7 is a schematic structural diagram of a sixth power supply circuit provided in an embodiment of the present application;

fig. 8 is a schematic structural diagram of a seventh power supply circuit provided in an embodiment of the present application;

fig. 9 is a schematic structural diagram of an eighth power supply circuit provided in an embodiment of the present application;

fig. 10 is a schematic structural diagram of a ninth power supply circuit provided in an embodiment of the present application;

fig. 11 is a schematic structural diagram of a tenth power supply circuit provided in an embodiment of the present application;

fig. 12 is a schematic structural diagram of an eleventh power supply circuit provided in an embodiment of the present application;

fig. 13 is a schematic structural diagram of a twelfth power supply circuit provided in an embodiment of the present application;

fig. 14 is a schematic structural diagram of a thirteenth power supply circuit provided in an embodiment of the present application.

Reference numerals:

the related technology comprises the following steps:

100: power supply circuit, 101: power supply, 102: electric equipment, R: resistance, Q: a triode, C: capacitance, MCU: a micro control unit;

the application:

200: power supply circuit, 201: control circuit, 202: power supply, 2031: first output terminal of power supply circuit, 2032: second output of the power supply circuit, 204: ESD protection circuit, 205: filter circuit, 206: a slow start circuit;

r0: NTC resistance, R1: first resistance, R2: second resistance, R3: third resistance, R4: fourth resistance, R5: fifth resistance, R6: varistor, C1: first capacitance, C2: second capacitance, Q1: PMOS transistor, g 1: gate of PMOS transistor, d 1: drain of PMOS transistor, s 1: source of PMOS transistor, Q2: NMOS tube, g 2: gate of NMOS transistor, d 2: drain of NMOS transistor, s 2: and a source electrode of the NMOS tube.

Detailed Description

To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

It should be understood that reference to "a plurality" in this application means two or more. In addition, for the convenience of clearly describing the technical solutions of the present application, the terms "first", "second", and the like are used to distinguish the same items or similar items having substantially the same functions and actions. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance.

Before explaining the embodiments of the present application in detail, an application scenario of the embodiments of the present application will be described.

Under the condition that the power supply supplies power to the electric equipment, the power supply circuit is often used for transmitting the electric energy of the power supply to the electric equipment, and the electric equipment can be powered to work. Referring to fig. 1, the input terminal of the consumer is generally connected to a capacitor for filtering, and the capacitor generally has a relatively large capacitance. In the case that the electric equipment needs to be powered, the power supply charges the capacitor first, and the electric equipment can be powered only after the voltage between the first plate and the second plate of the capacitor is not 0. However, the charge amount of the capacitor at the moment of power-on is zero, that is, the capacitor is in a short-circuit state at the moment of power-on, so that the current output by the power supply is very large at this moment, and the power supply, the power supply circuit or the lead wire have the problem of possible overload damage.

Therefore, the embodiment of the application provides a power supply circuit and a power supply system, which can solve the problem that the output current of a power supply is too large at the moment of supplying power to electric equipment, so that the power supply, the power supply circuit or a lead can be prevented from being damaged due to overload.

The power supply circuit provided by the embodiment of the present application can be used as a power supply circuit of a 6V (volt) power supply, a 12V power supply, a 24V power supply, a 48V power supply, a 72V power supply, and other power supplies with other voltage levels, which is not limited in the embodiment of the present application.

The power supply circuit and the power supply system provided by the embodiments of the present application are explained in detail below.

Fig. 2 is a schematic structural diagram of a power supply circuit 200 according to an embodiment of the present disclosure. Referring to fig. 2, the power supply circuit 200 includes an NTC resistor R0, a control circuit 201, a first resistor R1, and a PMOS transistor Q1.

The first end of the NTC resistor R0 and the power source end of the control circuit 201 are configured to be connected to the power source 202, the second end of the NTC resistor R0 is connected to the first end of the first resistor R1 and the source s1 of the PMOS transistor Q1, respectively, the second end of the first resistor R1 and the gate g1 of the PMOS transistor Q1 are both connected to the control end of the control circuit 201, and the drain d1 of the PMOS transistor Q1 is the first output end 2031 of the power supply circuit 200.

The control circuit 201 is used for controlling the control terminal of the control circuit 201 not to be connected with the ground wire in the case that the power supply 202 does not output the electric energy through the power supply circuit 200, and controlling the control terminal of the control circuit 201 to be connected with the ground wire in the case that the power supply 202 needs to output the electric energy through the power supply circuit 200.

The NTC resistor R0 is a resistor whose resistance decreases with increasing temperature. That is, the resistance of the NTC resistor R0 at normal temperature is relatively large, and as the temperature of the NTC resistor R0 increases, the resistance of the NTC resistor R0 decreases. Illustratively, the resistance of the NTC resistor R0 is 5 ohms at normal temperature, and after the NTC resistor R0 has operated for a period of time in the upper power supply, the resistance of the NTC resistor R0 decreases to 1 ohm due to the increase of temperature.

The first resistor R1 may be a large resistor, for example, the first resistor R1 may be 100K Ω (kilo ohms).

The PMOS transistor Q1 is a field effect transistor that can be used in analog circuits and digital circuits, can be used as an electronic switch, a controllable rectifier, or the like, and is a voltage-driven type device. The PMOS transistor Q1 generally has a turn-on threshold, the turn-on threshold of the PMOS transistor Q1 is the threshold of the PMOS transistor Q1 entering the constant current region, and in the case that the PMOS transistor Q1 enters the constant current region, a current source is defined between the source s1 and the drain d1 of the PMOS transistor Q1.

The power source 202 may output power through the power supply circuit 200, that is, may supply power to the electric device through the power supply circuit 200. The first output terminal 2031 of the power supply circuit 200 is used for outputting electric energy to the electric equipment, and generally, a capacitor for filtering is connected between the first output terminal 2031 of the power supply circuit 200 and the electric equipment. Alternatively, this capacitor may be connected between the first output 2031 of the power supply circuit 200 and ground.

The electric equipment can be any electric equipment, such as a bulb, a camera or an alarm, and the like, and the electric equipment is not limited in the application.

The power supply 202 outputs electric energy to the NTC resistor R0 and the power supply end of the control circuit 201, and under the condition that the power supply 202 does not need to output electric energy through the power supply circuit 200, the control circuit 201 controls the control end of the control circuit 201 not to be connected with the ground, at this time, the voltage of the gate g1 of the PMOS transistor Q1 is higher, so that the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is smaller than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is turned off, and no current is output from the first output end 2031 of the power supply circuit 200. Since the resistance of the first resistor R1 is large, the current flowing through the NTC resistor R0 and the first resistor R1 is very small, the power of the NTC resistor R0 is very small, and the temperature change of the NTC resistor R0 is very small, so that the resistance of the NTC resistor R0 is still large in this state.

The power supply 202 outputs power to the NTC resistor R0 and the power supply terminal of the control circuit 201, in case the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, at this time, the voltage of the gate g1 of the PMOS transistor Q1 is low, and since the power supply 202 applies a voltage to the source s1 of the PMOS transistor Q1 through the NTC resistor R0, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, and the power supply 202 outputs power through the NTC resistor R0 and the PMOS transistor Q1, that is, the power is output through the first output terminal 2031 of the power supply circuit 200. In this process, since the NTC resistor R0 has a large resistance value at the normal temperature, that is, the NTC resistor R0 has a large resistance value at the moment when the PMOS transistor Q1 is turned on, the current output by the power supply 202 is small at the moment when the PMOS transistor Q1 is turned on, so that the current of the power supply 202 at the moment when the power supply circuit 200 outputs electric energy just starts can be limited by the NTC resistor R0, so that the current output by the power supply 202 at the moment when the power supply circuit supplies power to the electric device is not too large, and overload damage to the power supply 202, the power supply circuit 200, or the wires can be avoided. After the PMOS transistor Q1 is fully turned on, as current continuously flows through the NTC resistor R0 and the PMOS transistor Q1, the first output terminal 2031 of the power supply circuit 200 continuously outputs current, the NTC resistor R0 generates heat during operation, which causes the resistance of the NTC resistor R0 to become small, at this time, the current output by the power supply 202 increases, the current output by the first output terminal 2031 of the power supply circuit 200 increases, until the resistance of the NTC resistor R0 decreases to be small, the power of the NTC resistor R0 becomes extremely low, at this time, the resistance of the NTC resistor R0 can be ignored, and the power supply 202 can normally supply power to the electric device.

Optionally, referring to fig. 3, the control circuit 202 includes an MCU, an NMOS transistor Q2, a fourth resistor R4, and a fifth resistor R5.

The power supply end of the MCU is used for being connected with a power supply 202, the control end of the MCU is connected with a gate g2 of an NMOS tube Q2, a fourth resistor R4 is connected between a gate g2 and a source s2 of the NMOS tube Q2, a fifth resistor R5 is connected between a source s2 and a drain d2 of the NMOS tube Q2, a source s2 of the NMOS tube Q2 is connected with the ground line, and a drain d2 of the NMOS tube Q2 is connected with a second end of the first resistor R1.

The MCU is configured to control the NMOS transistor Q2 to turn off when the power supply 202 does not need to output power through the power supply circuit 200, and to control the NMOS transistor Q2 to turn on when the power supply 202 needs to output power through the power supply circuit 200.

The NMOS transistor Q2 is a field effect transistor that can be used in analog circuits and digital circuits, can be used as an electronic switch, a controllable rectifier, or the like, and is a voltage-driven type device. The NMOS transistor Q2 generally has a turn-on threshold, the turn-on threshold of the NMOS transistor Q2 is the threshold of the NMOS transistor Q2 entering the constant current region, and in the case that the NMOS transistor Q2 enters the constant current region, a current source is defined between the source s1 and the drain d1 of the NMOS transistor Q2.

The MCU is a chip-level computer formed by appropriately reducing the frequency and specification of a cpu and integrating a memory, a counter, and various interfaces and circuits on a single chip.

The fourth resistor R4 and the fifth resistor R5 may function as an anti-interference and stable circuit, and the fourth resistor R4 and the fifth resistor R5 may be resistors with large resistance values, for example, the fourth resistor R4 and the fifth resistor R5 may have resistance values of 100K Ω.

When the power supply 202 outputs power to the NTC resistor R0 and the power supply terminal of the MCU, the MCU does not output voltage to the gate g2 of the NMOS transistor Q2 when the power supply 202 does not need to output power through the power supply circuit 200, so the absolute value of the voltage difference between the gate g2 and the source s2 of the NMOS transistor Q2 is smaller than the on-threshold of the NMOS transistor Q2, the NMOS transistor Q2 is turned off, and at this time, the gate g1 of the PMOS transistor Q1 is higher, so that the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is smaller than the on-threshold of the PMOS transistor Q2, the PMOS transistor Q1 is turned off, and the first output terminal 2031 of the power supply circuit 200 outputs no current. In addition, since the resistances of the first resistor R1 and the fifth resistor R5 are very large, the current flowing through the NTC resistor R0, the first resistor R1 and the fifth resistor R5 is small and negligible, and the NTC resistor R0 generates very small heat, so that the resistance of the NTC resistor R0 is still relatively large in this case.

When the power supply 202 needs to output power through the power supply circuit 200, the MCU outputs a voltage to the gate g2 of the NMOS transistor Q2, such that the absolute value of the voltage difference between the gate g2 and the source g2 of the NMOS transistor Q2 is greater than the turn-on threshold of the NMOS transistor Q2, the NMOS transistor Q2 is turned on, and the drain d2 of the NMOS transistor Q2 is connected to the ground. At this time, the voltage of the gate g1 of the PMOS transistor Q1 is pulled low, and since the power supply 202 applies a voltage to the source s1 of the PMOS transistor Q1 through the NTC resistor R0, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, and the power supply 202 outputs a current through the NTC resistor R0 and the PMOS transistor Q1, i.e., outputs a current through the first output terminal 2031 of the power supply circuit 200, at this time, the power supply 202 can supply power to the electric device.

It is worth pointing out that the MCU can achieve the effect of controlling the on/off of the PMOS transistor Q1 by controlling the on/off of the NMOS transistor Q2.

Optionally, referring to fig. 4, the power supply circuit 200 further includes an ESD protection circuit 204.

The first terminal of the ESD protection circuit 204 is connected to the drain d1 of the PMOS transistor Q1, the second terminal of the ESD protection circuit 204 is connected to the ground, and the second terminal of the ESD protection circuit 204 is the second output terminal 2032 of the power supply circuit 200.

The second output 2032 of the power supply circuit 200 is for connection to ground. In general, a capacitor for filtering is connected between the first output terminal 2031 and the second output terminal 2032 of the power supply circuit 200.

The ESD protection circuit 204 is a circuit for preventing static electricity generated from the outside from affecting the inside of the circuit.

Illustratively, referring to fig. 4, the ESD protection circuit 204 includes a varistor R6.

The first terminal of the voltage dependent resistor R6 is connected to the drain d1 of the PMOS transistor Q1, the second terminal of the voltage dependent resistor R6 is connected to ground, and the second terminal of the voltage dependent resistor R6 is the second output terminal 2032 of the power supply circuit 200.

The voltage dependent resistor R6 is made of voltage dependent ceramic material, and when the voltage applied to the two ends of the voltage dependent resistor R6 is smaller than that of the voltage dependent resistor R6, the voltage dependent resistor R6 is equivalent to an insulation resistor of more than 10MQ (mega ohm). When an overvoltage larger than the voltage-dependent voltage of the voltage-dependent resistor R6 is applied across the voltage-dependent resistor R6, the resistance of the voltage-dependent resistor R6 drops sharply to assume a low-resistance state, so that charges are conducted away quickly. Therefore, the protection of static electricity can be realized, and other components in the power supply circuit 200 are effectively protected from being damaged due to overvoltage.

Optionally, referring to fig. 5, the power supply circuit 200 further includes a filter circuit 205.

The first terminal of the filter circuit 205 is connected to the drain d1 of the PMOS transistor Q1, the second terminal of the filter circuit 205 is connected to the ground, and the second terminal of the filter circuit 205 is the second output terminal 2032 of the power supply circuit 200.

Under the condition that the power supply 202 needs to output electric energy through the power supply circuit 200 and the PMOS transistor Q1 is turned on, the current of the power supply 202 flows into the filter circuit 205 after flowing through the PMOS transistor Q1, and the filter circuit 205 can stabilize the voltage output from the drain d1 of the PMOS transistor Q1, that is, the filter circuit 205 can stabilize the voltage output from the power supply 202 to the electric device.

Illustratively, referring to fig. 5, the filter circuit 205 includes a second capacitor C2.

The first plate of the second capacitor C2 is connected to the drain d1 of the PMOS transistor Q1, the second plate of the second capacitor C2 is connected to the ground, and the second plate of the second capacitor C2 is the second output terminal 2032 of the power supply circuit 200. The second capacitor C2 is used to stabilize the filtered output voltage to a stable dc voltage.

The second capacitor C2 works on the principle that when the voltage of the drain d1 of the PMOS transistor Q1 is higher than the voltage of the second capacitor C2, the second capacitor C2 charges, and when the voltage of the drain d1 of the PMOS transistor Q1 is lower than the voltage of the second capacitor C2, the second capacitor C2 discharges. In the process of charging and discharging the second capacitor C2, the voltage output by the drain d1 of the PMOS transistor Q1 can be substantially stabilized.

Optionally, referring to fig. 6, the power supply circuit 200 further includes a slow start circuit 206, and the slow start circuit 206 includes a first capacitor C1 and a second resistor R2.

The first plate of the first capacitor C1 is connected to the second end of the NTC resistor R0 and the source s1 of the PMOS transistor Q1, respectively, the second plate of the first capacitor C1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is connected to the second end of the first resistor R1 and the gate g1 of the PMOS transistor Q1, respectively.

The slow start circuit 206 is a circuit for slowly decreasing the voltage of the gate g1 of the PMOS transistor Q1, that is, a circuit for slowly turning on the PMOS transistor Q1.

The PMOS transistor Q1 also typically has an on threshold. The turn-on threshold of the PMOS transistor Q1 is a threshold when the PMOS transistor Q1 enters an incomplete conduction state (the PMOS transistor Q1 is in a variable resistance region), and when the PMOS transistor Q1 enters the incomplete conduction state, a variable resistance is formed between the source s1 and the drain d1 of the PMOS transistor Q1.

The power supply 202 outputs electric energy to the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1 through the NTC resistor R0, and the power supply 202 outputs electric energy to the power supply end of the control circuit 201, when the power supply 202 does not need to output electric energy through the power supply circuit 200, the control circuit 201 controls the control end of the control circuit 201 not to be connected to the ground, the voltage of the gate g1 of the PMOS transistor Q1 is higher, so that the absolute value of the voltage difference between the gate g1 and the source s1 of the PMOS transistor is smaller than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is turned off, and no current is output from the first output end 2031 of the power supply circuit 200.

When the power supply 202 outputs power to the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1 through the NTC resistor R0, and the power supply 202 outputs power to the power supply terminal of the control circuit 201, in case the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, the first capacitor C1 starts to charge, the NTC resistor R0 starts to work and generate heat, the resistance of the NTC resistor R0 starts to become smaller, and as the charge amount of the first capacitor C1 increases, the current flowing through the second resistor R2 decreases gradually, and at this time, the voltage of the gate g1 of the PMOS transistor Q1 is the voltage of the second terminal of the second resistor R2, so that the voltage on the gate g1 of the PMOS transistor Q1 decreases gradually, while the voltage on the source s1 of the PMOS transistor does not change, and the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the voltage difference 1 of the PMOS transistor Q1, the PMOS transistor Q1 enters the incomplete conducting state, and the drain d1 of the PMOS transistor Q1 starts to flow with the gradually increasing current. Until the first capacitor C1 is fully charged, the first capacitor C1 is equivalent to an open circuit, no current flows through the second resistor R2, and since the control terminal of the control circuit 201 is connected to the ground, the voltage of the gate g1 of the PMOS transistor Q1 is pulled low, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, and in this process, since current continuously flows through the NTC resistor R0, the resistance of the NTC resistor R0 continuously decreases until the resistance of the NTC resistor R0 decreases to a small value, the power of the NTC resistor R0 becomes very low, and the resistance of the NTC resistor R0 is negligible. Under the condition that the PMOS transistor Q1 is fully turned on and the resistance of the NTC resistor R0 is negligible, the first output 2031 of the power supply circuit 200 outputs a constant current, and the power supply 202 can supply power to the electric device normally. In this way, since the PMOS transistor Q1 gradually changes from the incomplete conducting state to the complete conducting state, and since the resistance value of the NTC resistor R0 gradually decreases, the current output by the power supply 202 gradually increases, so that the current output by the power supply 202 at the beginning of outputting the electric energy through the power supply circuit 200 can be limited, so that the current output by the power supply 202 at the instant of supplying power to the electric device is not too large, and thus the power supply 202, the power supply circuit 200, or the wires can be prevented from being damaged due to overload.

Optionally, referring to fig. 7, the slow start circuit 206 further includes a third resistor R3.

A first end of the third resistor R3 is connected to a second end of the first resistor R1, and a second end of the third resistor R3 is connected to a second end of the second resistor R2 and the gate g1 of the PMOS transistor Q1, respectively.

The third resistor R3 can perform the function of voltage division, ensure that the gate g1 of the PMOS transistor Q1 is the voltage between the second resistor R2 and the third resistor R3, and reduce the influence of the first resistor R1 on the voltage on the gate g1 of the PMOS transistor Q1.

In the embodiment of the present application, the power supply 202 outputs power to the NTC resistor R0 and the control circuit 201, and in case that the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, at this time, the PMOS transistor Q1 is turned on, and the first output terminal 2031 of the power supply circuit 200 supplies power to the electric device. Because the NTC resistor R0 has a large resistance value at the normal temperature, that is, the NTC resistor R0 has a large resistance value at the moment when the PMOS transistor Q1 is turned on, the current output by the power supply 202 is small at the moment when the PMOS transistor Q1 is turned on, so that the current of the power supply 202 at the moment when the power supply circuit 200 outputs electric energy just starts can be limited by the NTC resistor R0, so that the current output by the power supply 202 at the moment when the power supply circuit supplies power to the electric device is not too large, and the power supply 202, the power supply circuit 200 or the wires can be prevented from being damaged due to overload.

Fig. 8 is a schematic structural diagram of a power supply circuit 200 according to an embodiment of the present disclosure, and refer to fig. 8. The power supply circuit 200 includes: the control circuit 201, the first resistor R1, the slow start circuit 206 and the PMOS pipe Q1, the slow start circuit 206 includes a first capacitor C1 and a second resistor R2.

The power supply end of the control circuit 201, the first end of the first resistor R1, the first pole plate of the first capacitor C1, and the source s1 of the PMOS transistor Q1 are all used for being connected with the power supply 201, the second pole plate of the first capacitor C1 is connected with the first end of the second resistor R2, the second end of the first resistor R1, the second end of the second resistor R2, and the gate g1 of the PMOS transistor Q1 are all connected with the control end of the control circuit 201, and the drain d1 of the PMOS transistor Q1 is the first output end 2031 of the power supply circuit 200.

The control circuit 201 is used for controlling the control end of the control circuit 201 not to be connected with the ground wire under the condition that the power supply 202 does not output the electric energy through the power supply circuit 200, and controlling the control end of the control circuit 201 to be connected with the ground wire under the condition that the power supply 202 needs to output the electric energy through the power supply circuit 200 when the control circuit 201 is powered on.

The PMOS transistor Q1 is a field effect transistor that can be used in analog circuits and digital circuits, can be used as an electronic switch, a controllable rectifier, or the like, and is a voltage-driven type device. The PMOS transistor Q1 generally has a turn-on threshold and a turn-on threshold, the turn-on threshold of the PMOS transistor Q1 is a threshold when the PMOS transistor Q1 enters an incomplete turn-on state (the PMOS transistor Q1 is in a variable resistance region), and when the PMOS transistor Q1 enters the incomplete turn-on state, a variable resistance is formed between the source s1 and the drain d1 of the PMOS transistor Q1. The on-threshold of the PMOS transistor Q1 is a threshold of the PMOS transistor Q1 entering a constant current region, and in a case that the PMOS transistor Q1 enters the constant current region, a current source is defined between the source s1 and the drain d1 of the PMOS transistor Q1.

The first resistor R1 may be a large resistor, for example, the first resistor R1 may be 100K Ω.

When the power supply 202 does not need to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 not to be connected to the ground, and the voltage of the gate g1 of the PMOS transistor Q1 is higher, so that the absolute value of the voltage difference between the gate g1 and the source s1 of the PMOS transistor is smaller than the on-threshold of the PMOS transistor Q1, the PMOS transistor Q1 is turned off, and no current is output from the first output terminal 2031 of the power supply circuit 200.

The power supply 202 outputs power to the first resistor R1, the first capacitor C1, and the source s1 of the PMOS transistor Q1, and the power supply 202 outputs power to the power terminal of the control circuit 201, in the case that the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, at this time, the first capacitor C1 starts to charge, the current flowing through the second resistor R2 gradually decreases as the charge amount of the first capacitor C1 gradually increases, at this time, the voltage of the gate g1 of the PMOS transistor Q1 is the voltage of the second terminal of the second resistor R2, the voltage at the gate g1 of the PMOS transistor Q1 gradually decreases, while the voltage at the source s1 of the PMOS transistor does not change, in the case that the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 enters the incomplete conducting state, and the drain d1 of the PMOS transistor Q1 starts to flow with the gradually increasing current. Until the first capacitor C1 is fully charged, the first capacitor C1 is equivalent to an open circuit, no current flows through the second resistor R2, and since the control terminal of the control circuit 201 is connected to the ground line and the voltage of the gate g1 of the PMOS transistor Q1 is pulled low, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, the first output terminal 2031 of the power supply circuit 200 outputs a constant current, and the power supply 202 can normally supply power to the electric device. In this way, since the PMOS transistor Q1 gradually changes from the incomplete conduction state to the complete conduction state, the current output by the power supply 202 gradually increases, so that the current of the power supply 202 at the beginning of outputting the electric energy through the power supply circuit 200 can be limited, and the current output by the power supply 202 at the moment of supplying power to the electric device is not too large, thereby avoiding overload damage to the power supply 202, the power supply circuit 200 or the lead.

Optionally, referring to fig. 9, the slow start circuit 206 further includes a third resistor R3.

Alternatively, referring to fig. 10, the control circuit 202 includes an MCU, an NMOS transistor Q2, a fourth resistor R4, and a fifth resistor R5.

The power supply 202 outputs electric energy to a power supply end of the MCU, the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1, and when the power supply 202 does not need to output electric energy through the power supply circuit 200, the MCU does not output voltage to the gate g2 of the NMOS transistor Q2, so that the absolute value of the voltage difference between the gate g1 and the source s1 of the NMOS transistor Q2 is smaller than the turn-on threshold of the NMOS transistor Q2, and the NMOS transistor Q2 is turned off. At this time, the voltage of the gate g1 of the PMOS transistor Q1 is higher, so that the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is smaller than the on threshold of the PMOS transistor Q2, the PMOS transistor Q1 is turned off, and the first output terminal 2031 of the power supply circuit 200 does not output power.

The power supply 202 outputs electric energy to a power supply end of the MCU, the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1, and when the power supply 202 needs to output electric energy through the power supply circuit 200, the MCU outputs voltage to the gate g2 of the NMOS transistor Q2, and since the source s2 of the NMOS transistor Q2 is connected to the ground, the absolute value of the voltage difference between the gate g2 and the source s2 of the NMOS transistor Q2 is greater than the turn-on threshold of the NMOS transistor Q2, and the NMOS transistor Q2 is turned on. At this time, the first capacitor C1 starts to be charged, and as the charge amount of the first capacitor C1 gradually increases, the current flowing through the second resistor R2 gradually decreases, and at this time, the voltage of the gate g1 of the PMOS transistor Q1 is the voltage of the second end of the second resistor R2, so that the voltage of the gate g1 of the PMOS transistor Q1 gradually decreases, the power supply 202 outputs a voltage to the source s1 of the PMOS transistor Q1, and when the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 enters an incomplete conduction state, and the drain d1 of the PMOS transistor Q1 starts to flow a gradually increasing current. When the first capacitor C1 is fully charged, the first capacitor C1 is equivalent to an open circuit, no current flows through the second resistor R0, and since the source s2 of the NMOS transistor Q2 is connected to ground, the voltage of the gate g1 of the PMOS transistor Q1 is pulled low, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, the first output terminal 2031 of the power supply circuit 200 outputs a constant current, and the power supply 202 can normally supply power to the electric device.

Optionally, referring to fig. 11, the power supply circuit 200 further includes an ESD protection circuit 204.

Illustratively, referring to fig. 11, the ESD protection circuit 204 includes a varistor R6.

The voltage dependent resistor R6 is a voltage dependent resistor R6 equivalent to 10MQ or more insulation resistor when the voltage applied across the voltage dependent resistor R6 is less than the voltage dependent voltage of the voltage dependent resistor R6 by utilizing the voltage dependent characteristics of the voltage dependent ceramic material. When an overvoltage larger than the voltage-dependent voltage of the voltage-dependent resistor R6 is applied across the voltage-dependent resistor R6, the resistance of the voltage-dependent resistor R6 drops sharply to assume a low-resistance state, so that charges are conducted away quickly. Therefore, the protection of static electricity can be realized, and other components in the power supply circuit 200 are effectively protected from being damaged due to overvoltage.

Optionally, referring to fig. 12, the power supply circuit 200 further includes a filter circuit 205.

Illustratively, referring to fig. 12, the filter circuit 205 includes a second capacitor C2.

Optionally, referring to fig. 13, the power supply circuit 200 further includes an NTC resistor R0.

A first terminal of the NTC resistor R0 is configured to be connected to the power supply 202, and a second terminal of the NTC resistor R0 is respectively connected to the first terminal of the first resistor R1, the first plate of the first capacitor C1, and the source s1 of the PMOS transistor Q1.

The power supply 202 outputs electric energy to the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1 through the NTC resistor R0, and the power supply 202 outputs electric energy to the power supply end of the control circuit 201, when the power supply 202 does not need to output electric energy through the power supply circuit 200, the control circuit 201 controls the control end of the control circuit 201 not to be connected to the ground, the voltage of the gate g1 of the PMOS transistor Q1 is higher, so that the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is smaller than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is turned off, and no current is output from the first output end 2031 of the power supply circuit 200. Since the resistance of the first resistor R1 is very large, the current flowing through the NTC resistor R0 and the first resistor R1 is very small, the power of the NTC resistor R0 is very small, and the temperature change of the NTC resistor R0 is very small, so that the resistance of the NTC resistor R0 is still relatively large in this state.

When the power supply 202 outputs power to the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1 through the NTC resistor R0, and the power supply 202 outputs power to the power supply terminal of the control circuit 201, in case the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, at this time, the first capacitor C1 starts to charge, the NTC resistor R0 starts to work and generate heat, the resistance value of the NTC resistor R0 starts to decrease, and as the charge amount of the first capacitor C1 increases gradually, the current flowing through the second resistor R2 decreases gradually, at this time, the voltage of the gate g1 of the PMOS transistor Q1 is the voltage of the second terminal of the second resistor R2, so that the voltage on the gate g1 of the PMOS transistor Q1 decreases gradually, while the voltage on the source s1 of the PMOS transistor does not change, and the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the threshold voltage of the PMOS transistor Q1, the PMOS transistor Q1 enters the incomplete conducting state, and the drain d1 of the PMOS transistor Q1 starts to flow with the gradually increasing current. Under the condition that the first capacitor C1 is fully charged, the first capacitor C1 is equivalent to an open circuit, no current flows through the second resistor R2, and since the control terminal of the control circuit 201 is connected to the ground, the voltage of the gate g1 of the PMOS transistor Q1 is pulled to be low, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the conduction threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, and in the process, as current continuously flows through the NTC resistor R0, the resistance of the NTC resistor R0 continuously decreases until the resistance of the NTC resistor R0 decreases to be small, the power of the NTC resistor R0 becomes extremely low, and the resistance of the NTC resistor R0 is negligible at this time. Under the condition that the PMOS transistor Q1 is fully turned on and the resistance of the NTC resistor R0 is negligible, the first output 2031 of the power supply circuit 200 outputs a constant current, and the power supply 202 can supply power to the electric device normally. In this way, since the PMOS transistor Q1 gradually changes from the incomplete conducting state to the complete conducting state, and since the resistance value of the NTC resistor R0 gradually decreases, the current output by the power supply 202 gradually increases, so that the current output by the power supply 202 at the beginning of outputting the electric energy through the power supply circuit 200 can be limited, so that the current output by the power supply 202 at the instant of supplying power to the electric device is not too large, and thus the power supply 202, the power supply circuit 200, or the wires can be prevented from being damaged due to overload.

In the embodiment of the present application, the power supply 202 outputs power to the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1, and the power supply 202 outputs power to the power supply terminal of the control circuit 201, in case the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, since a gradually decreasing current flows through the second resistor R2 when the first capacitor C1 is charged, a voltage at the gate g1 of the PMOS transistor Q1 is gradually decreased, since a voltage output by the power supply 202 exists at the source s1 of the PMOS transistor Q1, the PMOS transistor Q1 enters an incomplete conduction state, and a gradually increasing current starts to flow through the drain d1 of the PMOS transistor Q1 when an absolute value of a voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than an on-threshold of the PMOS transistor Q1, until the first capacitor C1 is fully charged, and the second resistor R2 is fully charged, at this time, the voltage of the gate g1 of the PMOS transistor Q1 is pulled low, so the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the turn-on threshold of the PMOS transistor Q1, the PMOS transistor Q1 is turned on completely, the first output terminal 2031 of the power supply circuit 200 outputs a constant current, and the power supply 202 can supply power to the electric device normally. In this way, since the PMOS transistor Q1 gradually changes from the incomplete conduction state to the complete conduction state, the current output by the power supply 202 is gradually increased, so that the current of the power supply 202 at the beginning of outputting the electric energy through the power supply circuit 200 can be limited, and the current output by the power supply 202 at the moment of supplying power to the electric device is not too large, thereby avoiding overload damage to the power supply 202, the power supply circuit 200 or the lead.

Fig. 14 is a schematic structural diagram of a power supply circuit 200 according to an embodiment of the present disclosure, and refer to fig. 14. The power supply circuit 200 includes: the control circuit 201, NTC resistance R0, first resistance R1, slow start circuit 206 and PMOS pipe Q1, slow start circuit 206 includes first electric capacity C1 and second resistance R2.

A first end of the NTC resistor R0 and a power source end of the control circuit 201 are configured to be connected to the power source 202, a second end of the NTC resistor R0 is respectively connected to a first end of the first resistor R1, a first plate of the first capacitor C1, and the source s1 of the PMOS transistor Q1, a second plate of the first capacitor C1 is connected to a first end of the second resistor R2, a second end of the first resistor R1, a second end of the second resistor R2, and a gate g1 of the PMOS transistor Q1 are all connected to a control end of the control circuit 201, and a drain d1 of the PMOS transistor Q1 is a first output end 2031 of the power supply circuit 200.

The control circuit 201 is used for controlling the control terminal of the control circuit 201 not to be connected with the ground wire in the case that the power supply 202 does not need to output the electric energy through the power supply circuit 200, and controlling the control terminal of the control circuit 201 to be connected with the ground wire in the case that the power supply 202 needs to output the electric energy through the power supply circuit 200.

When the power supply 202 outputs power to the first resistor R1, the first capacitor C1 and the source s1 of the PMOS transistor Q1 through the NTC resistor R0, and the power supply 202 outputs power to the power supply terminal of the control circuit 201, in case the power supply 202 needs to output power through the power supply circuit 200, the control circuit 201 controls the control terminal of the control circuit 201 to be connected to the ground, at this time, the first capacitor C1 starts to charge, the NTC resistor R0 starts to work and generate heat, the resistance value of the NTC resistor R0 starts to decrease, and as the charge amount of the first capacitor C1 increases gradually, the current flowing through the second resistor R2 decreases gradually, at this time, the voltage of the gate g1 of the PMOS transistor Q1 is the voltage of the second terminal of the second resistor R2, so that the voltage on the gate g1 of the PMOS transistor Q1 decreases gradually, while the voltage on the source s1 of the PMOS transistor does not change, and the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the threshold voltage of the PMOS transistor Q1, the PMOS transistor Q1 enters the incomplete conducting state, and the drain d1 of the PMOS transistor Q1 outputs a gradually increasing current. Under the condition that the first capacitor C1 is fully charged, the first capacitor C1 is equivalent to an open circuit, no current flows through the second resistor R2, and since the control terminal of the control circuit 201 is connected to the ground, the voltage of the gate g1 of the PMOS transistor Q1 is pulled to be low, the absolute value of the voltage difference between the source s1 and the gate g1 of the PMOS transistor Q1 is greater than the conduction threshold of the PMOS transistor Q1, the PMOS transistor Q1 is fully turned on, and in the process, as current continuously flows through the NTC resistor R0, the resistance of the NTC resistor R0 continuously decreases until the resistance of the NTC resistor R0 decreases to be small, the power of the NTC resistor R0 becomes extremely low, and the resistance of the NTC resistor R0 is negligible at this time. Under the condition that the PMOS transistor Q1 is fully turned on and the resistance of the NTC resistor R0 is negligible, the first output 2031 of the power supply circuit 200 outputs a constant current, and the power supply 202 can supply power to the electric device normally. In this way, since the PMOS transistor Q1 gradually changes from the incomplete conducting state to the complete conducting state, and since the resistance value of the NTC resistor R0 gradually decreases, the current output by the power supply 202 gradually increases, so that the current output by the power supply 202 at the beginning of outputting the electric energy through the power supply circuit 200 can be limited, so that the current output by the power supply 202 at the instant of supplying power to the electric device is not too large, and thus the power supply 202, the power supply circuit 200, or the wires can be prevented from being damaged due to overload.

The embodiment of the application also provides a power supply system. The power supply system includes a power supply 202 and a power supply circuit 200 as shown in any of the embodiments of fig. 2-14 above.

In the embodiment of the present application, in a case that the power supply system needs to output the electric energy through the power supply circuit 200, at least one of the NTC resistor R0 and the slow start circuit 206 may make a current ratio output by the power supply 202 at a moment when the PMOS transistor Q1 is turned on be smaller, that is, at least one of the NTC resistor R0 and the slow start circuit 206 may limit a current of the power supply 202 at a moment when the power supply 202 starts to output the electric energy through the power supply circuit 200, so that the current output by the power supply 202 at a moment when the power supply supplies power to the electric device is not too large, and thus the power supply 202, the power supply circuit 200, or the wire may be prevented from being damaged due to overload.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims

1. A power supply circuit, characterized in that the power supply circuit comprises: the negative temperature coefficient NTC resistor, the control circuit, the first resistor and the P-channel metal oxide semiconductor PMOS tube;

2. The power supply circuit of claim 1, wherein the power supply circuit further comprises a slow start circuit comprising a first capacitor and a second resistor;

the first polar plate of the first capacitor is connected with the second end of the NTC resistor and the source electrode of the PMOS tube respectively, the second polar plate of the first capacitor is connected with the first end of the second resistor, and the second end of the second resistor is connected with the second end of the first resistor and the grid electrode of the PMOS tube respectively.

3. The power supply circuit of claim 2 wherein said slow start circuit further comprises a third resistor;

4. The power supply circuit according to any one of claims 1 to 3, wherein the control circuit comprises a Micro Control Unit (MCU), an N-channel metal oxide semiconductor (NMOS) transistor, a fourth resistor and a fifth resistor;

5. The power supply circuit according to any one of claims 1-3, wherein the power supply circuit further comprises an electrostatic discharge (ESD) protection circuit;

6. The power supply circuit of claim 5 wherein said ESD protection circuit comprises a voltage dependent resistor;

7. The power supply circuit according to any one of claims 1 to 3, wherein the power supply circuit further comprises a filter circuit;

8. The power supply circuit of claim 7 wherein said filter circuit comprises a second capacitor;

9. A power supply circuit, characterized in that the power supply circuit comprises: the circuit comprises a control circuit, a first resistor, a slow start circuit and a P-channel metal oxide semiconductor PMOS (P-channel metal oxide semiconductor) tube, wherein the slow start circuit comprises a first capacitor and a second resistor;

10. A power supply system, characterized in that the power supply system comprises a power supply and a supply circuit according to any of claims 1-9.