CN113254199A - Method, system and equipment for simultaneously processing multiple tasks - Google Patents
Method, system and equipment for simultaneously processing multiple tasks Download PDFInfo
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- CN113254199A CN113254199A CN202110495732.2A CN202110495732A CN113254199A CN 113254199 A CN113254199 A CN 113254199A CN 202110495732 A CN202110495732 A CN 202110495732A CN 113254199 A CN113254199 A CN 113254199A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
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Abstract
The invention provides a method, a system and equipment for simultaneously processing multiple tasks, wherein the method comprises the steps of receiving multiple different task signals, respectively distributing the multiple different task signals to multiple corresponding processing parts in a processor, simultaneously processing the multiple different task signals by the multiple corresponding processing parts, and aiming at the problem that after a first task signal needs to be processed in a sequential cyclic scanning mode, a second task signal is processed to cause insufficient real-time performance.
Description
Technical Field
The invention relates to the field of computer operation, in particular to a method, a system and equipment for simultaneously processing multiple tasks.
Background
At present, the industrial task processing mainly adopts a sequential cyclic scanning mode, namely, the processing of a first task signal is completed, then a second task signal is processed, and so on, until the processing of a last task signal is completed, the problem of insufficient real-time performance of the processing of the task signal exists in the processing mode, and if the second task signal is a signal sent by equipment belonging to high-precision closed-loop control, the time required by the high-precision closed-loop control equipment for feedback is very short, while in the prior art, the second task signal can be processed after the first task signal is processed, the feedback time is long, and the high-precision closed-loop control error is caused, so that the production quality is influenced.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a method, a system and equipment for simultaneously processing multiple tasks, and the technical scheme is as follows:
in a first aspect, the present invention provides a method for simultaneous multitasking, the method comprising:
receiving a plurality of different task signals;
distributing a plurality of different task signals to a plurality of corresponding processing units in the processor;
the plurality of corresponding processing units simultaneously process a plurality of different task signals.
Further, the step of receiving a plurality of different task signals is followed by:
and judging the validity of a plurality of different task signals.
Further, the validity judgment is carried out on the task signal through hardware.
Further, the step of simultaneously processing a plurality of different task signals by the plurality of corresponding processing units includes:
the processing part reads the corresponding task signal and reads the corresponding instruction;
the processing part reads data from the corresponding task signal and writes the data into a corresponding command;
the processing unit performs task processing.
Further, the processing units process the task signals independently from each other.
In a second aspect, the present invention provides a multitask simultaneous processing system, comprising:
a task signal receiving section for receiving a plurality of different task signals;
the task signal processor comprises a plurality of processing parts, and the processing parts are used for processing corresponding task signals;
and a task signal distribution unit for distributing the plurality of different task signals to the corresponding processing units.
Further, the task signal distribution unit further includes a task signal determination unit, the task signal determination unit is configured to determine validity of the task signal, and the task signal determination unit is hardware.
Further, the plurality of processing units are independent of each other, and independently process the corresponding task signal.
Further, the processing section includes:
a task signal reading section for reading the task signal from the task signal distributing section;
the task instruction part is used for acquiring a corresponding task instruction according to the task signal;
and the task processing part is used for processing the task signal.
In a third aspect, the present invention also provides a multitasking simultaneous processing device comprising at least one control processor and a memory for communicative connection with said at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform a multitasking simultaneous processing method as described in any one of the above.
Compared with the prior art, the invention provides a method, a system and equipment for simultaneously processing multiple tasks, and aims to solve the problem of insufficient real-time property caused by processing a second task signal after a first task signal is processed in a sequential cyclic scanning mode.
Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic flow chart of a simultaneous multitasking method;
FIG. 2 is another schematic flow diagram of a simultaneous multitasking method;
FIG. 3 is another schematic flow diagram of a simultaneous multitasking method;
FIG. 4 is a schematic diagram of a simultaneous multitasking system;
fig. 5 is a schematic diagram of a multitasking simultaneous processing device.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as up, down, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplicity of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In a first aspect, referring to fig. 1, the present invention provides a method for simultaneous multitasking, including:
step S1, receiving a plurality of different task signals;
a step S2 of distributing the plurality of different task signals to a plurality of corresponding processing units in the processor, respectively;
in step S3, a plurality of corresponding processing units simultaneously process a plurality of different task signals.
In the embodiment, a plurality of processing parts are arranged in the processor, corresponding processing parts are distributed to different task signals, each processing part simultaneously processes the corresponding task signal, the simultaneous processing does not mean that the processing steps of each processing unit are performed simultaneously, and the processing of the task signal is divided into a plurality of steps, and assuming that there are a first processing unit and a second processing unit, when the first processing unit reads data from the task signal, the second processing section may perform any one of task processing steps including reading data from a task signal, thus, the first processing part and the second processing part can process different task signals at the same time, compared with the sequential cyclic scanning mode, the processing mode has higher real-time performance, the feedback time processing requirement of a high-precision closed-loop control system can be met, and the production quality of the high-precision closed-loop control system is ensured.
Further, referring to fig. 2, after the step of receiving a plurality of different task signals at step S1, the method includes:
step S1.1, validity determination is performed on a plurality of different task signals.
In this embodiment, since the task signal is transmitted by current, and the transmission of the current is interfered by the outside to generate noise, the validity of the task signal needs to be determined, so as to ensure the reliability of the task signal, and thus ensure the production quality.
It should be noted that, the validity of the task signal is determined by hardware, the hardware is preferably an integrated circuit in this embodiment, the determination of the task signal by the integrated circuit is extremely quick, the task signal is determined by the integrated circuit through a circuit element, the task signal is a current in a physical layer, and the determination time of the integrated circuit is the time for the current to pass through the integrated circuit, which is almost 0, the processing time is greatly shortened compared with software, and the shortening of the processing time means the enhancement of real-time performance.
Further, referring to fig. 3, in step S3, the plurality of corresponding processing units simultaneously process a plurality of different task signals, including:
s3.1, the processing part reads the corresponding task signal and reads the corresponding instruction;
s3.2, the processing part reads data from the corresponding task signal and writes the data into a corresponding instruction;
in step S3.3, the processing unit performs task processing.
In this embodiment, the processing portion reads the corresponding task signal, and because the task signal is provided with the identification code, the processing portion can take out the corresponding task instruction from the instruction storage area according to the identification code, the processing portion obtains data from the task signal, the data is data required by the task instruction, the data is put into the corresponding task instruction, the processing portion then performs calculation and processing according to the task instruction and the data, and the result is obtained and fed back to the system which sends out the task signal, thereby completing the whole task processing process.
Further, the processing units process the task signals independently from each other.
In this embodiment, different processing portions exist independently of each other, and the processing portions do not affect each other, and if a first processing portion and a second processing portion are provided in the processor, the first processing portion is executing step S3.1 on a first task signal, and the second processing portion may execute step S3.1, step S3.2, or step S3.3 on a second task signal, such an arrangement ensures that each task signal has an independent processing resource for processing, thereby ensuring timely feedback and real-time performance of the task signal.
In step S2, a plurality of different task signals are respectively allocated to a plurality of corresponding processing units in the processor, and the allocation of the plurality of task signals does not occur simultaneously, but the first task signal is allocated, the second task signal is allocated, and so on until the last task signal is allocated.
In a second aspect, referring to fig. 4, the present invention provides a multitask simultaneous processing system, comprising:
a task signal receiving unit 100 for receiving a plurality of different task signals;
a task signal processor 103 including a plurality of processing sections 104 for processing corresponding task signals;
a task signal distribution unit 101 for distributing a plurality of different task signals to the corresponding processing units 104.
In this embodiment, the task signal receiving unit 100 is used for acquiring task signals from industrial systems, and since the present system is applied to a plurality of industrial systems, the task signal receiving unit 100 is provided with a plurality of task signal receiving ports, the task signal distributing unit 101 is used for distributing a plurality of task signals received by the task signal receiving unit, the task signal processor 103 includes a plurality of processing units 104, each processing unit 10 processes a corresponding task signal, the task signal distributing unit 101 distributes different task signals to different processing units 104 according to different distribution characteristics of the different task signals, and the processing units 104 process the corresponding task signals.
The system is developed based on an FPGA, which is a product of further development based on programmable devices such as PAL and GAL. The circuit is a semi-custom circuit in the field of Application Specific Integrated Circuits (ASICs), not only overcomes the disadvantages of custom circuits, but also overcomes the limitation of gate circuits of the original programmable device, and the task signal processor 103 provided with a plurality of processing units 10 can be conveniently developed by using an FPGA.
Further, the task signal distributing unit 101 further includes a task signal determining unit 102, the task signal determining unit 102 is configured to determine validity of the task signal, and the task signal determining unit 102 is hardware.
In this embodiment, the task signal determination unit 102 is hardware, preferably an integrated circuit, and the integrated circuit determines the task signal very quickly, and since the integrated circuit determines the task signal through a circuit element, the task signal is a current in a physical layer, and the determination time of the integrated circuit is the time for the current to pass through the integrated circuit, the time length is almost 0, the processing time is greatly shortened compared with the software, and the shortening of the processing time means the enhancement of real-time performance.
Further, the plurality of processing units 104 are independent of each other, and independently process the corresponding task signals.
In the present embodiment, the plurality of processing portions 104 are independent from each other, which means that the processing progress of the task signal may be different between the processing portions 104, and assuming that there are a first processing portion and a second processing portion, the first processing portion may perform a first task processing step on the first task signal, and the second processing portion may simultaneously perform a second task processing step on the second task signal, so that the real-time performance and the rapidity of processing the task signal may be ensured.
Further, the processing section includes:
a task signal reading section 105 for reading a task signal from the task signal distributing section;
a task instruction part 106 for acquiring a corresponding task instruction according to the task signal;
the task processing unit 107 processes the task signal.
In this embodiment, the task signal reading unit 105 is configured to read the task signal from the task signal distributing unit 101, the task instructing unit 106 is configured to obtain the task instruction corresponding to the task signal according to the feature code in the task signal, and the task processing unit 107 is configured to perform calculation and processing according to the task instruction and the data included in the task signal.
In a third aspect, referring to fig. 5, the present invention provides a multitasking simultaneous processing device, comprising at least one control processor 201 and a memory 200 for communicative connection with said at least one control processor; the memory 200 stores instructions executable by the at least one control processor 201 to enable the at least one control processor 201 to perform any of the methods of multitasking as described above.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
While the preferred embodiments of the present invention have been described in detail, it will be understood by those skilled in the art that the foregoing and various other changes, omissions and deviations in the form and detail thereof may be made without departing from the scope of this invention.
Claims (10)
1. A multitask simultaneous processing method is characterized by comprising the following steps:
receiving a plurality of different task signals;
distributing a plurality of different task signals to a plurality of corresponding processing units in the processor;
the plurality of corresponding processing units simultaneously process a plurality of different task signals.
2. A method as claimed in claim 1, wherein said step of receiving a plurality of different task signals is followed by the steps of:
and judging the validity of a plurality of different task signals.
3. The multitask simultaneous processing method according to claim 2, wherein the validity judgment of the task signal is performed by hardware.
4. The multitask simultaneous processing method according to claim 1, wherein the step of simultaneously processing a plurality of different task signals by the plurality of corresponding processing sections comprises:
the processing part reads the corresponding task signal and reads the corresponding instruction;
the processing part reads data from the corresponding task signal and writes the data into a corresponding command;
the processing unit performs task processing.
5. The multitask simultaneous processing method according to claim 1, wherein the processing units process the task signals independently of each other.
6. A multitasking, simultaneous processing system, comprising:
a task signal receiving section for receiving a plurality of different task signals;
the task signal processor comprises a plurality of processing parts, and the processing parts are used for processing corresponding task signals;
and a task signal distribution unit for distributing the plurality of different task signals to the corresponding processing units.
7. The multitask simultaneous processing system according to claim 6, wherein the task signal distributing section further includes a task signal judging section for judging validity of the task signal, and the task signal judging section is hardware.
8. The multitask simultaneous processing system according to claim 6, wherein the plurality of processing units are independent of each other and independently process the corresponding task signal.
9. The multitask, simultaneous processing system according to claim 6, wherein the processing section includes:
a task signal reading section for reading the task signal from the task signal distributing section;
the task instruction part is used for acquiring a corresponding task instruction according to the task signal;
and the task processing part is used for processing the task signal.
10. A multitasking device comprising at least one control processor and a memory for communicative connection with said at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform the method of multitasking according to any one of claims 1-5.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5361369A (en) * | 1990-09-14 | 1994-11-01 | Hitachi, Ltd. | Synchronous method of, and apparatus for, allowing a processor to process a next task before synchronization between a predetermined group of processors |
| CN107967549A (en) * | 2016-10-20 | 2018-04-27 | 南京途牛科技有限公司 | Multipaths Task Processing Unit and method |
| CN108600008A (en) * | 2018-04-24 | 2018-09-28 | 成都致云科技有限公司 | Server management method, server managing device and distributed system |
| KR20180124692A (en) * | 2017-05-12 | 2018-11-21 | 울산과학기술원 | Method for processing task in respect to distributed file system |
| CN110398921A (en) * | 2019-07-24 | 2019-11-01 | 理工雷科电子(西安)有限公司 | A kind of multitask dynamic restructuring processing system and method based on FPGA control |
| CN111506400A (en) * | 2020-03-13 | 2020-08-07 | 平安国际智慧城市科技股份有限公司 | Computing resource allocation system, method, device and computer equipment |
| KR20200106662A (en) * | 2019-03-05 | 2020-09-15 | 두산공작기계 주식회사 | Machine tool having multi-tasking system and method of multi-tasking for machine tool |
-
2021
- 2021-05-07 CN CN202110495732.2A patent/CN113254199A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5361369A (en) * | 1990-09-14 | 1994-11-01 | Hitachi, Ltd. | Synchronous method of, and apparatus for, allowing a processor to process a next task before synchronization between a predetermined group of processors |
| CN107967549A (en) * | 2016-10-20 | 2018-04-27 | 南京途牛科技有限公司 | Multipaths Task Processing Unit and method |
| KR20180124692A (en) * | 2017-05-12 | 2018-11-21 | 울산과학기술원 | Method for processing task in respect to distributed file system |
| CN108600008A (en) * | 2018-04-24 | 2018-09-28 | 成都致云科技有限公司 | Server management method, server managing device and distributed system |
| KR20200106662A (en) * | 2019-03-05 | 2020-09-15 | 두산공작기계 주식회사 | Machine tool having multi-tasking system and method of multi-tasking for machine tool |
| CN110398921A (en) * | 2019-07-24 | 2019-11-01 | 理工雷科电子(西安)有限公司 | A kind of multitask dynamic restructuring processing system and method based on FPGA control |
| CN111506400A (en) * | 2020-03-13 | 2020-08-07 | 平安国际智慧城市科技股份有限公司 | Computing resource allocation system, method, device and computer equipment |
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