CN113241960B - Current source type multi-level inverter circuit, device and modulation method - Google Patents

Current source type multi-level inverter circuit, device and modulation method Download PDF

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Publication number
CN113241960B
CN113241960B CN202110433531.XA CN202110433531A CN113241960B CN 113241960 B CN113241960 B CN 113241960B CN 202110433531 A CN202110433531 A CN 202110433531A CN 113241960 B CN113241960 B CN 113241960B
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switch unit
controllable switch
current
circuit
inductor
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CN113241960A (en
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王静
赵宇明
李艳
刘国伟
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Shenzhen Power Supply Bureau Co Ltd
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Shenzhen Power Supply Bureau Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

A current source type multi-level inverter circuit includes: the current doubling circuit is used for providing reference current, the reference current comprises first reference current or second reference current, and the second reference current is twice of the first reference current; the inverter bridge circuit is connected with the current doubling circuit and is used for inverting the reference current to generate an initial inverter current; and the flying inductor shunt circuit is connected with the inverter bridge circuit and is used for outputting the inverter current with multiple levels to a load according to the initial inverter current. The inductors in the current source type multi-level inverter circuit are relatively independent, the phenomenon that a plurality of inductors are connected in parallel and shunted does not exist, the problem that the distribution of inductive current is uneven is avoided, and then multi-level stable inverter current is output to a load. Meanwhile, the number of levels is easily expanded through the parallel flying inductor units and the parallel inverter topology, the flexibility is high in practical application, and the economy is further improved.

Description

Current source type multi-level inverter circuit, device and modulation method
Technical Field
The present disclosure relates to multi-level inverters, and more particularly, to a current source type multi-level inverter circuit, a current source type multi-level inverter device, and a modulation method.
Background
With the rapid development of science and technology, the increase of direct current loads and the access of distributed power supplies enable a direct current power distribution mode to be more and more widely applied. Since there are many different types of converter devices in a dc power distribution system, for example: the system comprises a bidirectional AC/DC converter connected with an AC power grid, a bidirectional DC/DC converter connected with an energy storage unit, a DC/DC or AC/DC converter connected with new energy power generation, a DC/DC or AC/DC converter connected with a DC/AC load, and the like. These power electronic devices working under non-ideal conditions all become ripple sources of the dc distribution network, which may affect the power quality of the system, and may cause malfunction of the controller in severe cases, which directly jeopardizes the stable operation of the whole system. Therefore, a broadband and high-precision direct-current power grid impedance frequency sweeping device needs to be developed to meet the detection requirements of the impedance characteristics of a converter and a system, and a harmonic generator with adjustable amplitude and frequency needs to be provided to be injected into the system as a disturbing signal, so that the impedance characteristics of the system are detected, and the frequency adjustable range is wide.
The impedance scanning device can respectively adopt a voltage disturbance method and a current disturbance method according to different disturbance signals of an injection system. The current disturbance method generally injects disturbance current into a system in a parallel mode through a capacitor or a linear power amplifier, and has high application value in actual measurement due to simple injection and flexible design.
Therefore, it is necessary to develop a current source inverter to solve the problem of output of a wide-frequency and small-current ac current waveform, and to achieve excellent harmonic characteristics as much as possible as a harmonic disturbance generator of a frequency sweep apparatus.
Disclosure of Invention
In view of the above, it is necessary to provide a current source type multi-level inverter circuit, a device and a modulation method, which have adjustable amplitude and frequency, wide frequency range and good harmonic characteristics.
In a first aspect of the present application, a current source type multi-level inverter circuit is provided, including:
the current doubling circuit is used for providing reference current, and the reference current comprises first reference current or second reference current, wherein the second reference current is twice of the first reference current;
the inverter bridge circuit is connected with the current doubling circuit and is used for inverting the reference current to generate an initial inverter current;
and the flying inductor shunt circuit is connected with the inverter bridge circuit and is used for outputting the inverter current with multiple levels to a load according to the initial inverter current.
In one embodiment, the current doubler circuit comprises:
a constant current source for outputting the first reference current;
and the inductive switch unit is connected with the constant current source and the inverter bridge circuit and is used for outputting the reference current to the inverter bridge circuit according to the first reference current.
In one embodiment, the inductive switching unit comprises:
a first end of the first controllable switch unit is connected with a first end of the constant current source, and a second end of the first controllable switch unit is connected with a first input node of the inverter bridge circuit;
a twelfth controllable switch unit, a first end of which is connected to both the first end of the constant current source and the first end of the first controllable switch unit;
a first inductance configured to: a first end of the first controllable switch unit is connected with the second end of the first controllable switch unit and the first input node, and a second end of the first controllable switch unit is connected with the second end of the twelfth controllable switch unit;
a second controllable switching unit configured to: the first end of the first controllable switch unit is connected with the first end of the constant current source and the first input node of the inverter bridge circuit, and the second end of the first controllable switch unit is connected with the second end of the first inductor.
In one embodiment, the constant current source comprises a buck circuit, the buck circuit comprising:
a first end of the boost inductor is connected with both the first end of the first controllable switch unit and the first end of the twelfth controllable switch unit;
an initial controllable switching unit configured to: the first end of the voltage boosting inductor is connected with the second end of the voltage boosting inductor, and the second end of the voltage boosting inductor is connected with one end of a direct current power supply;
a diode configured to: the anode is connected with the other end of the direct current power supply and the second input node, and the cathode is connected with the second end of the boost inductor and the first end of the initial controllable switch unit;
and the other end of the direct current power supply is connected with the first end of the second controllable switch unit and the second input node.
In one embodiment, the inverter bridge circuit comprises:
a first end of the third controllable switch unit is connected with the first input nodes of the inverter bridge circuit, and a second end of the third controllable switch unit is connected with the first input nodes of the flying inductor shunt circuit;
a first end of the fourth controllable switch unit is connected with a second end of the third controllable switch unit and a first input node of the fly-over inductor shunt circuit, and a second end of the fourth controllable switch unit is connected with a second input node of the inverter bridge circuit;
a first end of the fifth controllable switch unit is connected with the first input nodes of the inverter bridge circuit, and a second end of the fifth controllable switch unit is connected with the second input nodes of the flying inductor shunt circuit;
and a first end of the sixth controllable switch unit is connected with a second end of the fifth controllable switch unit and a second input node of the fly-over inductive shunt circuit, and a second end of the sixth controllable switch unit is connected with a second input node of the inverter bridge circuit.
In one embodiment, the flying inductor shunt circuit comprises:
a first end of the seventh controllable switch unit is connected with the first input nodes of the flying inductor shunt circuit;
a first end of the eighth controllable switch unit is connected with a second end of the seventh controllable switch unit, and a second end of the eighth controllable switch unit is connected with a second input node of the fly-span inductance shunt circuit;
a first end of the ninth controllable switch unit is connected with the first input node of the flying inductor shunt circuit;
a tenth controllable switch unit, a first end of which is connected to the second end of the ninth controllable switch unit, and a second end of which is connected to both the second input nodes of the fly-across inductive shunt circuit;
a second inductance configured to: the first end of the first controllable switch unit is connected with the first end of the eighth controllable switch unit, and the second end of the first controllable switch unit is connected with the second end of the ninth controllable switch unit.
In one embodiment, the fly-by inductive shunt circuit comprises:
a first end of the capacitor is connected with a first input node of the flying inductor shunt circuit, and a second end of the capacitor is connected with a second input node of the flying inductor shunt circuit;
and the first end of the load inductor is connected with the first input nodes of the flying inductor shunt circuit, and the second end of the load inductor is connected with the second input nodes of the flying inductor shunt circuit.
In a second aspect, there is provided a current source type multi-level inverter apparatus, including: the arbitrary current source type multilevel inverter circuit described above;
the number of the flying inductor shunt circuits is greater than or equal to 2, and the flying inductor shunt circuits are connected in parallel.
In a third aspect, there is provided a current source type multi-level inverter apparatus, including: a plurality of current source type multilevel inverter circuits connected in parallel.
In the current source type multilevel inverter circuit and the current source type multilevel inverter device, the multilevel inverter circuit is decomposed into a current doubling circuit, an inverter bridge circuit and a flying inductor shunt circuit module, wherein the current doubling circuit is used for providing reference current; the inverter bridge circuit is used for inverting the reference current to generate an initial inverter current; the flying inductor shunt circuit is used for outputting the inverter current with multiple levels to the load according to the initial inverter current. By the design, each inductor in the topology is relatively independent, the phenomenon of shunt in parallel connection of a plurality of inductors does not exist, the problem of uneven distribution of inductive current is avoided, and then multi-level stable inverter current is output to a load. Meanwhile, the number of levels is easily expanded through the parallel flying inductor units and the parallel inverter topology, the flexibility is high in practical application, and the economy is further improved.
In a fourth aspect, a time division type vector modulation method is provided, for adjusting the current of the flying inductor in any current source type multilevel inverter circuit, the method includes:
inverting and compressing the modulated wave into a deformed modulated wave in a preset interval, wherein the preset interval is related to the first reference current;
determining the frequency and amplitude of the sawtooth carrier according to the fundamental wave frequency and the first reference current;
taking the positive and negative turning points of the slope of the deformation modulation wave as time zone dividing points, and decomposing the sawtooth carrier waves in each carrier wave period into pulse square waves according to each time zone dividing point, wherein the pulse square waves are used for fitting sine waves;
and adjusting the current value of the flying inductor in each pulse width according to the pulse width of the pulse square wave.
In the time-domain decomposition type vector modulation method, the method is provided based on a current source type multi-level inverter device and is used for adjusting the current of a flying inductor in a current source type multi-level inverter circuit. The method synthesizes a large-step approximation sine waveform by using small steps, has better harmonic characteristics, and can improve the equivalent sampling frequency. The time zone width of the charging and discharging pulse can be finely adjusted through error feedback on the inductive current control, closed-loop no-difference regulation and control are achieved, and control is simple. The large-step approximation sine waveform is synthesized by switching multiple times between adjacent current values of multiple levels, so that the optimization of harmonic characteristics can be better realized on the basis of multiple levels, and fine tuning control is facilitated.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a topology diagram of a current source multi-level inverter circuit according to an embodiment;
FIG. 2 is a circuit diagram illustrating a parallel operation mode of a current doubler circuit in the current source multi-level inverter circuit according to an embodiment;
FIG. 3 is a circuit diagram illustrating a series operating mode of a current doubler circuit in an embodiment of a current source multi-level inverter circuit;
FIG. 4 is a diagram illustrating a first bypass operation mode circuit of an inverter bridge circuit in the current source multi-level inverter circuit according to an embodiment;
FIG. 5 is a circuit diagram illustrating a forward conducting mode of an inverter bridge circuit in the current source multi-level inverter circuit according to an embodiment;
FIG. 6 is a circuit diagram illustrating a negative-going operating mode of an inverter bridge circuit in the current source multi-level inverter circuit according to an embodiment;
FIG. 7 is a circuit diagram illustrating a second bypass operation mode of an inverter bridge circuit in the current source multi-level inverter circuit according to an embodiment of the present invention;
FIG. 8 is a circuit diagram illustrating a negative output mode of a fly-by inductor shunt circuit in an embodiment of a current source multi-level inverter circuit;
fig. 9 is a circuit diagram of a forward output operation mode of a flying inductor shunt circuit in a current source multi-level inverter circuit according to an embodiment;
fig. 10 is a circuit diagram illustrating an upper freewheeling mode of the fly-over inductor shunt circuit in the current source multi-level inverter circuit according to an embodiment of the present invention;
fig. 11 is a circuit diagram illustrating a next-freewheeling mode of a flying inductor shunt circuit in the current source multi-level inverter circuit according to an embodiment;
FIG. 12 is a schematic diagram illustrating a connection method for expanding the number of levels of the shunt circuit of the shunt inductor in parallel according to an embodiment;
FIG. 13 is a schematic diagram illustrating the connection of the parallel current source multi-level inverter circuit for power expansion in one embodiment;
FIG. 14 is a circuit diagram illustrating one mode of operation of the current source multi-level inverter circuit according to one embodiment;
FIG. 15 is a circuit diagram illustrating another exemplary embodiment of a current source multi-level inverter circuit;
FIG. 16 is a time-division modulation waveform diagram of a time-division vector modulation method in one embodiment;
FIG. 17 is a time-division carrier diagram of a time-division vector modulation method in accordance with an embodiment;
FIG. 18 is a time-resolved vector diagram of a time-resolved vector modulation method in one embodiment;
FIG. 19 is a schematic diagram of current control in one embodiment of a time-division vector modulation method;
FIG. 20 is a schematic block diagram of a second inductance control in one embodiment;
FIG. 21 is a waveform of the current doubler circuit output current in one embodiment;
FIG. 22 is a waveform of a nine level current in one embodiment.
Description of reference numerals: s1, a first controllable switch unit; s2, a second controllable switch unit; s3, a third controllable switch unit; s4, a fourth controllable switch unit; s5, a fifth controllable switch unit; s6, a sixth controllable switch unit; s7, a seventh controllable switch unit; s8, an eighth controllable switch unit; s9, a ninth controllable switch unit; s10, a tenth controllable switch unit; s12, a twelfth controllable switch unit; l1, a first inductor; l2 and a second inductor.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the present application. The first resistance and the second resistance are both resistances, but they are not the same resistance.
It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
As shown in fig. 1, in one embodiment of the present application, there is provided a current source type multi-level inverter circuit including: the current doubling circuit is used for providing reference current, the reference current comprises first reference current or second reference current, and the second reference current is twice of the first reference current; the inverter bridge circuit is connected with the current doubling circuit and is used for inverting the reference current to generate an initial inverter current; and the flying inductor shunt circuit is connected with the inverter bridge circuit and is used for outputting the inverter current with multiple levels to the load according to the initial inverter current.
Specifically, the current source type multi-level inverter circuit is provided with a reference current by a current doubling circuit, wherein the reference current can be a first reference current or a second reference current, and the second reference current is twice of the first reference current. The inverter bridge circuit inverts the reference current to generate an initial inverter current and provides a charge-discharge loop for the current doubling circuit. The flying inductor shunt circuit outputs inverter current with multiple levels to the load according to the initial inverter current. Through mutually supporting between current doubling circuit, inverter bridge circuit and the flying span inductance shunt circuit, can set for in a flexible way each circuit module according to the demand, and then reach the inverter current of external output multilevel.
With continued reference to fig. 1, in one embodiment, the current doubling circuit includes: a constant current source for outputting a first reference current; and the inductive switch unit is connected with the constant current source and the inverter bridge circuit and is used for outputting a reference current to the inverter bridge circuit according to the first reference current.
The inductive switch unit is connected with the constant current source and the inverter bridge circuit, so that the inductive switch unit can output a reference current to the inverter bridge circuit according to the first reference current. And the inductive switch unit acts on the constant current source to output a first reference current or a second reference current to the inverter bridge circuit, wherein the second reference current is twice of the first reference current.
In one embodiment, the inductive switching unit comprises: a first controllable switch unit S1, the first end of which is connected with the first end of the constant current source, and the second end of which is connected with the first input node of the inverter bridge circuit; a twelfth controllable switch unit S12, a first end of which is connected to both the first end of the constant current source and the first end of the first controllable switch unit S1; a first inductance L1 configured to: the first end is connected with the second end of the first controllable switch unit S1 and the first input node, and the second end is connected with the second end of the twelfth controllable switch unit S12; a second controllable switching unit S2 configured to: the first end is connected to both the second end of the constant current source and the second input node of the inverter bridge circuit, and the second end is connected to both the second end of the twelfth controllable switch unit S12 and the second end of the first inductor L1.
Referring to fig. 2-3, specifically, the inductive switch unit includes a first controllable switch unit S1, a second controllable switch unit S2, a twelfth controllable switch unit S12 and a first inductor L1, and is connected in the manner described above in this example, by turning off the first controllable switch unit S1 and the second controllable switch unit S2, and turning on the twelfth controllable switch unit S12 to connect the constant current source in series with the first inductor L1, so that the current doubler circuit outputs a first reference current to the inverter bridge circuit; the constant current source is connected in parallel with the first inductor L1 by switching on the first controllable switch unit S1 and the second controllable switch unit S2 and switching off the twelfth controllable switch unit S12, so that the current doubling circuit outputs a second reference current to the inverter bridge circuit. Through the switching modes of the first controllable switching unit S1, the second controllable switching unit S2 and the twelfth controllable switching unit S12, the first inductor L1 is connected in series or in parallel with the constant current source, so that the current doubling circuit outputs the first reference current or the doubled first reference current to the inverter bridge circuit.
In one embodiment, the constant current source comprises a buck circuit, the buck circuit comprising: a first end of the boost inductor is connected to both the first end of the first controllable switch unit S1 and the first end of the twelfth controllable switch unit S12; an initial controllable switching unit configured to: the first end of the voltage boosting inductor is connected with the second end of the voltage boosting inductor, and the second end of the voltage boosting inductor is connected with one end of the direct current power supply; a diode configured to: the anode is connected with the other end of the direct current power supply and the second input node, and the cathode is connected with the second end of the boost inductor and the first end of the initial controllable switch unit; the other end of the dc power supply is connected to the first end of the second controllable switch unit S2 and the second input node.
Specifically, a first end of a boost inductor of the buck circuit is connected to both a first end of the first controllable switch unit S1 and a first end of the twelfth controllable switch unit S12. The initial controllable switch unit is connected with the boost inductor and one end of the direct current power supply. The anode of the diode is connected with the other end of the direct current power supply and the second input node, and the cathode of the diode is connected with the second end of the boost inductor and the first end of the initial controllable switch unit. By the design, when the initial controllable switch unit is switched on, the anode voltage of the diode is zero, the cathode voltage is power supply voltage, the reverse direction is cut off, current flowing on the initial controllable switch unit flows through the boost inductor to supply power to the inverter bridge circuit, the current in the boost inductor gradually rises at the moment, self-induction potentials with positive ends and negative ends at the left end are generated at the two ends of the boost inductor to prevent the current from rising, and the boost inductor converts electric energy into magnetic energy to be stored. When the controllable switch unit tube is turned off initially, but the current in the boost inductor can not change suddenly, self-inductance potentials at the two ends of the boost inductor generate positive right end and negative left end to prevent the current from decreasing, so that the diode is conducted in a forward bias mode, the current in the boost inductor forms a loop through the diode, the current value gradually decreases, the magnetic energy stored in the boost inductor is converted into electric energy to be released and continue to supply power to the inverter bridge circuit, and the current constancy is realized.
In the present embodiment, the diode is preferably a schottky diode, but is not limited to a schottky diode, and other types of diodes should be within the protection scope; the controllable switch unit is preferably a MOSFET, but not limited to a MOSFET, and other fully controlled devices should be within the scope of protection.
Referring to fig. 1, in one embodiment, an inverter bridge circuit includes: a first end of the third controllable switch unit S3 is connected to the first input nodes of the inverter bridge circuit, and a second end is connected to the first input nodes of the flying bridge inductor shunting circuit; a first end of the fourth controllable switch unit S4 is connected to both the second end of the third controllable switch unit S3 and the first input node of the fly-across inductive shunt circuit, and a second end is connected to both the second input nodes of the inverter bridge circuit; a first end of the fifth controllable switch unit S5 is connected to the first input nodes of the inverter bridge circuit, and a second end thereof is connected to the second input nodes of the fly-span inductive shunt circuit; and a first end of the sixth controllable switch unit S6 is connected to both the second end of the fifth controllable switch unit S5 and the second input node of the fly-across inductive shunt circuit, and a second end is connected to both the second input nodes of the inverter bridge circuit.
Referring to fig. 4-7, in particular, the inverter bridge circuit includes: the third controllable switch unit S3, the fourth controllable switch unit S4, the fifth controllable switch unit S5, and the sixth controllable switch unit S6 are connected in the manner described in the embodiment, and further, the working mode of the inverter bridge circuit is realized by turning on and off each controllable switch unit, so that the reference current is inverted to generate an initial inverter current, and meanwhile, a charge-discharge loop is provided for the current-doubling circuit. In a specific manner, the third controllable switch unit S3 and the fourth controllable switch unit S4 are turned on, and the fifth controllable switch unit S5 and the sixth controllable switch unit S6 are turned off at the same time, so that the first bypass is turned on; the third controllable switch unit S3 and the sixth controllable switch unit S6 are conducted, and the fifth controllable switch unit S5 and the fourth controllable switch unit S4 are turned off at the same time, so that forward conduction is realized; the third controllable switch unit S3 and the sixth controllable switch unit S6 are turned off, and the fifth controllable switch unit S5 and the fourth controllable switch unit S4 are turned on at the same time, so that negative direction conduction is realized; the third controllable switch unit S3 and the fourth controllable switch unit S4 are turned off, and the fifth controllable switch unit S5 and the sixth controllable switch unit S6 are turned on at the same time, so that the second bypass is turned on.
With continued reference to fig. 1, in one embodiment, the fly-by inductive shunt circuit includes: a first end of the seventh controllable switch unit S7 is connected to the first input node of the fly-across inductive shunt circuit; a first end of the eighth controllable switch unit S8 is connected to a second end of the seventh controllable switch unit S7, and a second end of the eighth controllable switch unit S is connected to both second input nodes of the fly-span inductor shunt circuit; a ninth controllable switch unit S9, a first end of which is connected to the first input node of the fly-across inductor shunt circuit; a tenth controllable switch unit S10, a first end of which is connected to the second end of the ninth controllable switch unit S9, and a second end of which is connected to the second input node of the flying inductor shunt circuit; a second inductance L2 configured to: the first end is connected to the second end of the seventh controllable switch unit S7 and the first end of the eighth controllable switch unit S8, and the second end is connected to the second end of the ninth controllable switch unit S9 and the first end of the tenth controllable switch unit S10.
Referring to fig. 8 to 11, specifically, the flying inductor shunt circuit includes a seventh controllable switch unit S7, an eighth controllable switch unit S8, a ninth controllable switch unit S9, and a tenth controllable switch unit S10, and is connected in the manner described above in this embodiment, so that each operating mode of the flying inductor shunt circuit is realized by turning on and off each controllable switch unit, and further, the inverter current with multiple levels is output to the load according to the initial inverter current. The specific working mode is as follows, the seventh controllable switch unit S7 and the tenth controllable switch unit S10 are turned on, and the eighth controllable switch unit S8 and the ninth controllable switch unit S9 are turned off at the same time, so that negative output is realized; the seventh controllable switch unit S7 and the tenth controllable switch unit S10 are turned off, and the eighth controllable switch unit S8 and the ninth controllable switch unit S9 are turned on at the same time, so as to implement forward output; the seventh controllable switch unit S7 and the ninth controllable switch unit S9 are turned on, and the eighth controllable switch unit S8 and the tenth controllable switch unit S10 are turned off at the same time, so that the upward follow current is realized; the seventh controllable switch unit S7 and the ninth controllable switch unit S9 are turned off, and the eighth controllable switch unit S8 and the tenth controllable switch unit S10 are turned on at the same time, so that the next current is realized.
In one embodiment, the fly-by inductive shunt circuit comprises: the first end of the capacitor is connected with the first input nodes of the flying inductor shunt circuit, and the second end of the capacitor is connected with the second input nodes of the flying inductor shunt circuit; and the first end of the load inductor is connected with the first input nodes of the flying inductor shunt circuit, and the second end of the load inductor is connected with the second input nodes of the flying inductor shunt circuit. By arranging the capacitor and the load inductor, the fly-across inductor shunt circuit outputs multi-level stable inverter current to the load.
Referring to fig. 12, in an embodiment of the present application, there is provided a current source type multi-level inverter device, including: the arbitrary current source type multilevel inverter circuit described above; the number of the flying span inductance shunt circuits is more than or equal to 2, and the flying span inductance shunt circuits are connected in parallel.
Referring to fig. 13, in an embodiment of the present application, there is provided a current source type multi-level inverter device, including: and a plurality of current source type multilevel inverter circuits connected in parallel.
In the current source type multilevel inverter circuit and the current source type multilevel inverter device, the multilevel inverter circuit is decomposed into a current doubling circuit, an inverter bridge circuit and a flying inductor shunt circuit module, wherein the current doubling circuit is used for providing reference current; the inverter bridge circuit is used for inverting the reference current to generate an initial inverter current; the flying inductor shunt circuit is used for outputting the inverter current with multiple levels to the load according to the initial inverter current. By the design, each inductor in the topology is relatively independent, the phenomenon of shunt parallel connection of a plurality of inductors does not exist, the problem of uneven distribution of inductive current is avoided, and then multi-level stable inverter current is output to a load. Meanwhile, the number of levels is easily expanded through the parallel flying inductor units and the parallel inverter topology, the frequency range is wide, the flexibility is high in practical application, and the economy is further improved.
Specifically, if the flying inductor shunt circuit current is x and the current doubler circuit output current is I or 2I, the output current level state of the total topology is: 2I + x, 2I-x, I + x, I-x, 0+ x, 0-x, -I + x, -I-x, -2I + x, -2I-x, the difference between the modulus values of adjacent levels is divided into x, I-2x, x I-2x, I-2x, x.
For the convenience of modulation in the current source type multi-level inverter device, the difference between adjacent levels is always kept consistent, and if the states of the levels are mutually independent, the following results can be obtained:
Figure BDA0003027637840000141
substituting the result of equation (1) into each level, each level being: 7/3I, 6/3I, 5/3I, 4/3I, 3/3I, 2/3I, 1/3I, 0, -1/3I, -2/3I, -3/3I, -4/3I, -5/3I, -6/3I and-7/3I, which are called level formula 1.
If there is redundancy in the above level states, i.e. 2I-x = I + x, then:
Figure BDA0003027637840000142
then I-x =0+ x, 0-x = -I + x, -I-x = -2I + x are also satisfied. Substituting the result of equation (2) into each level, the levels are: 5/2I, 4/2I, 3/2I, 2/2I, 1/2I, 0, -1/2I, -2/2I, -3/2I, -4/2I, -5/2I, which is called level formula 2.
The level formula 1 and the level formula 2 can be used as a level design strategy of the current source type multi-level inverter. Level 1 can achieve 15-level output, but there is no redundancy level; the level 2 can realize 13-level output, partial redundant levels exist, and an appropriate multi-level form can be selected according to requirements in practice.
Referring to fig. 14-15, assuming that the level with the required output amplitude of 1.5I is required, the current doubler circuit and the inverter bridge circuit may be used to output a +2I level, and the fly-across inductor shunt circuit outputs a 0.5I level, and the two are connected in parallel in the opposite direction, so as to obtain an intermediate level of 1.5I; the current doubling circuit and the inverter bridge circuit can also be used for outputting + I reference level, the flying inductor shunt circuit outputs 0.5I, and the flying inductor shunt circuit are connected in parallel in the same direction, so that the intermediate level 1.5I can be obtained.
Referring to fig. 16-22, in an embodiment of the present application, a time-division vector modulation method is provided for adjusting the current of the fly inductor in any of the current source type multilevel inverter circuits described above, the method includes:
step S202: and inversely compressing the modulation wave into a deformed modulation wave in a preset interval, wherein the preset interval is associated with the first reference current.
Step S204: and determining the frequency and the amplitude of the sawtooth carrier according to the fundamental wave frequency and the first reference current.
Step S206: and taking the positive and negative turning points of the slope of the deformation modulation wave as time zone dividing points, and decomposing the sawtooth carrier waves in each carrier wave period into pulse square waves according to the time zone dividing points, wherein the pulse square waves are used for fitting sine waves.
Step S208: and adjusting the current value of the flying inductor in each pulse width according to the pulse width of the pulse square wave.
In the time-domain decomposition type vector modulation method, the method is provided based on a current source type multi-level inverter device and is used for adjusting the current of a flying inductor in a current source type multi-level inverter circuit. The method synthesizes a large-step approximation sine waveform by using small steps, has better harmonic characteristics, and can improve the equivalent sampling frequency. The time zone width of the charging and discharging pulse can be finely adjusted through error feedback on the inductive current control, closed-loop no-difference regulation and control are achieved, and control is simple. The large-step approximation sine waveform is synthesized by switching between adjacent current values of multiple levels for multiple times, so that the optimization of harmonic characteristics can be better realized on the basis of multiple levels, and fine tuning control is facilitated.
By way of example, in one embodiment of the present application, continuing with reference to fig. 16, specifically, modulated wave I is flip-compressed into a distorted modulated wave I' between 0-I according to equation (1):
Figure BDA0003027637840000151
where [ x ] is the integer part of the x-floor rounding function, and I is the reference current.
Referring to fig. 17, the positive and negative inflection points of the slope in the distortion modulation wave t 'are used as time zone dividing points, and the range of each time zone interval is converted to 0 to pi according to equation (2), so that the range of each sint' is converted to 0 to 1. Wherein t is 1 、t 2 Two adjacent time zone demarcation points.
Figure BDA0003027637840000152
Setting a carrier period T s The high-level vector has a duration of T 2 Low level vector action time of T 1 ，T s ＝T 1 +T 2 。T 2 /T s That is, the duty ratio D of the high level vector in one carrier period is set to D = sint', then T 2 ＝T s sint'，T 1 ＝T s -T s sint', each large step is actually a section of a sine wave by utilizing an impulse equivalent principle, and the sine wave can be better fitted.
Referring to fig. 19, the voltage value and the current value of the second inductor are obtained by sampling, and then the total correction time Δ T for returning the current of the shunt inductor to the set value x is obtained by calculating according to the formula (3), where the voltage at the two ends of the second inductor is always equal to the output voltage U o 。
Figure BDA0003027637840000161
By adjusting T when the carriers are time-zone-divided into P time zones 1 、T 2 The width of each time zone can be adjusted, so that the charging and discharging working modes of each time zone are reasonably distributed, namely, the shunt inductance charging and discharging balance can be realized in one carrier cycle, and the shunt inductance current is stabilized at a set value.
As a specific embodiment:
taking an ac current waveform with an output frequency of 120kHz and an effective current value of 2.3A as an example:
referring to fig. 21, now setting fly-across inductor shunt circuit to 0.5I, 13-level output of-2.5I, -2I, -1.5I, -0.5I, 0, +0.5I, +1.5I, +2I, +2.5I can be realized, and only 9-level output of-2I, -1.5I, -0.5I, 0, +0.5I, +1.5I, +2I is selected to ensure that each level has a redundant switch state.
The effective value of the output current is 2.3A, and the peak value corresponds to high level, so that the following results are obtained:
Figure BDA0003027637840000164
the shunt inductor current is 0.5I, i.e. 0.8A. The nine output levels are-3.2A, -2.4A, -1.6A, -0.8A, 0, +0.8A, +1.6A, +2.4A, +3.2A, respectively.
The vector modulation method applying time zone decomposition formula is as follows:
the modulated wave i is reversely compressed into a deformed modulated wave i' between 0 and 1.6A according to the formula (1):
Figure BDA0003027637840000162
wherein
Figure BDA0003027637840000163
For the integer part of the x-floor function, 1.6A is the reference current.
And setting a sawtooth carrier, setting the amplitude to be 1.6A of reference current, and selecting the frequency to be 240kHz according to the fundamental frequency.
The positive and negative turning points of the slope in the distortion modulation wave t 'are used as time zone dividing points, and the range of each time zone interval is converted to 0-pi according to the formula (2), so that the range of each sint' is converted to 0-1. Wherein t is 1 、t 2 Two adjacent time zone demarcation points.
Figure BDA0003027637840000171
Setting a carrier period T s Medium and highThe level vector has an action time of T 2 Low level vector action time of T 1 ，T s ＝T 1 +T 2 。T 2 /T s That is, the duty ratio D of the high level vector in one carrier period is set to D = sint', then T 2 ＝T s sint'，T 1 ＝T s -T s sint', each large step is actually a section of a sine wave by utilizing an impulse equivalent principle, and the sine wave can be better fitted.
Obtaining the voltage value and the current value of the second inductor through sampling, and then obtaining the total correction time delta T for returning the shunt inductor current to the set value of 0.8A through the calculation of the formula (3), and obtaining the inductor L 2 The voltage at both ends is always equal to the output voltage U o 。
Figure BDA0003027637840000172
When the carrier is time-zone-divided into P =5 time zones, the total correction time Δ T is divided into four equal parts, each of which is Δ T. The width of the second time zone is reduced by 2 delta t, the width of the fourth time zone is increased by 2 delta t, or the width of the second time zone is increased by 2 delta t and the width of the fourth time zone is reduced by 2 delta t, namely, the charging and discharging modes can be distributed while the impulse equivalence principle is still met in one carrier cycle, so that the charging and discharging of the second inductor are balanced, and the current is stabilized at a set value of 0.8A.
Referring to fig. 20, in all the controllable switch units of the current source type multi-level inverter circuit, the controllable switch units that are turned on synchronously are combined with: (S) 1 、S 2 ) (ii) a The controllable switch units which are conducted complementarily are combined with: (S) 1 、S 12 )、(S 3 、S 5 )、(S 4 、S 6 )、(S 7 、S 8 )、(S 9 、S 10 ) Therefore, only the controllable switch unit S is concerned when analyzing the working mode of the current source type multi-level inverter circuit 1 、S 3 、S 4 、S 7 、S 9 And (4) finishing. Let "1" indicate that the switching tube is on in the forward direction, and "0" indicate that the switching tube is off in the reverse direction, and the operation timing of the controllable switching unit is shown in the following table.
Figure BDA0003027637840000181
Figure BDA0003027637840000191
Referring to fig. 22, the final circuit output can achieve a good nine-level current output.
It should be understood that the steps described are not to be performed in the exact order recited, and that the steps may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps described may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performing the sub-steps or stages is not necessarily sequential, but may be performed alternately or in alternation with other steps or at least some of the sub-steps or stages of other steps.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct Rambus Dynamic RAM (DRDRAM), and Rambus Dynamic RAM (RDRAM), among others.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A time-division-type vector modulation method is characterized by being used for adjusting the current of a flying inductor in a current source type multi-level inverter circuit, wherein the current source type multi-level inverter circuit comprises a current doubling circuit, an inverter bridge circuit and a flying inductor shunt circuit, the current doubling circuit is used for providing reference current, the reference current comprises first reference current or second reference current, and the second reference current is twice of the first reference current; the inverter bridge circuit is connected with the current doubling circuit and is used for inverting the reference current to generate an initial inverter current; the flying inductor shunt circuit is connected with the inverter bridge circuit and is used for outputting inverter current with multiple levels to a load according to the initial inverter current; the method comprises the following steps:
inverting and compressing the modulated wave into a deformed modulated wave in a preset interval, wherein the preset interval is related to the first reference current;
determining the frequency and amplitude of the sawtooth carrier according to the fundamental wave frequency and the first reference current;
taking the positive and negative turning points of the slope of the deformation modulation wave as time zone dividing points, and decomposing the sawtooth carrier waves in each carrier wave period into pulse square waves according to each time zone dividing point, wherein the pulse square waves are used for fitting sine waves;
and adjusting the current value of the flying inductor in each pulse width according to the pulse width of the pulse square wave.
2. The time-division multiplexing method of claim 1, wherein the current doubler circuit comprises:
a constant current source for outputting the first reference current;
and the inductive switch unit is connected with the constant current source and the inverter bridge circuit and is used for outputting the reference current to the inverter bridge circuit according to the first reference current.
3. The time-division vector modulation method of claim 2, wherein the inductive switching unit comprises:
a first end of the first controllable switch unit is connected with a first end of the constant current source, and a second end of the first controllable switch unit is connected with a first input node of the inverter bridge circuit;
a twelfth controllable switch unit, a first end of the twelfth controllable switch unit being connected to both the first end of the constant current source and the first end of the first controllable switch unit;
a first inductor, a first end of the first inductor being connected to both the second end of the first controllable switch unit and the first input node, and a second end of the first inductor being connected to the second end of the twelfth controllable switch unit;
a first end of the second controllable switch unit is connected to both the second end of the constant current source and the second input node of the inverter bridge circuit, and a second end of the second controllable switch unit is connected to both the second end of the twelfth controllable switch unit and the second end of the first inductor.
4. The time-division multiplexing vector modulation method of claim 3, wherein the constant current source comprises a buck circuit, the buck circuit comprising:
a first end of the boost inductor is connected with both the first end of the first controllable switch unit and the first end of the twelfth controllable switch unit;
the first end of the initial controllable switch unit is connected with the second end of the boost inductor, and the second end of the initial controllable switch unit is connected with one end of the direct-current power supply;
the anode of the diode is connected with the other end of the direct-current power supply and the second input node, and the cathode of the diode is connected with the second end of the boost inductor and the first end of the initial controllable switch unit;
and the other end of the direct current power supply is connected with the first end of the second controllable switch unit and the second input node.
5. The time-zone decomposition type vector modulation method according to claim 1, wherein said inverter bridge circuit comprises:
a first end of the third controllable switch unit is connected with the first input nodes of the inverter bridge circuit, and a second end of the third controllable switch unit is connected with the first input nodes of the flying inductor shunt circuit;
a first end of the second controllable switch unit is connected with a first end of the second controllable switch unit and a second end of the fly-across inductor shunt circuit, and a second end of the second controllable switch unit is connected with a second input node of the inverter bridge circuit;
a first end of the fifth controllable switch unit is connected with the first input nodes of the inverter bridge circuit, and a second end of the fifth controllable switch unit is connected with the second input nodes of the flying inductor shunt circuit;
and a first end of the sixth controllable switch unit is connected with both a second end of the fifth controllable switch unit and a second input node of the fly-span inductor shunt circuit, and a second end of the sixth controllable switch unit is connected with both a second input node of the inverter bridge circuit.
6. The time-zone resolved vector modulation method of claim 1, wherein the fly-by inductive shunt circuit comprises:
a first end of the seventh controllable switch unit is connected with a first input node of the flying inductor shunt circuit;
a first end of the eighth controllable switch unit is connected with a second end of the seventh controllable switch unit, and a second end of the eighth controllable switch unit is connected with a second input node of the fly-across inductor shunt circuit;
a ninth controllable switch unit, a first end of which is connected to the first input node of the flying inductor shunt circuit;
a tenth controllable switch unit, a first end of which is connected to the second end of the ninth controllable switch unit, and a second end of which is connected to the second input node of the flying inductor shunt circuit;
a first end of the second inductor is connected to the second end of the seventh controllable switch unit and the first end of the eighth controllable switch unit, and a second end of the second inductor is connected to the second end of the ninth controllable switch unit and the first end of the tenth controllable switch unit.
7. The time-zone resolved vector modulation method of claim 6, wherein the fly-by inductive shunt circuit comprises:
a first end of the capacitor is connected with a first input node of the fly inductor shunt circuit, and a second end of the capacitor is connected with a second input node of the fly inductor shunt circuit;
and the first end of the load inductor is connected with the first input node of the flying inductor shunt circuit, and the second end of the load inductor is connected with the second input node of the flying inductor shunt circuit.
8. The time-zone resolved vector modulation method of any of claims 1-7, wherein the number of fly-by inductive shunt circuits is greater than or equal to 2, each fly-by inductive shunt circuit being connected in parallel.
9. The time-division multiplexing vector modulation method according to any one of claims 1 to 7, wherein a plurality of current source type multilevel inverter circuits are connected in parallel.
10. The time-zone decomposition type vector modulation method of claim 1, wherein the closed-loop error-free regulation is realized by fine-tuning the time-zone width of the charge-discharge pulse through error feedback.
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