CN113224235A - Bidirectional gate with ultra-low threshold voltage and preparation method thereof - Google Patents

Bidirectional gate with ultra-low threshold voltage and preparation method thereof Download PDF

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CN113224235A
CN113224235A CN202110464306.2A CN202110464306A CN113224235A CN 113224235 A CN113224235 A CN 113224235A CN 202110464306 A CN202110464306 A CN 202110464306A CN 113224235 A CN113224235 A CN 113224235A
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solution
top electrode
fto
electrode
spin coating
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唐灵芝
王晨
黄阳
杨一鸣
边继明
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Dalian University of Technology
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of the switching material, e.g. layer deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8416—Electrodes adapted for supplying ionic species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials

Abstract

A bidirectional gate with ultra-low threshold voltage comprises a bottom electrode, a resistance change layer and a top electrode from bottom to top in sequence, wherein the bottom electrode is made of conductive glass FTO (fluorine doped SnO)2A film; the resistive switching layer is made of (Cs)xFAyMA1‑x‑y)Pb(IzBr1‑z)3The resistance change layer material is prepared by a low-temperature solution spin-coating method; the top electrode is Ag. The method comprises the following steps: first, dropping (Cs) on the conductive surface of the FTO conductive glass substratexFAyMA1‑x‑y)Pb(IzBr1‑z)3Uniformly coating the solution, then carrying out spin coating, and dropwise adding an anti-solvent chlorobenzene before the spin coating is finished to rapidly crystallize perovskite; secondly, annealing at 90-110 ℃ for 20-40 minutes to obtain a halogen perovskite thin film on the conductive surface; finally, a top electrode is deposited on the perovskite thin film by a vacuum thermal evaporation method. The invention does not need high temperature process, adopts low temperature solution spin coating process, forms film in one step, has simple requirement on equipment and cost ratioThe method is low, and can be used for resistive array integration; the bidirectional gate can realize bidirectional ultra-low threshold voltage (less than 0.2V) and the on-off ratio of the gating performance is more than 104The RRAM device can realize wider matching range and gating capacity for the switching voltage of the RRAM device.

Description

Bidirectional gate with ultra-low threshold voltage and preparation method thereof
Technical Field
The invention belongs to the field of semiconductor microelectronics, and relates to a bidirectional gate with ultra-low threshold voltage.
Technical Field
In recent years, with the development and application of big data and artificial intelligence techniques, the demand for high-density, low-power consumption devices has increased year by year. The traditional silicon-based NAND memory technology faces the examination of moore's law technology nodes and a plurality of problems, such as slow operation speed, high erasing voltage, short service life, large leakage current and the like. The novel nonvolatile Resistive Random Access Memory (RRAM) has ideal storage performance such as subnanosecond switching, excellent cycle stability, long-time retention characteristic, low operation power consumption and the like, and the simple sandwich structure of the RRAM enables the RRAM to be easily integrated in high density. One of the biggest obstacles to achieving high-density integration of RRAM is the cross-talk problem caused by sneak currents flowing through neighboring unselected cells during a read operation. The ideal solution is to connect a gating device in series with a high non-linearity.
The gate is a volatile switching device having a high nonlinearity (switching resistance ratio). The two-terminal device has a sandwich structure similar to an RRAM and is divided into an upper electrode, a middle resistance change layer and a lower electrode. In an RRAM array, the gates are directly connected in series with the RRAM devices, and can occupy a minimum chip area. Because the initial resistance value of the gate is large, and the threshold voltage of the gate is lower than the turn-on and turn-off voltage of the RRAM, when external voltage is loaded, the gate is turned on before the RRAM; after the gate is opened, the resistance value becomes small, and the RRAM device obtains most voltage to change the resistance state. In addition, to suppress sneak current, the read voltage is typically set between the threshold voltage of the gate and the RRAM device turn-on voltage. Thus, a lower threshold voltage may allow for a larger switching voltage range and lower operating power consumption of the RRAM device.
Based on the above consideration, the present invention prepares a bidirectional gate with ultra-low threshold voltage and higher on-off ratio based on a halogen perovskite resistive layer by utilizing the ability of rapid transport of Ag in halogen perovskite. The halogen perovskite has simple process, can form a film at low temperature and is easy to prepare. According to the invention, the halogen perovskite prepared by the low-temperature solution process realizes the ultra-low bidirectional threshold (<0.2V) switching characteristic, the matching range of the switching voltage of the RRAM device connected in series is expanded, and the integration with the RRAM device is facilitated.
Disclosure of Invention
The invention aims to enlarge the matching range of the threshold voltage of a gate and the switching voltage of an RRAM device by reducing the threshold voltage of the gate, and provides a bidirectional gate with ultra-low threshold voltage and a preparation method thereof, wherein the preparation equipment is simple, the processing cost is low, and the ultra-low threshold voltage (less than 0.2V) is realized.
In order to achieve the technical purpose, the invention adopts the technical scheme that:
a bidirectional gate with ultra-low threshold voltage comprises a bottom electrode, a resistance change layer and a top electrode (figure 1) from bottom to top. Said transparent conductive glass FTO, i.e. fluorine-doped SnO2A film; the resistive switching layer is made of (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3The resistance change layer material is prepared by a low-temperature solution spin-coating method; the top electrode is Ag.
Furthermore, the thickness of the FTO is 100-200 nm, the shape of the FTO is square, and the side length of the FTO is 1.5 cm. The thickness of the resistive layer is 150-280 nm, the resistive layer is square, and the side length is 1.5 cm. The top electrode is 80-150 nm thick, circular in shape and 200-400 μm in diameter.
Further, the thickness of the resistance change layer is preferably 240 nm. The top electrode preferably has a thickness of 100nm and a diameter of 300 μm.
A preparation method of a bidirectional gate with an ultra-low threshold voltage comprises the following steps:
step 1, ultraviolet treating transparent FTO
Step 2, preparing halogen perovskite (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3Solution:
(1) mixing formamidine hydroiodide (FAI), methyl bromide (MABr), and lead iodide (PbI)2) Lead bromide (PbBr)2) The resulting solution was dissolved in a mixed solution of Dimethylformamide (DMF) and dimethyl sulfoxide (DMSO) to obtain a solution A. Wherein, 0.4-1.5 mmol FAI, 0.09-0.3 mmol MABr and 0.5-1.8 mmol PbI are correspondingly added into each 1mL of mixed solution2、 0.03～0.09mmol PbBr2。
(2) And dissolving the CsI in a DMSO solution to obtain a solution B, wherein 0.3-1.1 mmol of CsI is correspondingly added into each 0.5mL of the DMSO solution.
(3) And respectively stirring the solution A and the solution B at the temperature of 40-80 ℃ for 0.5-1 h, and respectively filtering by using a 0.22 mu m filter to remove large particles in the solutions to obtain a light yellow solution A and a colorless transparent solution B.
(4) Adding the filtered solution B to the filtered solution A at room temperature to obtain (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3And (3) solution. Wherein, 20-70 mu L of the solution B is correspondingly added into each 1mL of the filtered solution A.
Step 3, preparing a halogen perovskite layer, wherein the whole process is carried out in an inert gas environment:
(1) dropping (Cs) on the conductive surface of the FTO substrate treated in the step 1xFAyMA1-x-y)Pb(IzBr1-z)3The solution is dissolved and is evenly coated. Wherein each 2.25cm220-40 mu L (Cs) of the conductive surface is dripped onxFAyMA1-x-y)Pb(IzBr1-z)3And (3) solution.
(2) And starting a spin coater to carry out spin coating.
(3) Dripping the anti-solvent chlorobenzene 3-10 s before the spin coating, wherein each 2.25cm2150-200 mu L of chlorobenzene is dripped to ensure that the perovskite is quickly crystallized, and then the perovskite is retreated at the temperature of 90-110 DEG CAnd (4) performing fire treatment for 20-40 minutes to obtain the halogen perovskite film on the conductive surface.
Step 4, preparing a top electrode:
and (3) depositing a top electrode on the perovskite thin film in the step (3) by a vacuum thermal evaporation method, wherein the top electrode is Ag, the thickness of the top electrode is 80-150 nm, the top electrode is circular, and the diameter of the top electrode is 200-400 microns. Thus, a halogen perovskite gate is prepared.
Further, the ultraviolet-treated transparent conductive glass substrate in the step 1 specifically comprises: and irradiating the FTO surface with ultraviolet light in a UV instrument for 10-30 minutes.
Further, in the mixed solution in the step 2, the volume ratio of dimethyl formamide DMF to dimethyl sulfoxide DMSO is 4: 1.
further, the whole spin coating in step 3 is divided into two parts: the first part is accelerated to 1000rpm at the acceleration of 500-1000 rpm/s, and then spin-coated for 5-15 s; the second part is to spin coating for 20-30 s after accelerating to 8000-10000 rpm with the acceleration of 1000rpm/s on the basis of the first part.
The technical scheme and principle of the invention are as follows:
gating device structure: the device is divided into three layers, FTO is used as a substrate, then a layer of halogen perovskite grows on the FTO through a low-temperature solution spin coating process, and a silver (Ag) electrode grows on the perovskite through a thermal evaporation method. The principle is as follows: due to the asymmetry of the upper electrode and the lower electrode of the device, Ag atoms are promoted to be accumulated at the FTO electrode and serve as an Ag source in the negative scanning process by applying a positive voltage stimulation of 60-90 s/0.08V to the Ag electrode terminal before testing. Thereby leading the device to be formed by Ag/(Cs)xFAyMA1-x-y)Pb(IzBr1-z)3FTO to Ag/(Cs)xFAyMA1-x-y)Pb(IzBr1-z)3Ag/FTO. During testing, a forward voltage is applied to the upper electrode Ag, and the FTO electrode is grounded. The initial state of the device is a high-resistance state, the active metal Ag can migrate along the direction of an electric field under the stimulation of a forward electric field, one or more conductive channels are formed in the perovskite film when the threshold voltage is reached, and the device is opened. When the external electric field is removed, the voltage is smallWhen the voltage is kept, a stable conductive channel is not formed enough, Ag particles can spontaneously relax back to the Ag electrode, the device returns to a high-resistance state, the volatility is shown, and the device is repeatedly switched between the high-resistance state and the low-resistance state according to the change of the voltage. When the upper electrode Ag is applied with a reverse scanning electric field, the device still exhibits threshold switching characteristics symmetrical to the forward direction due to the presence of an Ag source near the lower electrode FTO caused by the electric stimulus.
In order to achieve the purpose, the invention selects to prepare a halogen perovskite resistance-change layer film on an FTO substrate through long-term optimization, the resistance-change layer is controlled to be about 200nm, and stable gating performance can be realized under the condition of 10 muA current limiting.
The innovation point of the invention has two aspects:
(1) by utilizing the characteristic that Ag ions rapidly migrate in perovskite, a gating device with ultra-low threshold voltage is prepared. The threshold voltage of the gate is reduced, so that the matching range of the switch voltage of the RRAM devices connected in series can be expanded, and the power consumption of the read-write operation of the devices can be further reduced.
(2) A stable bidirectional threshold switching behavior is achieved. Positive voltage stimulation is applied to the Ag electrode end to promote Ag atoms to be accumulated at the FTO electrode and serve as an Ag source in the negative scanning process, so that negative threshold switching behavior is realized.
Compared with the prior art, the invention has the advantages that:
the preparation method is simple, does not need a high-temperature process, adopts a low-temperature solution spin coating process, and forms a film in one step; the requirement on equipment is simple, and the cost is lower; relatively inexpensive metal Ag is used as an electrode.
Drawings
FIG. 1 is a schematic diagram of a halogen perovskite gate structure;
FIG. 2 is a front view of a halogen perovskite gate structure;
FIG. 3 SEM images of the surface and cross-section of a halogen perovskite thin film;
FIG. 4I-V curves of halogen perovskite gates.
Detailed Description
The present invention is further illustrated by the following specific examples.
Example 1
A bidirectional gate having an ultra-low threshold voltage. The upper electrode, the resistance change layer and the lower electrode are arranged from top to bottom in sequence. The upper electrode is made of Ag, the thickness of the upper electrode is 100nm, and the upper electrode is in a circular shape with the diameter of 300 mu m; the resistive switching layer is made of (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3240nm thick (fig. 2), 1.5 x 1.5cm square in shape; the lower electrode is FTO, i.e. fluorine-doped SnO2180nm thick and 1.5 x 1.5cm square in shape. The material (Cs) of the resistance change layerxFAyMA1-x-y)Pb(IzBr1-z)3Prepared by a low-temperature solution spin coating method.
A bidirectional gate with ultra-low threshold voltage and a preparation method thereof comprise the following steps:
step 1, ultraviolet treatment of transparent FTO:
the FTO surface was irradiated with UV light for 20 minutes in a UV instrument.
Step 2: preparation of halogen perovskite (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3Solution:
(1) 0.9mmol of FAI, 0.18mmol of MABr, 1.1mmol of PbI2，0.055mmol PbBr2The resulting solution was dissolved in a mixture of 1ml of DMF and DMSO (dimethyl sulfoxide) at a ratio of 4 to 1 to obtain solution A.
(2) 0.68mmol CsI was dissolved in 0.5mL of DMSO solution to obtain solution B.
(3) The solution A and the solution B are respectively stirred for 1h under the heating condition of 60 ℃. Then, the solution was filtered through 0.22 μm filters to remove large particles, thereby obtaining a pale yellow solution A and a colorless transparent solution B.
(4) 50 μ L of the filtered solution B was taken out and added to 1ml of the filtered solution A to obtain (Cs) used in the present examplexFAyMA1-x-y)Pb(IzBr1-z)3And (3) solution.
Step 3, preparing the halogen perovskite layer, and carrying out the whole process under the inert gas environment
(1) 2.25cm on FTO substrate230 mu L (Cs) of the conductive surface is dripped onxFAyMA1-x-y)Pb(IzBr1-z)3The solution is evenly coated.
(2) Starting a spin coater, starting spin coating, dividing the whole spin coating into two parts, accelerating the first part to 1000rpm at a speed of 1000rpm/s, and then spin coating for 10 s. The second part was spin-coated for 20 seconds after accelerating to 9000rpm at an acceleration of 1000rpm/s, which was continued from the first part.
(3) 160. mu.L of chlorobenzene, an anti-solvent, was added dropwise 5s before the end of the second stage of spin coating to allow rapid crystallization of the perovskite, followed by annealing at 100 ℃ for 30 minutes.
Step 4, preparing a top electrode:
depositing a top electrode of Ag with a thickness of 100nm, a circular shape and a diameter of 300 μm on the perovskite thin film in step 3 by a vacuum thermal evaporation method. Thus, a halogen perovskite gate is prepared.
Characterization and testing:
(1) the electrical performance test was performed by setting the Ag electrode to a positive voltage, the FTO to ground, the scan voltage sequence to 0V → positive voltage → 0V → negative voltage → 0V, and the limiting current to 10 μ a. As shown in the following figure, the device achieves the gating characteristic of the threshold switch when positive/negative voltage is applied, and when the voltage is increased to the threshold voltage along with the increase of the voltage, the device is turned on and is converted into a low-resistance state; when the voltage is removed and reduced to the holding voltage, the device is turned off and is changed from a low-resistance state to a high-resistance state, and the device is volatile.
(2) Therefore, the bidirectional gate based on the halogen perovskite material and having the ultralow threshold voltage can realize the bidirectional ultralow threshold voltage (less than 0.2V) and the on-off ratio of the gating performance of more than 104The RRAM device can achieve wider matching range and gating capacity for the switching voltage of the RRAM device.
Example 2
A bidirectional gate having an ultra-low threshold voltage. From top to bottomThe upper electrode, the resistance change layer and the lower electrode are arranged in sequence. The upper electrode is made of Ag, the thickness of the upper electrode is 80nm, and the upper electrode is in a circular shape with the diameter of 200 mu m; the resistive switching layer is made of (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3150nm thick (fig. 2), 1.5 x 1.5cm square in shape; the lower electrode is FTO, i.e. fluorine-doped SnO2180nm thick and 1.5 x 1.5cm square in shape. The resistance change layer material (CsxFAyMA1-x-y) Pb (IzBr1-z)3 is prepared by a low-temperature solution spin coating method.
A bidirectional gate with ultra-low threshold voltage and a preparation method thereof comprise the following steps:
step 1, ultraviolet treatment of transparent FTO:
the FTO surface was irradiated with UV light for 10 minutes in a UV instrument.
Step 2: preparation of halogen perovskite (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3Solution:
(1) 0.45mmol of FAI, 0.09mmol of MABr, 0.55mmol of PbI2，0.03mmol PbBr2And were co-dissolved in a solution of 1ml of dmf (dimethylformamide) and DMSO (dimethylsulfoxide) mixed in a ratio of 4 to 1 to obtain a solution a.
(2) 0.34mmol CsI was dissolved in 0.5mL of DMSO solution to obtain solution B.
(3) The solution A and the solution B are respectively stirred for 1h under the heating condition of 40 ℃. Then, the solution was filtered using a 0.22 μm filter to remove large particles in the solution, thereby obtaining a pale yellow solution A and a colorless transparent solution B.
(4) 50 μ L of the filtered solution B was taken out and added to 1ml of the filtered solution A to obtain (Cs) used in the present examplexFAyMA1-x-y)Pb(IzBr1-z)3And (3) solution.
Step 3, preparing the halogen perovskite layer, and carrying out the whole process under the inert gas environment
(1) 2.25cm on FTO substrate240 mu L (Cs) of conductive surface is dripped onxFAyMA1-x-y)Pb(IzBr1-z)3The solution is dissolved and is evenly coated.
(2) Starting a spin coater, starting spin coating, dividing the whole spin coating into two parts, accelerating the first part to 1000rpm at the acceleration of 500rpm/s, and then spin coating for 15 s. The second part was spin-coated for 30 seconds after accelerating to 10000rpm with an acceleration of 1000rpm/s continued on the basis of the first part.
(3) 150 μ L of chlorobenzene, an anti-solvent, was added dropwise 10s before the end of the second stage of spin coating to allow rapid crystallization of the perovskite, followed by annealing at 90 ℃ for 40 minutes.
Step 4, preparing a top electrode:
depositing a top electrode of Ag, having a thickness of 80nm, a circular shape and a diameter of 200 μm on the perovskite thin film in step 3 by a vacuum thermal evaporation method. Thus, a halogen perovskite gate is prepared.
Characterization and testing:
the electrical performance was tested by setting the Ag electrode to a positive voltage, the FTO to ground, the scan voltage sequence 0V → positive voltage → 0V → negative voltage → 0V, and the limiting current to 10 μ a. As shown in the following figure, the device achieves the gating characteristic of the threshold switch when positive/negative voltage is applied, and when the voltage is increased to the threshold voltage along with the increase of the voltage, the device is turned on and is converted into a low-resistance state; when the voltage is removed and reduced to the holding voltage, the device is turned off and is changed from a low-resistance state to a high-resistance state, and the device is volatile.
Example 3
A bidirectional gate having an ultra-low threshold voltage. The upper electrode, the resistance change layer and the lower electrode are arranged from top to bottom in sequence. The upper electrode is made of Ag, the thickness of the upper electrode is 150nm, and the upper electrode is in a circular shape with the diameter of 400 mu m; the resistive switching layer is made of (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3280nm thick (fig. 2) and 1.5 × 1.5cm square in shape; the lower electrode is FTO (fluorine doped SnO)2180nm thick and 1.5 x 1.5cm square in shape. The material of the resistive layer (CsxFA)yMA1-x-y)Pb(IzBr1-z)3Prepared by a low-temperature solution spin coating method.
A bidirectional gate with ultra-low threshold voltage and a preparation method thereof comprise the following steps:
step 1, ultraviolet treatment of transparent FTO:
the FTO surface was irradiated with UV light for 30 minutes in a UV instrument.
Step 2: preparation of halogen perovskite (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3Solution:
(1) 1.5mmol of FAI, 0.3mmol of MABr, 1.8mmol of PbI2，0.09mmol PbBr2And were co-dissolved in a solution of 1ml of dmf (dimethylformamide) and DMSO (dimethylsulfoxide) mixed in a ratio of 4 to 1 to obtain a solution a.
(2) 1.1mmol CsI was dissolved in 0.5mL of DMSO solution to obtain solution B.
(3) The solution A and the solution B are respectively stirred for 0.5h under the heating condition of 70 ℃. Then, the solution was filtered through 0.22 μm filters to remove large particles, thereby obtaining a pale yellow solution A and a colorless transparent solution B.
(4) 50 μ L of the filtered solution B was added to the filtered solution A to obtain (Cs) used in the present examplexFAyMA1-x-y)Pb(IzBr1-z)3And (3) solution.
Step 3, preparing the halogen perovskite layer, and carrying out the whole process under the inert gas environment
(1) 2.25cm on FTO substrate220 μ L (Cs) of the conductive surface was dropped onxFAyMA1-x-y)Pb(IzBr1-z)3The solution is dissolved and is evenly coated.
(2) Starting a spin coater, starting spin coating, dividing the whole spin coating into two parts, accelerating the first part to 1000rpm at the acceleration of 1000rpm/s, and then spin coating for 5 s. The second part was spin-coated for 30 seconds after continuing to accelerate to 8000rpm with an acceleration of 1000rpm/s on the basis of the first part.
(3) 200 μ L of chlorobenzene, an anti-solvent, was added dropwise 5s before the end of the second stage of spin coating to allow rapid crystallization of the perovskite, followed by annealing at 110 ℃ for 20 minutes.
Step 4, preparing a top electrode:
depositing a top electrode of Ag with a thickness of 150nm, a circular shape and a diameter of 400 μm on the perovskite thin film in step 3 by a vacuum thermal evaporation method. Thus, a halogen perovskite gate is prepared.
Characterization and testing:
the electrical performance was tested by setting the Ag electrode to a positive voltage, the FTO to ground, the scan voltage sequence 0V → positive voltage → 0V → negative voltage → 0V, and the limiting current to 10 μ a. As shown in the following figure, the device achieves the gating characteristic of the threshold switch when positive/negative voltage is applied, and when the voltage is increased to the threshold voltage along with the increase of the voltage, the device is turned on and is converted into a low-resistance state; when the voltage is removed and reduced to the holding voltage, the device is turned off and is changed from a low-resistance state to a high-resistance state, and the device is volatile.
The above-mentioned embodiments only express the embodiments of the present invention, but not should be understood as the limitation of the scope of the invention patent, it should be noted that those skilled in the art can make several variations and modifications without departing from the concept of the present invention, and these all fall into the protection scope of the present invention.

Claims (8)

1. A bidirectional gate with ultra-low threshold voltage is characterized in that the bidirectional gate is sequentially provided with a bottom electrode, a resistance change layer and a top electrode from bottom to top; the bottom electrode is transparent conductive glass FTO (fluorine doped SnO)2A film; the resistive switching layer is made of (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3The resistance change layer material is prepared by a low-temperature solution spin-coating method; the top electrode is Ag.
2. The bidirectional strobe of claim 1 wherein the FTO has a thickness of 100 to 200 nm.
3. The bidirectional gate of claim 1, wherein the resistive layer has a thickness of 150 to 280 nm; the top electrode is 80-150 nm thick, circular in shape and 200-400 μm in diameter.
4. A bidirectional gate as claimed in claim 3, wherein said resistive layer is preferably 240nm thick; the top electrode preferably has a thickness of 100nm and a diameter of 300 μm.
5. A method of making a bidirectional gate as claimed in any of claims 1 to 4, comprising the steps of:
step 1, ultraviolet treatment of transparent FTO:
step 2, preparing halogen perovskite (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3Solution:
(1) mixing formamidine hydroiodide FAI, methylamine bromide MABr and lead iodide PbI2Lead bromide PbBr2Dissolving in a mixed solution of dimethyl formamide DMF and dimethyl sulfoxide DMSO to obtain a solution A; wherein, 0.4-1.5 mmol FAI, 0.09-0.3 mmol MABr and 0.5-1.8 mmol PbI are correspondingly added into each 1mL of mixed solution2、0.03～0.09mmol PbBr2；
(2) Dissolving the CsI in a DMSO solution to obtain a solution B, wherein 0.3-1.1 mmol of CsI is correspondingly added into each 0.5mL of DMSO solution;
(3) stirring the solution A and the solution B at 40-80 ℃ for 0.5-1 h respectively, and filtering to remove large particles in the solutions respectively to obtain a light yellow solution A and a colorless transparent solution B;
(4) adding the filtered solution B to the filtered solution A at room temperature to obtain (Cs)xFAyMA1-x-y)Pb(IzBr1-z)3A solution; wherein, 20-70 mu L of solution B is correspondingly added into each 1mL of filtered solution A;
step 3, preparing a halogen perovskite layer, wherein the whole process is carried out in an inert gas environment:
(1) dropping (Cs) on the conductive surface of the FTO substrate treated in the step 1xFAyMA1-x-y)Pb(IzBr1-z)3Uniformly coating the solution; wherein each 2.25cm220-40 mu L (Cs) of the conductive surface is dripped onxFAyMA1-x-y)Pb(IzBr1-z)3A solution;
(2) starting a spin coater to carry out spin coating;
(3) dripping the anti-solvent chlorobenzene 3-10 s before the spin coating, wherein each 2.25cm2Dropwise adding 150-200 mu L of chlorobenzene to quickly crystallize perovskite, and then annealing at 90-110 ℃ for 20-40 minutes to obtain a halogen perovskite thin film on a conductive surface;
step 4, preparing a top electrode:
depositing a top electrode on the perovskite thin film in the step 3 by a vacuum thermal evaporation method, wherein the top electrode is Ag, the thickness of the top electrode is 80-150 nm, the top electrode is circular, and the diameter of the top electrode is 200-400 microns; thus, a halogen perovskite gate is prepared.
6. The method according to claim 5, wherein the step 1 of UV-treating the transparent conductive glass substrate comprises: and irradiating the FTO surface by ultraviolet light in a UV instrument for 10-30 minutes.
7. The method according to claim 5, wherein the volume ratio of DMF (dimethyl formamide) and DMSO (dimethyl sulfoxide) in the mixed solution in the step 2 is 4: 1.
8. the method according to claim 5, wherein the whole spin coating in step 3 is divided into two parts: the first part is accelerated to 1000rpm at the acceleration of 500-1000 rpm/s, and then spin-coated for 5-15 s; the second part is to spin coating for 20-30 s after accelerating to 8000-10000 rpm with the acceleration of 1000rpm/s on the basis of the first part.
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