CN113224232A - SOT-MRAM based on bottom electrode vertical voltage control and manufacturing and writing methods - Google Patents

SOT-MRAM based on bottom electrode vertical voltage control and manufacturing and writing methods Download PDF

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CN113224232A
CN113224232A CN202110454799.1A CN202110454799A CN113224232A CN 113224232 A CN113224232 A CN 113224232A CN 202110454799 A CN202110454799 A CN 202110454799A CN 113224232 A CN113224232 A CN 113224232A
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bottom electrode
layer
film layer
thin film
voltage
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CN113224232B (en
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杨美音
罗军
崔岩
许静
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Institute of Microelectronics of CAS
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1697Power supply circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • H10N52/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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Abstract

The invention relates to an SOT-MRAM (magnetic random Access memory) based on bottom electrode vertical voltage control and manufacturing and writing methods thereof, belongs to the technical field of semiconductor devices and manufacturing thereof, and solves the problem that the SOT-MRAM in the prior art is difficult to realize magnetic moment orientation overturning which is convenient for integration and industrialization. The ferroelectric film comprises a ferroelectric film layer, two metal electrodes and a first voltage applied to the ferroelectric film layer through the two metal electrodes; the bottom electrode is positioned on the ferroelectric thin film layer, arranged in the middle of the ferroelectric thin film layer and in a strip shape, and a second voltage is applied to two ends of the bottom electrode; the tunnel junction is positioned above the bottom electrode, arranged in the middle of the bottom electrode and comprises a free layer, a tunneling layer and a reference layer which are sequentially stacked from bottom to top; the two metal electrodes are oppositely arranged on two opposite edges of the ferroelectric thin film layer and located on one side of the central line of the edge, the two edges are located on two sides of the long edge direction of the bottom electrode, and the direction of applying the first voltage through the two metal electrodes is perpendicular to the long edge direction of the bottom electrode.

Description

SOT-MRAM based on bottom electrode vertical voltage control and manufacturing and writing methods
Technical Field
The invention relates to the technical field of semiconductor devices and manufacturing thereof, in particular to an SOT-MRAM based on bottom electrode vertical voltage control and manufacturing and writing methods thereof.
Background
With the advent of the big data age, smaller, faster and more energy-saving devices are still the development requirements of the data storage devices, and in the field of semiconductor Memories, Magnetic Random Access Memories (MRAMs) which use electron spins to realize data storage become research hotspots due to the advantages of high speed, low voltage, high density, non-volatility and the like. Spin-Orbit Torque Magnetoresistive Random Access Memory (SOT-MRAM) has the advantages of read-write separation, high write speed and the like, is considered as a next-generation MRAM, has extremely high durability because write current does not pass through a tunnel junction, and is suitable for being applied to a storage and calculation integrated device.
In the SOT-MRAM, spin orbit coupling is utilized to generate spin current, so that magnetic moment of the magnet is induced to overturn, but the overturning direction of the magnetic moment is random under the action of the current, which is not favorable for effective data access, an external magnetic field is needed, the symmetry is broken, and the directional overturning of the magnetic moment is realized, but the external magnetic field is not favorable for device integration.
Therefore, the current SOT-MRAM has difficulty in realizing magnetic moment orientation flip that facilitates integration and industrialization.
Disclosure of Invention
In view of the foregoing, embodiments of the present invention are directed to an SOT-MRAM based on bottom electrode vertical voltage control and a method for manufacturing and writing the same, so as to solve the problem that the conventional SOT-MRAM is difficult to realize magnetic moment orientation flip for easy integration and industrialization.
In one aspect, an embodiment of the present invention provides a bottom electrode vertical voltage control-based SOT-MRAM, including:
a ferroelectric thin film layer provided with two metal electrodes through which a first voltage is applied to the ferroelectric thin film layer;
the bottom electrode is positioned on the ferroelectric thin film layer, arranged in the middle of the ferroelectric thin film layer and in a strip shape, and a second voltage is applied to two ends of the bottom electrode;
the tunnel junction is positioned above the bottom electrode, arranged in the middle of the bottom electrode and comprises a free layer, a tunneling layer and a reference layer which are sequentially stacked from bottom to top;
the two metal electrodes are oppositely arranged on two opposite edges of the ferroelectric thin film layer and are positioned on one side of the central line of the edge, the two edges are positioned on two sides of the long edge direction of the bottom electrode, and the direction of applying the first voltage through the two metal electrodes is vertical to the long edge direction of the bottom electrode.
Further, the ferroelectric thin film layer is provided in a square shape, and the bottom electrode partially covers the ferroelectric thin film layer.
Further, the length of the two metal electrodes accounts for half of the length of the edge of the ferroelectric film layer.
Furthermore, the tunnel junction is cylindrical and vertically arranged on the bottom electrode, the free layer and the reference layer are magnetic layers, vertical anisotropy is formed between the free layer and the reference layer, and the tunneling layer is a non-magnetic layer.
In one aspect, an embodiment of the present invention provides a method for manufacturing an SOT-MRAM based on bottom electrode vertical voltage control, including:
growing a ferroelectric film on the circuit board to form a ferroelectric film layer;
growing a bottom electrode on the ferroelectric film layer, wherein the bottom electrode is in a strip shape;
depositing metal electrodes on two edges of the ferroelectric thin film layer on two sides of the long side direction of the bottom electrode, wherein the metal electrodes are positioned on one side of the center line of the edge;
and sequentially growing a free layer, a tunneling layer and a reference layer on the bottom electrode.
Further, the ferroelectric thin film is grown by one of physical vapor deposition and atomic layer deposition.
And further, the ferroelectric film layer is processed into a square shape, the bottom electrode is positioned in the middle of the ferroelectric film layer, and the processing modes comprise ion beam etching and reactive ion etching.
Further, the length of the two metal electrodes accounts for half of the length of the edge of the ferroelectric film layer.
In another aspect, an embodiment of the present invention further provides a method for writing an SOT-MRAM, where a first voltage is input to the ferroelectric thin film layer through the two metal electrodes, a second voltage is input to the bottom electrode layer through two ends of the bottom electrode, and writing of the SOT-MRAM is completed by controlling the positive and negative of the first voltage and the second voltage.
Further, the range of the first voltage and the second voltage is-2V.
The invention has the following beneficial effects:
the invention provides an SOT-MRAM based on bottom electrode vertical voltage control and a manufacturing and writing method thereof, wherein a ferroelectric film layer is arranged under a bottom electrode, a metal electrode is arranged on one side of the center line of the edge of the ferroelectric film layer, the local polarization of the ferroelectric film layer is realized by applying voltage to the metal electrode, the local polarization causes the ferroelectric film layer to generate stress gradient, thereby realizing the local deformation of the ferroelectric film layer, further causing the deformation on the ferroelectric film to be non-uniform, the bottom electrode is influenced by the non-uniform deformation to generate non-uniform spin orbit coupling effect, the bottom electrode spin Hall effect can be regulated, thereby forming self-current gradient on the bottom electrode, realizing the directional magnetization inversion of a free layer, and therefore, controlling the directional magnetization inversion of the free layer in a tunnel junction by using current to enable the magnetization directions of the free layer and a reference layer to be the same or opposite, and writing the stored data "0" or "1" into the SOT-MRAM to complete data storage. In addition, the magnetization reversal is realized by adding the ferroelectric film, which is beneficial to realizing the integration and industrialization of the SOT-MRAM device.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
FIG. 1 is a schematic top view of a bottom electrode vertical voltage control based SOT-MRAM in accordance with embodiment 1 of the present invention;
FIG. 2 is a schematic cross-sectional view along AA in FIG. 1;
FIG. 3 is a flow chart of the method for manufacturing SOT-MRAM based on bottom electrode vertical voltage control in embodiment 2 of the present invention.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
Example 1
In one embodiment of the present invention, an SOT-MRAM based on bottom electrode vertical voltage control is disclosed, a schematic diagram of a top view is shown in fig. 1, and a schematic diagram of a cross section is shown in fig. 2, including:
and a ferroelectric thin film layer provided with two metal electrodes through which a first voltage is applied to the ferroelectric thin film layer.
And the bottom electrode is positioned on the ferroelectric film layer, arranged in the middle of the ferroelectric film layer and in a strip shape, and a second voltage is applied to two ends of the bottom electrode.
And the tunnel junction is positioned on the bottom electrode, arranged in the middle of the bottom electrode and comprises a free layer, a tunneling layer and a reference layer which are sequentially stacked from bottom to top.
The two metal electrodes are oppositely arranged on two opposite edges of the ferroelectric thin film layer and located on one side of the central line of the edge, the two edges are located on two sides of the long edge direction of the bottom electrode, and the direction of applying the first voltage through the two metal electrodes is perpendicular to the long edge direction of the bottom electrode.
Compared with the prior art, the embodiment arranges the ferroelectric thin film layer under the bottom electrode, and arranges the metal electrode on one side of the midline of the edge of the ferroelectric thin film layer, the local polarization of the ferroelectric film layer is realized by applying voltage to the metal electrode, the local polarization causes the ferroelectric film layer to generate stress gradient, thereby realizing the local deformation of the ferroelectric film layer, thereby causing the deformation on the ferroelectric film to be non-uniform, the bottom electrode is influenced by the non-uniform deformation to generate a non-uniform spin orbit coupling effect, the bottom electrode spin Hall effect can be regulated and controlled, therefore, a spin current gradient is formed on the bottom electrode to realize the directional magnetization reversal of the free layer, so that the directional magnetization reversal of the free layer in the current control tunnel junction is utilized to enable the magnetization directions of the free layer and the reference layer to be the same or opposite, and the stored data of '0' or '1' is written into the SOT-MRAM, and the data storage is completed. In addition, the magnetization reversal is realized by adding the ferroelectric film, which is beneficial to realizing the integration and industrialization of the SOT-MRAM device.
In practice, the ferroelectric thin film layer is arranged in a square shape, and the bottom electrode partially covers the ferroelectric thin film layer. It is understood that the bottom electrode is smaller than the ferroelectric thin film layer, i.e., the bottom area of the bottom electrode is smaller than the upper surface area of the ferroelectric thin film layer. The ferroelectric film layer is set to be square, so that the miniaturization development of the device is facilitated, and the subsequent integration and industrialization are facilitated.
Specifically, the ferroelectric material adopted by the ferroelectric thin film layer can be HfZrO or PZT, preferably HfZrO, and the ferroelectric thin film layer can be compatible with a CMOS (complementary metal oxide semiconductor) process, and is beneficial to device integration. The thickness of the ferroelectric thin film layer is 3-10nm, preferably 3nm, and the control voltage of the ferroelectric thin film layer can be reduced.
In implementation, the length of the two metal electrodes is half of the length of the edge of the ferroelectric film layer. It should be noted that the metal electrode occupies half of the edge of the ferroelectric thin film layer, so as to make the gradient of the stress generated by the ferroelectric thin film layer larger, and achieve the effect of increasing the spin current gradient. It will be appreciated that the two metal electrodes may be disposed either to the left or to the right of the midline of the edge.
Specifically, the metal electrode can be arranged to be of a rectangular structure, the metal electrode can be made of Al, Cu and W, the thickness of the metal electrode can be 100-400 nm, the metal electrode can be interconnected with the metal thin film layer, and the ferroelectric thin film layer can generate better local deformation after voltage is applied. It is understood that the metal electrode is disposed at an edge portion of the ferroelectric thin film layer, and may be partially connected to the ferroelectric thin film layer for applying a voltage to the ferroelectric thin film layer.
In specific implementation, the bottom electrode may be a metal layer or a topological insulating layer with a spin coupling effect, and further, a material with a strong spin orbit coupling effect may be selected for preparation, a metal material such as Ta, Pt, Hf, Ir, and CuIr may be selected, a topological insulator material such as BiSn and BiSe may be selected, and SrRuO may be selected3And the like. Furthermore, the thickness of the bottom electrode can be selected from 0 to 20 nm.
It can be understood that the bottom electrode is used for providing spin orbit torque, current is introduced into the bottom electrode, electrons with upward spin and electrons with downward spin in the bottom electrode are gathered at two sides of the bottom electrode, the strong spin coupling effect generated by the bottom electrode generates spin current, and the spin current is utilized to realize the magnetic direction inversion of the free layer in the tunnel junction.
When the tunneling junction is implemented, the tunneling junction is cylindrical and is vertically arranged on the bottom electrode, the free layer and the reference layer are magnetic layers, vertical anisotropy is formed between the free layer and the reference layer, and the tunneling layer is a non-magnetic layer.
It can be understood that the magnetization direction of the tunnel junction is perpendicular to the long side direction of the bottom electrode, i.e., the direction of the current. The magnetization direction of the free layer in the tunnel junction can be changed and is used for writing and storing data, the magnetization direction in the reference layer is fixed, the bottom electrode generates a spin current perpendicular to the current direction after being electrified, and when the spin current flows through the free layer, the magnetization direction of the free layer can be induced to be reversed, so that the magnetization directions of the free layer and the reference layer are the same or opposite, and the writing and the storing of the data are realized. When the directions of the free layer and the reference layer are the same, the tunnel junction is in a low-resistance state and is used for representing low level 0; when the directions of the free layer and the reference layer are opposite, the tunnel junction presents a high resistance state for representing a low level "1".
Specifically, the free layer and the reference layer are made of ferromagnetic materials with perpendicular anisotropy, single ferromagnetic materials, alloy ferromagnetic materials or metal oxides with magnetism can be selected, and in addition, the free layer and the reference layer can be made of the same material or different materials. The tunneling layer is made of nonmagnetic metal or insulating material, and nonmagnetic metal such as Cu or Ag can be selected, and insulating material such as aluminum oxide or magnesium oxide can also be selected.
More specifically, the thicknesses of the free layer and the reference layer can be selected from 0-3 nm; the thickness of the tunneling layer can be selected from 0-2 nm.
Furthermore, the free layer and the reference layer can adopt a multilayer film structure, and a cobalt-platinum multilayer film or a cobalt-nickel multilayer film can be adopted, so that the free layer and the reference layer have better perpendicular magnetic anisotropy.
It should be noted that the tunnel junction is cylindrical, and the diameter of the bottom surface of the tunnel junction is smaller than or equal to the length of the short side of the bottom electrode, so as to reduce the manufacturing cost, facilitate the miniaturization of the size, and be more suitable for memories with different structures. Furthermore, an output terminal is connected to the reference layer.
In particular implementations, the tunnel junction may also have a pinning layer above the reference layer for solidifying the magnetization direction, and IrMn or CoPt may be used. The tunnel junction may be further provided with a protective layer on the uppermost layer for protecting the tunnel junction from damage, and Ta or Ru may be used.
Example 2
In an embodiment 2 of the present invention, a method for manufacturing an SOT-MRAM based on bottom electrode vertical voltage control is disclosed, as shown in fig. 3, including:
and S1, growing a ferroelectric film on the circuit board to form a ferroelectric film layer.
In practice, the ferroelectric thin film is grown by one of physical vapor deposition and atomic layer deposition.
Specifically, Physical Vapor Deposition (PVD) and Atomic Layer Deposition (ALD) may be used to grow a ferroelectric thin film, such as a zro, compatible with a Complementary Metal-Oxide-Semiconductor (CMOS) thin film, on a circuit board.
When the method is implemented, the ferroelectric film layer is processed into a square shape, the bottom electrode is positioned in the middle of the ferroelectric film layer, and the processing modes comprise ion beam etching and reactive ion etching. It can be understood that the ferroelectric thin film layer is arranged in a square shape, which is beneficial to the miniaturization development of the device and is also convenient for the subsequent integration and industrialization.
And S2, growing a bottom electrode on the ferroelectric film layer, wherein the bottom electrode is in a strip shape.
Specifically, a bottom electrode can be formed by growing a topological insulator material such as BiSn or SnTe on the ferroelectric thin film layer by adopting molecular beam epitaxial growth or a magnetron sputtering method, and the thickness of the bottom electrode can be 3-10 nm. It can be understood that the current is introduced into the bottom electrode, and the spin current is generated due to the strong spin orbit coupling effect, so that the magnetic direction of the magnetic free layer is turned over by the spin current.
And S3, depositing metal electrodes on two edges of the ferroelectric thin film layer on two sides of the bottom electrode in the long side direction, wherein the metal electrodes are positioned on one side of the central line of the edge.
Specifically, the metal electrode can be etched into a rectangular structure by ion beam etching.
In implementation, the length of the two metal electrodes is half of the length of the edge of the ferroelectric film layer. It can be understood that the length of the metal electrode is half of the length of the edge of the ferroelectric thin film layer, so that the gradient of stress generated by the ferroelectric thin film layer after voltage is applied to the ferroelectric thin film layer is larger, and the effect of increasing the spin current gradient is realized.
And S4, growing a free layer, a tunneling layer and a reference layer on the bottom electrode in sequence to form a tunnel junction.
Specifically, a magnetic free layer, a nonmagnetic tunneling layer, and a magnetic reference layer may be sequentially grown on the bottom electrode by sputtering. More specifically, the free layer, the tunneling layer and the reference layer are processed into a cylindrical shape, so that the tunnel junction is cylindrical and perpendicular to the bottom electrode, and the output end is connected to the reference layer.
Preferably, a pinning layer may be grown on the reference layer of the tunnel junction for solidifying the magnetization direction; further, a protective layer may be grown on the uppermost layer to protect the tunnel junction from damage.
Example 3
An embodiment 3 of the present invention provides a writing method for an SOT-MRAM, which can store corresponding information according to the SOT-MRAM in the embodiment 1, and specifically includes:
and inputting a first voltage to the ferroelectric film layer through the two metal electrodes, inputting a second voltage to the bottom electrode layer through two ends of the bottom electrode, and controlling the positive and negative of the first voltage and the second voltage to complete the writing of the SOT-MRAM. That is, in the SOT-MRAM writing, when the first voltage applied to the ferroelectric thin film layer is positive or negative, different data can be written by changing the positive or negative of the second voltage applied to the bottom electrode; different data can also be written by changing the positive or negative of the first voltage applied to the ferroelectric thin film layer when the positive or negative of the second voltage applied to the bottom electrode is determined.
In the implementation process, the range of the first voltage and the second voltage is-2V. It should be noted that the specific values of the first voltage and the second voltage can be selected and determined according to the requirements of the practical application.
Exemplarily, as shown in fig. 1, two metal electrodes of the SOT-MRAM in the present embodiment are disposed on the left side of the center line of the edge, and a first voltage is applied across the metal electrode V3 and the metal electrode V4, with the metal electrode V3 as a positive electrode and the metal electrode V4 as a negative electrode; and taking the left end of the bottom electrode as a positive electrode, taking the right end of the bottom electrode as a negative electrode, and applying a second voltage to the two ends of the bottom electrode.
Specifically, when no voltage is applied to the ferroelectric layer, the bottom electrode is applied with a voltage that does not cause the magnetic moment to flip its orientation, i.e. the written data is "0" or "1" randomly. After applying a voltage to the ferroelectric layer, writing data "0" or "1" by changing the positive and negative of the voltage applied to the ferroelectric layer and the voltage applied to the bottom electrode, specifically:
when the first voltage is positive voltage and the second voltage is positive voltage, positive current is conducted from the left end to the right end of the bottom electrode, so that the magnetic moment of the free layer of the tunnel junction is reversed, the direction of the magnetic moment of the free layer is opposite to that of the magnetic moment of the reference layer, the resistance of the magnetic tunnel junction is in a high resistance state, and the written data is 1.
When the first voltage is negative voltage, the second voltage is positive voltage, namely, positive current is conducted from the left end to the right end of the bottom electrode, so that the magnetic moment of the free layer of the tunnel junction is reversed, the direction of the magnetic moment of the free layer is the same as that of the magnetic moment of the reference layer, the resistance of the magnetic tunnel junction is in a high resistance state, and the written data is '0'.
When the first voltage is positive voltage, negative current is conducted to the second voltage, namely, the left end to the right end of the bottom electrode, so that the magnetic moment of the free layer of the tunnel junction is reversed, the direction of the magnetic moment of the free layer is the same as that of the magnetic moment of the reference layer, the resistance of the magnetic tunnel junction is in a low resistance state, and the written data is '0'.
When the first voltage is negative voltage, negative current is conducted to the second voltage, namely, the left end to the right end of the bottom electrode, so that the magnetic moment of the free layer of the tunnel junction is reversed, the direction of the magnetic moment of the free layer is opposite to that of the magnetic moment of the reference layer, the resistance of the magnetic tunnel junction is in a high resistance state, and the written data is 1.
In summary, by controlling the positive and negative of the first voltage and the second voltage, i.e. by controlling the direction of the applied voltage of the ferroelectric thin film layer and the bottom electrode, the directional writing of the SOT-MRAM is realized.
Those skilled in the art will appreciate that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program, which is stored in a computer readable storage medium, to instruct related hardware. The computer readable storage medium is a magnetic disk, an optical disk, a read-only memory or a random access memory.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (10)

1. A bottom electrode vertical direction voltage control based SOT-MRAM, comprising:
a ferroelectric thin film layer provided with two metal electrodes through which a first voltage is applied to the ferroelectric thin film layer;
the bottom electrode is positioned on the ferroelectric thin film layer, arranged in the middle of the ferroelectric thin film layer and in a strip shape, and a second voltage is applied to two ends of the bottom electrode;
the tunnel junction is positioned above the bottom electrode, arranged in the middle of the bottom electrode and comprises a free layer, a tunneling layer and a reference layer which are sequentially stacked from bottom to top;
the two metal electrodes are oppositely arranged on two opposite edges of the ferroelectric thin film layer and are positioned on one side of the central line of the edge, the two edges are positioned on two sides of the long edge direction of the bottom electrode, and the direction of applying the first voltage through the two metal electrodes is vertical to the long edge direction of the bottom electrode.
2. The bottom electrode vertical direction voltage control based SOT-MRAM of claim 1, wherein the ferroelectric thin film layer is arranged in a square shape and the bottom electrode partially covers the ferroelectric thin film layer.
3. The bottom electrode vertical direction voltage control based SOT-MRAM of claim 1, wherein the length of the two metal electrodes is half of the length of the edge of the ferroelectric thin film layer.
4. The bottom electrode-based SOT-MRAM of claim 1, wherein the tunnel junction is cylindrical and is vertically disposed on the bottom electrode, the free layer and the reference layer are magnetic layers having a perpendicular anisotropy therebetween, and the tunneling layer is a non-magnetic layer.
5. A method for manufacturing an SOT-MRAM based on bottom electrode vertical voltage control is characterized by comprising the following steps:
growing a ferroelectric film on the circuit board to form a ferroelectric film layer;
growing a bottom electrode on the ferroelectric film layer, wherein the bottom electrode is in a strip shape;
depositing metal electrodes on two edges of the ferroelectric thin film layer on two sides of the long side direction of the bottom electrode, wherein the metal electrodes are positioned on one side of the center line of the edge;
and sequentially growing a free layer, a tunneling layer and a reference layer on the bottom electrode.
6. The method of claim 5, wherein the ferroelectric thin film is grown by one of physical vapor deposition and atomic layer deposition.
7. The method of claim 5, wherein the ferroelectric thin film layer is processed into a square shape, and the bottom electrode is located in the middle of the ferroelectric thin film layer, and the processing method comprises ion beam etching and reactive ion etching.
8. The method of claim 5, wherein the length of the two metal electrodes is half of the length of the edge of the ferroelectric thin film layer.
9. A method of writing to the SOT-MRAM of any one of claims 1 to 4, wherein a first voltage is applied to the ferroelectric thin film layer through the two metal electrodes, a second voltage is applied to the bottom electrode layer through both ends of the bottom electrode, and the SOT-MRAM is written by controlling the positive and negative of the first voltage and the second voltage.
10. The SOT-MRAM writing method of claim 9, wherein the first voltage and the second voltage are in a range of-2 to 2V.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113707803A (en) * 2021-08-25 2021-11-26 中国科学院微电子研究所 Spin orbit torque magnetic resistance type random access memory and manufacturing method thereof

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150129995A1 (en) * 2013-10-30 2015-05-14 The Regents Of The University Of California Magnetic memory bits with perpendicular magnetization switched by current-induced spin-orbit torques
CN105932153A (en) * 2016-06-13 2016-09-07 中国科学院半导体研究所 Magnetic anomalous Hall transistor based on piezoelectric regulation and control at room temperature
CN106531884A (en) * 2016-12-23 2017-03-22 中国科学院半导体研究所 Voltage control magnetic random access memory unit, memory and logic device formed from memory unit
US20170365777A1 (en) * 2016-06-17 2017-12-21 HGST Netherlands B.V. Sot mram cell with perpendicular free layer and its cross-point array realization
CN109036485A (en) * 2017-06-09 2018-12-18 桑迪士克科技有限责任公司 The memory cell of erect spin track torque magnetic random access memory
CN110112287A (en) * 2019-05-17 2019-08-09 华中科技大学 A kind of autotelegraph magnetic reading memory based on more iron hetero-junctions exchange bias effects
CN111244268A (en) * 2020-01-15 2020-06-05 电子科技大学 Method for implementing voltage-controlled tri-state magnetic memory cell
CN112701214A (en) * 2020-12-28 2021-04-23 西安交通大学 Spin orbit torque magnetic random access memory with artificial anti-ferromagnetic free layer regulated by ferroelectrics
CN112701216A (en) * 2020-12-28 2021-04-23 西安交通大学 Magnetic multilayer structure and SOT-MRAM

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150129995A1 (en) * 2013-10-30 2015-05-14 The Regents Of The University Of California Magnetic memory bits with perpendicular magnetization switched by current-induced spin-orbit torques
CN105932153A (en) * 2016-06-13 2016-09-07 中国科学院半导体研究所 Magnetic anomalous Hall transistor based on piezoelectric regulation and control at room temperature
US20170365777A1 (en) * 2016-06-17 2017-12-21 HGST Netherlands B.V. Sot mram cell with perpendicular free layer and its cross-point array realization
CN106531884A (en) * 2016-12-23 2017-03-22 中国科学院半导体研究所 Voltage control magnetic random access memory unit, memory and logic device formed from memory unit
CN109036485A (en) * 2017-06-09 2018-12-18 桑迪士克科技有限责任公司 The memory cell of erect spin track torque magnetic random access memory
CN110112287A (en) * 2019-05-17 2019-08-09 华中科技大学 A kind of autotelegraph magnetic reading memory based on more iron hetero-junctions exchange bias effects
CN111244268A (en) * 2020-01-15 2020-06-05 电子科技大学 Method for implementing voltage-controlled tri-state magnetic memory cell
CN112701214A (en) * 2020-12-28 2021-04-23 西安交通大学 Spin orbit torque magnetic random access memory with artificial anti-ferromagnetic free layer regulated by ferroelectrics
CN112701216A (en) * 2020-12-28 2021-04-23 西安交通大学 Magnetic multilayer structure and SOT-MRAM

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KAIMING CAI, ET AL.: "Electric field control of deterministic current-induced magnetization switching in a hybrid ferromagnetic/ferroelectric structure", NATURE MATERIALS, vol. 16 *
张楠 等: "电学方法调控磁化翻转和磁畴壁运动的研究进展", CHINESE PHYSICAL SOCIETY, vol. 66, no. 2 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113707803A (en) * 2021-08-25 2021-11-26 中国科学院微电子研究所 Spin orbit torque magnetic resistance type random access memory and manufacturing method thereof

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