CN113204339A - Visual programming method, device, equipment and medium for chip - Google Patents
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- G06F8/30—Creation or generation of source code
- G06F8/34—Graphical or visual programming
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Abstract
The application provides a visual programming method, a visual programming device, a visual programming equipment and a visual programming medium for a chip. The method comprises the following steps: providing a visual programming platform and determining a target chip, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, each register unit respectively corresponds to one coding object, and each register unit is a register or a register bit; providing, in the visual programming platform, associated code objects for selected graphical blocks; and generating a source code file of the target chip based on the selected coding objects. The method and the device realize the visual programming of the chip, reduce the code handwriting workload and improve the working efficiency compared with the prior art; programmers only need to determine the functions of the registers or the register bits of the chip, and do not need to pay attention to the specific code implementation of the registers or the register bits, so that the chip development becomes more efficient, safer, more intuitive and readable.
Description
Technical Field
The application relates to the technical field of computers, in particular to a visual programming method, a visual programming device, a visual programming equipment and a visual programming medium for a chip.
Background
Programmable logic devices such as chips are widely applied to various social fields, the demand is large, and the investors attract a large number of talents and resources to carry out technical research and development as a novel strategic industry of the country.
Chip application often needs chip code development, such as initialization code of a chip and embedded software, but the chip code development technology threshold is high, such as a data manual about the chip needs to be consulted, and code writing needs to be performed by using programming languages such as assembly, C language and the like.
How to reduce the technical threshold of chip code development and reduce the repetitive code development in the chip application process is a technical problem that needs to be solved urgently by those skilled in the art.
Disclosure of Invention
The application aims to provide a visual programming method and device of a chip, an electronic device and a computer readable medium.
The first aspect of the present application provides a visual programming method for a chip, including:
providing a visual programming platform and determining a target chip, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, and each register unit respectively corresponds to one coding object; the register unit is a register or a register bit;
providing, in the visual programming platform, associated code objects for selected graphical blocks;
and generating a source code file of the target chip based on the selected coding objects.
According to some embodiments of the present application, the code object includes an initialization program, configuration data, a configuration method, and an event of a register unit.
According to some embodiments of the present application, the generating a source code file of the target chip based on the selected respective encoding objects includes:
for each coding object, providing an initialization program of the coding object;
responding to the event of the coding object, and configuring the initialization program according to the configuration data and the configuration method of the coding object so as to complete the configuration of the corresponding register unit;
and generating a source code file of the target chip according to the initialization programs of all the coded objects after the configuration is finished.
According to some embodiments of the present application, the visual programming platform is constructed by the following method:
generating a plurality of graphic blocks in a visual programming platform;
generating an initialization program of each register unit of a target chip;
associating the configuration data and the configuration method of the register unit to one graphic block;
and setting the event of the register unit on the graphic block, and outputting the configuration data and the configuration method of the register unit to realize different configurations of the register unit.
The second aspect of the present application provides a visual programming device for a chip, comprising:
the determining module is used for providing a visual programming platform and determining a target chip, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, and each register unit respectively corresponds to one coding object; the register unit is a register or a register bit;
a selection module for providing, in the visual programming platform, associated code objects for selected graphical blocks;
and the generating module is used for generating the source code file of the target chip based on the selected coding objects.
According to some embodiments of the present application, the code object includes an initialization program, configuration data, a configuration method, and an event of a register unit.
According to some embodiments of the present application, the generating module is specifically configured to:
for each coding object, providing an initialization program of the coding object;
responding to the event of the coding object, and configuring the initialization program according to the configuration data and the configuration method of the coding object so as to complete the configuration of the corresponding register unit;
and generating a source code file of the target chip according to the initialization programs of all the coded objects after the configuration is finished.
According to some embodiments of the present application, the visual programming platform is constructed by the following method:
generating a plurality of graphic blocks in a visual programming platform;
generating an initialization program of each register unit of a target chip;
associating the configuration data and the configuration method of the register unit to one graphic block;
and setting the event of the register unit on the graphic block, and outputting the configuration data and the configuration method of the register unit to realize different configurations of the register unit.
A third aspect of the present application provides an electronic device comprising: memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the computer program when executing the computer program to perform the method of the first aspect of the application.
A fourth aspect of the present application provides a computer readable medium having computer readable instructions stored thereon which are executable by a processor to implement the method of the first aspect of the present application.
Compared with the prior art, the visual programming method, the visual programming device, the visual programming equipment and the visual programming medium of the chip provided by the application have the advantages that the visual programming platform is provided, the target chip is determined, the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, and each register unit is respectively corresponding to one coding object; providing, in the visual programming platform, associated code objects for selected graphical blocks; and generating a source code file of the target chip based on the selected coding objects. The method and the device realize the visual programming of the chip, reduce the code handwriting workload and improve the working efficiency compared with the prior art; programmers only need to determine the functions of the registers or the register bits of the chip, and do not need to pay attention to the specific code implementation of the registers or the register bits, so that the chip development becomes more efficient, safer, more intuitive and readable.
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Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 illustrates a flow chart of a method for visual programming of a chip provided by some embodiments of the present application;
FIG. 2 shows a schematic diagram of the input-output setting of the GPIO control registers;
FIG. 3 illustrates a build process diagram of a visual programming platform;
fig. 4 is a schematic diagram illustrating a visual programming apparatus of a chip according to some embodiments of the present application.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which this application belongs.
In addition, the terms "first" and "second", etc. are used to distinguish different objects, rather than to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
The embodiment of the application provides a visual programming method and device of a chip, an electronic device and a computer readable medium, which are described below with reference to the accompanying drawings.
Referring to fig. 1, which shows a flowchart of a visual programming method of a chip according to some embodiments of the present application, as shown in fig. 1, the visual programming method of a chip may include the following steps:
step S101: providing a visual programming platform and determining a target chip, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, each register unit respectively corresponds to one coding object, and the register units are registers or register bits.
The target chip may be, for example, a 51-chip microcomputer, an STM 32-chip microcomputer, or the like. For example, the STM32 single chip microcomputer includes functional modules such as a general purpose input/output GPIO, a universal asynchronous transceiver transmitter Uart, a Flash memory Flash, a working clock, a memory, a timer, an interrupt system, an analog-to-digital converter, and the like.
Each functional module requires registers, for example, a GPIO port requires at least two registers, a "general IO port control register" for control, and a "general I/O port data register" for storing data. Each bit of the data register corresponds to a hardware pin of the GPIO, the data transmission direction is set through the control register, and the data flow direction of each bit pin can be set through the control register.
In the application, each register unit that can be set and searched by the chip is coded into a different object, which is called a coded object, that is, an actual register unit is coded into a virtual coded object by a program, and the coded object includes an initialization program, configuration data, a configuration method and an event of the register unit. And then associating configuration data, configuration methods, events and the like of a coded object to a specified visual graphic Block (Block), wherein each graphic Block is associated with at least one register unit so as to realize one-to-one relationship or one-to-many relationship between the visual graphic Block and the chip register unit.
The configuration data is a value list of the function and the working state of the chip register unit; the chip register unit has different data of inquiry value or setting value, etc. and is designed into the output list or input list of visual graph block, and the different configuration of the chip register unit is realized through selecting one (or more than one) variable (or constant) in the inquiry and setting input (or output) list. As shown in fig. 2, the GPIO Control Register (CR) is input-output set.
The configuration method is used for setting a program instruction or a function interface of a chip register unit. And designing an execution statement of a programming language for configuring the chip register unit into a generation program code of a visual graphic block, and realizing configuration work of the chip register unit by using the visual graphic block.
When the visual graphic block is used, the event output of the graphic block is encapsulated in the configuration data and the configuration method of the graphic block to realize visual coding. An event is an operation that can be recognized by the control, such as pressing a certain button of a certain graphic block, such as selecting a certain radio button or check box, etc.
Specifically, the construction method of the visual programming platform comprises the following steps:
generating a plurality of graphic blocks in a visual programming platform, wherein graphic elements of the visual graphic blocks can be generated by using a web front-end technology;
generating an initialization program of each register unit of a target chip;
associating the configuration data and the configuration method of the register unit to one graphic block; binding a program instruction or a function interface of a setting chip register unit to the visual graph block; and binding the value list of the function or the state of the chip register unit to the visual graph block as input data or variables.
And setting the event of the register unit on the graphic block, and outputting the configuration data and the configuration method of the register unit to realize different configurations of the register unit.
Fig. 3 is a schematic diagram illustrating a building process of a visual programming platform, and fig. 3 illustrates a process of encoding register units in a target chip into encoded objects and associating the encoded objects to visual graphic blocks, where a configuration method in the diagram may be to execute program instructions or function interfaces configuring the register units, and configuration data may be configuration parameter input data of an operation state of the register units.
After the visual programming platform is constructed, a user does not need to use texts such as assembly and C language to write programs, and does not need to refer to a data manual of a related chip.
Step S102: in the visual programming platform, associated code objects are provided for selected graphical blocks.
In this embodiment, in the constructed visual programming platform, a visual initialization program of the target chip register unit may be formed by dragging, dropping, and splicing the visual graph blocks. If the chip register unit needed to be used can be configured by using a plurality of visual graphic blocks in a building block splicing mode according to research and development requirements.
Step S103: and generating a source code file of the target chip based on the selected coding objects.
In this embodiment, step S103 may be specifically implemented as:
for each coding object, providing an initialization program of the coding object;
responding to the event of the coding object, and configuring the initialization program according to the configuration data and the configuration method of the coding object so as to complete the configuration of the corresponding register unit;
and generating a source code file of the target chip according to the initialization programs of all the coded objects after the configuration is finished.
In this embodiment, after the source code file of the target chip is generated and output to the local, the executable file is generated through compiling and linking and downloaded to the target chip for verification, and then the visual programming development of the chip register unit can be completed.
Compared with the prior art, in the visual programming method of the chip provided by the embodiment of the application, the visual programming platform is provided, and the target chip is determined, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, and each register unit respectively corresponds to one coding object; providing, in the visual programming platform, associated code objects for selected graphical blocks; and generating a source code file of the target chip based on the selected coding objects. The method and the device realize the visual programming of the chip, reduce the code handwriting workload and improve the working efficiency compared with the prior art; programmers only need to determine the functions of all the register units of the chip and do not need to pay attention to specific code implementation of the registers or the register bits, so that chip development becomes more efficient, safer, more visual and readable.
In the embodiment, a visual programming method of a chip is provided, and correspondingly, the application also provides a visual programming device of the chip. The visual programming device of the chip provided by the embodiment of the application can implement the visual programming method of the chip, and the visual programming device of the chip can be implemented by software, hardware or a combination of software and hardware. For example, the visual programming means of the chip may comprise integrated or separate functional modules or units to perform the corresponding steps of the above-described methods. Please refer to fig. 4, which illustrates a schematic diagram of a visual programming apparatus of a chip according to some embodiments of the present application. Since the apparatus embodiments are substantially similar to the method embodiments, they are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for relevant points. The device embodiments described below are merely illustrative.
As shown in fig. 4, the visual programming device 10 of the chip may include:
a determining module 101, configured to provide a visual programming platform and determine a target chip, where the visual programming platform includes a plurality of graphic blocks, each graphic block is associated with at least one register unit of the target chip, and each register unit corresponds to a code object; the register unit is a register or a register bit;
a selecting module 102, configured to provide, in the visual programming platform, an associated encoded object for a selected graphical block;
and the generating module 103 is configured to generate a source code file of the target chip based on the selected respective encoding objects.
In some implementations of embodiments of the present application, the code object includes an initialization program, configuration data, a configuration method, and an event of a register unit.
In some implementations of the embodiments of the present application, the generating module 103 is specifically configured to:
for each coding object, providing an initialization program of the coding object;
responding to the event of the coding object, and configuring the initialization program according to the configuration data and the configuration method of the coding object so as to complete the configuration of the corresponding register unit;
and generating a source code file of the target chip according to the initialization programs of all the coded objects after the configuration is finished.
In some implementations of embodiments of the present application, the method for constructing the visual programming platform includes:
generating a plurality of graphic blocks in a visual programming platform;
generating an initialization program of each register unit of a target chip;
associating the configuration data and the configuration method of the register unit to one graphic block;
and setting the event of the register unit on the graphic block, and outputting the configuration data and the configuration method of the register unit to realize different configurations of the register unit.
The visual programming device 10 of the chip provided in the embodiment of the present application has the same beneficial effects as the visual programming method of the chip provided in the foregoing embodiment of the present application.
The embodiment of the present application further provides an electronic device corresponding to the visual programming method of the chip provided in the foregoing embodiment, where the electronic device may be an electronic device for a client, such as a mobile phone, a notebook computer, a tablet computer, a desktop computer, and the like, so as to execute the visual programming method of the chip.
The electronic device provided by the embodiment of the application and the visual programming method of the chip provided by the embodiment of the application have the same inventive concept and have the same beneficial effects as the method adopted, operated or realized by the electronic device.
The present application further provides a computer readable medium corresponding to the visual programming method of the chip provided in the foregoing embodiments, and a computer program (i.e., a program product) is stored thereon, and when being executed by a processor, the computer program will execute the visual programming method of the chip provided in any of the foregoing embodiments.
It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory, or other optical and magnetic storage media, which are not described in detail herein.
The computer-readable storage medium provided by the above embodiments of the present application and the visual programming method of the chip provided by the embodiments of the present application have the same beneficial effects as the method adopted, executed or implemented by the application program stored in the computer-readable storage medium.
It should be noted that the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present disclosure, and the present disclosure should be construed as being covered by the claims and the specification.
Claims (10)
1. A visual programming method for a chip, comprising:
providing a visual programming platform and determining a target chip, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, and each register unit respectively corresponds to one coding object; the register unit is a register or a register bit;
providing, in the visual programming platform, associated code objects for selected graphical blocks;
and generating a source code file of the target chip based on the selected coding objects.
2. The method of claim 1, wherein the code objects include an initialization program, configuration data, a configuration method, and an event of a register unit.
3. The method of claim 2, wherein generating the source code file of the target chip based on the selected respective code objects comprises:
for each coding object, providing an initialization program of the coding object;
responding to the event of the coding object, and configuring the initialization program according to the configuration data and the configuration method of the coding object so as to complete the configuration of the corresponding register unit;
and generating a source code file of the target chip according to the initialization programs of all the coded objects after the configuration is finished.
4. The method of claim 3, wherein the visual programming platform is constructed by:
generating a plurality of graphic blocks in a visual programming platform;
generating an initialization program of each register unit of a target chip;
associating the configuration data and the configuration method of the register unit to one graphic block;
and setting the event of the register unit on the graphic block, and outputting the configuration data and the configuration method of the register unit to realize different configurations of the register unit.
5. A visual programming device for a chip, comprising:
the determining module is used for providing a visual programming platform and determining a target chip, wherein the visual programming platform comprises a plurality of graphic blocks, each graphic block is respectively associated with at least one register unit of the target chip, and each register unit respectively corresponds to one coding object; the register unit is a register or a register bit;
a selection module for providing, in the visual programming platform, associated code objects for selected graphical blocks;
and the generating module is used for generating the source code file of the target chip based on the selected coding objects.
6. The apparatus of claim 5, wherein the code objects comprise initialization program, configuration data, configuration method and event of the register unit.
7. The apparatus of claim 6, wherein the generating module is specifically configured to:
for each coding object, providing an initialization program of the coding object;
responding to the event of the coding object, and configuring the initialization program according to the configuration data and the configuration method of the coding object so as to complete the configuration of the corresponding register unit;
and generating a source code file of the target chip according to the initialization programs of all the coded objects after the configuration is finished.
8. The apparatus of claim 7, wherein the visual programming platform is constructed by:
generating a plurality of graphic blocks in a visual programming platform;
generating an initialization program of each register unit of a target chip;
associating the configuration data and the configuration method of the register unit to one graphic block;
and setting the event of the register unit on the graphic block, and outputting the configuration data and the configuration method of the register unit to realize different configurations of the register unit.
9. An electronic device, comprising: memory, processor and computer program stored on the memory and executable on the processor, characterized in that the processor executes the computer program to implement the method according to any of claims 1 to 4.
10. A computer readable medium having computer readable instructions stored thereon which are executable by a processor to implement the method of any one of claims 1 to 4.
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