CN113190497A - Task processing method of reconfigurable processor and reconfigurable processor - Google Patents

Task processing method of reconfigurable processor and reconfigurable processor Download PDF

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CN113190497A
CN113190497A CN202110381727.9A CN202110381727A CN113190497A CN 113190497 A CN113190497 A CN 113190497A CN 202110381727 A CN202110381727 A CN 202110381727A CN 113190497 A CN113190497 A CN 113190497A
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subtask
configuration
level
reconfigurable
current
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CN113190497B (en
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赵旺
肖刚军
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Zhuhai Amicro Semiconductor Co Ltd
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Zhuhai Amicro Semiconductor Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7871Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a task processing method of a reconfigurable processor and the reconfigurable processor, the method comprises the following steps: step 1: acquiring a subtask configuration linked list, and then entering step 2; step 2: updating the configuration content of the subtask, and then executing the step a and the step b in parallel; step a: executing the current level of subtask to reconstruct the calculation process; step b: and executing the next-level subtask configuration content updating process. The invention enables the configuration of the configuration content of the next-level subtask and the execution of the reconfigurable computation of the current-level subtask to be carried out in parallel by configuring the reconfigurable processor in a linked list manner, eliminates the additional time overhead caused by the configuration of the subtask configuration content, and fully exerts the operational performance of the reconfigurable processor.

Description

Task processing method of reconfigurable processor and reconfigurable processor
Technical Field
The invention relates to the field of integrated circuits, in particular to a task processing method of a reconfigurable processor and the reconfigurable processor.
Background
With the rapid development of various modern devices in the fields of communication, unmanned vehicles, artificial intelligence and the like, the demand for high-performance information processing systems is increasing, and the traditional general-purpose processor or the special integrated circuit cannot meet the increasing demand. The reconfigurable processor combines the advantages of a general-purpose processor and an application-specific integrated circuit, has the flexibility of the general-purpose processor and the high efficiency of the application-specific integrated circuit, and therefore can better meet the computing requirements of a plurality of complex applications which are developed endlessly and endlessly.
Reconfigurable computing is a parallel computing mode in a spatial domain, and a hardware structure in the spatial domain organizes computing resources with different granularities and different functions. Before the reconfigurable processor executes reconfigurable computation, computing resources and an interconnection structure are configured according to the characteristics of data streams, once the configuration is completed, the reconfigurable processor performs computation in a mode similar to an application specific integrated circuit, and when an algorithm and application are changed, the reconfigurable processor is reconfigured into different computing paths to execute different tasks.
The calculation array scale in the reconfigurable processor is limited, and the calculation array scale required by the calculation task often exceeds the calculation array scale which can be provided by the reconfigurable processor, so that the task input into the reconfigurable processor needs to be subjected to time domain division, the task is divided into a series of subtask sets, and the subtasks are mapped into the calculation array of the reconfigurable processor in a time-sharing domain manner, so as to achieve the purpose of time-sharing multiplexing the calculation array of the reconfigurable processor.
Chinese patent CN102207892A provides a method for synchronizing sub-units in a dynamic reconfigurable processor, which configures corresponding information for multiple word tasks in a unified manner, and then controls multiple sub-tasks to execute reconfigurable computation in parallel. However, this method has limitations, and a reconfigurable processor with limited partial computation power cannot perform multiple subtasks simultaneously and concurrently perform reconfigurable computation, and only can implement reconfigurable computation by performing information configuration on a single subtask and then performing a single subtask according to the order of this method, and cannot fully utilize the computation performance of the reconfigurable processor, and at the same time, additional time overhead required for configuring information is brought about, which affects the efficiency of the reconfigurable processor.
Disclosure of Invention
In order to solve the problems, the invention provides a task processing method of a reconfigurable processor and the reconfigurable processor, which configure the reconfigurable processor through chain linking, so that the transmission of configuration contents and the execution of reconfigurable computation are carried out in parallel, the extra time overhead caused by subtask configuration contents is eliminated, and the operational performance of the reconfigurable processor is fully exerted. The specific technical scheme of the invention is as follows:
a task processing method of a reconfigurable processor, the method comprising the steps of: step 1: acquiring a subtask configuration linked list, and then entering step 2; step 2: updating the configuration content of the subtask, and then executing the step a and the step b in parallel; step a: executing the current level of subtask to reconstruct the calculation process; step b: and executing the next-level subtask configuration content updating process.
Compared with the prior art, the task processing method of the reconfigurable processor, disclosed by the invention, realizes the parallel operation of reconfigurable computation and subtask information configuration, eliminates the time overhead brought by the configuration of the subtask information, gives full play to the operational performance of the reconfigurable processor and improves the efficiency of the reconfigurable processor in executing tasks.
Further, the step 1 comprises: step 11: acquiring all subtasks of the reconfigurable processor, which need to execute the reconfigurable computation, and then entering step 12; step 12: acquiring the configuration contents corresponding to all the subtasks acquired in the step 11, and then entering a step 13; step 13: and storing the configuration contents corresponding to all the subtasks obtained in the step 12 in the corresponding positions of the subtask configuration linked list according to a first preset sequence. Compared with the prior art, the technical scheme disclosed by the invention obtains the configuration linked list of the subtask information by arranging the configuration contents required by all subtasks of the reconfigurable computing required by the reconfigurable processor according to the first preset sequence, so that the configuration contents of the next-level subtask can be automatically refreshed based on the subtask configuration linked list when the reconfigurable processor executes the current-level subtask computing.
Furthermore, the subtask configuration linked list comprises configuration contents corresponding to the multi-level subtasks required by the reconfigurable processor to execute the multi-level subtasks; the configuration content corresponding to each level of subtask includes a configuration serial number corresponding to the current level of subtask, configuration information corresponding to the current level of subtask, a configuration check code corresponding to the current level of subtask, and a configuration address corresponding to the next level of subtask; the configuration sequence number is used for distinguishing the sequencing of each level of subtasks in all subtasks; the configuration information is information required when the reconfigurable computation is executed by the corresponding primary subtask; the configuration check code is used for checking whether the configuration information corresponding to the corresponding primary subtask is correctly configured; the configuration address refers to an address stored in the configuration information corresponding to the primary subtask. Compared with the prior art, the subtask configuration linked list in the technical scheme can automatically jump to the address of the configuration information corresponding to the next subtask according to the configuration address corresponding to the next subtask in the configuration content corresponding to the current level subtask after the configuration information corresponding to the current level subtask is configured, so that the automatic updating of the subtask configuration content is realized.
Further, the step of checking whether the configuration information corresponding to the current level of subtask is correctly configured specifically includes: if the configuration information corresponding to the current-level subtask is not matched with the configuration check code corresponding to the current-level subtask, determining that the configuration information corresponding to the current-level subtask is not configured correctly; if the configuration information corresponding to the current level of subtask can be matched and corresponding to the configuration check code corresponding to the current level of subtask, determining that the configuration information corresponding to the current level of subtask is correctly configured; and the configuration information corresponding to each level of subtask has one-to-one corresponding configuration check code. According to the technical scheme, the configuration check codes corresponding to the configuration information one by one are set to judge whether the configuration information corresponding to each level of subtasks in the configuration linked list is configured correctly or not, so that the reconfigurable processor is prevented from executing the configuration information configured wrongly, the sequence of all subtasks for executing the reconfigurable computation is influenced, and the final output result of the reconfigurable processor is further influenced.
Further, the storing the configuration contents corresponding to all the subtasks in the corresponding positions in the subtask configuration linked list according to the first preset sequence specifically includes: and storing the configuration content corresponding to each level of subtask in a subtask configuration linked list according to the sequence of the configuration serial number corresponding to the current level of subtask, the configuration information corresponding to the current level of subtask, the configuration check code corresponding to the current level of subtask, and the configuration address corresponding to the next level of subtask. The configuration content corresponding to each level of subtask in the subtask configuration linked list disclosed by the invention comprises the configuration address corresponding to the next level of subtask, so that after the configuration content corresponding to the current subtask is called, the configuration address corresponding to the next level of subtask is skipped based on the configuration content, the update of the configuration content corresponding to the next level of subtask is realized, and the efficiency and the accuracy of the configuration content corresponding to the configuration subtask are improved.
Further, the configuration address corresponding to the next-level subtask in the configuration content corresponding to the last-level subtask is a preset tag value. According to the technical scheme, the configuration address corresponding to the next-level subtask in the configuration content corresponding to the last-level subtask is preset to be the preset mark value, so that when the current-level subtask reconfigurable computing process and the next-level subtask configuration content updating process are subsequently executed, whether the next-level subtask to be subjected to reconfigurable computing exists can be quickly judged.
Further, the step b comprises: step b 1: judging whether a next-level subtask to be subjected to reconfigurable computing exists, if so, entering step b2, and if not, ending the next-level subtask configuration content updating process; step b 2: based on the subtask configuration linked list obtained in the step 1 and the subtask configuration content updated in the step 2, reading the configuration content corresponding to the next-level subtask from the subtask configuration linked list according to the configuration address corresponding to the next-level subtask in the configuration content corresponding to the current-level subtask, and then entering the step b 3; step b 3: based on the configuration content corresponding to the next-level subtask read in step b2, checking whether the configuration check code corresponding to the next-level subtask matches with the configuration information corresponding to the next-level subtask, if yes, entering step b4, and if not, ending the calculation of the reconfigurable processor; step b 4: and storing the configuration content corresponding to the next level of subtask into a configuration content cache unit. According to the configuration content updating process of the next subtask, whether the updated configuration content is matched with the current subtask is determined by checking the configuration check code corresponding to the subtask, and the accuracy of the configuration content corresponding to the updated subtask is ensured.
Further, the step 2 comprises: and calling the configuration content corresponding to the next-level subtask of the reconfigurable computation to be executed from the configuration content cache unit, updating the configuration content corresponding to the next-level subtask of the reconfigurable computation to be executed into the configuration content corresponding to the current-level subtask, and finishing the updating of the subtask configuration content.
Further, in step b1, the method for determining whether there is a next-level subtask for which reconfigurable computing is to be performed is: and (3) judging whether the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is a preset mark value or not according to the subtask configuration content updated in the step (2), if so, determining that no next-level subtask with reconfigurable computing to be executed exists, and if not, determining that the next-level subtask with reconfigurable computing to be executed exists.
Further, the step a specifically includes: step a 1: calling the subtask configuration content updated in the step 2, acquiring the configuration information corresponding to the current level of subtask, and then entering the step a 2; step a 2: according to the configuration information corresponding to the current level subtask obtained in the step a1, the reconfigurable processor executes the reconfigurable calculation of the current level subtask, and then the step a3 is executed; step a 3: and judging whether the next-level subtask of the reconfigurable computing to be executed exists, if so, returning to the step 2, and if not, finishing the computing of the reconfigurable processor. According to the technical scheme disclosed by the invention, double detection is carried out on whether the next subtask exists or not, if the next subtask does not exist, the calculation of the reconfigurable processor is directly ended, the double detection can improve the accuracy of judging the existence of the next subtask by the reconfigurable processor, and the reconfigurable processor is prevented from executing unnecessary calculation.
Further, the method for determining whether there is a next-level subtask of reconfigurable computing to be executed in step a3 is as follows: and (3) judging whether the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is a preset mark value or not according to the subtask configuration content updated in the step (2), if so, determining that no next-level subtask with reconfigurable computing to be executed exists, and if not, determining that the next-level subtask with reconfigurable computing to be executed exists.
Further, if the reconfigurable processor does not start to perform reconfigurable computation on any level of subtasks of all the subtasks, the configuration content corresponding to the first level subtask with the configuration sequence number of 1 in the subtask configuration linked list is stored in the configuration content cache unit, the first level subtask is used as the next level subtask to be subjected to reconfigurable computation, and when the configuration content of the subtask is updated in step 2, the configuration content corresponding to the first level subtask is updated to the configuration content corresponding to the current level subtask.
Further, the configuration check code corresponding to the subtask is a cyclic check code CRC. In the technical scheme, the cyclic check code CRC is used as the configuration check code, the cyclic check code CRC is a check code with strong error detection and correction, the error correction accuracy of the configuration linked list of the reconfigurable processor is ensured, and the conditions of missing detection and error detection are avoided.
The invention also discloses a reconfigurable processor, which comprises: the current-level subtask reconfigurable computing module is used for executing the steps of the current-level subtask reconfigurable computing process; the next-level subtask configuration content updating module is used for executing the step of the next-level subtask configuration content updating process; the subtask configuration linked list storage module is used for executing the step of acquiring the subtask configuration linked list and storing the acquired subtask configuration linked list; the central processing unit is used for controlling each module of the reconfigurable processor to execute the task processing method of the reconfigurable processor;
furthermore, the reconfigurable processor also comprises a configuration content caching unit, which is used for storing the next-level subtask configuration content to be subjected to reconfigurable computing, which is updated by the next-level subtask configuration content updating module, so that the current-level subtask reconfigurable computing module can call the next-level subtask configuration content.
Drawings
Fig. 1 is a flowchart illustrating a task processing method of a reconfigurable processor according to an embodiment of the present invention;
fig. 2 is a schematic flowchart illustrating a process of updating configuration contents corresponding to next-level subtasks by the reconfigurable processor according to an embodiment of the present invention;
fig. 3 is a detailed flowchart illustrating a task processing method of a reconfigurable processor according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a subtask configuration linked list of the reconfigurable processor according to an embodiment of the present invention.
Detailed Description
In order to make the method of the present invention better understood by those skilled in the art, the technical solutions in the embodiments of the present invention will be described in detail below with reference to the drawings in the embodiments of the present invention. It should be understood that the following specific examples are illustrative only and are not intended to limit the invention. All other embodiments obtained by a person skilled in the art without making any inventive step should fall within the scope of protection of the present invention.
In an embodiment of the present invention, a method for task processing of a reconfigurable processor is provided, where fig. 1 is a schematic flow chart of the method for task processing of the reconfigurable processor, and as shown in fig. 1, the method for task processing of the reconfigurable processor includes the following steps:
step 1: acquiring a subtask configuration linked list, and then entering step 2;
step 2: updating the configuration content of the subtask, and then executing the step 3 and the step 4 in parallel;
and step 3: executing the current level of subtask to reconstruct the calculation process;
and 4, step 4: and executing the next-level subtask configuration content updating process.
Preferably, the specific step of obtaining the subtask configuration linked list in step 1 includes:
step 11: acquiring all subtasks of the reconfigurable processor, which need to execute calculation, and then entering step 12; according to the embodiment of the invention, one main task required to be executed by the reconfigurable processor is split into multiple levels of subtasks, and each level of subtask corresponds to only one subtask, so that the operation performance of the reconfigurable processor is fully exerted; all the subtasks comprise multi-level subtasks which are split by a main task required to be executed by the reconfigurable processor; the subtask configuration linked list comprises configuration contents corresponding to the multi-level subtasks required by the reconfigurable processor to execute the multi-level subtasks.
Step 12: acquiring configuration contents corresponding to all subtasks, and then entering step 13; the configuration content corresponding to the subtask includes a configuration serial number corresponding to the current level subtask, configuration information corresponding to the current level subtask, a configuration check code corresponding to the current level subtask, and a configuration address corresponding to the next level subtask.
Step 13: storing configuration contents corresponding to all subtasks in corresponding positions of a subtask configuration linked list according to a first preset sequence; the first preset sequence is a sequence of a configuration serial number corresponding to a current-level subtask, configuration information corresponding to the current-level subtask, a configuration check code corresponding to the current-level subtask, and a configuration address corresponding to a next-level subtask; wherein, the configuration serial number is used for distinguishing the task ordering; the configuration information is information required when the subtask executes reconfigurable computing; the configuration check code is used for checking whether the configuration information corresponding to the corresponding primary subtask is correctly configured; the configuration address refers to a storage address of configuration information corresponding to the subtask.
Specifically, the verifying whether the configuration information corresponding to the primary subtask is correctly configured specifically includes: if the configuration information corresponding to the first-level subtask is not matched with the configuration check code corresponding to the first-level subtask, determining that the configuration information corresponding to the first-level subtask is not configured correctly; if the configuration information corresponding to the primary subtask can be matched and corresponding to the configuration check code corresponding to the primary subtask, determining that the configuration information corresponding to the primary subtask is correctly configured; and the configuration information corresponding to each level of subtask has one-to-one corresponding configuration check code.
Specifically, the configuration address corresponding to the next-level subtask in the configuration content corresponding to the last-level subtask is a preset tag value. According to the embodiment of the invention, the configuration address corresponding to the next-level subtask in the configuration content corresponding to the last-level subtask is preset to the preset flag value, so that when the current-level subtask reconfigurable operation process and the next-level subtask configuration content updating process are subsequently executed, whether the next-level subtask to be subjected to reconfigurable computing exists can be quickly judged by judging whether the configuration address corresponding to the next-level subtask is the preset flag value.
Preferably, the specific step of updating the subtask configuration content in step 2 includes: calling configuration content corresponding to a next-level subtask of reconfigurable computing to be executed from the configuration content cache unit, updating the configuration content corresponding to the next-level subtask of reconfigurable computing to be executed as configuration content corresponding to the current-level subtask, and finishing updating the subtask configuration content; the configuration content caching unit is used for caching configuration content corresponding to a next-level subtask of reconfigurable computing to be executed.
Particularly, if the reconfigurable processor does not start to perform reconfigurable computation on any level of subtasks of all the subtasks, the configuration content corresponding to the first level subtask with the configuration sequence number of 1 in the subtask configuration linked list is stored in the configuration content cache unit, the first level subtask is used as the next level subtask to be subjected to the reconfigurable computation, and when the configuration content of the subtask is updated in step 2, the configuration content corresponding to the first level subtask is updated to the configuration content corresponding to the current level subtask.
Preferably, the specific steps of the current-level subtask reconfigurable computing process in step 3 include:
step 31: acquiring configuration information corresponding to the current level of subtasks according to the subtask configuration content updated in the step 2, and then entering a step 32;
step 32: according to the configuration information corresponding to the current level subtask obtained in step 32, the reconfigurable processor executes the reconfigurable computation of the current level subtask, and then step 33 is executed;
step 33: and judging whether a next-level subtask of the reconfigurable computation to be executed exists, if so, returning to the step 2, and if not, ending the computation of the reconfigurable processor. Specifically, the calculation of the reconfigurable processor includes a reconfigurable calculation process for each level of subtask in all subtasks and an update process for configuration content of each level of subtask, and it can be understood that ending the calculation of the reconfigurable processor means ending the reconfigurable calculation process for all levels of the reconfigurable processor and ending the update process for configuration content of all levels of the reconfigurable processor; the reconfigurable computing process of the current-level subtask only refers to a computing process in the reconfigurable processor based on the configuration information corresponding to the current-level subtask.
Preferably, the method for determining whether there is a next-level subtask to be subjected to reconfigurable computing in step 33 is as follows: and (3) judging whether the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is a preset mark value or not according to the subtask configuration content updated in the step (2), if so, determining that no next-level subtask with reconfigurable computing to be executed exists, and if not, determining that the next-level subtask with reconfigurable computing to be executed exists. Specifically, if the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is the preset tag value, it is determined that the current-level subtask is the last-level subtask in the subtask configuration linked list of the reconfigurable processor, and there is no next-level subtask to perform reconfigurable computing.
Preferably, as shown in fig. 2, the step 4 of the next-level subtask configuration content updating process specifically includes:
step 41: judging whether a next-level subtask of reconfigurable computing to be executed exists, if so, entering step 42, and if not, ending the next-level subtask configuration content updating process;
step 42: according to the subtask configuration linked list obtained in the step 1 and the subtask configuration content updated in the step 2, obtaining a configuration address corresponding to a next-level subtask in the configuration content corresponding to the current subtask, reading the configuration content corresponding to the next-level subtask in the subtask configuration linked list according to the configuration address corresponding to the next-level subtask, and then entering a step 43;
step 43: detecting whether the configuration check code corresponding to the next-level subtask is matched with the configuration information corresponding to the next-level subtask according to the configuration content corresponding to the next-level subtask read in the step 42, if so, entering a step 44, and if not, finishing the calculation of the reconfigurable processor;
step 44: and storing the configuration content corresponding to the next-level subtask read in the step 42 into a configuration content cache unit.
Preferably, the method for determining whether there is a next-level sub-task to be executed with reconfigurable computing in step 41 is as follows: and (3) judging whether the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is a preset mark value or not according to the subtask configuration content updated in the step (2), if so, determining that no next-level subtask with reconfigurable computing to be executed exists, and if not, determining that the next-level subtask with reconfigurable computing to be executed exists.
Preferably, the calculation of the reconfigurable processor includes steps 1 to 4, and the ending of the calculation of the reconfigurable processor is ending the operations of steps 1 to 4.
Through the steps 1 to 4, the computing method of the reconfigurable processor configuration linked list provided by the embodiment of the invention realizes that the reconfigurable processor executes the reconfigurable computing process of the current-level subtask and the configuration content updating process of the next-level subtask in parallel, eliminates the extra time overhead brought by the configuration content corresponding to the reconfigurable processor configuration subtask, and fully exerts the operational performance of the reconfigurable processor.
An embodiment of the present invention provides a method for task processing of a reconfigurable processor, where fig. 3 is a flowchart illustrating the method for task processing of the reconfigurable processor, and as shown in fig. 3, the method for task processing of the reconfigurable processor includes the following steps:
step 101: acquiring all subtasks required to be executed by the reconfigurable processor, and then entering step 102;
step 102: acquiring configuration contents corresponding to all subtasks, and then entering step 103; specifically, the configuration content corresponding to each level of subtask includes a configuration sequence number corresponding to the current level of subtask, configuration information corresponding to the current level of subtask, a configuration check code corresponding to the current level of subtask, and a configuration address corresponding to the next level of subtask.
Step 103: according to the configuration contents corresponding to all the subtasks obtained in the step 102, storing the configuration contents in the corresponding positions of the subtask configuration linked list according to a first preset sequence, obtaining the subtask configuration linked list, and then entering a step 201; specifically, as shown in fig. 4, the first preset order is a sequence of a configuration serial number corresponding to a current-level subtask, configuration information corresponding to the current-level subtask, a configuration check code corresponding to the current-level subtask, and a configuration address corresponding to a next-level subtask; the configuration sequence number corresponding to the current level subtask refers to a sequencing sequence number corresponding to the current level subtask and is used for sequencing the local subtasks; the configuration information corresponding to the current-level subtask refers to information required by the current-level subtask when the reconfigurable computation is executed; the configuration check code corresponding to the current-level subtask is used for checking whether the acquired configuration information corresponding to the current-level subtask is correctly configured; the configuration address corresponding to the next-level subtask refers to an address where the configuration information corresponding to the next-level subtask is located.
Preferably, the verifying whether the configuration information corresponding to the current level of subtask is correctly configured specifically includes: if the configuration information corresponding to the current-level subtask is not matched with the configuration check code corresponding to the current-level subtask, determining that the configuration information corresponding to the current-level subtask is not configured correctly; if the configuration information corresponding to the current level of subtask can be matched and corresponding to the configuration check code corresponding to the current level of subtask, determining that the configuration information corresponding to the current level of subtask is correctly configured; and the configuration information corresponding to each level of subtask has one-to-one corresponding configuration check code.
Specifically, as shown in fig. 4, the configuration address corresponding to the next-level subtask in the configuration content corresponding to the last-level subtask is a preset flag value.
Step 201: and calling the configuration content corresponding to the next-level subtask to be subjected to reconfigurable computing from the configuration content cache unit as the configuration content corresponding to the current-level subtask to complete the updating of the subtask configuration content. Specifically, when the reconfigurable processor does not start to execute the reconfigurable computing, the configuration content corresponding to the first-level subtask with the configuration sequence number of 1 in the subtask configuration linked list is stored in the configuration content cache unit, the first-level subtask is used as the next-level subtask to be executed with computing, and when the configuration content of the updated subtask is executed in step 201, the configuration content corresponding to the first-level subtask is updated to the configuration content corresponding to the current-level subtask.
Step 301: calling the configuration content corresponding to the current-level subtask after the subtask configuration content is updated in step 201, executing the reconfigurable calculation of the current-level subtask by the reconfigurable processor, and then entering step 302; specifically, the reconfigurable calculation of the reconfigurable processor for executing the current level of subtasks is performed based on the configuration information corresponding to the current level of subtasks.
Step 302: and judging whether a next-level subtask to be subjected to reconfigurable computing exists, if so, returning to the step 201, and if not, entering the step 501.
Preferably, the steps 301 to 302 are specific steps of a reconfigurable computing process of a current level of subtask; in step 302, the step of determining whether the next-stage subtask whose reconfigurable computation is to be performed exists is to determine whether the next-stage subtask configuration address in the configuration content corresponding to the current-stage subtask is the preset flag value according to the subtask configuration content updated in step 201, determine that the next-stage subtask whose reconfigurable computation is to be performed does not exist if the next-stage subtask whose reconfigurable computation is to be performed exists, and determine that the next-stage subtask whose reconfigurable computation is to be performed exists if the next-stage subtask whose reconfigurable computation is to be performed does not exist if the next-stage subtask whose configuration address is to be performed does not exist. Specifically, if the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is the preset tag value, it is determined that the current-level subtask is the last-level subtask in the subtask configuration linked list of the reconfigurable processor, and there is no next-level subtask on which reconfigurable computing is to be performed.
Step 401: judging whether a next-level subtask to be subjected to reconfigurable computing exists, if so, entering a step 402, and if not, ending the next-level subtask configuration content updating process;
step 402: reading the configuration content corresponding to the next-level subtask based on the configuration address corresponding to the next-level subtask in the configuration content corresponding to the current-level subtask according to the subtask configuration linked list obtained in step 103, and then entering step 403; specifically, the configuration address corresponding to the next-level subtask in the configuration content corresponding to the current-level subtask is used for guiding the reconfigurable processor to jump to the address of the configuration information corresponding to the next-level subtask according to the configuration address corresponding to the next-level subtask after the configuration information corresponding to the current-level subtask is verified and stored in the configuration information cache unit, so as to read the configuration information corresponding to the next-level subtask.
Step 403: detecting whether a configuration check code corresponding to the next-level subtask in the configuration content corresponding to the next-level subtask can pass the check, if so, entering a step 404, and if not, entering a step 501; the configuration content corresponding to each level of subtask has one-to-one corresponding configuration check code; whether the configuration check code corresponding to the next-stage subtask can pass the check is judged by judging whether the configuration check code corresponding to the next-stage subtask can be matched with the configuration information corresponding to the next-stage subtask, if so, the configuration check code corresponding to the next-stage subtask can pass the check, and if not, the configuration check code corresponding to the next-stage subtask cannot pass the check; specifically, if the configuration check code corresponding to the next-level subtask cannot pass the check, it is determined that the configuration information corresponding to the next-level subtask has an error match, and the configuration information corresponding to the next-level subtask is not correctly configured, so that the reconfigurable processor is controlled to end the calculation, and the situation that the reconfigurable processor calls the error configuration information to execute the reconfigurable calculation of the subtask to influence the overall calculation result of the reconfigurable processor is avoided.
Step 404: storing the configuration information corresponding to the next level of subtasks to a configuration information cache unit; specifically, the configuration information caching unit is configured to cache configuration information corresponding to a next-level subtask to be called and executed, so that the reconfigurable processor can be called when executing a reconfigurable computing process of a current-level subtask.
Preferably, the steps 401 to 404 are specific steps of configuring a content updating process for the next-level subtask; in step 401, the step of determining whether the next-stage subtask whose reconfigurable computation is to be performed exists is to determine whether the next-stage subtask configuration address in the configuration content corresponding to the current-stage subtask is the preset flag value according to the subtask configuration content updated in step 201, determine that the next-stage subtask whose reconfigurable computation is to be performed does not exist if the next-stage subtask configuration address is the preset flag value, and determine that the next-stage subtask whose reconfigurable computation is to be performed exists if the next-stage subtask whose reconfigurable computation is to be performed does not exist. Specifically, if the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is the preset tag value, it is determined that the current-level subtask is the last-level subtask in the subtask configuration linked list of the reconfigurable processor, and there is no next-level subtask on which reconfigurable computing is to be performed.
Step 501: and controlling the reconfigurable processor to finish the calculation. Specifically, the calculation of the reconfigurable processor comprises a reconfigurable calculation process of each level of subtask in all subtasks and a configuration content updating process of each level of subtask; the step of finishing the calculation of the reconfigurable processor refers to finishing the subtask reconfigurable calculation flow of the whole level of the reconfigurable processor and finishing the subtask configuration content updating flow of the whole level of the reconfigurable processor.
Particularly, the reconfigurable computing process of the current-stage subtask and the updating process of the next-stage subtask configuration content are executed in parallel, so that the reconfigurable computing of the current-stage subtask and the information configuration of the next-stage subtask are performed in parallel, the time overhead caused by the configuration of the subtask information is eliminated, the computing performance of the reconfigurable processor is fully exerted, and the efficiency of the reconfigurable processor in executing tasks is improved.
Preferably, in the foregoing embodiment, the configuration check code corresponding to the subtask in the configuration content corresponding to all the subtasks in the reconfigurable processor uses a cyclic check code CRC, and the cyclic check code CRC is a check code with strong error detection and correction, so that the error correction accuracy of the configuration linked list of the reconfigurable processor is ensured, and the situations of missing detection and error detection are avoided.
Preferably, an embodiment of the present invention provides a subtask configuration linked list of a reconfigurable processor, and fig. 4 is a schematic diagram of the subtask configuration linked list of the reconfigurable processor, as shown in fig. 4, a configuration content corresponding to each level of subtask is stored in a corresponding position of the subtask configuration linked list according to a sequence of a configuration sequence number corresponding to a current level of subtask, configuration information corresponding to the current level of subtask, a configuration check code corresponding to the current level of subtask, and a configuration address corresponding to a next level of subtask, and particularly, since the next level of subtask does not exist after the last level of subtask, a configuration address corresponding to the next level of subtask in the configuration content corresponding to the last level of subtask in fig. 4 is a preset flag value for identifying whether the next level of subtask to be subjected to reconfigurable computing exists; the configuration content corresponding to each level of subtask has one-to-one corresponding configuration check code.
Another embodiment of the present invention provides a reconfigurable processor, including:
the current-level subtask reconfigurable computing module is used for executing the steps of the current-level subtask reconfigurable computing process in the embodiment;
a next-level subtask configuration content updating module, configured to execute the step of the next-level subtask configuration content updating process according to the foregoing embodiment;
a subtask configuration linked list storage module, configured to execute the step of obtaining the subtask configuration linked list according to the foregoing embodiment, and store the obtained subtask configuration linked list;
the central processing unit is used for controlling each module of the reconfigurable processor to execute the task processing method of the reconfigurable processor according to the embodiment;
preferably, the reconfigurable processor further includes a configuration content caching unit, configured to store the next-level subtask configuration content to be subjected to reconfigurable computing, which is updated by the next-level subtask configuration content updating module, so as to facilitate the calling of the current-level subtask reconfigurable computing module.
In the embodiments provided by the present invention, it should be understood that the disclosed system and method can be implemented in other ways, and the above-described embodiments are only illustrative, for example, the division of the modules is only one logical functional division, and other division ways can be implemented in practice, for example, all or part of the components of a plurality of modules can be combined or integrated into another system, or some features can be omitted or not implemented, and some or all of the modules can be selected according to actual requirements to implement the purpose of the embodiments of the present invention.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents, which are to be considered as merely preferred embodiments of the invention, and not intended to be limiting of the invention, and that various changes and modifications may be effected therein by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (15)

1. A task processing method of a reconfigurable processor is characterized by comprising the following steps:
step 1: acquiring a subtask configuration linked list, and then entering step 2;
step 2: updating the configuration content of the subtask, and then executing the step a and the step b in parallel;
step a: executing the current level of subtask to reconstruct the calculation process;
step b: and executing the next-level subtask configuration content updating process.
2. The task processing method of the reconfigurable processor according to claim 1, wherein the step 1 comprises:
step 11: acquiring all subtasks of the reconfigurable processor, which need to execute the reconfigurable computation, and then entering step 12;
step 12: acquiring the configuration contents corresponding to all the subtasks acquired in the step 11, and then entering a step 13;
step 13: and storing the configuration contents corresponding to all the subtasks obtained in the step 12 in the corresponding positions of the subtask configuration linked list according to a first preset sequence.
3. The task processing method of the reconfigurable processor according to claim 2, wherein the subtask configuration linked list includes configuration contents corresponding to each level of subtasks required by the reconfigurable processor to execute all the subtasks; the configuration content corresponding to each level of subtask includes a configuration serial number corresponding to the current level of subtask, configuration information corresponding to the current level of subtask, a configuration check code corresponding to the current level of subtask, and a configuration address corresponding to the next level of subtask;
wherein each level of subtask has one and only one subtask; the configuration sequence number is used for distinguishing the sequencing of each level of subtasks in all subtasks; the configuration information is information required when the reconfigurable computation is executed by the corresponding primary subtask; the configuration check code is used for checking whether the configuration information corresponding to the corresponding primary subtask is correctly configured; the configuration address refers to a storage address of configuration information corresponding to the primary subtask.
4. The task processing method of the reconfigurable processor according to claim 3, wherein checking whether the configuration information corresponding to the current level of subtask is correctly configured specifically includes:
if the configuration information corresponding to the current-level subtask is not matched with the configuration check code corresponding to the current-level subtask, determining that the configuration information corresponding to the current-level subtask is not configured correctly;
if the configuration information corresponding to the current level of subtask can be matched and corresponding to the configuration check code corresponding to the current level of subtask, determining that the configuration information corresponding to the current level of subtask is correctly configured;
and the configuration information corresponding to each level of subtask has one-to-one corresponding configuration check code.
5. The task processing method of the reconfigurable processor according to claim 3, wherein the storing the configuration contents corresponding to all the subtasks in the corresponding positions in the subtask configuration linked list according to the first preset order specifically comprises: and storing the configuration content corresponding to each level of subtask in a subtask configuration linked list according to the sequence of the configuration serial number corresponding to the current level of subtask, the configuration information corresponding to the current level of subtask, the configuration check code corresponding to the current level of subtask, and the configuration address corresponding to the next level of subtask.
6. The task processing method of the reconfigurable processor according to claim 5, wherein a configuration address corresponding to a next-level subtask in the configuration content corresponding to a last-level subtask is a preset flag value.
7. The task processing method of the reconfigurable processor according to claim 6, wherein the step b comprises:
step b 1: judging whether a next-level subtask to be subjected to reconfigurable computing exists, if so, entering step b2, and if not, ending the next-level subtask configuration content updating process;
step b 2: based on the subtask configuration linked list obtained in the step 1 and the subtask configuration content updated in the step 2, reading the configuration content corresponding to the next-level subtask from the subtask configuration linked list according to the configuration address corresponding to the next-level subtask in the configuration content corresponding to the current-level subtask, and then entering the step b 3;
step b 3: based on the configuration content corresponding to the next-level subtask read in step b2, checking whether the configuration check code corresponding to the next-level subtask matches with the configuration information corresponding to the next-level subtask, if yes, entering step b4, and if not, ending the calculation of the reconfigurable processor;
step b 4: and storing the configuration content corresponding to the next level of subtask into a configuration content cache unit.
8. The method for task processing of a reconfigurable processor according to claim 7, wherein the step 2 includes: and calling the configuration content corresponding to the next-level subtask of the reconfigurable computation to be executed from the configuration content cache unit, updating the configuration content corresponding to the next-level subtask of the reconfigurable computation to be executed into the configuration content corresponding to the current-level subtask, and finishing the updating of the subtask configuration content.
9. The method for processing the tasks of the reconfigurable processor according to claim 8, wherein the method for determining whether the next level of subtasks to be subjected to the reconfigurable computation are present in step b1 is as follows: and (3) judging whether the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is a preset mark value or not according to the subtask configuration content updated in the step (2), if so, determining that no next-level subtask with reconfigurable computing to be executed exists, and if not, determining that the next-level subtask with reconfigurable computing to be executed exists.
10. The task processing method of the reconfigurable processor according to claim 9, wherein the step a of executing the current level subtask reconfigurable computing process specifically includes:
step a 1: calling the subtask configuration content updated in the step 2, acquiring the configuration information corresponding to the current level of subtask, and then entering the step a 2;
step a 2: according to the configuration information corresponding to the current level subtask obtained in the step a1, the reconfigurable processor executes the reconfigurable calculation of the current level subtask, and then the step a3 is executed;
step a 3: and judging whether the next-level subtask of the reconfigurable computing to be executed exists, if so, returning to the step 2, and if not, finishing the computing of the reconfigurable processor.
11. The method for processing the tasks of the reconfigurable processor according to claim 10, wherein the step a3 is a step of judging whether the next level of subtasks to be subjected to the reconfigurable computation are present: and (3) judging whether the next-level subtask configuration address in the configuration content corresponding to the current-level subtask is a preset mark value or not according to the subtask configuration content updated in the step (2), if so, determining that no next-level subtask with reconfigurable computing to be executed exists, and if not, determining that the next-level subtask with reconfigurable computing to be executed exists.
12. The task processing method of the reconfigurable processor according to claim 11, wherein if the reconfigurable processor does not start reconfigurable computation on any level of subtasks among all the subtasks, the configuration content corresponding to the first level subtask with configuration number 1 in the subtask configuration linked list is stored in the configuration content cache unit, the first level subtask is used as the next level subtask on which reconfigurable computation is to be performed, and when updating the subtask configuration content in step 2, the configuration content corresponding to the first level subtask is updated to the configuration content corresponding to the current level subtask.
13. A task processing method of a reconfigurable processor according to any one of claims 3 to 12, wherein the configuration check code corresponding to the subtask is a cyclic check code CRC.
14. A reconfigurable processor, comprising:
a current-level subtask reconfigurable computing module, configured to perform the steps of the current-level subtask reconfigurable computing process according to any one of claims 10 to 11;
a next-level subtask configuration content updating module, configured to perform the step of the next-level subtask configuration content updating procedure according to any one of claims 7 and 9;
a subtask configuration linked list storage module, configured to perform the step of obtaining the subtask configuration linked list according to any one of claims 2 to 6, and store the obtained subtask configuration linked list;
a central processing unit for controlling each module of the reconfigurable processor to execute the task processing method of the reconfigurable processor according to any one of claims 1 to 13.
15. The reconfigurable processor according to claim 14, further comprising a configuration content caching unit, configured to store next-level subtask configuration content to be executed with reconfigurable computing updated by the next-level subtask configuration content updating module, so as to be called by the current-level subtask reconfigurable computing module.
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101441674A (en) * 2008-12-15 2009-05-27 浙江大学 Chip allocation method of dynamic reconfigurable system based on FPGA
US20100082943A1 (en) * 2008-09-26 2010-04-01 Fujitsu Limited Dynamic reconfiguration support apparatus, dynamic reconfiguration support method, and computer product
CN101799770A (en) * 2010-01-19 2010-08-11 湖南大学 Reconfigurable resource management method based on unit area speed-up ratio
CN102129390A (en) * 2011-03-10 2011-07-20 中国科学技术大学苏州研究院 Task scheduling system of on-chip multi-core computing platform and method for task parallelization
WO2014090067A1 (en) * 2012-12-13 2014-06-19 东南大学 Pre-decoding analysis-based configuration information cache management method and system
CN105577262A (en) * 2015-12-16 2016-05-11 西安空间无线电技术研究所 Spaceborne FPGA reconstruction system and reconstruction method based on inter-satellite link transceiving equipment
CN108182168A (en) * 2017-12-27 2018-06-19 电子科技大学 A kind of integrated digital signal processing system for supporting dynamic reconfigurable
CN112445538A (en) * 2020-12-15 2021-03-05 清华大学 Configuration loading system and method for reconfigurable processor

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100082943A1 (en) * 2008-09-26 2010-04-01 Fujitsu Limited Dynamic reconfiguration support apparatus, dynamic reconfiguration support method, and computer product
CN101441674A (en) * 2008-12-15 2009-05-27 浙江大学 Chip allocation method of dynamic reconfigurable system based on FPGA
CN101799770A (en) * 2010-01-19 2010-08-11 湖南大学 Reconfigurable resource management method based on unit area speed-up ratio
CN102129390A (en) * 2011-03-10 2011-07-20 中国科学技术大学苏州研究院 Task scheduling system of on-chip multi-core computing platform and method for task parallelization
WO2014090067A1 (en) * 2012-12-13 2014-06-19 东南大学 Pre-decoding analysis-based configuration information cache management method and system
CN105577262A (en) * 2015-12-16 2016-05-11 西安空间无线电技术研究所 Spaceborne FPGA reconstruction system and reconstruction method based on inter-satellite link transceiving equipment
CN108182168A (en) * 2017-12-27 2018-06-19 电子科技大学 A kind of integrated digital signal processing system for supporting dynamic reconfigurable
CN112445538A (en) * 2020-12-15 2021-03-05 清华大学 Configuration loading system and method for reconfigurable processor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
梁樑等: "采用预配置策略的可重构混合任务调度算法", 《计算机辅助设计与图形学学报》 *
祁晓峰等: "基于离散粒子群优化的可重构系统任务调度算法", 《小型微型计算机系统》 *

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