CN113179018B

CN113179018B - Multiphase DC-DC converter

Info

Publication number: CN113179018B
Application number: CN202110727457.2A
Authority: CN
Inventors: 黄太毅; 张炜华; 顾雁鸣
Original assignee: Yutai Semiconductor Co ltd
Current assignee: Yutai Semiconductor Co ltd
Priority date: 2021-06-29
Filing date: 2021-06-29
Publication date: 2021-11-05
Anticipated expiration: 2041-06-29
Also published as: CN113179018A

Abstract

The present disclosure provides a multiphase DC-DC converter including a main circuit converter providing a first pulse voltage at a first connection node by controlling a conduction state of a switching tube located therein; a slave converter for providing a second pulsed voltage at the second connection node by controlling the conduction state of a switching tube located therein, and a control module comprising: the inverter comprises a first detection circuit generating a first detection signal according to a first pulse voltage, a second detection circuit generating a second detection signal according to a second pulse voltage, and a control circuit adjusting the duty ratio of a second switch control signal controlling a switch tube in a slave inverter according to a conduction control signal generated by comparing the first detection signal with the second detection signal so as to equalize the average value of the inductance current of the master inverter and the inductance current of the slave inverter. Therefore, the inductive current ripple can be inhibited, and the output stability of the converter is improved.

Description

Multiphase DC-DC converter

Technical Field

The disclosure relates to the technical field of power electronics, in particular to a constant on-time Control (COT) based multiphase DC-DC converter.

Background

In the field of using electric power, it is necessary to raise the voltage from a low voltage to a high voltage or to lower the voltage from a high voltage to a low voltage. For this reason, modeling and analysis have been studied on a DC-DC converter which is one of various step-up/down converters.

Buck converters are one type of DC-DC converter, which includes forward converters, half-bridge converters, and full-bridge converters. When driving the DC-DC converter, a negative feedback control unit is used to sense and control an error of an output signal of the DC-DC converter. The DC-DC converter and the negative feedback control unit may be implemented on a single chip, which is referred to as a switch-mode power supply unit.

Fig. 1 is a schematic circuit block diagram of a constant on-time Controlled (COT) DC-DC converter 100. The constant on-time Control (COT) architecture is very simple compared to conventional voltage/current mode control, which samples the output voltage through a feedback resistor (see fig. 1), and then compares the output voltage ripple valley directly with a reference voltage to generate a fixed on-time pulse to turn on the upper tube MOSFET. When the on-time pulse expires, the upper tube MOSFET is turned off (and the lower tube is turned on).

The converter 100 comprises a control unit 110 and a converter unit 120. The converter unit 120 includes an output transistor Q1 composed of a P-channel MOS transistor, a freewheel transistor Q2 composed of an N-channel MOS transistor, an inductor L, and a smoothing capacitor Cout.

The comparator 102 of the control unit 110 compares the reference voltage Vref with a feedback voltage Vfb obtained by dividing the output voltage vouutut by the resistors R1 and R2. When the feedback voltage Vfb generated by dividing the voltage by the resistors R1 and R2 is higher than the reference voltage Vref, the comparator 102 generates a comparison signal of a high level. When the feedback voltage Vfb is lower than the reference voltage Vref, the comparator 102 generates a comparison signal of a low level. The reference voltage Vref is set equal to a reference value of the feedback voltage Vfb generated by the resistors R1 and R2 when the output voltage Vout reaches a specified value.

The comparison signal of the comparator 102 is supplied to a one-shot trigger circuit 101. The one-shot trigger circuit 101 generates complementary control signals GP and GN according to the comparison signal. The one-shot flip-flop circuit 101 maintains the output first control signal GP at a high level for a predetermined time in response to the high level comparison signal from the comparator 102. The first control signal GP output by the one-click trigger circuit 101 is supplied to the gate of the output transistor Q1 as a first output signal of the control unit 110. The outputted second control signal GN is supplied to the gate of the freewheel transistor Q2 as a second output signal of the control unit 110.

In the constant on-time controlled DC-DC converter 100, when the output transistor Q1 is activated to conduct, the output voltage Vout rises. When the output transistor Q1 is turned off, the energy stored in the inductor L is discharged. The reduction of the energy stored in the inductor L lowers the output voltage Vout. When the feedback voltage Vfb generated by the resistors R1 and R2 becomes lower than the reference voltage Vref, the one-shot trigger circuit 101 generates the first control signal GP of a high level for a predetermined time, and thus, the output transistor Q1 is activated to be turned on again. This operation keeps the output signal Vout based on the reference voltage Vref constant. In the converter 100, the switching frequency of the output transistor Q1 is constant, and when the output voltage Vout deviates from a set value, for example, the output voltage Vout decreases, the duty ratio of the control signal GP is adjusted accordingly to shorten the off-time of the output transistor Q1, so that the output voltage Vout increases to maintain the stability of the output.

Recently, in order to design a high current DC-DC converter, a plurality of DC-DC converters are connected to each other, so that a high current DC-DC converter is implemented.

Fig. 2 is a schematic block circuit diagram of a two-phase multiphase DC-DC converter 200 in which two of the constant on-time controlled DC-DC converters 100 of fig. 1 are included for operation in parallel. The converter 200 includes a master logic control unit 210 and a master converter unit 220, and a slave logic control unit 230 and a slave converter unit 240. Any one of the master inverter unit 220 and the slave inverter unit 240 has the same configuration as the inverter unit 120 in fig. 1 (partial structure is not shown), and the master inverter unit 220 and the slave inverter unit 240 share one smoothing capacitor Cout.

The master logic control unit 210 is similar to the slave logic control unit 230, and may also include a comparator for dividing and sampling the output voltage Vout through a series-connected resistor to obtain the feedback voltage Vfb, and for comparing the feedback voltage Vfb with the reference voltage Vref, and the master logic control unit 210 is used for logic operation and generating the control signals GP1 and GN1 required for controlling the master converter unit 220, and the slave logic control unit 230 is used for logic operation and generating the control signals GP2 and GN2 required for controlling the slave converter unit 240, similar to the control unit 120 in fig. 1.

The master logic control unit 210 or the slave logic control unit 230 can correspondingly operate the

converter units

220 and 240 in the same manner as the control unit 120 in the constant on-time controlled DC-DC converter 100 of fig. 1. However, the output transistors Q1 and Q3 of the master inverter unit 220 and the slave inverter unit 240, respectively, are alternately activated to conduct under the control of the master logic control unit 210 and the slave logic control unit 230, respectively. Therefore, in the inverter 200, the off-time of the output transistor Q1 (or Q3) is longer than that of the inverter 100 in fig. 1. This can greatly reduce the switching frequency of the output transistor Q1 (or Q3), reducing power consumption.

However, when such a circuit configuration of the high-current multiphase DC-DC converter 200 is controlled, current is concentrated into one converter due to component deviation between converters, and there is still a problem that inductor current ripple is relatively large or inductor current average value is high when load is suddenly changed in operation, resulting in unstable output.

Disclosure of Invention

In order to solve the above technical problem, the present disclosure provides a constant on time Control (COT) -based multiphase DC-DC converter and a DC-DC converter chip, which can suppress an inductor current ripple and improve the stability of the converter output.

The present disclosure provides a multiphase DC-DC converter, comprising:

the main circuit converter comprises a main circuit logic control unit, a first switching tube and a second switching tube, wherein the first switching tube and the second switching tube are connected between the input end and the output end of the multiphase DC-DC converter;

the at least one slave converter respectively comprises a slave logic control unit, a third switching tube and a fourth switching tube which are connected between the input end and the output end of the multiphase DC-DC converter, the slave logic control unit controls the conduction states of the third switching tube and the fourth switching tube through a second switching control signal, and a second pulse voltage is provided at a second connection node between the third switching tube and the fourth switching tube;

a control module for generating the conduction control signal of the slave logic control unit according to the first pulse voltage and the second pulse voltage,

wherein, this control module includes:

a first detection circuit, which is correspondingly connected to the first connection node and generates a first detection signal according to the first pulse voltage;

at least one second detection circuit, which is correspondingly connected to the second connection node, respectively, and generates a second detection signal according to the second pulse voltage;

and a control circuit configured to adjust the duty ratio of the second switch control signal according to the conduction control signal generated by comparing the first detection signal and the second detection signal, so that the average value of the inductive currents of the main-circuit converter and the slave-circuit converter is equal, wherein the first detection signal is used for representing the average value of the inductive currents of the corresponding main-circuit converter, and the second detection signal is used for representing the average value of the inductive currents of the at least one slave-circuit converter.

Preferably, the aforementioned first detection circuit includes:

a first transistor and a first resistor connected in series between the first connection node and ground, a control terminal of the first transistor and a control terminal of the second switching tube being connected in common to the main circuit logic control unit;

a second transistor and a first capacitor connected in series between a connection node of the first transistor and the first resistor and ground, wherein a control terminal of the second transistor is connected with a control terminal of the first transistor, and a third connection node between the second transistor and the first capacitor is used as an output terminal of the first detection circuit for providing the first detection signal.

Preferably, the aforementioned at least one second detection circuit respectively includes:

the control end of the third transistor and the control end of the fourth switch tube are connected with the slave logic control unit together;

and a fourth transistor and a second capacitor connected in series between a connection node of the third transistor and the second resistor and ground, wherein a control terminal of the fourth transistor is connected to a control terminal of the third transistor, and a fourth connection node between the fourth transistor and the second capacitor is used as an output terminal of the second detection circuit for providing the second detection signal.

Preferably, the aforementioned control circuit includes:

an operational amplifier, a positive input terminal of which is connected to the output terminal of the first detection circuit and is connected to the first detection signal, a negative input terminal of which is connected to the output terminal of the second detection circuit and is connected to the second detection signal, and an output terminal of which provides a comparison signal;

and a slave COT control unit connected between the operational amplifier and the slave logic control unit, for generating an on control signal according to the comparison signal under the control of the second switch control signal.

Preferably, the slave COT control unit includes:

the input stage comprises a fifth transistor and a sixth transistor which are connected between the power supply end and the ground in series, a fifth connection node between the control end of the fifth transistor and the control end of the sixth transistor is connected with the comparison signal, and the connection node of the fifth transistor and the sixth transistor provides a detection voltage;

an output stage, including a first current source and a third capacitor connected in series between a power supply terminal and ground, and a first comparator connected between a sixth connection node between the first current source and the third capacitor and the slave logic control unit, wherein a non-inverting input terminal of the first comparator is connected to the sixth connection node, the sixth connection node is connected to a connection node between the fifth transistor and the sixth transistor to receive the detection voltage, an inverting input terminal of the first comparator is connected to a preset first reference voltage, and an output terminal of the first comparator is used as an output terminal of the slave COT control unit to provide the on control signal;

and the control stage comprises a seventh transistor, the seventh transistor is connected in parallel with two ends of the third capacitor, and the control end of the seventh transistor is connected with the slave logic control unit and is accessed to the second control signal.

Preferably, the slave logic control unit includes:

the non-inverting input end of the second comparator is connected with the feedback voltage, and the inverting input end of the second comparator is connected with a preset second reference voltage;

a nor gate having an input terminal connected to the output terminal of the second comparator and the output terminal of the slave COT control unit, respectively;

and the input end of the inverter is connected with the output end of the NOR gate and is used for the second switch control signal.

Preferably, any one of the first switch tube, the third switch tube and the fifth transistor is a P-type metal oxide semiconductor field effect transistor.

Preferably, any one of the second switch tube, the fourth switch tube, the first transistor, the second transistor, the third transistor, the fourth transistor, the sixth transistor and the seventh transistor is an N-type metal oxide semiconductor field effect transistor.

Preferably, the master circuit converter, the slave circuit converter and the control module are integrated on the same chip, and the first connection node and the second connection node are respectively connected to a peripheral circuit including an energy storage element through corresponding pins of the chip to provide an output voltage.

The beneficial effects of this disclosure are: the present disclosure provides a multiphase DC-DC converter, comprising: a main circuit converter for providing a first pulse voltage at a first connection node by controlling a conduction state of a switching tube located therein; a slave converter for providing a second pulsed voltage at the second connection node by controlling the conduction state of a switching tube located therein, and a control module comprising: the inverter comprises a first detection circuit generating a first detection signal according to a first pulse voltage, a second detection circuit generating a second detection signal according to a second pulse voltage, and a control circuit adjusting the duty ratio of a second switch control signal controlling a switch tube in a slave inverter according to a conduction control signal generated by comparing the first detection signal with the second detection signal so as to equalize the average value of the inductance current of the master inverter and the inductance current of the slave inverter. The multiphase DC-DC converter provided by the disclosure realizes the balancing of the inductive current of the main circuit and the secondary circuit by sensing that two paths of detection signals (average values of the inductive current) on the main circuit and the secondary circuit are unequal and utilizing the comparison result of the two paths of detection signals to feed back and adjust the duty ratio (on-time of a switching tube) of a second switching control signal in the secondary circuit converter, so that the inductive current ripple can be inhibited when the load changes, and the output stability of the multiphase DC-DC converter is improved.

Drawings

The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of the embodiments of the present disclosure with reference to the accompanying drawings.

FIG. 1 shows a schematic circuit block diagram of a constant on-time Control (COT) based DC-DC converter in the prior art;

FIG. 2 shows a schematic block circuit diagram of a constant on time Control (COT) based two-phase DC-DC converter of the prior art;

FIG. 3 illustrates a schematic circuit block diagram of a constant on time Control (COT) based two-phase DC-DC converter provided by an embodiment of the present disclosure;

FIG. 4 shows a circuit schematic of the two-phase DC-DC converter of FIG. 3;

FIG. 5 shows a schematic block circuit diagram of a slave COT control unit in the two-phase DC-DC converter shown in FIG. 4;

FIG. 6 shows a schematic circuit block diagram of a slave logic control unit in the two-phase DC-DC converter shown in FIG. 4;

FIG. 7 illustrates an exemplary timing diagram for dynamically adjusting the duty cycle of the slave switch control signal in the two-phase DC-DC converter of FIG. 4 in response to load changes;

fig. 8 shows a schematic circuit block diagram of a constant on-time Control (COT) -based two-phase DC-DC converter chip provided by an embodiment of the present disclosure.

Detailed Description

To facilitate an understanding of the present disclosure, the present disclosure will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present disclosure are set forth in the accompanying drawings. However, the present disclosure may be embodied in different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in the description of the disclosure herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure.

Hereinafter, a multi-output converter according to an embodiment will be described with reference to the accompanying drawings. Although embodiments have been described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. The thickness and size of the device shown in the drawings may be exaggerated for convenience or clarity. Like reference numerals refer to like elements throughout the specification.

The present disclosure is described in detail below with reference to the accompanying drawings.

One embodiment may include a plurality of DC-DC converters.

The DC-DC converter may change the level of the input voltage Vin based on the control signal to provide the output voltage Vout to the output terminal. The plurality of DC-DC converters may be connected in parallel with each other between an input terminal of the input voltage Vin and an output terminal of the output voltage Vout, and may be driven in parallel. A single input voltage Vin may be branched to be input to a plurality of DC-DC converters, and a voltage Vout output from each of the DC-DC converters may be output to a single output terminal. That is, the DC-DC converter 100 may process the input voltage Vin to output a single output voltage Vout, respectively.

When a high current DC-DC converter is designed using a single DC-DC converter, the size of devices in the single DC-DC converter may increase, and complexity may increase. However, according to the embodiment, the plurality of DC-DC converters are connected in parallel with each other, so that the value of the current processed by each of the DC-DC converters can be reduced. Therefore, it is possible to obtain a high power output while preventing the size of the device in the DC-DC converter from being excessively increased, and without causing circuit complexity.

The DC-DC converter can obtain a desired level of the output power Vout from the original input voltage Vin through a predetermined process. For this reason, control is required to obtain a desired output power Vout. Specifically, even in the case where the input voltage Vin and the load current change, control is required to obtain a well-regulated output voltage Vout.

Fig. 3 illustrates a schematic circuit block diagram of a constant on-time Control (COT) -based two-phase DC-DC converter provided by an embodiment of the present disclosure, and fig. 4 illustrates a circuit schematic diagram of the two-phase DC-DC converter illustrated in fig. 3.

Referring to fig. 3 and 4, an embodiment of the present disclosure provides a constant on-time Control (COT) -based multiphase DC-DC converter including a master converter and at least one slave converter connected in parallel with each other. In the present embodiment, the two-phase DC-DC converter 300 is taken as an example for description, that is, the two-phase DC-DC converter 300 includes the main-circuit converter 10, the slave-circuit converter 20 and the control module 30 which are connected in parallel with each other,

wherein, the main circuit converter 10 includes a main circuit logic control unit 11 and a first switch tube Q1 and a second switch tube Q2 connected between the input terminal and the output terminal of the two-phase DC-DC converter 300, the main circuit logic control unit 11 controls the conduction state of the first switch tube Q1 and the second switch tube Q2 through a first switch control signal GN1 (or GP 1), a first connection node SWA between the two provides a first pulse voltage,

the slave converter 20 includes a slave logic control unit 21, and a third switch Q3 and a fourth switch Q4 connected between the input terminal and the output terminal of the multiphase DC-DC converter 300, the slave logic control unit 21 controls the conduction states of the third switch Q3 and the fourth switch Q4 through a second switch control signal GN2 (or GP 2), a second pulse voltage is provided at a second connection node SWB therebetween,

the control module 30 is connected to the first connection node SWA and the second connection node SWB to correspondingly connect the first pulse voltage and the second pulse voltage, and generates a turn-on control signal Ton1 of the slave logic control unit 21 according to the first pulse voltage and the second pulse voltage,

in this embodiment, the control module 30 specifically includes: a first detection circuit 31, a second detection circuit 33, and a control circuit 32, wherein the first detection circuit 31 is connected to the first connection node SWA, and generates a first detection signal Va according to the first pulse voltage; the second detection circuit 33 is correspondingly connected to the second connection node SWB, and generates a second detection signal Vb based on the second pulse voltage; the control circuit 32 is configured to adjust the duty ratio of the second switching control signal GN2 (or GP 2) to equalize the average value of the inductor currents of the main converter 10 and the slave converter 20 according to the aforementioned on control signal Ton1 generated by comparing the aforementioned first detection signal Va to the second detection signal Vb, where the aforementioned first detection signal Va is used to represent the average value of the inductor currents of the corresponding main converter 10, and the aforementioned second detection signal Vb is used to represent the average value of the inductor currents of the slave converter 20.

Specifically, the circuit connected to the output end of the two-phase DC-DC converter 300 at the first connection node SWA and the second connection node SWB may refer to the circuit structures in fig. 1 and fig. 2, which are not described herein again.

Further, referring to fig. 4, the main circuit logic control unit 11 in the main circuit converter 10 is configured to provide a first switch control signal GN1 (or GP 1) to the first switch Q1 and the second switch Q2 connected in series between the input terminal of the two-phase DC-DC converter 300 and the ground according to the feedback of the output voltage Vout (the feedback voltage Vfb, which implements a feedback loop that is an output feedback structure in the prior art, and can be described with reference to the circuits in fig. 1 and fig. 2 in particular, and will not be described in detail herein), the first switch Q1 and the second switch Q2 operate under the first switch control signal GN1 (or GP 1) to adjust the level of the input voltage Vin to provide the output voltage Vout (part of the structure is not shown), and the connection node of the first switch Q1 and the second switch Q2 is the first connection node SWA, the first connection node SWA is connected to the output of the two-phase DC-DC converter 300 through an energy storage element.

Specifically, the control terminal of the first switch Q1 is connected to the control signal GP1, the control terminal of the second switch Q2 is connected to the control signal GN1, in this embodiment, the two-phase DC-DC converter 300 is a buck converter, the first switch Q1 is a P-type Metal Oxide Semiconductor Field Effect Transistor (MOSFET, hereinafter abbreviated as MOS Transistor), the second switch Q2 is an N-type MOS Transistor, so the control signal GP1 and the control signal GN1 are the same signal, although the disclosure is not limited thereto, in an alternative implementation scenario of other types (such as boost converters, etc.), the first switch Q1 and the second switch Q2 may also be MOS transistors of the same type, and then the control signal GP1 and the control signal 1 are a pair of complementary inverted signals GN.

Further, the slave logic control unit 21 in the slave converter 20 is configured to provide the aforementioned second switch control signal GP2 (or GN2) to the third switch tube Q3 and the fourth switch tube Q4 connected in series between the input terminal of the two-phase DC-DC converter 300 and the ground according to the feedback (feedback voltage Vfb) of the aforementioned output voltage Vout, the third switch tube Q3 and the fourth switch tube Q4 operate under the second switch control signal GP2 (or GN2) to adjust the level of the input voltage Vin to provide the output voltage Vout (a part of the structure is not shown), and a connection node of the third switch tube Q3 and the fourth switch tube Q4 serves as a second connection node SWB connected to the output terminal of the two-phase DC-DC converter 300 through another energy storage element.

Similarly, in the embodiment, the third transistor Q3 is a P-type MOS transistor, and the fourth transistor Q4 is an N-type MOS transistor, so the control signal GP2 and the control signal GN2 are the same signal.

Further, in the present embodiment, the first detection circuit 31 includes: a first transistor M1 and a first resistor R1 connected in series between the first connection node SWA and ground, wherein a control terminal of the first transistor M1 and a control terminal of the second switch Q2 are commonly connected to the main logic control unit 11, and the control signal GN1 (i.e., the first control signal) is switched in; and

a second transistor M2 and a first capacitor C1 connected in series between the connection node of the first transistor M1 and the first resistor R1 and the ground, wherein a control terminal of the second transistor M2 is connected to a control terminal of the first transistor M1, and a third connection node a between the second transistor M2 and the first capacitor C1 is used as an output terminal of the first detection circuit 31 for providing the first detection signal Va.

Further, in this embodiment, the second detection circuit 33 includes: a third transistor M3 and a second resistor R2 connected in series between the second connection node SWB and ground, wherein a control terminal of the third transistor M3 and a control terminal of the fourth switch Q4 are commonly connected to the slave logic control unit 21, and the slave logic control unit is connected to a control signal GN2 (i.e., a second control signal); and

a fourth transistor M4 and a second capacitor C2 connected in series between the connection node of the third transistor M3 and the second resistor R2 and the ground, wherein a control terminal of the fourth transistor M4 is connected to a control terminal of the third transistor M3, and a fourth connection node B between the fourth transistor M4 and the second capacitor C2 is used as an output terminal of the second detection circuit 33 for providing the second detection signal Vb.

Further, in the present embodiment, the aforementioned control circuit 32 includes: a slave COT control unit 321 and an operational amplifier 322, wherein a positive input terminal of the operational amplifier 322 is connected to the output terminal of the first detection circuit 31 and is connected to the first detection signal Va, a negative input terminal of the operational amplifier 322 is connected to the output terminal of the second detection circuit 33 and is connected to the second detection signal Vb, and an output terminal provides a comparison signal Vc; the slave COT control unit 321 is connected between the operational amplifier 322 and the slave logic control unit 21, and is configured to generate the on control signal Ton1 according to the comparison signal Vc under the control of the second switch control signal GN2 (or GP 2).

Fig. 5 shows a schematic circuit block diagram of a slave COT control unit in the two-phase DC-DC converter shown in fig. 4, and fig. 6 shows a schematic circuit block diagram of a slave logic control unit in the two-phase DC-DC converter shown in fig. 4.

Further, referring to fig. 5, in the present embodiment, the slave COT control unit 321 includes: an input stage 3211, a control stage 3212, and an output stage 3213,

the input stage 3211 includes a fifth transistor M5 and a sixth transistor M6 connected in series between the power supply terminal and the ground, a fifth connection node C between the control terminal of the fifth transistor M5 and the control terminal of the sixth transistor M6 is connected to the comparison signal Vc, and a connection node between the fifth transistor M5 and the sixth transistor M6 provides a detection voltage Vd;

the output stage 3213 includes a first current source I1 and a third capacitor C3 connected in series between a power supply terminal and ground, and a first comparator Comp1 connected between a sixth connection node D between the first current source I1 and the third capacitor C3 and the slave logic control unit 21, wherein a non-inverting input terminal of the first comparator Comp1 is connected to the sixth connection node D, the sixth connection node D is connected to a connection node between the fifth transistor M5 and the sixth transistor M6 to receive the detection voltage Vd, an inverting input terminal thereof is connected to a preset first reference voltage Vref1, and an output terminal thereof is used as an output terminal of the slave COT control unit 321 to provide the turn-on control signal Ton 1;

the control stage 3212 includes a seventh transistor M7, the seventh transistor M7 is connected in parallel to two ends of the third capacitor C3, and a control terminal of the seventh transistor M7 is connected to the slave logic control unit 21 and receives the second control signal GP 2.

Further, referring to fig. 6, in the present embodiment, the slave logic control unit 21 includes: a second comparator Comp2, nor gate 2101 and inverter IN1,

the non-inverting input terminal of the second comparator Comp2 is connected to the feedback voltage Vfb, and the inverting input terminal is connected to a preset second reference voltage Vref 2;

the input terminal of the nor gate 2101 is connected to the output terminal of the second comparator Comp2 and the output terminal of the slave COT control unit 321;

the input terminal of the inverter IN1 is connected to the output terminal of the nor gate 2101 for providing the second switch control signal GP 2.

Further, in this embodiment, the fifth transistor is a P-type MOS transistor, and any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the sixth transistor M6 and the seventh transistor M7 is an N-type MOS transistor.

Further, in the two-phase DC-DC converter 300 provided in the present embodiment, the aforementioned main-circuit converter 10, the auxiliary-circuit converter 20 and the aforementioned control module 30 are integrated on the same chip, as shown in fig. 8. The inner sides of the first connection node pin SWA, the second connection node pin SWB, the input pin Vin, and the ground pin GND are respectively connected to corresponding nodes of the circuit of the two-phase DC-DC converter 300, and the outer sides of the first connection node pin SWA and the second connection node pin SWB are connected to a peripheral circuit including an energy storage element to provide an output voltage Vout. Specifically, the peripheral circuits connected to the output end on the first connection node pin SWA and the second connection node pin SWB refer to the circuit structures in fig. 1 and fig. 2, which are not described herein again.

Further, the energy storage element is an inductor or a combination circuit of an inductor and a capacitor.

In the two-phase DC-DC converter 300 provided in this embodiment, in the first detection circuit 31, the current flowing through the first connection node SWA (i.e. the main circuit inductor current) is mirrored to the branch where the second transistor M2 and the first capacitor C1 are located by the aforementioned first pulse voltage, the sensed current is converted into the voltage detection signal Va by the network formed by the first resistor R1 and the first capacitor C1 and is provided to the positive input terminal of the operational amplifier 322, in the second detection circuit 33, the current flowing through the second connection node SWB (i.e. the sub circuit inductor current) is mirrored to the branch where the fourth transistor M4 and the second capacitor C2 are located by the aforementioned second pulse voltage, the sensed current is converted into the voltage detection signal Vb by the network formed by the second resistor R2 and the second capacitor C2 and is provided to the negative input terminal of the operational amplifier 322, the operational amplifier 322 generates a comparison signal Vc by comparing and amplifying the two detection signals, and the comparison signal Vc compensates a part of the high level time (the off time of the third switch Q3) of the on control signal Ton1 provided from the loop COT control unit 321, and the on control signal Ton1 is used for regulating the on duty ratio of the second switch control signal GP2 provided from the loop logic control unit 21.

Specifically, the comparison signal Vc output by the operational amplifier 322 is controlled by the slave COT control unit 321 to control the fifth transistor M5 and the sixth transistor M6, and the seventh transistor M7 in the control stage 3212 controls the charging and discharging of the third capacitor C3 by the first current source I1 under the control of the second switch control signal GP2, so as to increase or decrease the current magnitude actually charging the third capacitor C3 by the first current source I1 in the on-phase of the third switch Q3, so as to change the setup time of the detection voltage (second detection signal Vd), and further change the duty ratio of the on-control signal Ton1, thereby prolonging or shortening the off-time of the third switch Q3. For example, when the second detection signal Vb converted from the current (inductor current) sensed by the second switch node SWB is greater than the first detection signal Va, the comparison signal Vc output by the operational amplifier 322 decreases the low level time of the turn-on control signal Ton1 (for example, the high level time of the turn-on control signal Ton1 is used to maintain the off state of the third switch tube Q3, and the low level time of the turn-on control signal Ton1 is used to maintain the on state of the third switch tube Q3), and then the low level time of the second switch control signal GP2 decreases, and the corresponding adjustment results refer to the timing shown in fig. 7, where D1 in SWA1 and D638 in SWB 68692 are the on duty ratios of the first switch tube Q1 and the third switch tube Q4642 before adjustment, and D3 in SWA2 and D4 in SWB2 are the on duty ratios of the first switch tube Q1 and the third switch tube Q3 after adjustment, where D3548, D3548 and D4D 3 are greater than D4.

In the slave logic control unit 21, the second switch control signal GP2 (or GN2) is obtained by the logical (nor) operation of the pulse signal output by the second comparator Comp2 and the conduction control signal Ton1, and the duty ratio of the second switch control signal GP2 (or GN2) determines the conduction time of the third switching tube Q3, in this embodiment, the constraint calibration of the conduction time of the third switching tube Q3 in the slave converter 20 is performed by using the comparison result of the operational amplifier 322, so that the average value of the inductor current in the slave converter 20 and the average value of the inductor current in the master converter 10 are balanced, and the output is stable.

Further, the duty ratio of the second switch control signal in the slave converter 20 changes, and accordingly, the master logic control unit 11 automatically adjusts according to the change of the output feedback, thereby further ensuring that the output is unchanged.

In summary, the two-phase DC-DC converter 300 according to the embodiment of the present disclosure includes a main circuit converter 10, the main circuit converter 10 providing a first pulse voltage at a first connection node SWA by controlling the conduction states of the switching transistors (Q1 and Q2) located therein; a slave converter 20, the slave converter 20 providing a second pulse voltage at a second connection node SWB by controlling the conductive state of the switching tubes (Q3 and Q4) therein, and a control module 30, the control module 30 comprising: the inverter comprises a first detection circuit 31 for generating a first detection signal Va according to a first pulse voltage, a second detection circuit 33 for generating a second detection signal Vb according to a second pulse voltage, and a control circuit 32, wherein the control circuit 32 adjusts the duty ratio of a second switch control signal GP2 (or GN2) for controlling switch tubes (Q3 and Q4) in a slave inverter 20 according to a conduction control signal Ton1 generated by comparing the first detection signal Va with the second detection signal Vb so as to equalize the average value of the inductor currents of the master inverter 10 and the slave inverter 20. The two-phase DC-DC converter 300 realizes balancing the inductor current of the main circuit and the slave circuit by sensing that two paths (average value of the inductor current) of detection signals (Va and Vb) on the main circuit and the slave circuit are not equal and adjusting the duty ratio (i.e., the on-time of the third switching tube Q3) of the second switching control signal GP2 (or GN2) in the slave circuit converter 20 by using the comparison result Vc of the two paths of detection signals, so that the inductor current ripple can be suppressed when the load changes, and the stability of the output of the two-phase DC-DC converter 300 is improved.

It should be noted that in the description of the present disclosure, it is to be understood that the terms "upper", "lower", "inner", and the like, indicate orientation or positional relationship, are only for convenience in describing the present disclosure and simplifying the description, but do not indicate or imply that the referenced components or elements must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the present disclosure.

Further, in this document, the contained terms "include", "contain" or any other variation thereof are intended to cover a non-exclusive inclusion, so that a process, a method, an article or an apparatus including a series of elements includes not only those elements but also other elements not explicitly listed or inherent to such process, method, article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present disclosure, and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention as herein taught are within the scope of the present disclosure.

Claims

1. A multiphase DC-DC converter comprising:

the at least one slave converter respectively comprises a slave logic control unit and a third switching tube and a fourth switching tube which are connected between the input end and the output end of the multiphase DC-DC converter, the slave logic control unit controls the conduction states of the third switching tube and the fourth switching tube through a second switching control signal, and a second pulse voltage is provided at a second connection node between the third switching tube and the fourth switching tube;

a control module for generating a conduction control signal of the slave logic control unit according to the first pulse voltage and the second pulse voltage,

wherein the control module comprises:

the first detection circuit is correspondingly connected with the first connecting node and generates a first detection signal according to the first pulse voltage;

a control circuit, which includes an operational amplifier and a slave COT control unit, wherein a positive input terminal of the operational amplifier is connected to an output terminal of the first detection circuit, and the operational amplifier is connected to the first detection signal, a negative input terminal of the operational amplifier is connected to an output terminal of the second detection circuit, and the second detection signal is connected, and the output terminal provides a comparison signal, the slave COT control unit is connected between the operational amplifier and the slave logic control unit, and is configured to generate a detection voltage according to the comparison signal under the control of the second switching control signal, and adjust a duty ratio of the second switching control signal according to a conduction control signal generated by the detection voltage, so as to equalize average values of the inductive currents of the master converter and the slave converter, and the first detection signal is used to represent an average value of the inductive current of the master converter, the second detection signal is used for representing the inductance current average value of the at least one slave circuit converter,

the slave COT control unit is further used for adjusting the establishment time of the detection voltage according to the comparison signal, and further changing the duty ratio of the conduction control signal.

2. The multiphase DC-DC converter of claim 1, wherein the first detection circuit comprises:

a first transistor and a first resistor connected in series between the first connection node and ground, wherein a control end of the first transistor and a control end of the second switching tube are connected with the main circuit logic control unit in common;

and the second transistor and the first capacitor are connected between a connection node of the first transistor and the first resistor and the ground in series, a control end of the second transistor is connected with a control end of the first transistor, and a third connection node between the second transistor and the first capacitor is used as an output end of the first detection circuit and used for providing the first detection signal.

3. The multiphase DC-DC converter of claim 2, wherein said at least one second detection circuit comprises:

a third transistor and a second resistor which are connected between the second connection node and the ground in series, wherein a control end of the third transistor and a control end of the fourth switch tube are connected with the slave logic control unit together;

and a fourth transistor and a second capacitor connected in series between a connection node of the third transistor and the second resistor and ground, a control terminal of the fourth transistor being connected to a control terminal of the third transistor, and a fourth connection node between the fourth transistor and the second capacitor being an output terminal of the second detection circuit for providing the second detection signal.

4. The multiphase DC-DC converter of claim 1, wherein the slave COT control unit comprises:

an input stage, including a fifth transistor and a sixth transistor connected in series between a power supply terminal and ground, a fifth connection node between a control terminal of the fifth transistor and a control terminal of the sixth transistor being connected to the comparison signal, a connection node of the fifth transistor and the sixth transistor providing the detection voltage;

the output stage comprises a first current source and a third capacitor which are connected between a power supply end and the ground in series, and a first comparator connected to a sixth connection node between the first current source and the third capacitor, wherein the non-inverting input end of the first comparator is connected to the sixth connection node, the sixth connection node is connected to the connection node between the fifth transistor and the sixth transistor so as to be connected to the detection voltage, the inverting input end of the first comparator is connected to a preset first reference voltage, and the output end of the first comparator is used as the output end of the slave COT control unit to provide the conduction control signal;

and the control stage comprises a seventh transistor, the seventh transistor is connected in parallel with two ends of the third capacitor, and the control end of the seventh transistor is connected with the slave logic control unit and is connected with the second switch control signal.

5. The multiphase DC-DC converter of claim 4, wherein the slave logic control unit comprises:

the input end of the NOR gate is respectively connected with the output end of the second comparator and the output end of the slave COT control unit;

and the input end of the phase inverter is connected with the output end of the NOR gate and is used for providing the second switch control signal.

6. The multiphase DC-DC converter of claim 5 wherein any one of the first, third and fifth transistors is a P-type metal oxide semiconductor field effect transistor.

7. The multiphase DC-DC converter of claim 6 wherein any one of the second, fourth, first, second, third, fourth, sixth and seventh transistors is an N-type metal oxide semiconductor field effect transistor.

8. The multiphase DC-DC converter of claim 7 wherein the main circuit converter, the slave circuit converter and the control module are integrated on the same chip, and the first connection node and the second connection node are each connected to a peripheral circuit including an energy storage element through a corresponding pin of the chip to provide an output voltage.