CN113157035A - Voltage stabilization source device with adaptive static power consumption and driving capability - Google Patents
Voltage stabilization source device with adaptive static power consumption and driving capability Download PDFInfo
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- CN113157035A CN113157035A CN202110268733.3A CN202110268733A CN113157035A CN 113157035 A CN113157035 A CN 113157035A CN 202110268733 A CN202110268733 A CN 202110268733A CN 113157035 A CN113157035 A CN 113157035A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The invention provides a voltage stabilizing source device with adaptive static power consumption and driving capability, which can improve the driving capability in heavy-load application and effectively reduce the static power consumption of an LDO (low dropout regulator) in light load or no load. Gate V of power tube PM0 of LDOGATEA sampling pipe PM1 grid is connected, so that a sampling current Isense and a reference current I can be obtainedREF0Comparing to obtain a mode control signal VCTRLSubstrate voltage V to power tubebulkThe configuration is carried out, so that the substrate voltage of the PM0 is adjusted, and the PM0 threshold value is reduced and the driving capability is improved when a large load is applied; and when the load is light or idle, the PM0 threshold value is increased, and the static power consumption of the LDO is reduced.
Description
Technical Field
The invention belongs to the field of integrated circuit design, and relates to a voltage stabilization source device with self-adaptive static power consumption and driving capability. The device can improve the driving capability when LDO heavy load is used, effectively reduces the static consumption of LDO when light load or no load.
Background
At present, in the low-power consumption field, higher requirements are put forward on an LDO chip: the requirement is lower static power consumption when light load and no load, and the requirement has bigger driving capability when heavy load. The low-power consumption and large-driving scheme of the invention effectively improves the driving capability of the LDO circuit while reducing the static power consumption of light load and no load under the condition of not changing the size of the power tube.
Disclosure of Invention
The invention provides a voltage stabilizing source device with adaptive static power consumption and driving capability, which can improve the driving capability when being applied under a large load and effectively reduce the static power consumption of an LDO (low dropout regulator) under a light load or no load.
The invention is realized by the following scheme: on the basis of the traditional LDO, a working mode judging circuit and a substrate potential control circuit are added, wherein:
the working mode judging circuit is composed of a current sampling comparison circuit and comprises a load current sampling pipe PM1, the source end of the load current sampling pipe PM1 is connected with an input power supply VCC, and the grid electrode of the load current sampling pipe PM1 is connected with the grid electrode V of a PMOS power supply pipe PM0GATEThe drain terminal is connected with the reference current IREF0, and the output of the working mode judging circuit is VCTRL；
The substrate potential control circuit respectively outputs V with the working mode judging circuitCTRLSubstrate V of power output VOUT and power supply pipe PM0BULKThe method comprises the following steps:
mode identification signal VCTRLControlling a switching sequence of switch arrays S1, S2, S3, S4, wherein:
the switch S1 is connected with the switch S2, the input voltage VCC and the energy storage capacitor C0;
a switch S2, a switch S1, an energy storage capacitor C0, an output filter capacitor C1 and an output voltage VBULKConnecting;
the switch S3 is connected with the switch S4, the ground GND and the energy storage capacitor C0;
the switch S4 is connected with the switch S3, the energy storage capacitor C0 and the LDO output voltage VOUT;
drawings
In order to describe the embodiments in detail, the drawings are given.
FIG. 1 is a schematic diagram of a low power consumption and large drive LDO design
FIG. 2 is a schematic diagram of a substrate potential control circuit
Detailed Description
In fig. 1, VCC is an input working power supply, VREF is a reference voltage, PM0 is a power transistor, R1 and R2 are sampling resistors, and EA is an error amplifier, thereby forming a conventional LDO module. On the basis of the traditional LDO module, a working mode judging circuit and a substrate potential control circuit are added, wherein:
the current comparator structure formed by PM1 and IREF0 is used as an operating mode judging circuit, and the grid electrode V of the sampling tube PM1 and the grid electrode V of the power tube PM0GATEIn turn, the source of PM1 is connected to the source of power transistor PM0, the substrate connected to input supply VCC, PM1 and the substrate of PM 0. Sampling current I of sampling pipe PM1SENSEAnd a reference current IREF0By way of comparison, taking the figure as an example, when the current flowing through PM0 is large, ISENSEIs greater than IREF0Time, work mode identification signal V CTRL1, the power supply system is in a heavy load mode; when the current through PM0 is small or approximately 0, ISENSEIs less than IREF0Time, work mode identification signal VCTRLAnd (5) when the load is 0, the power supply system is in a light load mode.
Fig. 2 is a substrate potential control module, in which:
the switch S1 is connected with the switch S2, the input voltage VCC and the energy storage capacitor C0;
a switch S2, a switch S1, an energy storage capacitor C0, an output filter capacitor C1 and an output voltage VBULKConnecting;
the switch S3 is connected with the switch S4, the ground GND and the energy storage capacitor C0;
the switch S4 is connected to the switch S3, the storage capacitor C0 and the LDO output voltage VOUT.
Taking the power transistor as PMOS as an example, the threshold value formula is as follows:
when V isCTRLWhen the light load mode is 0, the charge pump switches S1 and S3 in the substrate potential circuit are controlled to be closed simultaneously, S2 and S4 are opened, and after one clock period is waited, S1 and S3 are opened, and S2 and S4 are closedThen, this operation is repeated for the next clock cycle, at which time the substrate voltage V of the conductive tube PM0BULKThe voltage rises to VCC + VOUT, at which time VBSThe voltage is raised to VOUT to make the threshold | VTHPThe I is increased, so that the electric leakage under light load or no load can be effectively reduced;
when V isCTRLWhen the load mode is 1, the charge pump switches S1 and S4 in the substrate potential circuit are controlled to be closed simultaneously, S2 and S3 are opened, S1 and S4 are opened after waiting for one clock cycle, S2 and S3 are closed, and the operation is repeated in the next clock cycle, wherein the substrate voltage V of the conductive tube PM0BULKThe voltage drops to VCC-VOUT, at which time VBSThe voltage difference is-VOUT, so that the threshold value can be reduced, and the power supply capacity of the conductive tube is improved.
In an actual implementation circuit, the power transistor PM0 may use a PMOS device or an NMOS device, depending on different applications. In the description, the PMOS is taken as an example to describe and calculate the method, if the NMOS power device is used, the operation mode determination method is consistent, but since the threshold value of the NMOS device is calculated as follows,
it can be seen that the NMOS threshold variation and substrate potential voltage relationship is opposite to PMOS, requiring adjustment of the substrate potential control method. If NMOS is adopted as a power device, V needs to be increased to increase the threshold value in a light load modeBULKThe voltage is reduced to VCC-VOUT; in the heavy load mode, V needs to be lowered to lower the thresholdBULKThe voltage rises to VCC + VOUT.
According to the technical scheme, the invention realizes the following effects:
under the power tube with the same size, the substrate potential is adjusted by judging different working modes, so that the larger driving capability is realized under a heavy-load mode, and the lower static power consumption can be realized under a light-load mode.
It will be apparent to those skilled in the art that the examples herein are capable of carrying out the invention in other specific forms without departing from the spirit or essential characteristics thereof. The present examples are to be considered as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein, and any reference signs in the claims are not intended to be construed as limiting the claim concerned.
Claims (5)
1. A steady voltage source device with adaptive static power consumption and driving capability is characterized in that: a working mode judging circuit and a substrate potential control circuit are added on a traditional voltage regulator LDO circuit, wherein the working mode judging circuit is composed of a current sampling comparison circuit and comprises a load current sampling tube PM1, the source end of the load current sampling tube PM1 is connected with an input power VCC, and the grid electrode of the load current sampling tube PM1 is connected with the grid electrode V of a PMOS power supply tube PM0GATEConnected to drain terminal and reference current IREF0Connected, the output of the working mode judging circuit is a power supply mode control signal VCTRL(ii) a The substrate potential control circuit respectively outputs V with the working mode judging circuitCTRLSubstrate V of power output VOUT and power supply pipe PM0BULKAre connected.
2. The regulator apparatus according to claim 1, wherein: the working mode judging circuit obtains a sampling current I by sampling the load current of the PMOS power supply tube PM0SENSEWith a reference current IREF0Comparing to obtain a power supply mode control signal VCTRLIf I isSENSEIs greater than IREF0，VCTRL1, representing that the power supply system is in a heavy load mode; if ISENSEIs less than IREF0，VCTRL0 represents that the power supply system is in a light load mode; by setting different reference currents IREF0Different working condition requirements can be met.
3. The regulator apparatus according to claim 1, wherein: the substrate potential control circuit comprises a switch control circuit, capacitors C0, C1 and switches S1, S2, S3 and S4, wherein the switch control circuit can be operated according to the requirementsOperation mode judging signal VCTRLDifferent switch control sequences of S1, S2, S3 and S4 are given.
4. The regulator apparatus according to claim 1, wherein: the switch control circuit in the substrate potential control circuit is supplied with a power supply mode signal VCTRLTo switch the substrate potential control circuit, wherein:
when V isCTRLWhen the system is in the light load mode, the charge pump switches S1 and S3 in the substrate potential circuit are controlled to be closed simultaneously, S2 and S4 are opened, S1 and S3 are opened after waiting for one clock period, S2 and S4 are closed, and the operation is repeated in the next clock period, wherein the substrate voltage V of the conductive tube PM0BULKThe voltage is increased to VCC + VOUT, so that the threshold value can be increased, and the electric leakage in light load or no load is reduced;
when V isCTRLWhen the load mode is 1, the charge pump switches S1 and S4 in the substrate potential circuit are controlled to be closed simultaneously, S2 and S3 are opened, S1 and S4 are opened after waiting for one clock cycle, S2 and S3 are closed, and the operation is repeated in the next clock cycle, wherein the substrate voltage V of the conductive tube PM0BULKThe voltage is reduced to VCC-VOUT, so that the threshold value can be reduced, and the power supply capacity of the conductive tube is improved.
5. The regulator apparatus according to claim 1, wherein: the power supply tube PM0 is PMOS, can change NMOS, and its substrate potential selection mode is opposite to PMOS pipe, and when heavy load mode, substrate potential Vbulk is VCC + VOUT, and when light load or no-load mode, substrate potential Vbulk is VCC-VOUT.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110268733.3A CN113157035A (en) | 2021-03-12 | 2021-03-12 | Voltage stabilization source device with adaptive static power consumption and driving capability |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110268733.3A CN113157035A (en) | 2021-03-12 | 2021-03-12 | Voltage stabilization source device with adaptive static power consumption and driving capability |
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Citations (7)
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| US20010019278A1 (en) * | 2000-02-29 | 2001-09-06 | Minoru Sudo | Semiconductor integrated circuit |
| CN1828470A (en) * | 2006-02-15 | 2006-09-06 | 启攀微电子（上海）有限公司 | Circuit for enhancing driving capability of low voltage-difference linear voltage manostat |
| CN101013330A (en) * | 2006-02-01 | 2007-08-08 | 株式会社理光 | Voltage stabilizing circuit |
| US20080157741A1 (en) * | 2006-12-29 | 2008-07-03 | Infineon Technologies Ag | Circuit to improve the load step of a nMOS based voltage regulator |
| CN103294098A (en) * | 2012-02-29 | 2013-09-11 | 精工电子有限公司 | Voltage regulator |
| CN105807839A (en) * | 2015-01-21 | 2016-07-27 | 精工半导体有限公司 | Voltage regulator |
| JP2016200964A (en) * | 2015-04-09 | 2016-12-01 | 株式会社ソシオネクスト | Power supply circuit and semiconductor device |
-
2021
- 2021-03-12 CN CN202110268733.3A patent/CN113157035A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010019278A1 (en) * | 2000-02-29 | 2001-09-06 | Minoru Sudo | Semiconductor integrated circuit |
| CN101013330A (en) * | 2006-02-01 | 2007-08-08 | 株式会社理光 | Voltage stabilizing circuit |
| CN1828470A (en) * | 2006-02-15 | 2006-09-06 | 启攀微电子（上海）有限公司 | Circuit for enhancing driving capability of low voltage-difference linear voltage manostat |
| US20080157741A1 (en) * | 2006-12-29 | 2008-07-03 | Infineon Technologies Ag | Circuit to improve the load step of a nMOS based voltage regulator |
| CN103294098A (en) * | 2012-02-29 | 2013-09-11 | 精工电子有限公司 | Voltage regulator |
| CN105807839A (en) * | 2015-01-21 | 2016-07-27 | 精工半导体有限公司 | Voltage regulator |
| JP2016200964A (en) * | 2015-04-09 | 2016-12-01 | 株式会社ソシオネクスト | Power supply circuit and semiconductor device |
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