CN113141184A - Capacitive touch sensing channel - Google Patents

Capacitive touch sensing channel Download PDF

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CN113141184A
CN113141184A CN202011582006.6A CN202011582006A CN113141184A CN 113141184 A CN113141184 A CN 113141184A CN 202011582006 A CN202011582006 A CN 202011582006A CN 113141184 A CN113141184 A CN 113141184A
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integrator
coupled
signal
comparator
switch
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罗曼·奥吉尔科
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Cypress Semiconductor Corp
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/458Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/494Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems
    • H03M3/496Details of sampling arrangements or methods
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00Measuring force or stress, in general
    • G01L1/14Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
    • G01L1/142Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/458Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/466Multiplexed conversion systems
    • H03M3/468Interleaved, i.e. using multiple converters or converter parts for one channel, e.g. using Hadamard codes, pi-delta-sigma converters
    • H03M3/47Interleaved, i.e. using multiple converters or converter parts for one channel, e.g. using Hadamard codes, pi-delta-sigma converters using time-division multiplexing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/43Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/456Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a first order loop filter in the feedforward path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/458Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/462Details relating to the decimation process

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  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
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  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)
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Abstract

The present application relates to capacitive touch sensing channels. Techniques are described for capacitive touch sensing channels that include a sigma-delta modulator based capacitive sensing converter. A sigma-delta modulator comprising: a comparator; a first integrator coupled to receive an incoming signal from an input node and provide a first output signal; a second integrator coupled in parallel with the first integrator to receive the incoming signal and provide a second output signal; and switching circuitry. The switching circuitry is configured to selectively couple a first integrator between the input node and the comparator to provide a first output signal to the comparator, or to selectively couple a second integrator between the input node and the comparator to provide a second output signal to the comparator.

Description

Capacitive touch sensing channel
RELATED APPLICATIONS
This application claims the benefit of U.S. provisional application No. 62/961,893, filed on 16/1/2020, which is incorporated herein by reference in its entirety.
Technical Field
The present application relates to techniques for capacitive touch sensing channels.
Background
Touch sensors can be used to detect the presence and location of an object within the touch sensitive area of the touch sensor or the proximity of an object within the touch sensitive area of the touch sensor. For example, touch sensing circuitry can detect the presence and location of a touch object in proximity to a touch sensor arranged in conjunction with a display screen. There are many different types of touch sensors. Types of touch sensors can include resistive touch sensors, surface acoustic wave touch sensors, capacitive touch sensors, inductive touch sensing, and the like. Different touch sensors can detect different types of objects.
Most touch sensing applications require high sensitivity to support thick overlays on the touch sensor, to operate the touch sensor using gloves, or to hover over long distances under noisy conditions, such as caused by nearby Liquid Crystal Displays (LCDs), inductive load switching, radio emissions, and the like. Furthermore, the emission (emission) of the touch sensor is limited, which limits the excitation energy of the touch sensor for achieving a sufficient signal-to-noise ratio (SNR).
Drawings
The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings.
FIG. 1 is a functional diagram of a capacitive touch sensing channel based on a cumulative first order Sigma-Delta converter according to one embodiment.
Fig. 2A-2B are waveform diagrams of a cumulative first order sigma-delta converter according to one embodiment.
FIG. 3 is a waveform diagram of a noise transfer function according to one embodiment.
Fig. 4A-4C are block diagrams of a cumulative first order sigma-delta converter according to one embodiment.
Fig. 4D is a schematic diagram of a current-to-current converter according to one embodiment.
Fig. 4E is a schematic diagram of a current-to-current converter with a low pass filter according to one embodiment.
FIG. 5 is a touch system with an electrode array and a plurality of capacitive touch sense receive channels according to one embodiment.
FIG. 6 is a touch system with an electrode array, a plurality of capacitive touch sensing channels, and a processing device according to one embodiment.
Fig. 7 is a method of operating a sigma-delta converter according to an embodiment.
Detailed Description
The following description sets forth numerous specific details such as examples of specific systems, components, methods, etc. in order to provide a good understanding of various embodiments of the techniques described herein for capacitive touch sensing channels that include a sigma-delta modulator-based capacitive sensing converter whose structure is modified to obtain the cumulative nature of the sensing results to give a sensing resolution proportional to the integration duration. As described above, most touch sensing applications require high sensitivity. As described herein, embodiments can provide increased immunity to external noise by using a sinusoid demodulation window in conjunction with sinusoid excitation and increase sensing resolution by increasing integration duration. It will be apparent, however, to one skilled in the art that at least some embodiments may be practiced without these specific details. In other instances, well-known components, elements, or methods have not been described in detail or presented in simple block diagram format in order to avoid unnecessarily obscuring the techniques described herein. Accordingly, the specific details set forth below are merely exemplary. Particular implementations may vary from these exemplary details and still be considered within the spirit and scope of the present invention.
Various implementations of techniques for capacitive sensing are described herein. These embodiments may provide a sensing unit (also referred to as a touch sensor) that may be used in conjunction with capacitive sensing circuitry to detect different types of objects. In one embodiment, the sensing unit may be used for mutual capacitance sensing or self capacitance sensing. In one embodiment, capacitive sensing circuitry (also referred to herein as "capacitive sensing circuitry" or "sensing circuitry") may use a capacitive touch sensing channel in a manner in which it can measure the capacitance of a sensing element (e.g., a single electrode relative to ground potential or a single electrode between a Receive (RX) electrode and a Transmit (TX) electrode), as described in more detail herein. The sensing circuitry may also be configured to detect the inductance of the sensing element, for example using inductive sensing techniques to detect ferrous and non-ferrous metal objects in proximity to the sensing cell. Examples of devices that may use capacitive sensing may include, but are not limited to, automobiles, household appliances (e.g., refrigerators, washing machines, etc.), personal computers (e.g., laptop computers, notebook computers, etc.), mobile computing devices (e.g., tablets, tablet computers, electronic reader devices, etc.), mobile communication devices (e.g., smart phones, mobile phones, personal digital assistants, messaging devices, palm-top personal computers, etc.), connecting and charging devices (e.g., hubs, docking stations, adapters, chargers, etc.), audio/video/data recording and/or playing devices (e.g., cameras, recorders, handheld scanners, monitors, etc.), wearable devices, and other similar electronic devices.
Reference in the description to "an embodiment," "one embodiment," "an example embodiment," "some embodiments," and "various embodiments" means that a particular feature, structure, step, operation, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Moreover, the appearances of the phrases "an embodiment," "one embodiment," "an example embodiment," "some embodiments," and "various embodiments" in various places in the description are not necessarily all referring to the same embodiment.
The description includes reference to the accompanying drawings, which form a part hereof. The figures show diagrams in accordance with exemplary embodiments. These embodiments, which may also be referred to herein as "examples," are described in sufficient detail to enable those skilled in the art to practice the embodiments of the claimed subject matter described herein. The embodiments may be combined, other embodiments may be utilized, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter. It should be appreciated that the embodiments described herein are not intended to limit the scope of the subject matter, but rather to enable one skilled in the art to practice, perform, and/or use the subject matter.
FIG. 1 is a functional diagram of a capacitive touch sensing channel 100 based on a cumulative first order sigma-delta converter, according to one embodiment. The capacitive touch sensing channel 100 includes a sigma-delta modulator 104 coupled to an input node 103. The sigma-delta modulator 104 may be a first order sigma-delta modulator. The input node 103 is coupled to the touch sensor 102. In one embodiment, the touch sensor 102 includes Transmit (TX) and Receive (RX) electrodes, as shown in the equivalent circuit in fig. 1. In another embodiment, the touch sensor 102 includes a single electrode. Alternatively, other types of touch sensors may be used. The output 105 of the sigma-delta modulator 104 is coupled to a counter 106, and the counter 106 is coupled to a demodulator 108. In one embodiment, the waveform generator 110 generates an excitation signal 107, and the excitation signal 107 is applied to the touch sensor 102, e.g., TX electrodes. The demodulator 108 is also configured to receive the excitation signal 107 to demodulate the output 109 of the counter 106. An accumulator 112 is coupled to the output 111 of the demodulator 108, and a decimator 114 is coupled to the output 113 of the accumulator 112. The decimator 114 outputs a digital result 115, such as a digital count value, that represents the capacitance of the touch sensor 102.
As shown in fig. 1, the sigma-delta modulator 104 includes a comparator 120, a first integrator 122, a second integrator 124, and switching circuitry 126. The first integrator 122 is coupled to the comparator 120 and is configured to receive the incoming signal from the input node 103 and a reference voltage and provide a first output signal. The second integrator 124 is coupled to the comparator 120 in parallel with the first integrator 122. The second integrator 124 is configured to receive an incoming signal at the input node 103 and provide a second output signal. Switching circuitry 126 is configured to selectively couple first integrator 122 between input node 103 and comparator 120 to provide a first output signal to comparator 120, or to selectively couple second integrator 124 between input node 103 and comparator 120 to provide a second output signal to comparator 120.
During operation, the incoming signal enters one of the first integrator 122 or the second integrator 124 in the form of a current and is balanced by a feedback loop formed by the single-bit digital converter output (output 105) from the comparator 120. In one embodiment, the feedback is represented as-G, where G is represented as follows:
Figure BDA0002865312870000041
the input signal balancing process forms a bit stream on output 105, which is input into counter 106. The counter 106 is an integrator in digital form. The counter 106 reflects the digitized excitation signal scaled in proportion to the capacitance of the touch sensor 102. The operation of the counter 106 may be represented as follows:
Figure BDA0002865312870000042
demodulator 108 multiplies the counter output with a digitized reference signal 117 that is coherent with excitation signal 107. Accumulator 112 integrates the demodulated digitized signal at output 111 to obtain the amplitude of the sensed signal at output 113. The decimator 114 forms a digital result 115 that is sensed during an integer number of excitation signal periods (Ntx). The components of the capacitive touch sensing channel 100 form an additive first order sigma-delta converter that converts the capacitance of the touch sensor 102 to a digital value representing the capacitance. As described in more detail below, accumulating a first order sigma-delta converter gives the property of quantization error accumulation in case samples are accumulated during several cycles of the excitation signal 107.
It should be noted that the channel transfer function of the capacitive touch sense channels 100 is linear with respect to the linear sweep of the sensed capacitance of the touch sensor 102. In conventional sigma-deltaIn the converter, if the conversion lasts for a long time, the quantization error of the sensed signal amplitude does not change, and the dithering (dithering) causes the quantization error to decrease. That is, the capacitive touch sensing channel 100 measures signal amplitude. Signal shape distortion can be reduced by additional filtering, but in this way the resolution of the signal amplitude does not change, since the signal amplitude remains constant. One transition of the excitation period (also referred to as the Tx period) defines the quantization step value due to the symmetry of the positive half-cycle shape with the negative half-cycle shape. The above shape gives the quantization error at the end of each half period the same amplitude but different polarity. Finally, the quantization error at the end of the excitation signal period is equal to zero. Each subsequent conversion must be considered an independent conversion that is performed without history from previous conversions. The accumulation of the transformed samples during subsequent excitation signal periods narrows the channel passband without increasing resolution. Dithering is required so that the result of each cycle transition has a random portion greater than one balance step. In this case, accumulation of subsequent Ntx periods of the excitation signal increases the resolution by sqrt (Ntx)
Figure BDA0002865312870000051
And (4) doubling. In this solution it is not possible to implement an anti-aliasing filter to prevent saturation caused by high frequency noise. The channel frequency response may be affected by external noise, and if the integration time (decimation factor) increases, the channel passband narrows. For example, when a high frequency noise signal is injected into the channel, the injected noise may generate a current at the input of the sigma-delta modulator that is greater than the balance current. This can significantly distort the transition if impulse noise (e.g., LCD noise) affects the touch sensor. Saturation can be prevented if the anti-aliasing filter reduces the amplitude of the noise high frequency components. However, conventional sigma-delta converters cannot implement anti-aliasing filters. Conventional solutions use higher order modulators, which may also saturate. Saturation occurs when the signal variation during the sampling period is greater than the equilibrium signal. Conventional solutions require conversion of the sensor current to a voltage followed by a filter. Higher order sigma-delta modulation may be usedThe system is made to achieve sufficient overload capability but the channel resolution is reduced proportionately.
In contrast, capacitive touch sensing channel 100 is based on sigma-delta modulator 104, integrates the bit stream of sigma-delta modulator 104 by counter 106, coherently demodulates the bit stream by multiplying it with sinusoidal data that is coherent with excitation signal 107, and finally accumulates the bit stream by accumulator 112. The sigma-delta modulator 104 comprises an additional integrator, i.e. a second integrator 124, the second integrator 124 being connected in parallel with the main integrator, i.e. the first integrator 122. The integrator is connected to the incoming signal and the comparator 120 using switching circuitry 126. For example, the first switch S1 and the second switch S2 connect the incoming signal to the comparator 120 through two branches. The switches S1 and S2 operate in synchronization to form two branches from the touch sensor 102 to the comparator 120. One branch passes through the first integrator 122 when the stimulus signal 107 rises and the other branch passes through the second integrator 124 when the stimulus signal 107 falls. The balanced feedback loop is connected to the active branch through a third switch S3 operating in synchronism with switches S1 and S2.
In this way, the integrator stores the quantization error formed at the end of its active phase, and each subsequent active phase starts under the quantization conditions of the preceding active phase of the other integrator. This gives the property of quantization error accumulation in case samples are accumulated during several periods of the excitation signal 107, as shown in fig. 2A to 2B.
In another embodiment, the capacitive touch sensing channel 100 can demodulate the bitstream of the sigma-delta modulator by multiplying the bitstream with cosine data. In this case, the first digital integrator 106 may be removed. The cosine data may be multiplied by +1 and-1. The multiplication may be replaced by adding or subtracting sinusoidal data. This approach may provide the advantage of a wider (e.g., twice as wide as the channel passband) channel baseband.
Fig. 2A-2B are waveform diagrams 200 of a cumulative first order sigma-delta converter, according to one embodiment. In waveform diagram 200, the excitation signal 202 (labeled "Vtx") is a rising and falling sine wave. The sine table 208 is sine data that is coherent with the excitation signal 202. When the excitation signal 202 rises, the switch control signal 204 (labeled "θ a") is in a first state (e.g., a low state or logic 0). When the excitation signal 202 falls, the switch control signal 204 is in a second state (e.g., a high state or logic 1). The waveform diagram 200 illustrates the output current 210 of the attenuator, for example, as shown and described below with respect to FIG. 4A. Waveform diagram 200 also shows a balancing current signal 206 (labeled "Ibal") that increases and decreases at a frequency that is obtained by the period of the excitation signal 202. The balance current signal 206 represents the current used to balance the integrator based on the feedback loop formed by the single bit digital converter output (output 105) from the comparator 120. Waveform diagram 200 shows a signal 212 on the integrator, including a quantization error 214 of the sensed amplitude. As described above, the signaling in fig. 2A-2B allows an integrator in a first order sigma-delta converter to store quantization errors formed at the end of its active phase and each subsequent active phase to start under the quantization error condition of the preceding active phase of the integrator, thereby causing quantization errors to accumulate. The waveform diagram 200 also shows the output 216 of the counter and the output 218 of the demodulator. Fig. 2B shows an enlarged view of the excitation signal 202, the switch control signal 204, and the balance current signal 206. The signaling in fig. 2A-2B allows the capacitive sensing channels to be narrow-band and have a resolution proportional to the duration of the sensing period. Operation of the capacitive touch sensing channel 100 based on a cumulative first order sigma-delta converter may achieve improved immunity to external noise by using a sinusoidal demodulation window in combination with sinusoidal stimulation. While conventional attempts do not allow for increased resolution by increasing the sensing period (also referred to as the sensing duration), the capacitive touch sensing channel 100 allows for increased resolution by increasing the sensing period. The capacitive touch sensing channel 100 can incorporate the following characteristics of a conventional capacitive touch sensing channel: conventional capacitive touch sensing channels use sinusoidal excitation and dual slope charge balance converters based on charge transfer methods. However, the capacitive touch-sensing channel 100 replaces the dual slope charge-balance converter with a summation sigma-delta modulator as described herein.
Fig. 3 is a waveform diagram 300 of a noise transfer function according to one embodiment. Waveform diagram 300 shows the noise source of a sinusoidal synchronous demodulator 302 and the noise source of a rectangular windowed synchronous demodulator 304. For sinusoidal excitation, the sinusoidal shape of the excitation signal produces a single tone emission (tone emission) that can be placed in a frequency range that is not strongly limiting to the emission. To have a low harmonic content, a complex synthesizer may be used. The single lobe noise transfer function results in better noise immunity and better SNR in the high sensitivity mode. The Fast Fourier Transform (FFT) of the channel samples enables the ability to find a silent band for frequency hopping, resulting in reliable operation in noisy environments. Demodulation of the channel samples may be accomplished by multiplying the samples by the sine value in digital form. The channel samples may be multiplied by the sine value in digital form using a processing element. Alternatively, existing channel engines may be modified to add channel samples. The channel engine may be firmware executed by a processing device coupled to the demodulator.
The following description is directed to implementations of the functional operations described above with respect to fig. 1 and 2A and 2B. For example, the capacitive touch sensing channel 100 can include two integrators that are both built using current-to-current converters, as shown by the cumulative first order sigma-delta converters of fig. 4A-4C.
Fig. 4A-4C are block diagrams of a cumulative first order sigma-delta converter 400 (hereinafter "converter 400") according to one embodiment. For convenience of description, the converter 400 will be hereinafter referred to as the converter 400. Converter 400 is an analog-to-digital converter (ADC) that converts current or charge from the touch sensor to a digital value. The ADC is a first order converter in that it has a first order sigma-delta modulator 402, the first order sigma-delta modulator 402 measuring feedback representing quantization error for a continuous balanced integrator. For ease of description, the first order sigma-delta modulator 402 will be referred to below as the sigma-delta modulator 402. The counter 404 is used to store a digital representation of the input signal. The outputs of the counters 404 are multiplied and accumulated by a multiply-accumulate circuit (MAC)406, which is illustrated and described below with respect to fig. 4C.
In one embodiment, the sigma-delta modulator 402 may comprise two integrators each comprising an operational amplifier and an integrator capacitor. Alternatively, the sigma-delta modulator 402 may include an attenuator 408 as shown in fig. 4A, the attenuator 408 enabling the output current to be kept within a suitable range, thereby enabling the use of a unity-value balancing source.
As shown, the sigma-delta modulator 402 includes an attenuator 408 coupled to the input node 401 and the bias voltage 403. The attenuator 408 includes an amplifier (e.g., transimpedance operational amplifier 410) that is common to the first integrator and the second integrator. The sigma-delta modulator 402 further comprises a first integrator capacitor 412 coupled to the first node 405 and a second integrator capacitor 414 coupled to the second node 407. The sigma-delta modulator 402 further comprises a first current source 416, a second current source 418, a comparator 420, and a flip-flop 422 coupled to the output of the comparator 420 and to the input of the counter 404. The output of the flip-flop 422 is coupled to a portion of a balanced feedback loop 424 of the switching circuitry. As shown in fig. 4A, the switching circuitry includes: a first switch 426 coupled to the attenuator 408, the first node 405, and the second node 407; a second switch 428 coupled to the comparator 420, the first node 405, and the second node 407; a third switch 430 coupled to the third node 409, the first node 405, and the second node 407; a fourth switch 432 coupled to the third node 409, the first current source 416 and the second current source 418. The first switch 426, the second switch 428, and the third switch 430 are configured to operate synchronously. These switches may be controlled by a first control signal 411 (labeled "θ Acc") that depends on the excitation signal 413. When the stimulus signal 413 rises, the first control signal 411 is low, causing the first switch 426 and the second switch 428 to couple the incoming signal to the comparator 420 via the first node 405 coupled to the first integrator capacitor 412. When the stimulus signal 413 falls, the first control signal 411 is high, causing the first switch 426 and the second switch 428 to couple the incoming signal to the comparator 420 via the second node 407 coupled to the second integrator capacitor 414. The third switch 430 is controlled by the first control signal 411 to connect the balanced feedback loop 424 to the first node 405 when the stimulus signal 413 rises and to connect the balanced feedback loop 424 to the second node 407 when the stimulus signal 413 falls. The fourth switch 432 is controlled by the output of the flip-flop 422. A fourth switch 432 couples either the first current source 416 or the second current source 418 to the third node 409 to balance the integrator. The balanced feedback loop 424 includes a balanced current signal 206 that controls the current sources to balance the incoming signal. Comparator 420 compares the incoming signal, including the balanced feedback, to voltage reference 415. The flip-flop 422 is clocked using a clock signal 429 (labeled "Fmod"). The counter 404 uses the same clock signal. As described above, the balanced current signal fed back for controlling the fourth switch 432 represents a current for balancing the integrator based on the balanced feedback loop 424 formed by the single-bit digital converter output 417, which represents the output from the comparator 420 sampled by the flip-flop 422. The signaling of the balanced feedback loop 424 allows the integrator in the sigma-delta modulator 402 to store the quantization error formed at the end of its active phase and allows each subsequent active phase to begin under the quantization error condition of the previous active phase of the integrator, causing the quantization errors to accumulate. Counter 404 counts the single-bit digital converter output 417 over a sensing period and outputs a digital count value 419 to MAC 406 as described below with respect to fig. 4C.
In one embodiment, the excitation signal 413 is generated by a waveform generator 434. The waveform generator 434 generates the excitation signal 413 as a sinusoidal wave (also referred to as a sine wave). The input node 401 may be coupled to a touch sensor 436, the touch sensor 436 including a first electrode 438 coupled to a waveform generator 434 and a second electrode 440 coupled to the input node 401. The switching circuitry is configured to form a first branch between the touch sensor 436 and the comparator 420 and a second branch between the touch sensor 436 and the comparator 420. The first branch passes through the first integrator when the excitation signal 413 rises and the second branch passes through the second integrator when the excitation signal 413 falls. The switching circuitry is also configured to couple the balanced feedback loop 424 to the first branch when the excitation signal 413 rises and to couple the balanced feedback loop 424 to the second branch when the excitation signal 413 falls. The first integrator is configured to store a quantization error formed at the end of a first active phase of the first integrator, and wherein the second integrator is configured to start with the quantization error at the start of a second active phase of the second integrator for quantization error accumulation. In one embodiment, waveform generator 434 is controlled by control data 421 (labeled "sine table"). The control data may be stored in a sine wave table. The control data 421 is digital data that is coherent with the excitation signal 413. Control data 421 is also used by the digital demodulator as described below with respect to fig. 4C.
In another embodiment, a sigma-delta modulator includes: a comparator; a first integrator coupled to receive an incoming signal from an input node and provide a first output signal; a second integrator coupled in parallel with the first integrator to receive the incoming signal and provide a second output signal; and switching circuitry for selectively coupling the first integrator between the input node and the comparator to provide the first output signal to the comparator or the second integrator between the input node and the comparator to provide the second output signal to the comparator. In yet another embodiment, switching circuitry includes: a first switch coupled to provide an incoming signal to the first integrator or the second integrator; and a second switch coupled to provide the first output signal to the comparator or the second output signal to the comparator. The first switch and the second switch are configured to operate synchronously.
In another embodiment, the sigma-delta modulator includes a balanced feedback loop coupled to the switching circuitry, and the switching circuitry includes: a first switch coupled to provide an incoming signal to the first integrator or the second integrator; a second switch coupled to provide the first output signal to the comparator or the second output signal to the comparator; and a third switch coupled to provide a balanced feedback signal from the balanced feedback loop to either an incoming signal provided to the first integrator or an incoming signal provided to the second integrator. In this embodiment, the first switch, the second switch, and the third switch are configured to operate synchronously.
As shown in fig. 4B, the converter 400 includes a current-to-current converter (also referred to as an attenuator 408) based on a transimpedance operational amplifier 410 with a 100% feedback loop and an output stage amplifier 442. That is, the transimpedance operational amplifier 410 has a feedback loop. The attenuator 408 maintains the output current within a suitable range so that continuous balancing can be performed using a uniform value balancing source.
As shown in fig. 4C, converter 400 is coupled to MAC 406. MAC 406 may be one implementation of demodulator 108, accumulator 112, and decimator 114 in fig. 1. MAC 406 includes a multiplication circuit 444 coupled to counter 404 and an accumulation circuit 446 coupled to multiplication circuit 444. The multiplication circuit 444 is configured to demodulate the digital count value 419 output by the counter 404 by multiplying the digital count value 419 with the control data 421. The output of the multiplication circuit 444 is the demodulated signal 423. The control data 421 is sinusoidal data coherent with the excitation signal 413 from the waveform generator 434. The accumulation circuit 446 is configured to accumulate the demodulated signal 423 by adding the current output 425 of the multiplication circuit 444 to an accumulation value 427 that has been stored in the register 448. The output of the accumulation circuit is stored in register 448 as an updated accumulation value 429 output from MAC 406.
Fig. 4D is a schematic diagram of a current-to-current converter 408 according to one embodiment. As shown in fig. 4D, the transimpedance operational amplifier 410 may include an output stage 450 having a first set of transistors and may be complementary to an additional output stage 452 having a second set of transistors, the additional output stage 452 of the second set of transistors mirroring the current generated by the output stage 450 of the transimpedance operational amplifier 410. Amplification or attenuation of the output current can be achieved by varying the number of transistors in the mirror stage. The attenuation adjustment enables the output current to be kept within a suitable range so that a uniform value balanced source can be used.
Fig. 4E is a schematic diagram of a current-to-current converter with a low pass filter 454 according to one embodiment. As shown in fig. 4E, a Low Pass Filter (LPF)454 may be added to the path of the drive signal. The LPF 454 can suppress high-frequency noise components in the incoming current. The LPF may operate as an anti-aliasing filter.
FIG. 5 is a touch system 500 having an electrode array 502 and a plurality of capacitive touch sensing channels 504, according to one embodiment. Touch system 500 includes an Analog Front End (AFE) capacitive touch sensing controller coupled to array 502. The AFE includes a waveform generator 506 coupled to a first multiplexer circuit 508, a second multiplexer circuit 510 coupled to the plurality of capacitive touch sensing channels 504. Waveform generator 506 may be a Direct Digital Synthesizer (DDS) that receives a digital input called control data or sinusoidal data and generates an excitation signal. The DDS may generate a DDS based sine wave. This sine wave is different from the conventionally implemented rectangular excitation signal. The excitation signal may be applied to any one of the electrodes in the array 502 via a first multiplexer circuit 508. It should be noted that the first multiplexer circuit 508 may connect the direct output or the inverted output of the waveform generator 506 to any of the sensor TX lines according to a multi-phase scheme. Any one of the plurality of capacitive touch sensing channels 504 can be coupled to any one of the electrodes of the array 502 via a second multiplexer circuit 510. Each capacitive touch sensing channel of the plurality of capacitive touch sensing channels 504 may include a summation sigma-delta converter 512 and a MAC 514. The accumulation sigma-delta converter 512 is similar to the accumulation sigma-delta converter 400 of fig. 4A-4C. The MAC 514 is similar to the MAC 406 in fig. 4A-4C. As described herein, the accumulation sigma-delta converter 512 generates samples and demodulates the samples by multiplying the samples by the sinusoidal data coherent with the excitation by the MAC 514. The waveform generator 506 forms a half-cycle signal to drive quantization error accumulation in the accumulation sigma-delta converter 512.
In another embodiment, a system includes a touch sensor having a first electrode and a second electrode and a capacitive touch sensing controller coupled to the touch sensor. The capacitive touch sensing controller includes a waveform generator coupled to the first electrode. The waveform generator generates an excitation signal, sinusoidal data coherent with the excitation signal, and a control signal indicative of the rise or fall of the excitation signal. The sense channel is coupled to the second electrode at an input node. The sensing channel includes a sigma-delta analog-to-digital converter (ADC) to generate a digital value representative of a capacitance of the touch sensor. The accumulating sigma-delta ADC may comprise: a comparator; a first integrator coupled to receive an incoming signal from an input node and provide a first output signal; a second integrator coupled in parallel with the first integrator to receive the incoming signal and provide a second output signal; and switching circuitry for selectively coupling the first integrator between the input node and the comparator to provide the first output signal to the comparator or the second integrator between the input node and the comparator to provide the second output signal to the comparator. In yet another embodiment, the summing sigma-delta ADC further comprises a balanced feedback loop coupled to the switching circuitry. The switching circuitry may include: a first switch coupled to provide an incoming signal to the first integrator or the second integrator; a second switch coupled to provide the first output signal to the comparator or the second output signal to the comparator; and a third switch coupled to provide a balanced feedback signal from the balanced feedback loop to either an incoming signal provided to the first integrator or an incoming signal provided to the second integrator. The first switch, the second switch, and the third switch are configured to operate synchronously.
In another embodiment, the sigma-delta ADC comprises a first order sigma-delta modulator comprising an attenuator coupled to the input node and the bias voltage. The attenuator may comprise an amplifier common to the first integrator and the second integrator. The summing sigma-delta ADC further comprises: a first integrator capacitor coupled to the first node; a second integrator capacitor coupled to the second node; a first current source; a second current source and a flip-flop coupled to the output of the comparator and to the input of the counter. The output of the flip-flop is part of a balanced feedback loop coupled to the switching circuitry. In this embodiment, the switching circuitry includes: a first switch coupled to the attenuator, the first node, and the second node; a second switch coupled to the comparator, the first node, and the second node; a third switch coupled to a third node, the first node, and the second node; and a fourth switch coupled to the third node, the first current source and the second current source. The first switch, the second switch, and the third switch are configured to operate synchronously. The fourth switch is controlled by the output of the flip-flop.
In one embodiment, the first integrator is configured to store a quantization error formed at the end of a first active phase of the first integrator, and the second integrator is configured to start with the quantization error at the start of a second active phase of the second integrator for quantization error accumulation.
In another embodiment, a sigma-delta ADC includes a first order sigma-delta modulator including a first integrator capacitor, a second integrator capacitor, and a current-to-current converter. The current-to-current converter may include a transimpedance operational amplifier having a feedback loop and a set of transistors coupled to an output stage of the transimpedance operational amplifier. The transistor set mirrors a current signal generated by the transimpedance operational amplifier. In yet another embodiment, the current-to-current converter may further include a set of LPFs coupled between the transimpedance operational amplifier and the set of transistors. The LPF set filters high frequency components in the current signal. In this embodiment, the switching circuitry may be configured to form the first integrator by coupling the first integrator capacitor into a first branch between the current-to-current converter and the comparator, and to form the second integrator by coupling the second integrator capacitor into a second branch between the current-to-current converter and the comparator. In yet another embodiment, the switching circuitry is configured to allow the incoming signal to pass through the first branch when the excitation signal rises and to allow the incoming signal to pass through the second branch when the excitation signal falls. The switching circuitry may be further configured to couple the balanced feedback loop to the first branch when the excitation signal rises and to couple the balanced feedback loop to the second branch when the excitation signal falls.
In another embodiment, the capacitive touch sense channel can further include a multiply-accumulate circuit including a register for storing an accumulated value and a multiply circuit coupled to a counter of the modulator. The multiply-accumulate circuit includes a multiplication circuit that demodulates the output of the counter by multiplying the output of the counter with sinusoidal data coherent with the excitation signal from the waveform generator. The multiply-accumulate circuit also includes an accumulate circuit coupled to the multiply circuit. The accumulation circuit accumulates the demodulated signal by adding the current output of the multiplication circuit to the accumulation value to obtain an updated accumulation value and storing the updated accumulation value in the register.
FIG. 6 is a touch system 600 having an electrode array 602, a plurality of capacitive touch sensing channels 604, and a processing device 618 according to one embodiment. Touch system 600 includes a waveform generator 606 coupled to a multiplexer circuit 608. Multiplexer circuit 608 may represent first multiplexer circuit 508 and second multiplexer circuit 510 of fig. 5. The multiplexer circuit 608 is used to couple the waveform generator 606 to any one or more electrodes in the array 602 and to couple any one or more electrodes in the array 602 to one of the plurality of capacitive touch sensing channels 604. The waveform generator 606 may be a DDS that receives a digital input called control data or sinusoidal data and generates an excitation signal. Control data is also sent to the capacitive touch sense channels 604. As described herein, the excitation signal is a sine wave. It should be noted that multiplexer circuit 608 may connect the direct output or the inverted output of waveform generator 606 to any of the sensor TX lines according to a multi-phase scheme. Any one of the plurality of capacitive touch sensing channels 604 can be coupled to any one of the electrodes of the array 602 via the multiplexer circuit 608. Each capacitive touch sensing channel of the plurality of capacitive touch sensing channels 604 can include a summation sigma-delta converter 612 and a MAC 614. The accumulation sigma-delta converter 612 is similar to the accumulation sigma-delta converter 400 of fig. 4A-4C. MAC614 is similar to MAC 406 in fig. 4A-4C. Because a polyphase mode may be used, capacitive touch-sensing channel 604 may include deconvolution circuit 616 coupled to the output of MAC 614. As described herein, the accumulation sigma-delta converter 612 generates samples and demodulates the samples by multiplying the samples by the sinusoidal data coherent with the excitation by the MAC 614. Deconvolution circuit 616 may perform a deconvolution on the sampled data. The waveform generator 606 forms half-cycle signals to drive quantization error accumulation in the accumulation sigma-delta converter 612.
Touch system 600 can also include a processing device 618 that receives digital output from the plurality of capacitive touch sensing channels 604. Processing device 618 may be a processor, controller, hardware circuitry that may perform further processing of digital data. In one embodiment, processing device 618 executes firmware that includes post-processing logic, communication logic, mutual capacitance mapping, self-capacitor vector generators, and so forth. Processing device 618 may include a state machine. Processing device 618 may output the digital data to host 620 after processing the data. Touch system 600 can include other components, such as control circuitry for controlling multiplexer circuit 608, a sequencer for sequencing through electrodes of array 602, baseline compensation circuitry, and the like.
Fig. 7 is a method of operating a sigma-delta converter according to an embodiment. Method 700 may be performed by processing logic that comprises hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In one embodiment, method 700 may be performed by any processing device described herein. In one embodiment, method 700 is performed by capacitive touch sensing channel 100 of FIG. 1. In another embodiment, the method 700 is performed by the accumulating first-order sigma-delta converter 400 of fig. 4A-4E. In another embodiment, method 700 is performed by a device that includes a capacitive touch sensing channel and a processing device coupled to the capacitive touch sensing channel.
Method 700 begins with processing logic receiving an incoming signal from a touch sensor through a sigma-delta modulator of a capacitive sensing channel (block 702). The sigma-delta modulator includes a comparator, a first integrator, and a second integrator. Processing logic selectively couples the incoming signal to the comparator through the first integrator in the first branch when the excitation signal rises through switching circuitry of the capacitive sense channel (block 704). Processing logic selectively couples the incoming signal to the comparator through the second integrator in the second branch when the excitation signal falls through the switching circuitry (block 706). Processing logic generates an output signal through the comparator (block 708). Processing logic selectively couples the balanced feedback loop to the first branch when the stimulus signal rises and to the second branch when the stimulus signal falls, through switching circuitry, according to an output signal of the comparator (block 710). Processing logic generates a count of the output signals (block 712). Processing logic demodulates the count by multiplying the count with sinusoidal data coherent with the excitation signal to obtain a demodulated signal (block 714). Processing logic accumulates the demodulated signals to obtain a quantization error accumulation (block 716). Processing logic downsamples the quantization error accumulation to obtain a digital value (block 718), and the method 700 ends. The digital value indicates a capacitance associated with the touch sensor.
In yet another embodiment, the processing logic selectively couples the incoming signal to the comparator through the first integrator by controlling the first switch and the second switch to couple the input node and the comparator to a first node coupled to the first integrator capacitor. Processing logic causes the incoming signal to be selectively coupled to the comparator through the second integrator by controlling the first switch and the second switch to couple the input node and the comparator to a second node coupled to the second integrator capacitor. In yet another embodiment, the processing logic selectively couples the balanced feedback loop to the first branch and the second branch according to the output signal of the comparator by controlling a third switch to couple a third node to the first node or the second node and controlling a fourth switch to couple the first current source or the second current source to the third node based on the output signal.
In the description above, portions of the detailed description are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.
It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the above discussion, it is appreciated that throughout the description, discussions utilizing terms such as "determining," "assigning," "dynamically assigning," "redistributing," "ignoring," "redistributing," "detecting," "performing," "polling," "registering," "monitoring," or the like, refer to the action and processes of a computing system, or similar electronic computing device, that manipulates and transforms data represented as physical (e.g., electronic) quantities within the computing system's registers and memories into other data similarly represented as physical quantities within the computing system memories or registers or other such information storage, transmission or display devices.
The word "example" or "exemplary" is used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as "exemplary" or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, use of the word "example" or "exemplary" is intended to present concepts in a concrete fashion. As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless specified otherwise or clear from context, "X comprises a or B" is intended to mean any of the natural inclusive permutations. That is, if X includes A, X includes B or X includes both a and B, "X includes a or B" is satisfied under any of the foregoing circumstances. In addition, the articles "a" and "an" as used in this application and the appended claims should generally be construed to mean "one or more" unless specified otherwise or clear from context. Furthermore, unless so described, the use of the terms "embodiment" or "one embodiment" or "an implementation" or "one implementation" throughout is not intended to mean the same embodiment or implementation.
Embodiments described herein may also relate to an apparatus for performing the operations herein. The apparatus may be specially constructed for the required purposes, or it may comprise a general-purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a non-transitory computer readable storage medium, such as, but not limited to, any type of disk including: floppy disks, optical disks, CD-ROMs, magneto-optical disks, read-only memories (ROMs), Random Access Memories (RAMs), EPROMs, EEPROMs, magnetic or optical cards, flash memory, or any type of media suitable for storing electronic instructions. The term "computer-readable storage medium" should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of instructions. The term "computer-readable medium" shall also be taken to include any medium that is capable of storing, encoding or carrying a set of instructions for execution by the machine and that cause the machine to perform any one or more of the methodologies of the present embodiments. The term "computer-readable storage medium" shall accordingly be taken to include, but not be limited to, solid-state memories, optical media, magnetic media, any medium that is capable of storing a set of instructions for execution by the machine and that cause the machine to perform any one or more of the methodologies of the present embodiments.
The methods and displays presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will appear from the description below. In addition, the present embodiments are not described with reference to any particular programming language. It should be appreciated that a variety of programming languages may be used to implement the teachings of the embodiments as described herein.
The above description sets forth numerous specific details, such as examples of specific systems, components, methods, etc., in order to provide a thorough understanding of several embodiments of the present disclosure. It is to be understood that the above description is intended to be illustrative, and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reading and understanding the above description. The scope of the disclosure should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims (20)

1. A circuit, comprising:
an input node coupled to the touch sensor;
a sigma-delta modulator coupled to the input node, wherein the sigma-delta modulator comprises:
a comparator;
a first integrator coupled to receive an incoming signal from the input node and provide a first output signal;
a second integrator coupled in parallel with the first integrator to receive the incoming signal and provide a second output signal; and
switching circuitry to selectively couple the first integrator between the input node and the comparator to provide the first output signal to the comparator or to selectively couple the second integrator between the input node and the comparator to provide the second output signal to the comparator.
2. The circuit of claim 1, further comprising:
a counter coupled to the sigma-delta modulator;
a demodulator coupled to the counter;
an accumulator coupled to the demodulator; and a decimator coupled to the accumulator, the decimator to output a digital signal indicative of a capacitance of the touch sensor, wherein the switching circuitry comprises:
a first switch coupled to provide the incoming signal to the first integrator or the second integrator; and
a second switch coupled to provide the first output signal to the comparator or the second output signal to the comparator, wherein the first switch and the second switch are configured to operate synchronously.
3. The circuit of claim 1, wherein the sigma-delta modulator comprises a balanced feedback loop coupled to the switching circuitry, wherein the switching circuitry comprises:
a first switch coupled to provide the incoming signal to the first integrator or the second integrator;
a second switch coupled to provide the first output signal to the comparator or the second output signal to the comparator; and
a third switch coupled to provide a balanced feedback signal from the balanced feedback loop to an incoming signal provided to the first integrator or an incoming signal provided to the second integrator, wherein the first switch, the second switch, and the third switch are configured to operate synchronously.
4. The circuit of claim 1, wherein the sigma-delta modulator is a first order sigma-delta modulator, wherein the first order sigma-delta modulator comprises:
a counter;
an attenuator coupled to the input node and a bias voltage, wherein the attenuator comprises an amplifier common to the first integrator and the second integrator;
a first integrator capacitor coupled to a first node;
a second integrator capacitor coupled to a second node;
a first current source;
a second current source;
a flip-flop coupled to an output of the comparator and to an input of the counter; wherein an output of the flip-flop is part of a balanced feedback loop coupled to the switching circuitry, wherein the switching circuitry comprises:
a first switch coupled to the attenuator, the first node, and the second node;
a second switch coupled to the comparator, the first node, and the second node;
a third switch coupled to a third node, the first node, and the second node;
a fourth switch coupled to the third node, the first current source, and the second current source, wherein the fourth switch is controlled by an output of the flip-flop, and wherein the first switch, the second switch, and the third switch are configured to operate synchronously.
5. The circuit of claim 1, further comprising a waveform generator that generates an excitation signal, the excitation signal comprising a sine wave, wherein the touch sensor comprises a first electrode coupled to the waveform generator and a second electrode coupled to the input node, wherein the switching circuitry is configured to form a first branch between the touch sensor and the comparator and a second branch between the touch sensor and the comparator, wherein the first branch passes through the first integrator when the stimulus signal rises and the second branch passes through the second integrator when the stimulus signal falls, wherein the switching circuitry is further configured to couple a balanced feedback loop to the first branch when the stimulus signal rises and to couple the balanced feedback loop to the second branch when the stimulus signal falls.
6. The circuit of claim 1, wherein the first integrator is configured to store a quantization error formed at the end of a first active phase of the first integrator, and wherein the second integrator is configured to begin with the quantization error for quantization error accumulation at the beginning of a second active phase of the second integrator.
7. The circuit of claim 1, wherein the sigma-delta modulator comprises:
a first integrator capacitor;
a second integrator capacitor; and
a current-to-current converter, comprising:
a transimpedance operational amplifier having a feedback loop;
a transistor set of an output stage coupled to the transimpedance operational amplifier mirroring a current signal generated by the transimpedance operational amplifier;
a set of Low Pass Filters (LPFs) coupled between the transimpedance operational amplifier and the set of transistors, the set of LPFs to filter high frequency components in the current signal, wherein the switching circuitry is configured to form the first integrator by coupling the first integrator capacitor into a first branch between the current-to-current converter and the comparator, wherein the switching circuitry is configured to form the second integrator by coupling the second integrator capacitor into a second branch between the current-to-current converter and the comparator.
8. The circuit of claim 7, wherein the switching circuitry is configured to allow the incoming signal to pass through the first branch when an excitation signal rises, and wherein the switching circuitry is configured to allow the incoming signal to pass through the second branch when the excitation signal falls, wherein the switching circuitry is further configured to couple a balanced feedback loop to the first branch when the excitation signal rises and to couple the balanced feedback loop to the second branch when the excitation signal falls.
9. The circuit of claim 1, further comprising:
a counter coupled to the sigma-delta modulator;
a multiply-accumulate circuit;
a decimator coupled to the multiply-accumulate circuit, the decimator to output a digital signal indicative of a capacitance of the touch sensor, wherein the multiply-accumulate circuit comprises:
a register for storing an accumulated value;
a multiplication circuit coupled to a counter of the sigma-delta modulator, the multiplication circuit to demodulate the output of the counter by multiplying the output of the counter with sinusoidal data coherent with an excitation signal from a waveform generator; and
an accumulation circuit coupled to the multiplication circuit, the accumulation circuit to accumulate the demodulated signal by adding a current output of the multiplication circuit to the accumulation value to obtain an updated accumulation value and storing the updated accumulation value in the register.
10. A system, comprising:
a touch sensor including a first electrode and a second electrode; and
a capacitive touch sensing controller coupled to the touch sensor, the capacitive touch sensing controller comprising:
a waveform generator coupled to the first electrode, the waveform generator to generate an excitation signal, sinusoidal data coherent with the excitation signal, and a control signal indicative of a rise or fall of the excitation signal;
a sense channel coupled with the second electrode at an input node, the sense channel including a cumulative delta analog-to-digital converter to generate a digital value representative of a capacitance of the touch sensor, wherein the cumulative delta analog-to-digital converter includes:
a comparator;
a first integrator coupled to receive an incoming signal from the input node and provide a first output signal;
a second integrator coupled in parallel with the first integrator to receive the incoming signal and provide a second output signal; and
switching circuitry to selectively couple the first integrator between the input node and the comparator to provide the first output signal to the comparator or to selectively couple the second integrator between the input node and the comparator to provide the second output signal to the comparator.
11. The system of claim 10, wherein the sigma-delta analog-to-digital converter comprises a balanced feedback loop coupled to the switching circuitry, wherein the switching circuitry comprises:
a first switch coupled to provide the incoming signal to the first integrator or the second integrator;
a second switch coupled to provide the first output signal to the comparator or the second output signal to the comparator; and
a third switch coupled to provide a balanced feedback signal from the balanced feedback loop to an incoming signal provided to the first integrator or an incoming signal provided to the second integrator, wherein the first switch, the second switch, and the third switch are configured to operate synchronously.
12. The system of claim 10, wherein the sigma-delta analog-to-digital converter comprises a first order sigma-delta modulator, wherein the first order sigma-delta modulator comprises:
a counter coupled to an output of the comparator, the counter for outputting the digital value;
an attenuator coupled to the input node and a bias voltage, wherein the attenuator comprises an amplifier common to the first integrator and the second integrator;
a first integrator capacitor coupled to a first node;
a second integrator capacitor coupled to a second node;
a first current source;
a second current source; and
a flip-flop coupled to an output of the comparator and to an input of the counter, wherein an output of the flip-flop is part of a balanced feedback loop coupled to the switching circuitry, and wherein the switching circuitry comprises:
a first switch coupled to the attenuator, the first node, and the second node;
a second switch coupled to the comparator, the first node, and the second node;
a third switch coupled to a third node, the first node, and the second node; and
a fourth switch coupled to the third node, the first current source, and the second current source, wherein the fourth switch is controlled by an output of the flip-flop, and wherein the first switch, the second switch, and the third switch are configured to operate synchronously.
13. The system of claim 10, wherein the first integrator is configured to store a quantization error formed at an end of a first active phase of the first integrator, and wherein the second integrator is configured to begin with the quantization error for quantization error accumulation at a beginning of a second active phase of the second integrator.
14. The system of claim 10, wherein the sigma-delta analog-to-digital converter comprises a first order sigma-delta modulator, wherein the first order sigma-delta modulator comprises:
a first integrator capacitor;
a second integrator capacitor; and
a current-to-current converter, comprising:
a transimpedance operational amplifier having a feedback loop;
a transistor set of an output stage coupled to the transimpedance operational amplifier mirroring a current signal generated by the transimpedance operational amplifier;
a set of Low Pass Filters (LPFs) coupled between the transimpedance operational amplifier and the set of transistors, the set of LPFs to filter high frequency components in the current signal, wherein the switching circuitry is configured to form the first integrator by coupling the first integrator capacitor into a first branch between the current-to-current converter and the comparator, wherein the switching circuitry is configured to form the second integrator by coupling the second integrator capacitor into a second branch between the current-to-current converter and the comparator.
15. The system of claim 14, wherein the switching circuitry is configured to allow the incoming signal to pass through the first branch when the stimulus signal rises, and wherein the switching circuitry is configured to allow the incoming signal to pass through the second branch when the stimulus signal falls, wherein the switching circuitry is further configured to couple a balanced feedback loop to the first branch when the stimulus signal rises and to couple the balanced feedback loop to the second branch when the stimulus signal falls.
16. The system of claim 10, wherein the sensing channel further comprises:
a counter;
a multiply-accumulate circuit, wherein the multiply-accumulate circuit comprises:
a register for storing an accumulated value;
a multiplication circuit coupled to the counter, the multiplication circuit to demodulate the output of the counter by multiplying the output of the counter with sinusoidal data coherent with an excitation signal from a waveform generator; and
an accumulation circuit coupled to the multiplication circuit, the accumulation circuit to accumulate the demodulated signal by adding a current output of the multiplication circuit to the accumulation value to obtain an updated accumulation value and storing the updated accumulation value in the register.
17. A method, comprising:
receiving an incoming signal from a touch sensor through a cumulative delta modulator of a capacitive sensing channel, the cumulative delta modulator comprising a comparator, a first integrator, and a second integrator;
selectively coupling the incoming signal to the comparator through a first integrator in a first branch when an excitation signal rises through switching circuitry of the capacitive sensing channel;
selectively coupling, by the switching circuitry, the incoming signal to the comparator through a second integrator in a second branch when the stimulus signal falls;
generating an output signal by the comparator;
selectively coupling, by the switching circuitry, a balanced feedback loop to the first branch when the stimulus signal rises and to the second branch when the stimulus signal falls according to an output signal of the comparator;
generating a count of the output signals;
demodulating the count by multiplying the count by sinusoidal data coherent with the excitation signal to obtain a demodulated signal; and
the demodulated signals are accumulated to obtain a quantization error accumulation, the quantization error accumulation indicating a capacitance.
18. The method of claim 17, wherein accumulating the demodulated signal comprises:
generating samples of the output signal; and
accumulating the samples over a plurality of cycles of the excitation signal to obtain a quantization error accumulation indicative of the capacitance; and
downsampling the quantization error accumulation to obtain a digital value, wherein the digital value is indicative of the capacitance.
19. The method of claim 17, wherein:
selectively coupling the incoming signal to the comparator through the first integrator comprises: controlling a first switch and a second switch to couple the input node and the comparator to a first node coupled to a first integrator capacitor; and
selectively coupling the incoming signal to the comparator through the second integrator comprises: controlling the first switch and the second switch to couple the input node and the comparator to a second node coupled to a second integrator capacitor.
20. The method of claim 19, wherein selectively coupling the balanced feedback loop to the first and second branches as a function of the output signal of the comparator comprises:
controlling a third switch to couple a third node to the first node or the second node; and
controlling a fourth switch to couple either a first current source or a second current source to the third node based on the output signal.
CN202011582006.6A 2020-01-16 2020-12-28 Capacitive touch sensing channel Pending CN113141184A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115981507A (en) * 2023-03-20 2023-04-18 上海海栎创科技股份有限公司 Touch sensing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115981507A (en) * 2023-03-20 2023-04-18 上海海栎创科技股份有限公司 Touch sensing system

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