CN113130430A - Welding spot suitable for LGA packaging and system-in-package structure comprising same - Google Patents

Welding spot suitable for LGA packaging and system-in-package structure comprising same Download PDF

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CN113130430A
CN113130430A CN202110410250.2A CN202110410250A CN113130430A CN 113130430 A CN113130430 A CN 113130430A CN 202110410250 A CN202110410250 A CN 202110410250A CN 113130430 A CN113130430 A CN 113130430A
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solder joint
pcb
ppm
welding spot
package structure
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孙海燕
金玲玥
赵继聪
周婷
彭馨伟
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Nantong University
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Nantong University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding

Abstract

The application provides a solder joint suitable for LGA packaging, which has an inverted groove structure formed by coating a PCB side pad with soldering paste. The present application further provides a system in package structure, including: PCB, chip package body and be used for connecting PCB and chip package body's solder joint, the solder joint has the solder joint that has to groove structure that this application provided by the upside down groove structure that soldering paste cladding PCB side pad formed, and it compares in the conventional solder joint among the prior art, and thermal fatigue life is showing and is promoting, can reach 7.43 times of conventional solder joint at most. Therefore, the groove welding spot structure provided by the application has excellent thermal reliability and is not easy to lose efficacy.

Description

Welding spot suitable for LGA packaging and system-in-package structure comprising same
Technical Field
The application relates to the technical field of chip packaging, in particular to a welding spot suitable for LGA packaging and a system-in-package structure comprising the same.
Background
The internet of Things brings people into an era that everything can be interconnected, and a Narrow-Band internet of Things (NB-IoT) is widely applied to various fields as a novel communication method based on the internet of Things and based on the advantages of low energy consumption, wide coverage, good data connection performance and the like. With the continuous development of science and technology, the application scale of the narrowband internet of things is larger and larger, and people also have higher requirements on a packaging structure for bearing the functions of the narrowband internet of things. By applying the advanced System In Package (SiP) technology to the narrow-band internet of things, chips with more functions can be integrated In one Package body, and the goals of miniaturization and multi-functionalization are achieved.
The Land Grid Array (LGA) package has no solder balls at the bottom and is reflowed with solder paste by a Land brush on a Printed Circuit Board (PCB) to complete the connection. The connection mode greatly shortens the interconnection distance, effectively improves the electrical performance, and more portable electronic products select the LGA packaging form. In the prior art, when assembling an LGA package on a PCB, as shown in fig. 1, a conventional solder joint 1A is formed by directly applying solder paste on a pad 2 of the PCB3, and forming a planar solder joint structure after soldering. The inventors have found that such solder joint structures are less thermally reliable and are prone to failure.
Disclosure of Invention
An object of the application is to provide a solder joint suitable for LGA encapsulation to solve the problem that the thermal reliability is relatively poor, easy inefficacy that current conventional solder joint exists. Further, the present application also provides a system-in-package structure including the above solder joint suitable for LGA package.
The application provides a welding spot suitable for an LGA package, which is provided with an inverted groove structure formed by coating a PCB side pad with soldering paste.
In some embodiments of the first aspect of the present application, the height of the welding spot is 0.1 to 0.2mm, preferably 0.10 mm; the bottom area of the welding spot is 0.2mm2～0.42mm2Preferably 0.42mm2。
In some embodiments of the first aspect of the present application, the solder paste has a thermal expansion coefficient of 17.9 to 25.9 ppm/deg.C, preferably 21.9 ppm/deg.C.
In some embodiments of the first aspect of the present applicationThe thermal expansion coefficient of the PCB side bonding pad is 15.0-19.0 ppm/DEG C, preferably 17.0 ppm/DEG C; the bottom area of the PCB side bonding pad is 0.2mm2～0.42mm2Preferably 0.30mm2(ii) a The height of the PCB side bonding pad is 0.026-0.066 mm, and preferably 0.046 mm.
In some embodiments of the first aspect of the present application, the thermal fatigue life of the weld is 1000-4300 cycles.
A second aspect of the present application provides a system in package structure, comprising: the PCB, the chip packaging body and the welding spot for connecting the PCB and the chip packaging body, wherein the welding spot is provided with an inverted groove structure formed by coating a side welding disc of the PCB with soldering paste.
In some embodiments of the second aspect of the present application, the system-in-package structure satisfies at least one of the following characteristics: the height of the welding spot is 0.1-0.2 mm, the height of the PCB side welding disc is 0.026-0.066 mm, and the bottom area of the welding spot is 0.2mm2～0.42mm2The bottom area of the PCB side bonding pad is 0.2mm2～0.42mm2The coefficient of thermal expansion of the solder paste is 17.9-25.9 ppm/DEG C, the coefficient of thermal expansion of the PCB-side bonding pad is 15.0-19.0 ppm/DEG C, the coefficient of thermal expansion of the plastic packaging material of the chip packaging body is 5.5-8.5 ppm/DEG C, and the coefficient of thermal expansion of the substrate medium of the chip packaging body is 6.5-10.5 ppm/DEG C.
In some embodiments of the second aspect of the present application, the height of the solder bump is 0.10mm, the height of the PCB-side land is 0.046mm, and the bottom area of the solder bump is 0.42mm2The bottom area of the PCB side bonding pad is 0.30mm2The coefficient of expansion of the solder paste is 21.9 ppm/DEG C, the coefficient of thermal expansion of the bonding pad is 17.0 ppm/DEG C, the coefficient of thermal expansion of the molding compound of the chip package is 8.5 ppm/DEG C, and the coefficient of thermal expansion of the substrate medium of the chip package is 10.5 ppm/DEG C.
In some embodiments of the second aspect of the present application, the operating temperature of the system-in-package structure is in the range of-50 ℃ to 135 ℃, preferably in the range of-30 ℃ to 115 ℃.
In some embodiments of the second aspect of the present application, the system-in-package structure is an NB-IoT system-in-package structure.
Advantageous effects
Compared with the conventional welding spot in the prior art, the welding spot with the groove structure provided by the application has the advantages that the thermal fatigue life is obviously prolonged and can reach 7.43 times of that of the conventional welding spot. Therefore, the groove welding spot structure provided by the application has excellent thermal reliability and is not easy to lose efficacy.
Drawings
FIG. 1 illustrates a conventional solder joint structure in the prior art;
FIG. 2 illustrates the structure of an inverted groove solder joint provided herein;
FIG. 3 is a graph of equivalent plastic strain versus time for the inverted groove solder joint model of example 1;
FIG. 4 (a) is a cloud of equivalent plastic strain distributions at key locations in the inverted groove weld; (b) is a scanning electron microscope SEM image of a key position section in an inverted groove welding spot;
FIG. 5 shows (a) a cloud of equivalent plastic strain distributions for a conventional solder joint and (b) a cloud of equivalent stress distributions for a conventional solder joint;
FIG. 6 is a plot of equivalent plastic strain versus time for the conventional solder joint model of comparative example 1;
FIG. 7 (a) is a cloud of equivalent plastic strain distributions at key locations in a conventional solder joint; (b) scanning electron microscope SEM images of key position sections in conventional welding spots;
FIG. 8 is a graph of equivalent plastic strain versus time for an optimized inverted groove weld spot model;
fig. 9 shows (a) a cloud of equivalent plastic strain distribution of the inverted groove weld after being transformed, and (b) a cloud of equivalent stress distribution of the inverted groove weld after being transformed.
Reference numerals: 1A-conventional welding spots; 1B-inverted groove welding spots; 2-PCB side pads; 3-PCB; 4-chip package side.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example 1 thermal fatigue life analysis of a solder joint having an inverted groove structure (hereinafter also referred to as an inverted groove solder joint for short)
In the embodiment, a three-dimensional model is established through a finite element method, material attributes and applied loads are determined, the equivalent plastic strain change trend of the welding spot is obtained, an equivalent plastic strain accumulated value of a stable period is selected and is brought into a modified coffee-Manson life prediction model, and the thermal fatigue life of the welding spot is obtained. And then the test is verified by a high-low temperature cycle test.
1. Thermal fatigue life prediction method for inverted groove welding spot
1.1, establishing a finite element model of a system-in-package structure with the inverted groove welding spot (hereinafter, also referred to as the inverted groove welding spot model for short)
And establishing a three-dimensional finite element simulation model (system-in-package structure model) according to the NB-IoT system-in-package structure. The model comprises a PCB, a bonding pad, a welding spot, a chip packaging body and the like, and the detailed structure size of each main component in the model is shown in a table 1. The structure of the inverted groove solder joint is shown in fig. 2. As can be seen from fig. 2, the solder paste (solder) formed to the groove land 1B not only covers the upper portion of the PCB-side land 2 but also exists around the PCB-side land 2 to cover the PCB-side land, and forms an inverted groove shape after soldering.
TABLE 1 structural parameters of Components of a System-in-Package structural model
Figure BDA0003024759380000041
Figure BDA0003024759380000051
In table 1, the package-side pad indicates a pad provided on the chip package; the PCB-side pad denotes a pad provided on the PCB.
1.2 determining Material Properties
In this embodiment, the PCB is FR-4 grade, the solder paste is tin-silver-copper solder (SAC305), the pad is made of copper, and GEA-G705 is selected as the dielectric material between the copper layer and the copper layer inside the package substrate. The main material parameters of the components are shown in table 2.
TABLE 2 Material parameters of Components of the System in Package model
Figure BDA0003024759380000052
Figure BDA0003024759380000061
1.3 determining applied load
According to the condition G in JESD22-A104C temperature Cycling, the temperature Cycling range is set to be-40-125 ℃, the temperature rising and reducing rates are 16.5 ℃/min, and the high-temperature and low-temperature holding time is 15min respectively.
1.4 thermal fatigue life prediction model
In this embodiment, the thermal fatigue life of the LGA solder joint is evaluated by using a modified coffee-Manson model. Establishing the relation between equivalent plastic strain and fatigue life by introducing the equivalent plastic strain accumulated by a single cycle to obtain the fatigue life of the welding spot, wherein the calculation formula is as follows:
Figure BDA0003024759380000062
Figure BDA0003024759380000063
in the formula, NfFatigue life for solder joints; Δ r is the equivalent shear strain range; Δ ε is the equivalent plastic strain range; epsilonf' is the fatigue toughness coefficient, value 0.325; c is the fatigue expansion coefficient, and the value is 0.57.
2. Thermal fatigue life prediction analysis of inverted groove solder joints
And carrying out finite element analysis on the inverted groove welding spot model, and analyzing the positions of the maximum equivalent plastic strain and the maximum equivalent stress at the connection positions of the corner welding spots and the PCB side welding spots by using the equivalent plastic strain distribution diagram and the equivalent stress distribution diagram of the inverted groove welding spots. It is readily understood that the locations where the equivalent plastic strain and equivalent stress are greatest are most susceptible to cracking, thereby causing weld failure, which is referred to herein as critical locations.
FIG. 3 is a graph of equivalent plastic strain versus time obtained from an inverted groove solder joint model simulation. As can be seen in FIG. 3, the equivalent plastic strain of the solder joint is more stable in the fourth cycle, so four temperature cycle cycles were selected in the finite element analysis. Further from the analysis in the figure, the equivalent plastic strain of the welding spot shows a periodic variation with the temperature load. The equivalent plastic strain accumulated by the welding spot in the fourth period is 0.4439 multiplied by 10-2The thermal fatigue life of the reverse groove weld was calculated from equations (1) and (2) to be 1201 cycles. As used herein, the thermal fatigue life of a weld refers to the number of stress or strain cycles (cycles) experienced by the weld to cause damage (e.g., cracking) under temperature cycling loads.
3. Verification of thermal fatigue life of inverted groove solder joint
3.1 preparation of System-in-Package Structure sample A with solder pads having inverted groove Structure
A system in package structure sample a having pads with an inverted groove structure was prepared according to the finite element model of the system in package structure described in item 1.1 and tables 1 and 2. The preparation process can be carried out according to the method known in the prior art, and the main difference from the prior art is that the windowing area of a steel mesh for printing the soldering paste is slightly larger than the bottom area of the PCB side pad, so that the soldering paste can cover the surface of the pad and the periphery of the pad after being printed, and the pad is coated.
3.2 high and Low temperature cycle test
Putting the sample A into a high-low temperature test box, setting the temperature cycle condition consistent with the condition under the item 1.3, taking out the sample A after 1000 cycle periods,the cross section of the key position in the simulated welding spot is shown in fig. 4. From FIG. 4 (a), the maximum equivalent plastic strain at the critical position is 2.8109 × 10-2. As can be seen from fig. 4 (b), no crack was found in the cross section at the critical position.
Comparative example 1 thermal fatigue life analysis of conventional solder joints
1. Thermal fatigue life prediction method for conventional welding spot
The thermal fatigue life prediction method of the conventional solder joint is substantially identical to that of the inverted groove solder joint except that the PCB-side pad of 0.40 × 0.50 × 0.046(mm × mm) in table 1 is replaced with the PCB-side pad of 0.50 × 0.60 × 0.046(mm × mm).
2. Thermal fatigue life prediction analysis of conventional solder joints
Finite element analysis is performed on a finite element model of a system-in-package structure of a conventional solder joint (hereinafter, also referred to as a conventional solder joint model), fig. 5 is an equivalent plastic strain distribution diagram and an equivalent stress distribution diagram of the conventional solder joint, and it can be seen from fig. 5 that the maximum equivalent plastic strain is 3.7108 × 10-2The maximum equivalent stress was 49.71 MPa. It is further found from fig. 5 that the locations where the equivalent plastic strain and equivalent stress are the largest are also located at the connection of the corner pads and the PCB side pads, which is the critical location, i.e. the "maximum" mark in the figure.
FIG. 6 is a graph of equivalent plastic strain versus time obtained from conventional solder joint model simulations. As can be seen in FIG. 6, the equivalent plastic strain of the solder joint is more stable in the fourth cycle, so four temperature cycle cycles were selected in the finite element analysis. Further from the analysis in the figure, the equivalent plastic strain of the welding spot shows a periodic variation with the temperature load. The equivalent plastic strain accumulated by the welding spot in the fourth period is 0.6732 multiplied by 10-2The thermal fatigue life of the conventional solder joint was calculated to be 578 cycles from equations (1) and (2).
3. Verification of thermal fatigue life of conventional solder joints
3.1 preparation of System in Package Structure sample B with conventional solder joints
A system in package structure sample B of conventional solder joints was prepared as described in 3.1 of example 1.
3.2 high and Low temperature cycle test
And putting the sample B into a high-low temperature test box, setting temperature cycle conditions consistent with those of the sample A, taking out the sample B after 500 cycle periods, and performing section on a key position, as shown in FIG. 7. As can be seen from FIG. 7 (a), the maximum equivalent plastic strain is 3.7108X 10-2The dangerous location of the solder joint is at the lower left corner where it makes contact with the PCB side pads, consistent with the crack trend shown in (b) in 7.
It can be seen from a comparison of example 1 and comparative example 1 that the maximum equivalent plastic strain of the inverted groove weld is reduced by 24% compared to the conventional weld. It can be seen that the thermal reliability of the inverted groove solder joint is superior to conventional solder joints.
EXAMPLE 2 optimization of inverted groove solder joints
1. Single factor analysis
In order to further study the influence of package structure, temperature load, material properties, etc. on the thermal fatigue life of LGA solder joint, 13 factors were selected in this embodiment, as shown in table 3, each factor was selected to have 3 levels, where level 2 represents the design parameter of the initial undercut solder joint.
TABLE 3 level table of factors
Figure BDA0003024759380000091
Figure BDA0003024759380000101
The packaging side substrate medium is a medium between a copper layer and a copper layer in the packaging body substrate.
A single-factor analysis method is adopted, namely only one factor is changed at a time, and the influence of the single-factor analysis method on the thermal fatigue life of the welding spot is researched. When the influence degree of the factor on the thermal fatigue life of the welding spot reaches 20%, the factor is defined as a significant factor.
From the above single factor analysis, 9 significant factors out of 13 factors were: the temperature cycle range (A), the height (C) of the welding point, the height (E) of the PCB side welding pad, the bottom area (G) of the welding point, the bottom area (I) of the PCB side welding pad, the thermal expansion coefficient (J) of the welding material, the thermal expansion coefficient (K) of the welding pad, the thermal expansion coefficient (L) of the plastic package material and the thermal expansion coefficient (M) of the packaging side substrate medium.
2. Taguchi test method
The analysis result of the single factor method reveals that the significant factors are still more. The embodiment further combines a Taguchi test method, takes the thermal fatigue life of the welding spot as a design target, and constructs the orthogonal table L27(9) The 9 significant factors were tested for 27 total experiments. The objective function of the experiment was the thermal fatigue life of the LGA solder joint, i.e. the desired response was maximized, so the expected characteristic signal-to-noise ratio formula was used:
Figure BDA0003024759380000102
in the formula, n is the experiment times under the condition of the same parameters, and the experiment adopts a finite element analysis method, so n is 1; y isiThe calculated thermal fatigue life is an experimental value. The results are shown in Table 4, from which it can be seen that the signal-to-noise ratio was the greatest for the test in group 5, the thermal fatigue life was the highest for this group, and the signal-to-noise ratio was the lowest for the test in group 15, the thermal fatigue life was the lowest for this group. According to the table 4, the average signal-to-noise ratio of each factor level and the influence level of each factor on the thermal fatigue life of the welding spot are calculated by a range difference method according to 27 groups of experimental results, as shown in the table 5. From Table 5, the arrangement order of the factors affecting the thermal fatigue life of the solder joint is L > A > E > C > K > M > G > J > I, and the corresponding combination of parameters is A1C1E2G312J2K2L3M 3.
TABLE 4 solder joint fatigue life test results and signal-to-noise ratio
Figure BDA0003024759380000111
Figure BDA0003024759380000121
TABLE 5 SNR response averaging Effect
Figure BDA0003024759380000122
And constructing a final optimized inverted groove welding spot model based on the optimal parameter combination obtained by the test. Obtaining a diagram of equivalent plastic strain of the optimized undercut weld point with respect to time through finite element analysis, as shown in fig. 8, it can be obtained from the diagram that the equivalent plastic strain value accumulated in the fourth period of the optimized undercut weld point is 0.2147 × 10-2The corresponding thermal fatigue life was 4297 cycles, which is 7.43 times that of the conventional solder joint in comparative example 1.
FIG. 9 further shows the equivalent plastic strain and stress distribution plots for the undercut weld under the optimum combination of parameters, where the maximum plastic strain is 1.1015X 10-2The maximum equivalent stress is 44.465MPa, which is reduced by 70.31 percent and 10.55 percent respectively compared with the conventional welding spot. Therefore, the inverse groove optimization model effectively improves the thermal reliability of the LGA welding spot.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A welding spot suitable for LGA packaging is characterized in that an inverted groove structure formed by coating a PCB side welding disc with soldering paste is provided.
2. The solder joint according to claim 1, wherein the height of the solder joint is 0.1-0.2 mm, preferably 0.10 mm; the bottom area of the welding spot is 0.2mm2～0.42mm2Preferably 0.42mm2。
3. The solder joint of claim 1, wherein the solder paste has a thermal expansion coefficient of 17.9-25.9 ppm/degree C, preferably 21.9 ppm/degree C.
4. The solder joint of claim 1, wherein the PCB-side pad has a coefficient of thermal expansion of 15.0-19.0 ppm/° C, preferably 17.0ppm/° C; the bottom area of the PCB side bonding pad is 0.2mm2～0.42mm2Preferably 0.30mm2(ii) a The height of the PCB side bonding pad is 0.026-0.066 mm, and preferably 0.046 mm.
5. The solder joint of any of claims 1-4, wherein the solder joint has a thermal fatigue life of 1000-4300 cycles.
6. A system in a package structure, comprising: the PCB comprises a PCB, a chip packaging body and a welding spot for connecting the PCB and the chip packaging body, and is characterized in that the welding spot is provided with an inverted groove structure formed by coating a side welding disc of the PCB with soldering paste.
7. The system-in-package structure according to claim 6, wherein at least one of the following characteristics is satisfied: the height of the welding spot is 0.1-0.2 mm, the height of the PCB side welding disc is 0.026-0.066 mm, and the bottom area of the welding spot is 0.2mm2～0.42mm2The bottom area of the PCB side bonding pad is 0.2mm2～0.42mm2The expansion coefficient of the soldering paste is 17.9-25.9 ppm/DEG C, the thermal expansion coefficient of the PCB side bonding pad is 15.0-19.0 ppm/DEG C, the thermal expansion coefficient of the plastic packaging material of the chip packaging body is 5.5-8.5 ppm/DEG C, and the thermal expansion coefficient of the substrate medium of the chip packaging body is 6.5-10.5 ppm/DEG C.
8. The system-in-package structure of claim 7, wherein the height of the solder joint is 0.10mm, the height of the PCB side pad is 0.046mm, and the bottom area of the solder joint is 0.42mm2The bottom of the PCB side bonding padThe area is 0.30mm2The coefficient of thermal expansion of the solder paste is 21.9 ppm/DEG C, the coefficient of thermal expansion of the pad is 17.0 ppm/DEG C, the coefficient of thermal expansion of the molding compound of the chip package is 8.5 ppm/DEG C, and the coefficient of thermal expansion of the substrate medium of the chip package is 10.5 ppm/DEG C.
9. The system-in-package structure according to any one of claims 6-8, wherein the operating temperature of the system-in-package structure is in the range of-50 ℃ to 135 ℃, preferably in the range of-30 ℃ to 115 ℃.
10. The system-in-package structure of claim 6, wherein the system-in-package structure is an NB-IoT system-in-package structure.
CN202110410250.2A 2021-04-16 2021-04-16 Welding spot suitable for LGA packaging and system-in-package structure comprising same Pending CN113130430A (en)

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US20080185735A1 (en) * 2007-02-02 2008-08-07 Freescale Semiconductor, Inc. Dynamic pad size to reduce solder fatigue
CN102593067A (en) * 2011-01-10 2012-07-18 三星半导体(中国)研究开发有限公司 Interconnection structure for LGA (Land grid array) packaging with controllable welding spot height and manufacturing method of interconnection structure
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CN103779302A (en) * 2012-10-25 2014-05-07 飞思卡尔半导体公司 A packaged integrated circuit having large solder pads and method for forming
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