CN113128161A

CN113128161A - Method and process for collaborative design of electrical and thermal characteristics of integrated circuit package

Info

Publication number: CN113128161A
Application number: CN201911392661.2A
Authority: CN
Inventors: 蒋乐乐; 陆宇; 马松; 沈立
Original assignee: Haian Xinrun Integrated Circuit Technology Co ltd; Haian Ic Technology Innovation Center; Shanghai Research Institute of Microelectronics of Peking University
Current assignee: Haian Xinrun Integrated Circuit Technology Co ltd; Haian Ic Technology Innovation Center; Shanghai Research Institute of Microelectronics of Peking University
Priority date: 2019-12-30
Filing date: 2019-12-30
Publication date: 2021-07-16

Abstract

The invention discloses a method and a flow for the collaborative design of the electrical and thermal characteristics of integrated circuit packaging. The method is characterized in that the influence of the thermal and electrical characteristics of the package design on the performance of the integrated circuit is fully considered in the design stage, and the method is cooperatively optimized with the integrated circuit design of the core, so that the system performance can be optimized from the two aspects of the package design and the circuit design according to the factors such as cost, realization complexity and the like, and the flexibility of the package design is improved. The design method and the design process mainly comprise physical design of the package, electrical parameter extraction, thermal parameter extraction, integrated circuit design, mixed mode simulation considering the package and the integrated circuit, and output integrated circuit design meeting design requirements and the physical design of the package.

Description

Method and process for collaborative design of electrical and thermal characteristics of integrated circuit package

Technical Field

The present invention relates to package design for electronic circuits, and to automated and computer-aided design of electronic circuits, packages.

Background

With the continuous progress of electronic technology and integrated circuit technology, the clock rate of a digital system is higher and higher, the signal edge rate is faster and faster, from the electrical performance perspective, the interconnection between high-speed signals is no longer smooth and transparent, and the influence of the wire interconnection and the board layer characteristics of a high-speed PCB on the system cannot be simply ignored. Among the package interconnections are gold wires, metal lines of the substrate, vias and corners, stub wires, solder balls, etc., which are often considered as simple transmission lines in low frequency signals. When the system working frequency is very high, the wire interconnecting the devices is not a simple wire transparent to signals but a parasitic element with time delay and instantaneous impedance distribution, which can generate time delay and cause signal waveform distortion, interference and the like. The influence of the parasitic effect on the performance of the high-frequency device is more and more obvious, and in order to fully consider the influence of parasitic parameters in the design of the high-frequency device, the parasitic effect of the package needs to be simulated so as to keep the signal integrity and the power integrity of the high-frequency circuit after the package. The method comprises the steps of extracting RLC parameters and S parameters of the three-dimensional packaging structure under high frequency, analyzing the change condition of parasitic parameters of the tube shell before and after packaging, under different frequencies and under different packaging environments, comparing simulation results with experiment results, and providing basis for designers to design products. How to deal with signal integrity problems such as reflection, crosstalk, switching noise and the like caused by high-speed signal connection lines and ensure the quality of signal transmission is a key for successful design. A good signal integrity design needs to run through all stages of the whole design, potential signal integrity problems can be solved to the maximum extent in the design stage, and the design has guiding significance in high-speed system design. In order to improve the performance, reduce the price and increase the reliability of the electronic system, the chip needs to be packaged in a space as small as possible, and the power of the chip is increasing, which results in an increasing heat generation amount, so that the thermal design has to face a contradiction of maintaining a high heat generation rate and a relatively low device temperature. The thermal analysis is to analyze and calculate the thermal field behavior of a specific design scheme to obtain the temperature field distribution, and then to analyze the extreme point condition in the temperature distribution field and feed back the extreme point condition to the layout and thermal design process to provide a specific improvement scheme, thereby forming a design flow of design, analysis, re-design and re-analysis. The main functions of the lead frame in the packaging structure are to provide a mechanical support carrier for the chip, serve as a conductive medium to be connected with an IC external circuit, transmit electric signals and outwards radiate heat generated during the operation of the chip together with the packaging material, so that special requirements are provided for the heat conductivity, strength and hardness of the selected material of the lead frame to enhance the reliability and heat radiation performance.

Disclosure of Invention

The invention provides a method and a process for cooperatively designing electrical and thermal characteristics of integrated circuit package. The influence of the electrical and thermal characteristics of the package is fully considered in the design stage, the system performance is optimized from two design freedom degrees of a circuit and the package, and the design flexibility and the one-time design success rate of the product are improved.

The invention provides a method and a process for cooperatively designing electrical and thermal characteristics of integrated circuit package, which comprises the following steps:

the method comprises the steps of physical design of packaging, electrical parameter extraction, thermal parameter extraction, integrated circuit design, mixed mode simulation considering packaging and integrated circuits, and output of integrated circuit design meeting design requirements and physical design of packaging.

The invention provides an electronic product packaging electricity modeling method and a flow, which comprises the following steps:

the electrical parameter extraction module and the electrical parameter automatic optimization module;

and the electrical parameter automatic optimization module calls the data generated by the mechanical parameter extraction module to optimize the mechanical parameters.

The invention provides a thermal parameter extraction process for packaging design. The method comprises the following steps:

the original packaging file generated based on the mainstream packaging design tool is subjected to automatic extraction of thermal characteristics, converted into corresponding electrical parameters and subjected to parameter conversion suitable for electrical simulation.

the mixed-mode simulation method considering the integrated circuit design, the package electrical and thermal characteristic extraction results comprises an automatic loading interface for inputting data and an automatic output of circuit design and package files meeting the requirements.

Drawings

Fig. 1 is a schematic diagram of a conventional electronic product design flow considering circuit design and package design.

FIG. 2 is a schematic diagram of a novel integrated circuit package electrical and thermal characteristics co-design method and process.

Detailed Description

The method and process for designing the integrated circuit package with the cooperative electrical and thermal characteristics will be described in detail with reference to the accompanying drawings.

The embodiment provides a method and a flow for cooperatively designing electrical and thermal characteristics of integrated circuit package, and fig. 2 is a schematic diagram for implementing the method, which comprises the steps of reading in 001 package design indexes, reading in 002 integrated circuit indexes, completing physical design of package according to the indexes 003, completing design of integrated circuit according to the indexes 004, extracting electrical parameters of physical package design by 005, extracting thermal parameters of physical package design by 006, simulating and verifying mixed mode of package design extraction results and circuit design results by 007, and outputting package and circuit design results meeting product requirements by 008.

Step 001, reading design indexes of product packaging;

step 002, reading design indexes of the integrated circuit;

step 003, finishing the physical design of the encapsulation on a mainstream encapsulation design platform according to the index of the encapsulation design, and outputting a design file;

step 004, completing circuit design on a mainstream circuit design platform according to indexes of the circuit design, and outputting a design file;

and 005, extracting the electrical parameters of the converted package design file by the package design electrical parameter extraction module.

Step 006, the thermal parameter extraction module extracts thermal parameters of the converted package design file, and completes conversion of the thermal parameters to the simulatable model.

And step 007, performing mixed-mode simulation and verification on the integrated circuit design result and the extracted electrical and thermal characteristic parameters.

And step 008, outputting a package design file and a circuit design file which meet the requirements.

Claims

1. A method and process for the co-design of electrical and thermal characteristics of an integrated circuit package. The method comprises the following steps: the method comprises the steps of physical design of packaging, electrical parameter extraction, thermal parameter extraction, integrated circuit design, mixed mode simulation considering packaging and integrated circuits, and output of integrated circuit design meeting design requirements and physical design of packaging.

2. The electrical parameter extraction process for package design as claimed in claim 1. The method is characterized in that the automatic extraction of the thermal characteristics is carried out on the basis of an original packaging file generated by a mainstream packaging design tool, and the thermal characteristics are converted into corresponding electrical parameters.

3. The thermal parameter extraction process for package design as claimed in claim 1. The method is characterized in that the original packaging file generated based on the mainstream packaging design tool is subjected to automatic extraction of thermal characteristics and converted into corresponding electrical parameters.

4. The hybrid mode simulation method of claim 1, wherein the hybrid mode simulation is performed on the integrated circuit design results and the extracted electrical and thermal characteristic parameters.

5. The mixed-mode simulation method data reading interface of claim 1, wherein the results of extracting electrical and thermal characteristics of the integrated circuit design, the package design, and the like are loaded to the hybrid simulation platform in real time.

6. The design file for output packages and circuits according to claim 1, wherein design files meeting design requirements (optimized) are automatically output.