CN113128145A - Synchronous rectification Buck circuit small signal modeling method - Google Patents

Synchronous rectification Buck circuit small signal modeling method Download PDF

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CN113128145A
CN113128145A CN202110304179.XA CN202110304179A CN113128145A CN 113128145 A CN113128145 A CN 113128145A CN 202110304179 A CN202110304179 A CN 202110304179A CN 113128145 A CN113128145 A CN 113128145A
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杭丽君
李子阳
杨成林
刘兆燊
尤勇
何震
何远彬
曾平良
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Hangzhou Dianzi University
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Abstract

The invention discloses a synchronous rectification Buck circuit small signal modeling method, which is used for linearizing an established large signal equivalent circuit and establishing a small signal model by combining a mathematical model, thereby obtaining a small signal model of control-output of a Buck circuit considering PWM influence. On the basis of which the control delay t of the digital control loop is taken into accountcntrlAnd a modulation delay tDPWMFurther, a z-domain small signal model of the Buck circuit is disclosed. The invention linearizes the equivalent circuit, discusses the small signal characteristic by combining with the mathematical model, and can obtain the small signal model of the control-output of the Buck circuit considering the PWM influence. The invention takes into account the control delay t of the digital control loopcntrlAnd a modulation delay tDPWMOn the basis, a z-domain small signal model of the Buck circuit can be obtained from the equivalent circuit. Therefore, a new idea is provided for the control and stability analysis of the digital control mode synchronous rectification Buck circuit of the PWM modulation mode and other related research works.

Description

Synchronous rectification Buck circuit small signal modeling method
Technical Field
The invention belongs to the field of circuit modeling, and relates to a synchronous rectification Buck circuit small signal modeling method.
Background
With the continuous development and maturity of digital processing technology, the superiority is increasingly highlighted. The digital control is not influenced by the aging of circuit components, and the anti-interference capability is stronger when the environment and the temperature change; more importantly, the digital control technology realizes a complex nonlinear control strategy in a flexible software programming mode, so that the switching power supply is more intelligent and universal. But at the same time, due to the delay control characteristic of software, the digital control system can present nonlinear dynamic behavior different from that of the analog control system.
The state space average model is the most widely applied DC-DC circuit modeling method at present. The average equivalent circuit of the system can be established after high-frequency switching ripples are ignored, and the method is visual and convenient to analyze. However, the original state-averaging model not only ignores the effect of the switching timing on the circuit, but also does not reflect the control and modulation delays of the loop.
For a digital control system, a discrete mapping model gradually becomes a main modeling method, and the description of a circuit is more suitable for actual characteristics and more accurate. However, the derivation process of the discrete model is very complex, involves a large number of matrix functions and integral operations, and the analysis of the model usually depends on numerical calculation; and no corresponding equivalent circuit exists, the physical significance is not clear enough, and the engineering application is not facilitated.
Disclosure of Invention
In order to solve the problems, the technical scheme of the invention is a synchronous rectification Buck circuit small signal modeling method, and the control delay t of a digital control loop is consideredcntrlAnd a modulation delay tDPWMOn the basis, a z-domain small signal model of the Buck circuit can be obtained from the equivalent circuit. Thereby being digital in PWM modulation modeThe control mode synchronous rectification Buck circuit provides a new idea for related research works such as control and stability analysis.
The method comprises the following steps:
s10, according to the working principle of the synchronous rectification Buck circuit, two switch states in a period are described by a state equation and an output equation;
s20, modeling the synchronous rectification Buck converter in consideration of the PWM modulation mode;
s30, deriving a large-signal equivalent circuit corresponding to the discrete iteration model;
s40, linearizing the large signal equivalent circuit to obtain an S-domain small signal model;
and S50, constructing a z-domain small signal model based on the digital control characteristics.
Preferably, the description of two switch states in a period by using a state equation and an output equation according to the working principle of the synchronous rectification Buck circuit includes:
according to different switching-on sequences of switching tubes of the synchronous Buck circuit, two switching states are defined as a switching state I and a switching state II respectively; both switch states are described by the following continuous state equation and output equation:
Figure BDA0002987442160000021
wherein x (t) ═ (i)L(t)vc(t))TRepresenting state variables of the system, by flowing through an inductance LsCurrent i ofL(t) and the voltage v across the capacitorc(t) represents the output variable of the system, y (t) represents the output voltage v of the systemo(t)，VinRepresents an input voltage; a. theN、BNAnd CNRespectively a system state matrix, an input matrix and an output matrix, subscript N represents the corresponding Nth switch sub-state, and a capacitor is connected with an equivalent resistor R in seriescEquivalent resistance R connected in series with inductoresAlso considered in the model is a state matrix (A) of two switch sub-states of Buck circuitI，AII) Input matrix (B)I，BII) And an output matrix (C)I，CII) Respectively is as follows:
Figure BDA0002987442160000031
preferably, the synchronous rectification Buck converter considering the PWM modulation scheme is modeled, and when modeling is performed on a Buck circuit in the trailing-edge modulation scheme, an iterative relationship of converter state variables is established in one switching period, and a state equation in the equation set (1) is subjected to a one-cycle time interval [0, dT [ ]s]And [ dTs，Ts]And (3) performing internal integration to obtain a state transition equation of the state variable in the same sub-state duration:
Figure BDA0002987442160000032
Figure BDA0002987442160000033
where d is the duty cycle under PWM modulation, TsIs a switching cycle; x is the number ofn，0The value of the state variable at the initial moment of the nth switching period can be recorded as x [ n ]]；xn，2The value of the state variable at the beginning of the (n + 1) th switching cycle can be written as x (n + 1)]；xn，1A value representing a state variable at the time of switching of the switch state; iterating each sub-state by using a state transition equation, and establishing a discrete iteration model which is mapped from the state variable at the initial moment of one switching period to the state variable at the initial moment of the next switching period:
x[n+1]＝GTEMx[n]+HTEMVin (4)
wherein, the discrete domain state matrix G under the trailing edge modulation modeTEMAnd an input matrix HTEMComprises the following steps:
Figure BDA0002987442160000034
the modeling method described above is equally applicable to leading edge modulation, triangular leading edge modulation, and triangular trailing edge modulation.
Preferably, the deriving a large-signal equivalent circuit corresponding to the discrete iterative model includes:
the state equation of the full-order large-signal equivalent circuit of the converter is expressed as:
Figure BDA0002987442160000041
wherein A iseq，TEMAnd Beq，TEMThe state matrix and the input matrix of the large signal equivalent circuit in a trailing edge modulation mode are used; similarly, the discrete state transition equation of the equivalent circuit obtained by integrating the state equation of the equivalent circuit is as follows:
x[n+1]＝Geq，TEMx[n]+Heq，TEMVin (6)
wherein, the state matrix G in discrete domain of the large-signal equivalent circuiteq，TEMAnd an input matrix Heq，TEMComprises the following steps:
Figure BDA0002987442160000042
in order to enable the established large-signal circuit model to accurately describe the dynamic characteristics of the converter, the large-signal equivalent circuit and the discrete state matrix of the converter meet the precise approximate relationship, namely the following conditions are met:
Figure BDA0002987442160000043
b is calculated according to equations (3) - (8)eq，TEM：
Figure BDA0002987442160000044
To Beq，TEMMake period TsThe higher-order components are omitted because of being too small, and the term of the lowest order is reserved for approximation:
Figure BDA0002987442160000045
the state equation for determining the equivalent circuit of the system is:
Figure BDA0002987442160000046
to construct an equivalent circuit diagram corresponding to equation (11), equation (11) is written in the form of a system of differential equations:
Figure BDA0002987442160000047
Figure BDA0002987442160000051
Figure BDA0002987442160000052
wherein formula (12a) represents the slope of the change of the inductor current, i.e. the voltage v across the inductorL(t); the equation (12b) shows the slope of the change in the capacitor voltage, i.e. the current i across the capacitorc(t); equation (12c) is the relationship between the output voltage and the capacitor voltage; energy is dependent on input current iin(t) providing, during a cycle, a relationship between input current and inductor current as:
iin(t)＝diL(t) (13)
constructing an equivalent circuit model of the synchronous Buck under the trailing edge modulation by combining the formula (12) and the formula (13);
the same applies to the leading edge modulation, the triangular leading edge modulation and the triangular trailing edge modulation.
Preferably, the linearizing large-signal equivalent circuit obtains an s-domain small-signal model, including:
writing the state variable and the control variable of the equivalent circuit in (11) as the sum of the steady state quantity and the disturbance quantity, i.e. writing
Figure BDA0002987442160000053
Figure BDA0002987442160000054
Figure BDA0002987442160000055
Figure BDA0002987442160000056
Wherein, IL、Vo、D、VcFor the purpose of the steady-state component,
Figure BDA0002987442160000057
a small disturbance amount; eliminating steady-state components, and neglecting disturbance components with more than second order to obtain a linearized equivalent s-domain small signal state equation and an output equation:
Figure BDA0002987442160000061
solving a transfer function G of the Buck circuit from control to output voltage by an equivalent s-domain small signal state equationeq，TEM，vd(s) is:
Figure BDA0002987442160000062
wherein:
Figure BDA0002987442160000063
Figure BDA0002987442160000064
Figure BDA0002987442160000071
Figure BDA0002987442160000072
the same applies to the leading edge modulation, the triangular leading edge modulation and the triangular trailing edge modulation.
Preferably, the constructing a z-domain small signal model based on digital control characteristics includes:
modeling the digital control system takes into account the modulation delay introduced by the PWM modulation and the control delay; PWM modulation delay reaction in model, namely zero-order keeper link Goh(s) controlling the delay to be a period of delay, expressed as a first-order delay element; split ring transfer function Goh(s)Geq，TEM，vd(s) performing z-transform and multiplying by delay element Gdelay(z) obtaining a control-to-output z-domain transfer function G of the systemeq，TEM(z)：
Figure BDA0002987442160000073
Wherein:
Figure BDA0002987442160000074
Figure BDA0002987442160000075
the same applies to the leading edge modulation, the triangular leading edge modulation and the triangular trailing edge modulation.
The invention has at least the following beneficial effects: the equivalent circuit is linearized and discussed with a mathematical model for its small signal characteristics, and a z-domain small signal model reflecting the digital control characteristics can be obtained. The influence of different PWM modulation modes on the system is researched by utilizing the deduced large-signal equivalent model and the z-domain small-signal model, and the essence of the effect of the modulation mode in the digital control Buck circuit on the system is disclosed. Therefore, a new idea is provided for the control and stability analysis of the digital control mode synchronous rectification Buck circuit of the PWM modulation mode and other related research works.
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FIG. 1 is a voltage mode digitally controlled synchronous rectification Buck circuit topology according to an embodiment of the present invention;
fig. 2(a) is a topology structure diagram of a digitally controlled synchronous rectification Buck circuit in a switching state I according to an embodiment of the present invention;
fig. 2(b) is a topology structure diagram of the digitally controlled synchronous rectification Buck circuit in the switching state II according to the embodiment of the present invention;
FIG. 3 is a schematic diagram of an exemplary state variable timing diagram of a digitally controlled synchronous rectification Buck circuit in a trailing edge modulation mode according to an embodiment of the present invention;
FIG. 4 is a Buck circuit equivalent circuit diagram based on trailing edge modulation according to an embodiment of the present invention;
fig. 5 is a block diagram of a digital control Buck equivalent circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
On the contrary, the invention is intended to cover alternatives, modifications, equivalents and alternatives which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, certain specific details are set forth in order to provide a better understanding of the present invention. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details.
On the basis of an iterative model in a discrete domain, the embodiment of the invention establishes a large-signal equivalent discrete model of a digital control Buck circuit by carrying out identity transformation and approximation on a discrete state equation and combining a PWM (pulse width modulation) modulation mode, and fully considers the influence of the time sequence of a switch on a system. Based on which the control delay t is based on the loopcntrlAnd a modulation delay tDPWMAnd deducing a z-domain small signal model of the system. The synchronous Buck circuit small signal modeling method based on digital control specifically comprises the following steps:
in S10, obtaining a state matrix and an input matrix of the Buck circuit in two operating modes, specifically:
as shown in fig. 1, the digital control Buck circuit is composed of a main power circuit and a digital control circuit. The main power circuit comprises an input voltage source VinMain switch tube S1And a rectifier switch tube S2Inductor LsAn output capacitor CsAnd a load resistor Ro. The current through the inductor L is denoted by iL (t)sCurrent of vo(t) and vc(t) represents the output voltage and the capacitance C, respectivelysThe voltage across the terminals. The digital control part comprises an A/D conversion module, a digital compensation link and a DPWM module. The digital controller will be in the nth switching period Ts，nInitial time to output voltage vo(t) sampling and applying the algorithmically calculated control commands u [ n ]]Delaying the output by one cycle to give the n +1 th switching period Ts，n+1PWM modulation duty ratio d [ n +1 ]]。
As shown in fig. 2, the working principle of two corresponding switch states of the Buck circuit is briefly described as follows:
1) switching state I: as shown in FIG. 2(a), the main switching tube S1Conducting rectifying tube S2Turn off, at the moment, the voltage at two ends of the inductor is Vin-vo(t) of (d). Input voltage VinFor inductor LsAnd a capacitor CsCharging while simultaneously applying a voltage to a load RoPower supply with inductor current at S1The on time rises linearly from the initial value to a peak value. The state equation for the circuit for switch state I is described as:
Figure BDA0002987442160000091
2) and (3) switching state II: as shown in fig. 2(b), the main switching tube S1Turn-off, rectifying tube S2Conducting when the voltage across the inductor is-vo(t) of (d). Inductor LsTo the capacitor CsAnd a load RoDischarge with inductor current at S2The opening time decreases linearly to the valley. The state equation for the circuit in switch state II is described as:
Figure BDA0002987442160000092
both switch states can be described by the following continuous state equation and output equation:
Figure BDA0002987442160000093
in the formula: x (t) ═ iL(t)vc(t))TRepresenting state variables of the system, by flowing through an inductance LsCurrent i ofL(t) and the voltage v across the capacitorc(t) represents the output variable of the system, y (t) represents the output voltage v of the systemo(t)，VinRepresenting the input voltage. A. theN、BNAnd CNRespectively a system state matrix, an input matrix and an output matrix, subscript N represents the corresponding Nth switch sub-state, and a capacitor is connected with an equivalent resistor R in seriescEquivalent resistance R connected in series with inductoresAre also taken into account in the model. So that the Buck circuit has a state matrix (A) of two switching sub-statesI，AII) Input matrix (B)I，BII) And an output matrix (C)I，CII) Respectively, respectivelyComprises the following steps:
Figure BDA0002987442160000101
and S20-S40, establishing a large-signal equivalent circuit. The method comprises the following steps:
as shown in fig. 3, it is a typical schematic diagram of state variables in the trailing edge modulation mode, and the start time of each switching period is used as a sampling point. For convenience of introduction, a Buck circuit in a trailing edge modulation mode is modeled. x is the number ofn，0The value of the state variable at the initial moment of the nth switching period can be recorded as x [ n ]]；xn，2The value of the state variable at the beginning of the (n + 1) th switching cycle can be written as x (n + 1)]；xn，1Denotes S1，S2The value of the state variable at the time of switching of the switch state. x is the number ofn，0And xn，1And xn，1And xn，2The state variable transition relationship between the two can be respectively represented by the equation (s1) and the equation (s2) in the single-cycle time interval [0, dTs]And [ dTs，Ts]The internal integration yields:
Figure BDA0002987442160000102
Figure BDA0002987442160000103
iterating the two discrete state equations of equations (s5a) and (s5b) to obtain the exact discrete state equation between two adjacent sample points as:
x[n+1]＝GTEMx[n]+HTEMVin (s6)
wherein the discrete domain state matrix G under the trailing edge modulation modeTEMAnd an input matrix HTEMComprises the following steps:
Figure BDA0002987442160000104
for a digitally controlled Buck circuit, the state equation of its equivalent circuit can be expressed in the form:
Figure BDA0002987442160000111
wherein A iseq，TEMAnd Beq，TEMThe state matrix and the input matrix of the large signal equivalent circuit in a trailing edge modulation mode are used; the discrete state transition equation for the equivalent circuit, still integrated over a period for the equivalent circuit's state equation (s7), can be:
x[n+1]＝Geq，TEMx[n]+Heq，TEMVin (s8)
wherein, the state matrix G in discrete domain of the large-signal equivalent circuiteq，TEMAnd an input matrix Heq，TEMComprises the following steps:
Figure BDA0002987442160000112
making the equivalent discrete model and the exact discrete model sufficiently approximate, i.e. making the terms of equation (s6) and equation (s8) correspond equally, can be:
Figure BDA0002987442160000113
b is calculated from equations (s5) - (s9)eq，TEM：
Figure BDA0002987442160000114
To Beq，TEMMake period TsThe higher-order components of the series expansion are too small to be omitted, and the term with the lowest order is kept to be approximated:
Figure BDA0002987442160000115
this way, the equation of state of the equivalent circuit of the system can be determined as:
Figure BDA0002987442160000116
to construct an equivalent circuit diagram corresponding to equation (s12), equation (s12) is written in the form of a system of differential equations:
Figure BDA0002987442160000117
Figure BDA0002987442160000121
Figure BDA0002987442160000122
wherein the formula (s13a) represents the slope of the change of the inductor current, i.e. the voltage v across the inductorL(t); wherein the formula (s13b) represents the slope of the change of the capacitor voltage, i.e. the current i across the capacitorc(t); equation (s13c) is the relationship between the output voltage and the capacitor voltage. The energy requirement of the system depends on the input current iin(t) providing, during a cycle, a relationship between input current and inductor current as:
iin(t)＝diL(t) (s14)
the equivalent circuit model of the synchronous Buck under trailing edge modulation shown in FIG. 4 is constructed by combining the equation (s13) and the equation (s 14). This procedure is equally applicable to leading edge modulation, triangular leading edge modulation and triangular trailing edge modulation.
S50, constructing a z-domain small signal model based on the digital control characteristics;
writing (s12) the state variable and the control variable of the equivalent circuit as the sum of the steady-state quantity and the disturbance quantity, i.e. the sum
Figure BDA0002987442160000123
Figure BDA0002987442160000124
Figure BDA0002987442160000125
Figure BDA0002987442160000126
Wherein, IL、Vo、D、Vin、VcFor the purpose of the steady-state component,
Figure BDA0002987442160000127
is a small disturbance quantity. Eliminating steady-state components, and neglecting disturbance components with more than second order, so as to obtain a linearized equivalent s-domain small signal state equation and an output equation:
Figure BDA0002987442160000128
from an equivalent s-domain small signal state equation, the transfer function of the Buck circuit from control to output voltage can be calculated as follows:
Figure BDA0002987442160000131
wherein:
Figure BDA0002987442160000132
Figure BDA0002987442160000133
Figure BDA0002987442160000134
Figure BDA0002987442160000135
referring to fig. 5, which is a block diagram of a digitally controlled Buck circuit, a digitally controlled Buck closed-loop system samples an output voltage through a sampling resistor and performs analog-to-digital conversion at an a/D conversion site. At the a/D sampling, the output voltage is discretized into a digital quantity, and due to the characteristics of periodic sampling, the whole circuit has a zero-order keeper effect. The A/D converter can be equivalent to a zero-order keeper and a period of TsThe sampling switch of (1); the sampled digital quantity is transmitted to the DSP for calculation, and a control signal is generated according to different control algorithms to control the power circuit, so that the DSP can be equivalent to a digital controller G in a structural diagram in consideration of the control characteristic of the DSP itself, namely the control one-cycle delayc(s) a delay element z-1And one period is TsThe sampling switches of (2) are connected in series. Split ring transfer function Goh(s)Geq，TEM，vd(s) performing z-transform and multiplying by delay element Gdelay(z) a z-domain transfer function G from control to output of the system can be obtainedeq，TEM(z)：
Figure BDA0002987442160000141
Wherein:
Figure BDA0002987442160000142
Figure BDA0002987442160000143
this procedure is equally applicable to leading edge modulation, triangular leading edge modulation and triangular trailing edge modulation.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (6)

1. A synchronous rectification Buck circuit small signal modeling method is characterized by comprising the following steps:
s10, according to the working principle of the synchronous rectification Buck circuit, two switch states in a period are described by a state equation and an output equation;
s20, modeling the synchronous rectification Buck converter in consideration of the PWM modulation mode;
s30, deriving a large-signal equivalent circuit corresponding to the discrete iteration model;
s40, linearizing the large signal equivalent circuit to obtain an S-domain small signal model;
and S50, constructing a z-domain small signal model based on the digital control characteristics.
2. The method of claim 1, wherein describing two switch states in a cycle with a state equation and an output equation according to the operating principle of the synchronous rectification Buck circuit comprises:
according to different switching-on sequences of switching tubes of the synchronous Buck circuit, two switching states are defined as a switching state I and a switching state II respectively; both switch states are described by the following continuous state equation and output equation:
Figure FDA0002987442150000011
wherein x (t) ═ (i)L(t) vc(t))TRepresenting state variables of the system, by flowing through an inductance LsCurrent i ofL(t) and the voltage v across the capacitorc(t) watchY (t) represents the output variable of the system, the output variable being the output voltage v of the systemo(t)，VinRepresents an input voltage; a. theN、BNAnd CNRespectively a system state matrix, an input matrix and an output matrix, subscript N represents the corresponding Nth switch sub-state, and a capacitor is connected with an equivalent resistor R in seriescEquivalent resistance R connected in series with inductoresAlso considered in the model is a state matrix (A) of two switch sub-states of Buck circuitI，AII) Input matrix (B)I，BII) And an output matrix (C)I，CII) Respectively is as follows:
Figure FDA0002987442150000021
3. the method of claim 2, wherein the synchronous rectification Buck converter considering the PWM modulation mode is modeled, and when the Buck circuit under the trailing edge modulation mode is modeled, an iterative relationship of converter state variables is established in one switching period, and the state equations in the equation set (1) are processed in a single-period time interval [0, dT [ ]s]And [ dTs,Ts]And (3) performing internal integration to obtain a state transition equation of the state variable in the same sub-state duration:
Figure FDA0002987442150000022
Figure FDA0002987442150000023
where d is the duty cycle under PWM modulation, TsIs a switching cycle; x is the number ofn,0The value of the state variable at the initial moment of the nth switching period can be recorded as x [ n ]]；xn,2The value of the state variable at the beginning of the (n + 1) th switching cycle can be written as x (n + 1)]；xn,1A value representing a state variable at the time of switching of the switch state; iterating each sub-state by using a state transition equation, and establishing a discrete iteration model which is mapped from the state variable at the initial moment of one switching period to the state variable at the initial moment of the next switching period:
x[n+1]＝GTEMx[n]+HTEMVin (4)
wherein, the discrete domain state matrix G under the trailing edge modulation modeTEMAnd an input matrix HTEMComprises the following steps:
Figure FDA0002987442150000024
the modeling method described above is equally applicable to leading edge modulation, triangular leading edge modulation, and triangular trailing edge modulation.
4. The method of claim 3, wherein the deriving a large-signal equivalent circuit for the discrete iterative model comprises:
the state equation of the full-order large-signal equivalent circuit of the converter is expressed as:
Figure FDA0002987442150000031
wherein A iseq，TEMAnd Beq，TEMThe state matrix and the input matrix of the large signal equivalent circuit in a trailing edge modulation mode are used; similarly, the discrete state transition equation of the equivalent circuit obtained by integrating the state equation of the equivalent circuit is as follows:
x[n+1]＝Geq，TEMx[n]+Heq，TEMVin (6)
wherein, the state matrix G in discrete domain of the large-signal equivalent circuiteq，TEMAnd an input matrix Heq，TEMComprises the following steps:
Figure FDA0002987442150000032
in order to enable the established large-signal circuit model to accurately describe the dynamic characteristics of the converter, the large-signal equivalent circuit and the discrete state matrix of the converter meet the precise approximate relationship, namely the following conditions are met:
Figure FDA0002987442150000033
b is calculated according to equations (3) - (8)eq，TEM：
Figure FDA0002987442150000034
To Beq,TEMMake period TsThe higher-order components are omitted because of being too small, and the term of the lowest order is reserved for approximation:
Figure FDA0002987442150000035
the state equation for determining the equivalent circuit of the system is:
Figure FDA0002987442150000041
to construct an equivalent circuit diagram corresponding to equation (11), equation (11) is written in the form of a system of differential equations:
Figure FDA0002987442150000042
Figure FDA0002987442150000043
Figure FDA0002987442150000044
wherein formula (12a) represents the slope of the change of the inductor current, i.e. the voltage v across the inductorL(t); the equation (12b) shows the slope of the change in the capacitor voltage, i.e. the current i across the capacitorc(t); equation (12c) is the relationship between the output voltage and the capacitor voltage; energy is dependent on input current iin(t) providing, during a cycle, a relationship between input current and inductor current as:
iin(t)＝diL(t) (13)
constructing an equivalent circuit model of the synchronous Buck under the trailing edge modulation by combining the formula (12) and the formula (13);
the same applies to the leading edge modulation, the triangular leading edge modulation and the triangular trailing edge modulation.
5. The method of claim 4, wherein linearizing the large-signal equivalent circuit yields an s-domain small-signal model comprising:
writing the state variable and the control variable of the equivalent circuit in (11) as the sum of the steady state quantity and the disturbance quantity, i.e. writing
Figure FDA0002987442150000045
Figure FDA0002987442150000046
Figure FDA0002987442150000047
Figure FDA0002987442150000048
Wherein, IL、Vo、D、VcFor the purpose of the steady-state component,
Figure FDA0002987442150000049
a small disturbance amount; eliminating steady-state components, and neglecting disturbance components with more than second order to obtain a linearized equivalent s-domain small signal state equation and an output equation:
Figure FDA0002987442150000051
solving a transfer function G of the Buck circuit from control to output voltage by an equivalent s-domain small signal state equationeq,TEM,vd(s) is:
Figure FDA0002987442150000052
wherein:
Figure FDA0002987442150000053
Figure FDA0002987442150000054
Figure FDA0002987442150000061
Figure FDA0002987442150000062
the same applies to the leading edge modulation, the triangular leading edge modulation and the triangular trailing edge modulation.
6. The method of claim 5, wherein constructing the z-domain small signal model based on the numerical control characteristics comprises:
modeling the digital control system takes into account the modulation delay introduced by the PWM modulation and the control delay; PWM modulation delay reaction in model, namely zero-order keeper link Goh(s) controlling the delay to be a period of delay, expressed as a first-order delay element; split ring transfer function Goh(s)Geq,TEM,vd(s) performing z-transform and multiplying by delay element Gdelay(z) obtaining a control-to-output z-domain transfer function G of the systemeq,TEM(z)：
Figure FDA0002987442150000063
Wherein:
Figure FDA0002987442150000064
Figure FDA0002987442150000065
the same applies to the leading edge modulation, the triangular leading edge modulation and the triangular trailing edge modulation.
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