CN113114706A - Multichannel Ethernet message processing method based on power chip - Google Patents
Multichannel Ethernet message processing method based on power chip Download PDFInfo
- Publication number
- CN113114706A CN113114706A CN202110663173.1A CN202110663173A CN113114706A CN 113114706 A CN113114706 A CN 113114706A CN 202110663173 A CN202110663173 A CN 202110663173A CN 113114706 A CN113114706 A CN 113114706A
- Authority
- CN
- China
- Prior art keywords
- packet data
- ethernet packet
- module
- analyzed
- control instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/18—Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/22—Parsing or analysis of headers
Abstract
The application relates to a multichannel Ethernet message processing method based on a power chip. The method comprises the following steps: receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction; according to the control instruction, a programmable message analyzer carried on a general MAC module is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data; and sending the analyzed Ethernet packet data to a system memory for storage. By adopting the method, the universality of the power Ethernet packet data analysis can be improved and the hardware cost can be reduced.
Description
Technical Field
The present application relates to the field of network technologies, and in particular, to a multi-channel ethernet packet processing method based on a power chip.
Background
The IEC61850 standard is the only international standard for power transformation automation systems based on a universal network communication platform. The standardization of engineering operation of the intelligent substation is realized through standard realization. The ethernet packet in IEC61850 format has multiple types of ethernet type messages, such as SV message and GOOSE message.
Some application scenarios need to subscribe to a specific type of ethernet packet, for example, only receive SV packets, and a device capable of screening ethernet packets is needed to implement this function. Since the Media Access Control (MAC) can only perform simple ethernet packet processing, this function cannot be realized. The current implementation mode mainly adopts a simple stacking hardware circuit to realize the Ethernet package subscription function under different rules, can not be flexibly configured to adapt to the service requirements under various scenes, and needs to use a large amount of hardware resources to complete the service requirement function.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a multi-channel ethernet packet processing method based on power chip, which can improve the versatility of the data parsing of the power ethernet packet and reduce the hardware cost.
A multichannel Ethernet message processing method based on a power chip comprises the following steps:
receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction;
according to the control instruction, a programmable message analyzer carried on a general MAC module is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data;
and sending the analyzed Ethernet packet data to a system memory for storage.
In one embodiment, the controlling, according to the control instruction, a programmable packet parser mounted on a general MAC module to perform recognition parsing on the ethernet packet data to obtain parsed ethernet packet data includes:
controlling a programmable message analyzer carried on a general MAC module to identify the Ethernet packet data according to the control instruction, and determining the type of the Ethernet packet data;
and calling an analysis code corresponding to the type to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data.
In one embodiment, before the generating the control instruction, the method further comprises:
and transmitting the Ethernet packet data to a storage controller for storage through a transport layer controller, and executing the step of generating the control command.
In one embodiment, the controlling, according to the control instruction, a programmable packet parser mounted on a general MAC module to perform recognition parsing on the ethernet packet data to obtain parsed ethernet packet data includes:
according to the control instruction, a programmable message analyzer carried outside a general MAC module is controlled, and the Ethernet packet data acquired from the storage controller is analyzed to obtain analyzed Ethernet packet data; the mounting outside the MAC means mounting on an integrated circuit outside the MAC.
In one embodiment, before the generating the control instruction, the method further comprises:
sending the Ethernet packet data to a programmable message analyzer carried in a general MAC module, and executing the step of generating the control command; the mounting inside the general MAC module means mounting between the MAC controller module and the transport layer controller module inside the general MAC module.
In one embodiment, the controlling, according to the control instruction, a programmable packet parser mounted on a general MAC module to perform recognition parsing on the ethernet packet data to obtain parsed ethernet packet data includes:
controlling the programmable message analyzer to analyze the Ethernet packet data in real time according to the control instruction to obtain analyzed Ethernet packet data;
the sending the analyzed ethernet packet data to a system memory for storage includes:
transmitting the analyzed Ethernet packet data to a storage controller through a transmission layer controller;
and storing the analyzed Ethernet packet data in a system memory through the storage controller.
In one embodiment, the message parser and the MAC controller, the transport layer controller have the same information exchange mode as the MAC controller and the transport layer controller.
A power chip based multi-channel ethernet message processing system, the system comprising:
the receiving module is used for receiving the Ethernet packet data of at least one channel subscribed according to the power service requirement and generating a control instruction;
the control module is used for controlling a programmable message analyzer carried on a general MAC module to identify and analyze the Ethernet packet data according to the control instruction to obtain analyzed Ethernet packet data;
and the sending module is used for sending the analyzed Ethernet packet data to a system memory for storage.
A power device comprising a memory and a processor, the memory storing a computer program, the processor implementing the following steps when executing the computer program:
receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction;
according to the control instruction, a programmable message analyzer carried on a general MAC module is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data;
and sending the analyzed Ethernet packet data to a system memory for storage.
A storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of:
receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction;
according to the control instruction, a programmable message analyzer carried on a general MAC module controller is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data;
and sending the analyzed Ethernet packet data to a system memory for storage.
According to the multichannel Ethernet message processing method based on the power chip, the system, the power equipment and the computer storage medium, the programmable message analyzer is carried on the general MAC module, and when the Ethernet packet data of at least one channel subscribed according to the power service requirement is received, the programmable message analyzer is controlled to analyze the received Ethernet packet data by generating the control instruction, so that the analyzed Ethernet packet data is obtained; the method can analyze the Ethernet packet data subscribed by different power service requirements through the programmable message analyzer, thereby improving the universality of the analysis of the Ethernet packet data, reducing the configuration of hardware circuits and reducing the cost of hardware resources.
Drawings
FIG. 1 is a flow chart illustrating a multi-channel Ethernet message processing method based on a power chip according to an embodiment;
FIG. 2 is a diagram of a power specific MAC architecture in one embodiment;
FIG. 3 is a flow chart illustrating a multi-channel Ethernet message processing method based on a power chip according to another embodiment;
FIG. 4 is a diagram of an embodiment of a MAC architecture with an externally-mounted programmable message parser;
FIG. 5 is a flow chart illustrating a multi-channel Ethernet message processing method based on a power chip according to another embodiment;
FIG. 6 is a diagram of an MAC architecture with a programmable message parser implemented therein, according to an embodiment;
FIG. 7 is a diagram illustrating an interface of a MAC architecture with a programmable message parser implemented therein, according to an embodiment;
FIG. 8 is a diagram illustrating an interface used by the programmable message parser in connection with a memory and an interface to a MAC controller and a transport layer controller in accordance with one embodiment;
FIG. 9 is a block diagram of an embodiment of a power chip based multi-channel Ethernet message processing system;
fig. 10 is an internal structural view of an electric power device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In an embodiment, as shown in fig. 1, a multi-channel ethernet message processing method based on a power chip is provided, and this embodiment is exemplified by applying the method to a terminal. In this embodiment, the method includes the steps of:
and 102, receiving the Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction.
The control instruction is used for controlling the programmable message analyzer to call a pre-configured message analysis code to analyze the Ethernet packet data.
Specifically, based on a special MAC architecture for transmitting and receiving messages in a power-dedicated chip, when an MAC controller of a terminal acquires ethernet packet data of at least one channel subscribed according to different power service requirements through a physical interface, a control instruction is generated; the control instruction can be used for controlling a transmission layer controller in the MAC architecture to transmit the Ethernet packet data, and can also be used for controlling a programmable message analyzer carried on the MAC controller in the MAC architecture to identify and analyze the Ethernet packet data.
As shown in fig. 2, the architecture is a schematic diagram of a dedicated MAC architecture for transmitting and receiving messages, and the architecture includes a MAC controller, a transport layer controller and a storage controller, where in case of receiving an ethernet packet, the MAC controller receives a layer protocol ethernet packet through a connected physical interface, and may filter a source address and a destination address of the ethernet packet, and finally send the ethernet packet data to the transport layer controller. The transport layer controller provides a FIFO (memory, i.e., first-in-first-out queue) to buffer and condition ethernet packets between the application system memory and the MAC controller, enabling data transfer between the application clock domain and the MAC controller clock domain. The storage controller carries the transfer data from the transport layer controller into the system memory. Under the condition of sending the Ethernet packet, firstly, the storage controller carries transmission data from a system memory to the transport layer controller, then, the transport layer controller sends the data into the MAC controller, and finally, the MAC controller sends the Ethernet packet.
And 104, controlling a programmable message analyzer carried on the general MAC module to identify and analyze the Ethernet packet data according to the control instruction to obtain the analyzed Ethernet packet data.
The programmable message analyzer integrates analysis codes of different types of power Ethernet packet data, and the analysis codes are generated through a special instruction set; the analytic code can be updated according to the update of the power service requirement. The programmable message parser can be mounted in any position inside or outside the general-purpose MAC module. The MAC is a universal MAC, wherein the MAC carried outside the universal MAC module is a programmable message analyzer carried on an integrated circuit outside the universal MAC; the loading inside the general MAC module C means loading a programmable message parser in the MAC internal module, that is, loading a programmable message parser between the MAC controller module and the transport layer controller module of the general MAC. Specifically, according to a control instruction, a programmable message parser carried on a general MAC module is controlled to identify Ethernet packet data, and the type of the Ethernet packet data is determined, namely the type of the Ethernet packet data is determined according to the position of the received Ethernet packet data in a message format; and calling an analysis code corresponding to the type to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data. The message format of the ethernet packet data acquired by the message parser is fixed, for example, the first six byte bits are destination addresses, the last six byte bits are source addresses, and the VLAN with four byte bits, the message type, and the like may exist later.
And step 106, sending the analyzed Ethernet packet data to a system memory for storage.
According to the multichannel Ethernet message processing method based on the power chip, the programmable message analyzer is carried on the general MAC module, and when the Ethernet packet data of at least one channel subscribed according to the power service requirement is received, the programmable message analyzer is controlled to analyze the received Ethernet packet data by generating a control instruction, so that the analyzed Ethernet packet data is obtained; the method can analyze the Ethernet packet data subscribed by different power service requirements through the programmable message analyzer, thereby improving the universality of the analysis of the Ethernet packet data, reducing the configuration of hardware circuits and reducing the cost of hardware resources.
In another embodiment, as shown in fig. 3, a multi-channel ethernet message processing method based on a power chip is provided, and this embodiment is exemplified by applying the method to a terminal. In this embodiment, the method includes the steps of:
And step 304, transmitting the Ethernet packet data to a storage controller through the transport layer controller for storage, and generating a control instruction.
Wherein the control instruction comprises an interrupt signal.
And step 306, controlling a programmable message analyzer carried outside the general MAC module according to the control instruction, and analyzing the Ethernet packet data acquired from the storage controller to obtain the analyzed Ethernet packet data.
And step 308, sending the analyzed Ethernet packet data to a system memory for storage.
Specifically, the MAC controller sends the received Ethernet packet to an FIFO of a transmission layer controller for storage, and simultaneously sends an interrupt signal to a message analyzer; when the programmable message analyzer receives the interrupt signal, the Ethernet packet data is identified, the type of the Ethernet packet data is determined, an analysis program configured by a user is executed, the Ethernet packet is taken out from the FIFO for analysis and is sent to a system memory.
In the following, as shown in fig. 4, an embodiment of the MAC architecture is schematically illustrated in which a programmable message parser is externally mounted, and an MAC controller acquires ethernet packet data of at least one channel subscribed according to a power service requirement through a physical interface, sends the ethernet packet data to a FIFO of a transport layer controller for storage, and sends an interrupt signal to the message parser; after receiving the interrupt signal, the programmable message analyzer identifies the Ethernet packet data, determines the type of the Ethernet packet data, executes an analysis program configured by a user, takes out the Ethernet packet from the FIFO for analysis and sends the Ethernet packet to a system memory, namely, the whole received Ethernet packet is carried outside the MAC controller for analysis, the Ethernet packet data subscribed by different power service requirements can be analyzed through the programmable message analyzer, different message analysis rules do not need to be burnt, the configuration of a hardware circuit is reduced, the hardware resource cost is reduced, and the universality of the analysis of the power Ethernet packet data is improved.
In the multichannel Ethernet packet processing method based on the power chip, the MAC controller acquires the Ethernet packet data of at least one channel subscribed according to the power service requirement through the physical interface, the Ethernet packet data is sent to the FIFO of the transmission layer controller for storage, and the whole received Ethernet packet is analyzed through the programmable packet analyzer carried outside the MAC controller, namely, the Ethernet packet data is analyzed without burning different packet analysis rules, so that the configuration of hardware circuits is reduced, the hardware resource cost is reduced, and the universality of the power Ethernet packet data analysis is improved.
In another embodiment, as shown in fig. 5, a multi-channel ethernet message processing method based on a power chip is provided, and this embodiment is exemplified by applying the method to a terminal. In this embodiment, the method includes the steps of:
The programmable message analyzer analyzes the Ethernet packet data according to a preset message analysis code.
Specifically, according to a control instruction, a programmable message analyzer carried on the MAC controller is controlled to identify Ethernet packet data, and the type of the Ethernet packet data is determined; and calling an analysis code corresponding to the type to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data.
And step 508, transmitting the analyzed Ethernet packet data through the transport layer controller, and transmitting the Ethernet packet data to the storage controller.
In the following, as shown in fig. 6, which is a schematic diagram of a MAC architecture with a programmable message parser mounted therein, a MAC controller of a generic MAC receives an ethernet packet of at least one channel and sends the ethernet packet to the message parser. The message analyzer analyzes the Ethernet packet after receiving the Ethernet packet data, sends the analyzed Ethernet packet data to the transmission layer controller, and finally sends the Ethernet packet data to a system memory through the storage controller. In the structure, the interface behavior pattern between the message parser and the MAC controller and the transport layer controller of the general MAC is the same as the interface behavior pattern between the external data storage, that is, the information interaction pattern between the message parser and the MAC controller, the transport layer controller is the same as the information interaction pattern between the MAC controller and the transport layer controller, as shown in fig. 7, based on the interface pattern, the design complexity of the message parser can be greatly reduced, and the design cost can be reduced; when valid and ready are both valid, when write is valid, the next cycle writes data to the address of the current cycle, and when write is invalid, the next cycle reads the data of the address of the current cycle. Alternatively, the programmable message parser uses an interface to interface with the memory and the connection form of the MAC controller and the transport layer controller is shown in FIG. 8.
According to the multichannel Ethernet message processing method based on the power chip, through a programmable message analyzer carried in a general MAC module, when receiving Ethernet packet data of at least one channel subscribed according to power service requirements, the programmable message analyzer is controlled to analyze the received Ethernet packet data by generating a control instruction, so that the analyzed Ethernet packet data is obtained; the programmable message parser can be used for real-time parsing of the Ethernet packet data subscribed by different power service requirements, the universality of power Ethernet packet data parsing and the real-time property of Ethernet packet data transmission are improved, delay is reduced, the configuration of hardware circuits is reduced, and the hardware resource cost is reduced.
It should be understood that although the steps in the flowcharts of fig. 1, 3, and 5 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 1, 3, and 5 may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least some of the other steps or stages.
In one embodiment, as shown in fig. 9, there is provided a power chip-based multi-channel ethernet message processing system, including: a receiving module 902, a control module 904, and a transmitting module 906, wherein:
the receiving module 902 is configured to receive ethernet packet data subscribed according to the power service requirement, and generate a control instruction.
And the control module 904 is configured to control the programmable message parser mounted on the general MAC module to recognize and parse the ethernet packet data according to the control instruction, so as to obtain the parsed ethernet packet data.
A sending module 906, configured to send the analyzed ethernet packet data to a system memory for storage.
According to the multichannel Ethernet message processing system based on the power chip, the programmable message analyzer is carried on the general MAC module, and when the Ethernet packet data of at least one channel subscribed according to the power service requirement is received, the programmable message analyzer is controlled to analyze the received Ethernet packet data by generating a control instruction, so that the analyzed Ethernet packet data is obtained; the method can analyze the Ethernet packet data subscribed by different power service requirements through the programmable message analyzer, thereby improving the universality of the analysis of the Ethernet packet data, reducing the configuration of hardware circuits and reducing the cost of hardware resources.
In another embodiment, a multi-channel ethernet message processing system based on a power chip is provided, which includes, in addition to a receiving module 902, a control module 904, and a sending module 906, the following: identification module, analysis module and storage module, wherein:
and the identification module is used for controlling the programmable message analyzer carried on the general MAC module to identify the Ethernet packet data according to the control instruction and determining the type of the Ethernet packet data.
And the analysis module is used for calling the analysis codes corresponding to the types to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data.
And the storage module is used for transmitting the Ethernet packet data to the storage controller for storage through the transmission layer controller.
In an embodiment, the control module 904 is further configured to control a programmable packet parser mounted outside the general MAC module according to the control instruction, and parse the ethernet packet data acquired from the storage controller to obtain parsed ethernet packet data; mounted outside the generic MAC module means mounted on an integrated circuit outside the MAC.
In one embodiment, the sending module 906 is further configured to send the ethernet packet data to a programmable message parser mounted inside the generic MAC module; the MAC controller module is mounted inside the general MAC module, and is mounted between the MAC controller module and the transport layer controller module inside the general MAC module.
In an embodiment, the parsing module is further configured to control the programmable message parser to parse the ethernet packet data in real time according to the control instruction, so as to obtain the parsed ethernet packet data.
In one embodiment, the storage module is further configured to transmit the analyzed ethernet packet data through the transport layer controller to the storage controller; storing the analyzed Ethernet packet data in a system memory through a storage controller; the information interaction mode between the message analyzer and the MAC controller and between the message analyzer and the transport layer controller is the same as the information interaction mode between the MAC controller and the transport layer controller.
In one embodiment, the MAC controller obtains ethernet packet data of at least one channel subscribed according to power service requirements through a physical interface, sends the ethernet packet data to the FIFO of the transmission layer controller for storage, and carries the whole received ethernet packet outside the MAC controller for analysis, that is, different message analysis rules need not be burned for realizing the analysis of the ethernet packet data, so that the configuration of hardware circuits is reduced, the hardware resource cost is reduced, and the universality of the analysis of the power ethernet packet data is improved.
In one embodiment, when receiving the ethernet packet data subscribed according to the power service requirement, by a programmable message parser mounted inside a general MAC module, the programmable message parser is controlled to parse the received ethernet packet data by generating a control instruction, so as to obtain parsed ethernet packet data; the programmable message parser can be used for real-time parsing of the Ethernet packet data subscribed by different power service requirements, the universality of power Ethernet packet data parsing and the real-time property of Ethernet packet data transmission are improved, delay is reduced, the configuration of hardware circuits is reduced, and the hardware resource cost is reduced.
For specific limitations of the multi-channel ethernet message processing system based on the power chip, reference may be made to the above limitations of the multi-channel ethernet message processing method based on the power chip, and details are not repeated here. All or part of each module in the ethernet message processing system can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the power equipment, and can also be stored in a memory in the power equipment in a software form, so that the processor can call and execute operations corresponding to the modules.
In one embodiment, a power device is provided, which may be a terminal, and its internal structure diagram may be as shown in fig. 10. The power device includes a processor, a memory, a communication interface, a display screen, and an input device connected by a system bus. Wherein the processor of the power device is configured to provide computing and control capabilities. The memory of the power equipment comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The communication interface of the power equipment is used for carrying out wired or wireless communication with an external terminal, and the wireless communication can be realized through WIFI, an operator network, NFC (near field communication) or other technologies. The computer program is executed by a processor to realize the Ethernet message processing method based on the power chip. The display screen of the power equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the power equipment can be a touch layer covered on the display screen, and can also be a key or a touch pad arranged on a shell of the power equipment.
Those skilled in the art will appreciate that the configuration shown in fig. 10 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation on the power device to which the present application is applied, and that a particular power device may include more or less components than those shown in the figures, or combine certain components, or have a different arrangement of components.
In one embodiment, there is provided a power device comprising a memory and a processor, the memory having a computer program stored therein, the processor implementing the following steps when executing the computer program:
receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction;
according to the control instruction, a programmable message analyzer carried on the MAC controller is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data;
and sending the analyzed Ethernet packet data to a system memory for storage.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
controlling a programmable message analyzer carried on the MAC controller to identify the Ethernet packet data according to the control instruction, and determining the type of the Ethernet packet data;
and calling an analysis code corresponding to the type to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
and transmitting the Ethernet packet data to a storage controller through a transport layer controller for storage, and executing the step of generating a control instruction.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
according to the control instruction, a programmable message analyzer carried outside the universal MAC module is controlled, and the Ethernet packet data acquired from the storage controller is analyzed to obtain the analyzed Ethernet packet data; mounted outside the generic MAC module means mounted on an integrated circuit outside the generic MAC module.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
sending the Ethernet packet data to a programmable message analyzer carried in a general MAC module, and executing the step of generating a control instruction; the MAC controller module is mounted inside the general MAC module, and is mounted between the MAC controller module and the transport layer controller module inside the general MAC module.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
controlling a programmable message analyzer to analyze the Ethernet packet data in real time according to the control instruction to obtain the analyzed Ethernet packet data;
sending the analyzed Ethernet packet data to a system memory for storage, wherein the method comprises the following steps:
transmitting the analyzed Ethernet packet data to a storage controller through a transmission layer controller;
and storing the analyzed Ethernet packet data in a system memory through a storage controller.
In one embodiment, the processor, when executing the computer program, further implements the following:
the information interaction mode between the message analyzer and the MAC controller and between the message analyzer and the transport layer controller is the same as the information interaction mode between the MAC controller and the transport layer controller.
In one embodiment, a storage medium is provided having a computer program stored thereon, the computer program when executed by a processor implementing the steps of:
receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction;
according to the control instruction, a programmable message analyzer carried on a general MAC module is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data;
and sending the analyzed Ethernet packet data to a system memory for storage.
In one embodiment, the computer program when executed by the processor further performs the steps of:
controlling a programmable message analyzer carried on a general MAC module to identify the Ethernet packet data according to the control instruction, and determining the type of the Ethernet packet data;
and calling an analysis code corresponding to the type to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data.
In one embodiment, the computer program when executed by the processor further performs the steps of:
and transmitting the Ethernet packet data to a storage controller through a transport layer controller for storage, and executing the step of generating a control instruction.
In one embodiment, the computer program when executed by the processor further performs the steps of:
according to the control instruction, a programmable message analyzer carried outside the universal MAC module is controlled, and the Ethernet packet data acquired from the storage controller is analyzed to obtain the analyzed Ethernet packet data; mounted outside the generic MAC module means mounted on an integrated circuit outside the generic MAC module.
In one embodiment, the computer program when executed by the processor further performs the steps of:
sending the Ethernet packet data to a programmable message analyzer carried in a general MAC module, and executing the step of generating a control instruction; the MAC controller module is mounted inside the general MAC module, and is mounted between the MAC controller module and the transport layer controller module inside the general MAC module.
In one embodiment, the computer program when executed by the processor further performs the steps of:
controlling a programmable message analyzer to analyze the Ethernet packet data in real time according to the control instruction to obtain the analyzed Ethernet packet data;
sending the analyzed Ethernet packet data to a system memory for storage, wherein the method comprises the following steps:
transmitting the analyzed Ethernet packet data to a storage controller through a transmission layer controller;
and storing the analyzed Ethernet packet data in a system memory through a storage controller.
In one embodiment, the computer program when executed by the processor further implements the following:
the information interaction mode between the message analyzer and the MAC controller and between the message analyzer and the transport layer controller is the same as the information interaction mode between the MAC controller and the transport layer controller.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include at least one of non-volatile and volatile memory. Non-volatile Memory may include Read-Only Memory (ROM), and the like. Volatile Memory can include Random Access Memory (RAM) or external cache Memory. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), among others.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A multichannel Ethernet message processing method based on a power chip is characterized by comprising the following steps:
receiving Ethernet packet data of at least one channel subscribed according to the power service requirement, and generating a control instruction;
according to the control instruction, a programmable message analyzer carried on a general MAC module is controlled to identify and analyze the Ethernet packet data to obtain analyzed Ethernet packet data;
and sending the analyzed Ethernet packet data to a system memory for storage.
2. The method according to claim 1, wherein controlling a programmable message parser mounted on a generic MAC module to perform recognition parsing on the ethernet packet data according to the control instruction, so as to obtain parsed ethernet packet data, includes:
controlling a programmable message analyzer carried on a general MAC module to identify the Ethernet packet data according to the control instruction, and determining the type of the Ethernet packet data;
and calling an analysis code corresponding to the type to analyze the Ethernet packet data to obtain the analyzed Ethernet packet data.
3. The method of claim 1, wherein prior to said generating control instructions, the method further comprises:
and transmitting the Ethernet packet data to a storage controller for storage through a transport layer controller, and executing the step of generating the control command.
4. The method according to claim 3, wherein controlling a programmable message parser mounted on a generic MAC module to perform recognition parsing on the ethernet packet data according to the control instruction, so as to obtain parsed ethernet packet data, includes:
according to the control instruction, a programmable message analyzer carried outside a general MAC module is controlled, and the Ethernet packet data acquired from the storage controller is analyzed to obtain analyzed Ethernet packet data; the mounting outside the general-purpose MAC module is an integrated circuit mounted outside the general-purpose MAC module.
5. The method of claim 1, wherein prior to said generating control instructions, the method further comprises:
sending the Ethernet packet data to a programmable message analyzer carried in a general MAC module, and executing the step of generating the control command; the mounting inside the general MAC module means mounting between the MAC controller module and the transport layer controller module inside the general MAC module.
6. The method according to claim 5, wherein the controlling a programmable packet parser mounted on a generic MAC module to perform recognition parsing on the ethernet packet data according to the control instruction to obtain parsed ethernet packet data includes:
controlling the programmable message analyzer to analyze the Ethernet packet data in real time according to the control instruction to obtain analyzed Ethernet packet data;
the sending the analyzed ethernet packet data to a system memory for storage includes:
transmitting the analyzed Ethernet packet data to a storage controller through a transmission layer controller;
and storing the analyzed Ethernet packet data in a system memory through the storage controller.
7. The method of claim 6, wherein the message parser interacts with the MAC controller and the transport layer controller in the same information interaction mode as the MAC controller and the transport layer controller.
8. A multi-channel Ethernet message processing system based on a power chip is characterized by comprising:
the receiving module is used for receiving the Ethernet packet data of at least one channel subscribed according to the power service requirement and generating a control instruction;
the control module is used for controlling a programmable message analyzer carried on a general MAC module to identify and analyze the Ethernet packet data according to the control instruction to obtain analyzed Ethernet packet data;
and the sending module is used for sending the analyzed Ethernet packet data to a system memory for storage.
9. An electrical device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method of any one of claims 1 to 7.
10. A storage medium having a computer program stored thereon, the computer program, when being executed by a processor, realizing the steps of the method of any one of claims 1 to 7.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110663173.1A CN113114706B (en) | 2021-06-15 | 2021-06-15 | Multichannel Ethernet message processing method based on power chip |
| PCT/CN2022/089562 WO2022262437A1 (en) | 2021-06-15 | 2022-04-27 | Power chip-based multichannel ethernet message processing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110663173.1A CN113114706B (en) | 2021-06-15 | 2021-06-15 | Multichannel Ethernet message processing method based on power chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113114706A true CN113114706A (en) | 2021-07-13 |
| CN113114706B CN113114706B (en) | 2021-09-24 |
Family
ID=76723549
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110663173.1A Active CN113114706B (en) | 2021-06-15 | 2021-06-15 | Multichannel Ethernet message processing method based on power chip |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN113114706B (en) |
| WO (1) | WO2022262437A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114584516A (en) * | 2022-01-26 | 2022-06-03 | 国网思极紫光(青岛)微电子科技有限公司 | Ethernet MAC controller and method for receiving data thereof |
| CN115002242A (en) * | 2022-05-31 | 2022-09-02 | 芯河半导体科技(无锡)有限公司 | Method for implementing Ethernet message analyzer |
| WO2022262437A1 (en) * | 2021-06-15 | 2022-12-22 | 南方电网数字电网研究院有限公司 | Power chip-based multichannel ethernet message processing method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611593A (en) * | 2012-02-17 | 2012-07-25 | 黑龙江省电力有限公司 | Method for implementing Ethernet transceiver of intelligent control equipment of digitized transformer substation |
| WO2014032688A1 (en) * | 2012-08-26 | 2014-03-06 | Abb Research Ltd | Embedded ethernet tunneling |
| CN104038383A (en) * | 2014-04-14 | 2014-09-10 | 贵州电力试验研究院 | Switch based process level network message analysis method |
| CN112583765A (en) * | 2019-09-29 | 2021-03-30 | 北京天诚同创电气有限公司 | GOOSE and SV communication system and message analysis method thereof |
| CN112714082A (en) * | 2021-03-26 | 2021-04-27 | 北京智芯微电子科技有限公司 | Ethernet chip for SV and GOOSE communication |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN206135946U (en) * | 2016-10-31 | 2017-04-26 | 国家电网公司 | Resolver is monitored to transformer substation's communication message |
| CN110620689A (en) * | 2019-09-16 | 2019-12-27 | 南京国电南自电网自动化有限公司 | Simulation method and system of IEC61850 server |
| CN113114706B (en) * | 2021-06-15 | 2021-09-24 | 南方电网数字电网研究院有限公司 | Multichannel Ethernet message processing method based on power chip |
-
2021
- 2021-06-15 CN CN202110663173.1A patent/CN113114706B/en active Active
-
2022
- 2022-04-27 WO PCT/CN2022/089562 patent/WO2022262437A1/en unknown
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611593A (en) * | 2012-02-17 | 2012-07-25 | 黑龙江省电力有限公司 | Method for implementing Ethernet transceiver of intelligent control equipment of digitized transformer substation |
| WO2014032688A1 (en) * | 2012-08-26 | 2014-03-06 | Abb Research Ltd | Embedded ethernet tunneling |
| CN104038383A (en) * | 2014-04-14 | 2014-09-10 | 贵州电力试验研究院 | Switch based process level network message analysis method |
| CN112583765A (en) * | 2019-09-29 | 2021-03-30 | 北京天诚同创电气有限公司 | GOOSE and SV communication system and message analysis method thereof |
| CN112714082A (en) * | 2021-03-26 | 2021-04-27 | 北京智芯微电子科技有限公司 | Ethernet chip for SV and GOOSE communication |
Non-Patent Citations (1)
| Title |
|---|
| CJFD: "《电力系统保护与控制》2008年目录索引", 《电力系统保护与控制》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022262437A1 (en) * | 2021-06-15 | 2022-12-22 | 南方电网数字电网研究院有限公司 | Power chip-based multichannel ethernet message processing method |
| CN114584516A (en) * | 2022-01-26 | 2022-06-03 | 国网思极紫光(青岛)微电子科技有限公司 | Ethernet MAC controller and method for receiving data thereof |
| CN115002242A (en) * | 2022-05-31 | 2022-09-02 | 芯河半导体科技(无锡)有限公司 | Method for implementing Ethernet message analyzer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113114706B (en) | 2021-09-24 |
| WO2022262437A1 (en) | 2022-12-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN113114706B (en) | Multichannel Ethernet message processing method based on power chip | |
| CN103346980B (en) | A kind of business scheduling method, device and the network equipment | |
| CN111464419B (en) | Data transmission control method based on bus network communication | |
| CN108322437B (en) | Adaptive communication method and device for multiple protocol devices | |
| CN111740847B (en) | High-speed network data transmission system and method based on FPGA | |
| CN113596017B (en) | Protocol analysis method and device, soft gateway and storage medium | |
| CN111294235A (en) | Data processing method, device, gateway and readable storage medium | |
| CN113660191A (en) | Communication method for bridging MIL-STD-1553 and GJB1188B protocols through FC-AE-1553 protocol | |
| CN114815782A (en) | Remote diagnosis method, apparatus, device and medium | |
| CN112422485B (en) | Communication method and device of transmission control protocol | |
| CN114915555B (en) | Gateway drive communication method, device, equipment and storage medium | |
| CN112039801B (en) | Method, system and proxy server for setting IP information | |
| CN113612668B (en) | Communication method for bridging three protocols | |
| CN111628817B (en) | 1553B bus terminal data management and control method in control system | |
| CN114979058A (en) | CAN multi-mailbox multiplexing processing method and system | |
| CN113641518A (en) | Service calling method, device and storage medium | |
| CN108928213B (en) | Parameter configuration method of control panel, control panel and controlled equipment | |
| CN114880148B (en) | Data processing method, device and computer readable storage medium | |
| CN114827188B (en) | Platform equipment management method, system, terminal and storage medium | |
| CN114710755B (en) | Message processing method, vehicle-mounted communication device, electronic equipment and storage medium | |
| CN116016295B (en) | Ethernet performance monitoring method, system, industrial control equipment and storage medium | |
| CN117596689B (en) | Method and apparatus for transmitting uplink control information in wireless communication system | |
| CN112165465B (en) | Data processing method and device for outgoing third-party platform and electronic device | |
| CN114338798B (en) | Data transmission method, device, system, equipment and storage medium | |
| CN112565041B (en) | Hardware information configuration method, device and medium of FF field bus system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |