CN113114145A

CN113114145A - Low-offset differential output circuit structure

Info

Publication number: CN113114145A
Application number: CN202110549727.5A
Authority: CN
Inventors: 不公告发明人
Original assignee: Yisiyuan Semiconductor Nanjing Co ltd
Current assignee: Yisiyuan Semiconductor Nanjing Co ltd
Priority date: 2021-05-20
Filing date: 2021-05-20
Publication date: 2021-07-13

Abstract

A circuit structure for solving the problem that differential signals cannot be processed due to temperature drift, parameter discretization and the like of a discrete parameter device comprises a first transistor Q1, a first MOS transistor Q2, a second MOS transistor Q3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2 and a first error amplifier (AMP 1). The topological circuit amplifies differential signals through the two MOS tubes, and adjusts current passing through the MOS tubes through the error amplifier (AMP 1), so that the problem of inconsistent amplification caused by device parameter errors is solved.

Description

Low-offset differential output circuit structure

Technical Field

The circuit structure is a solution for the problem that the circuit cannot work normally due to inconsistent device parameters when the differential input signal is very small and the differential input signal is amplified by a low-noise MOS tube.

Background

The existing differential amplifier still has some technical challenges for processing weak signals, and can bring noise, common-mode signals and other problems to the signals due to the characteristics of the differential amplifier under the condition of signal amplification. Further, although there is a high-precision differential amplifier satisfying such a requirement, it is not easy to control the differential amplifier in terms of cost.

The circuit structure can be used as a preceding stage circuit of a differential amplifier to amplify differential signals with low noise and low drift, thereby effectively reducing the influence of the problems on the signals.

Disclosure of Invention

A circuit structure for solving the problem that differential signals cannot be processed due to temperature drift, difference discretization and the like of a device with discrete parameters comprises a first transistor Q1, a first MOS transistor Q2, a second MOS transistor Q3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2 and a first error amplifier (AMP 1). The gate of the first MOS transistor Q2 is connected to Vin1, the source of the first MOS transistor Q2 is connected to V "through a resistor R8, the drain of the first MOS transistor Q2 is connected to Vout1 and to the emitter of the first transistor Q1 through a fourth resistor R4 and a first resistor R1, respectively, to V + through a fourth resistor R4 and a second resistor R2, and to the negative signal input terminal of the first error amplifier (AMP 1) through a sixth resistor R6; the gate of the second MOS transistor Q3 is connected to Vin2, the source of the second MOS transistor is connected to V "through an eighth resistor R8, the drain of the second MOS transistor is connected to Vout2, to the positive signal input terminal of the first error amplifier through a seventh resistor R7, and to V + through a fifth resistor R5; a positive signal input terminal of the first error amplifier (AMP 1) is connected to ground through a first capacitor C1, a negative signal input terminal of the first error amplifier (AMP 1) is connected to an emitter of the first transistor Q1 through a second capacitor C2, an output terminal of the first error amplifier (AMP 1) is connected to a base of the first transistor Q1 through a third resistor R3, a positive power supply input terminal of the first error amplifier (AMP 1) is connected to V +, and a negative power supply input terminal is connected to V-; the collector of the first transistor Q1 is connected to V-.

Drawings

FIG. 1 is a circuit diagram of the present differential output circuit configuration

Detailed Description

The circuit structure amplifies signals through two low-noise and low-bias MOS tubes, but because of the discrete characteristic of the MOS tubes, the signals need to be compensated through an error amplifier, so that the current flowing through the MOS tubes is adjusted according to different parameters of the MOS tubes, and the output amplification times are consistent; the resistor R7 and the capacitor C1 form an RC circuit for filtering alternating current signals, and the resistor R6 and the capacitor C2 play the same role; the resistors R1, R2, R4, R5 and R8 are used for setting the direct current bias voltage of the MOS tube.

It is obvious to a person skilled in the art that the present circuit arrangement is not restricted to details of the above-described exemplary embodiments, and that the functions of the present circuit arrangement can be implemented in other specific forms without departing from the spirit or essential characteristics of the circuit arrangement. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the circuit arrangement being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the embodiments may be appropriately combined to form other embodiments understood by those skilled in the art.

Claims

1. A circuit structure for solving the problem that differential signals cannot be processed due to temperature drift, difference discretization and the like of a device with discrete parameters comprises a first transistor Q1, a first MOS transistor Q2, a second MOS transistor Q3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2 and a first error amplifier (AMP 1). The gate of the first MOS transistor Q2 is connected to Vin1, the source of the first MOS transistor Q2 is connected to V "through a resistor R8, the drain of the first MOS transistor Q2 is connected to Vout1 and to the emitter of the first transistor Q1 through a fourth resistor R4 and a first resistor R1, respectively, to V + through a fourth resistor R4 and a second resistor R2, and to the negative signal input terminal of the first error amplifier (AMP 1) through a sixth resistor R6; the gate of the second MOS transistor Q3 is connected to Vin2, the source of the second MOS transistor is connected to V "through an eighth resistor R8, the drain of the second MOS transistor is connected to Vout2, to the positive signal input terminal of the first error amplifier through a seventh resistor R7, and to V + through a fifth resistor R5; a positive signal input terminal of the first error amplifier (AMP 1) is connected to ground through a first capacitor C1, a negative signal input terminal of the first error amplifier (AMP 1) is connected to an emitter of the first transistor Q1 through a second capacitor C2, an output terminal of the first error amplifier (AMP 1) is connected to a base of the first transistor Q1 through a third resistor R3, a positive power supply input terminal of the first error amplifier (AMP 1) is connected to V +, and a negative power supply input terminal is connected to V-; the collector of the first transistor Q1 is connected to V-.

2. The circuit structure amplifies signals through two low-noise and low-bias MOS tubes, but because of the discrete characteristic of the MOS tubes, the signals need to be compensated through an error amplifier, so that the current flowing through the MOS tubes is adjusted according to different parameters of the MOS tubes, and the output amplification times are consistent; the resistor R7 and the capacitor C1 form an RC circuit for filtering alternating current signals, and the resistor R6 and the capacitor C2 play the same role; the resistors R1, R2, R4, R5 and R8 are used for setting the direct current bias voltage of the MOS tube.