CN113110279B - PLC analog output module for remote anti-electromagnetic interference transmission of analog signal - Google Patents
PLC analog output module for remote anti-electromagnetic interference transmission of analog signal Download PDFInfo
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
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- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
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Abstract
A PLC analog output module for remote anti-electromagnetic interference transmission of analog signals comprises a twin channel module, a first signal output processing module, a first DA conversion module, a first twin channel signal processing module, a communication module, a first control module, a first dial module and a first power module. The PLC analog output module with the twin channel for remote anti-electromagnetic interference transmission of the analog quantity signal is matched with the PLC analog acquisition module with the twin channel for remote anti-electromagnetic interference transmission of the analog quantity signal for use, so that the remote transmission of the analog quantity signal is carried out, the influence of the electromagnetic interference signal in the transmission process of the analog quantity signal can be obviously eliminated, the distortion and jumping of the transmitted analog quantity signal are avoided, and the remote accurate transmission of the analog quantity signal is ensured.
Description
Technical Field
The invention relates to a PLC analog output module, in particular to a PLC analog output module for remote anti-electromagnetic interference transmission of analog signals.
Background
The remote transmission of analog signals generally adopts two modes of communication and hard wiring. Under the communication mode, if network congestion occurs in a communication line, packet loss is easy to occur, the transmission quality of analog quantity signals is seriously influenced, the requirements of real-time performance, accuracy and reliability cannot be met, and common communication quantity analog quantity signals are not applied to field device control. Under the ordinary hard-wired mode, the remote transmission of analog quantity signals is easily influenced by electromagnetic interference of the surrounding environment, and particularly when strong electromagnetic field interference sources such as motors exist around, the remote transmission of analog quantity signals is easily distorted and generates a jump phenomenon.
At present, the analog quantity output module of PLC extension is widely adopted, a plurality of paths of analog quantity signals are output simultaneously, and the remote transmission of the analog quantity signals is realized through a cable. However, the method has the following defects that the influence of electromagnetic interference of the surrounding environment on the long-distance transmission of the analog quantity signal cannot be eliminated, so that the acquired analog quantity signal is easy to distort and jump.
Disclosure of Invention
The invention aims to solve the problems that in the application occasions of field equipment control, state monitoring and the like, remote transmission of analog quantity signals is easily influenced by electromagnetic interference of the surrounding environment in a common hard wiring mode, and particularly, when strong electromagnetic field interference sources such as motors exist around, the remotely transmitted analog quantity signals are easily distorted and generate a jump phenomenon.
The technical scheme adopted by the invention is as follows:
a PLC analog output module for remote anti-electromagnetic interference transmission of analog signals, comprising:
the device comprises a twin channel module, a first signal output processing module, a first DA conversion module, a first twin channel signal processing module, a communication module, a first control module and a first dial module;
the communication module acquires an output instruction of the PLC and outputs the output instruction to the first twin channel signal processing module, wherein n channel signals XY1, XY2 and XY3 \8230, 8230and XYn;
the first twin channel signal processing module acquires n channel signals XY1, XY2 and XY3 \8230; XYn output by the communication module, carries out twin channel signal processing according to channel specification signals S1, S2 and S3 \8230; sn output by the first dial module, and then outputs n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3 \8230; _ 8230; DXn and DYn to the first DA conversion module;
the first DA conversion module collects n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3, 8230, DXn and DYn output by the first twin channel signal processing module, performs digital-to-analog conversion processing according to channel specification signals S1, S2 and S3, 8230, sn and outputs n pairs of complementary twin signals AX1, AY1, AX2, AY2, AX3 and AY3, 8230, AXn and AYn to the first signal output processing module;
the first signal output processing module collects n pairs of complementary twin signals AX1, AY1, AX2, AY2, AX3 and AY3, 8230, AXn and AYn output by the first DA conversion module, carries out isolation amplification processing, and then outputs n pairs of complementary twin signals X1, Y1, X2, Y2, X3, Y3, 8230, xn and Yn to the twin channel module;
the twin channel module comprises n pairs of twin channels, each pair of twin channels comprises 2 twin signal output channels, the twin channel module collects n pairs of complementary twin signals X1, Y1, X2, Y2, X3, Y3, 8230, xn, yn output by the first signal output processing module, and the twin channel module outputs n pairs of complementary twin analog quantity signals X1, Y1, X2, Y2, X3, Y3, 8230, xn, yn;
the first control module outputs control signals to the twin channel module, the first signal output processing module, the first DA conversion module, the first twin channel signal processing module and the communication module, and controls the whole data output processing process;
the first dial-up module outputs channel specification signals S1, S2 and S3 \8230, wherein Sn is used for the first DA conversion module and the first twin channel signal processing module, and Sn is a channel specification signal of the twin channel n of the twin channel module.
The PLC analog output module comprises a first power module, wherein the first power module provides power for a twin channel module, a first signal output processing module, a first DA conversion module, a first twin channel signal processing module, a communication module, a first control module and a first dial-up module.
The digital-to-analog conversion processing method of the first DA conversion module comprises the following steps:
step 1: the method comprises the steps of collecting n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3 and DY3, 8230, DXn and DYn output by a first twin channel signal processing module, and channel specification signals S1, S2 and S3, 8230, 8230and Sn output by a first dial module.
And 2, step: if S1=1, carrying out linear interpolation conversion on DX1 and DY1 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S1=2, DX1 and DY1 perform linear interpolation conversion according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S1=3, then DX1 and DY1 perform linear interpolation conversion according to 0V for 0V and 5V for 32767.
And step 3: if S2=1, carrying out linear interpolation conversion on DX2 and DY2 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S2=2, DX2 and DY2 perform linear interpolation conversion according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S2=3, then DX2 and DY2 are converted by linear interpolation according to 0V for 0V and 5V for 32767.
And 4, step 4: if S3=1, carrying out linear interpolation conversion on DX3 and DY3 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S3=2, carrying out linear interpolation conversion on DX3 and DY3 according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S3=3, DX3 and DY3 perform linear interpolation conversion according to 0V and 32767 to 5V.
……
And 5: if Sn =1, performing linear interpolation conversion on DXn and DYn according to 6553 corresponding to 4mA and 32767 corresponding to 20mA;
if Sn =2, then DXn and DYn are linearly interpolated according to 0-0 mA and 32767-20 mA;
if Sn =3, then DXn and DYn are linearly interpolated at 0V for 0V and 5V for 32767V.
Step 6: and outputting n pairs of complementary twin signals AX1, AY1, AX2, AY2, AX3, AY3 \8230, 8230axn and AYn, and returning to the step 1.
The twin channel signal processing method of the first twin channel signal processing module comprises the following steps:
step (1): the method comprises the steps of collecting n channel signals XY1, XY2 and XY3 \8230 \ 8230 \ XYn outputted by a communication module and channel specification signals S1, S2 and S3 \8230 \ 8230:and Sn outputted by a first dial module.
Step (2): if S1=1, the channel signal acquisition value zero point C1 Zero =6553, channel signal collection value full point C1 Is full of =32767; otherwise, the channel signal acquisition value zero point C1 Zero =0, channel signal acquisition value full point C1 Is full of ＝32767。
If S2=1, the channel signal acquisition value zero point C2 Zero =6553, channel signal collection value full point C2 Is full of =32767; otherwise, the channel signal acquisition value zero point C2 Zero =0, channel signal acquisition value full point C2 Is full of ＝32767。
If S3=1, the channel signal acquisition value zero point C3 Zero =6553, channel signal acquisition value full point C3 Is full of =32767; otherwise, the channel signal acquisition value zero point C3 Zero =0, channel signal acquisition value full point C3 Is full of ＝32767。
……
If the Sn =1, the Sn-Sn ratio is higher than the Sn-Sn ratio,the zero point Cn of the channel signal acquisition value Zero =6553, channel signal collection value full point Cn Is full of =32767; otherwise, the channel signal acquisition value zero point Cn Zero =0, full point Cn of channel signal acquisition value Is full of ＝32767。
And (3): DX1= XY1;
DY1＝C1 zero +C1 Is full of -XY1；
DX2＝XY2；
DY2＝C2 Zero +C2 Is full of -XY2；
DX3＝XY3；
DY3＝C3 Zero +C3 Is full of -XY3；
……
DXn＝XYn；
DYn＝Cn Zero +Cn Is full of -XYn；
And (4): and (4) outputting n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3, 8230, DXn and DYn, and returning to the step (1).
The number of the first dial modules is n, the numbers of the first dial modules are respectively '1', '2', '3' \8230; 'n' and 'n' dials, and the analog quantity signal specification acquired by the twin channel n of the twin channel module is correspondingly set. Each dial has 3 positions, "1" bit, "2" bit, and "3" bit:
if the analog quantity signal specification output by the twin channel n of the twin channel module is 4-20 mA analog quantity signal, the user sets the dial corresponding to the twin channel n to be 1;
if the analog quantity signal output by the twin channel n of the twin channel module is 0-20 mA analog quantity signal, the user sets the dial corresponding to the twin channel n to be 2;
if the specification of the analog quantity signal output by the twin channel n of the twin channel module is 0-5V analog quantity signal, the user sets the dial corresponding to the twin channel n to be 3.
The first dialing module and the dialing rule output method comprise the following steps:
step a, collecting dial position information.
Step b, if the dial of the number 1 is the bit 1, S1=1; if the "1" dial is "2" bits, S1=2; if the "1" dial is "3" bits, S1=3.
If the 2-digit is a 1 digit, S2=1; if the 2-digit dialing code is 2, then S2=2; if the "2" dial is a "3" bit, S2=3.
If the 3 dialing is 1, S3=1; if the 3 dialing is 2, S3=2; if the "3" dial is a "3" bit, S3=3.
……
If the dial of the number "n" is a bit "1", sn =1; if the dial of "n" is "2" bits, sn =2; if the "n" number is "3" bits, sn =3.
And step c, outputting channel specification signals S1, S2 and S3 \8230, sn, and returning to the step a.
The invention relates to a PLC analog output module for remote anti-electromagnetic interference transmission of analog signals, which has the following technical effects:
1) The invention relates to a PLC analog output module, in particular to a PLC analog output module with twin channels for remote anti-electromagnetic interference transmission of analog signals, which outputs a plurality of pairs of complementary twin analog signals, is used with an analog twin signal receiver for remote anti-electromagnetic interference transmission of analog signals in a matching way, eliminates external electromagnetic interference by adopting a difference method, accurately collects and restores the analog signals to be transmitted, realizes remote accurate transmission of the analog signals and is not influenced by electromagnetic interference of the surrounding environment.
2) The PLC analog output module with the twin channel for remote anti-electromagnetic interference transmission of the analog quantity signal is matched with an analog quantity twin signal receiver for remote anti-electromagnetic interference transmission of the analog quantity signal for remote transmission of the analog quantity signal, so that the remote transmission of the analog quantity signal is realized, the influence of the electromagnetic interference signal in the transmission process of the analog quantity signal can be obviously eliminated, the distortion and jumping of the transmitted analog quantity signal are avoided, and the remote accurate transmission of the analog quantity signal is ensured.
3) The invention relates to a PLC analog output module with a twin channel for remote anti-electromagnetic interference transmission of analog signals, which is suitable for outputting continuously-changed analog voltage and current signals with the specifications of conventional 4-20 mA current signals, 0-5V voltage signals and the like.
Drawings
FIG. 1 is a schematic diagram of a PLC analog output module with twin channel for remote anti-electromagnetic interference transmission of analog signals according to the present invention.
Fig. 2 is a flowchart of an analog-to-digital conversion processing method of the first DA conversion module 3.
Fig. 3 is a flowchart of a twin channel signal processing method of the first twin channel signal processing module 4.
Fig. 4 is a diagram of a dial man-machine interaction panel style of the first dial module 8.
Fig. 5 is a flowchart of a dial rule output method of the first dial module 8.
FIG. 6 is a schematic view of example 1 of the present invention;
wherein: 10-a liquid level electronic display meter, A-an analog quantity twinning signal receiver for remote anti-electromagnetic interference transmission of analog quantity signals, B-a PLC (programmable logic controller) output module with a twinning channel for remote anti-electromagnetic interference transmission of analog quantity signals of a speed regulator control cabinet PLC controller, 9-a signal transmission cable, f 1-a hydraulic system oil tank liquid level signal, f 2-a complementary twinning rotating speed signal of the hydraulic system oil tank liquid level signal f1, and M-a motor, delta-electromagnetic interference signals released by strong electromagnetic field interference sources such as the motor and the like.
Fig. 7 is a schematic structural diagram of an analog twin signal receiver a for long-distance anti-electromagnetic interference transmission of an analog signal.
Detailed Description
As shown in fig. 1, a PLC analog output module for remote anti-electromagnetic interference transmission of an analog signal includes a twin channel module 1, a first signal output processing module 2, a first DA conversion module 3, a first twin channel signal processing module 4, a communication module 5, a first control module 6, a first power module 7, and a first dial module 8.
The twin channel module 1 comprises n pairs of twin channels, each pair of twin channels comprises 2 twin signal output channels, the twin signal output channels collect n pairs of complementary twin signals X1, Y1, X2, Y2, X3, Y3, 8230, xn, yn output by the first signal output processing module 2, and the twin channel module 1 outputs n pairs of complementary twin analog quantity signals X1, Y1, X2, Y2, X3, Y3, 8230, xn, yn. After the n pairs of complementary twin signals are transmitted by a cable in a long distance, the signals are collected and processed by an analog twin signal receiver A for the long-distance anti-electromagnetic interference transmission of analog quantity signals, and the signals are reduced into the analog quantity signals needing to be transmitted.
For 4-20 mA analog quantity signals, the two complementary twin analog quantity signals mean that the two analog quantity signals are added to be 24mA; for the analog quantity signals of 0-20 mA, the two complementary twin analog quantity signals mean that the two analog quantity signals are added to 20mA; for 0-5V analog quantity signals, the two complementary twin analog quantity signals mean that the two analog quantity signals are added to be 5V.
The first signal output processing module 2 collects n pairs of twin signals AX1, AY1, AX2, AY2, AX3, AY3 \8230 \ 8230, AXn, AYn output by the first DA conversion module 3, carries out isolation amplification processing, and then outputs n pairs of twin signals X1, Y1, X2, Y2, X3, Y3 \8230, 8230, xn, yn to the twin channel module 1.
The first DA conversion module 3 collects n pairs of twin signals DX1, DY1, DX2, DY2, DX3, DY3, 8230, 82308230, DXn and DYn output by the first twin channel signal processing module 4, performs digital-to-analog conversion processing according to channel specification signals S1, S2 and S3 8230, 8230and Sn output by the first dial module 8, and then outputs n pairs of twin signals AX1, AY1, AX2, AY2, AX3, AY3, 828230, 8230, AXn and AYn to the first signal output processing module 2.
The digital-to-analog conversion processing method of the first DA conversion module 3 includes the following steps:
1. the method comprises the steps of collecting n pairs of twin signals DX1, DY1, DX2, DY2, DX3 and DY3 \8230, 8230, DXn and DYn output by a first twin channel signal processing module 4 and channel specification signals S1, S2 and S3 \8230, 8230and Sn output by a first dial module 8.
2. If S1=1, carrying out linear interpolation conversion on DX1 and DY1 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S1=2, DX1 and DY1 perform linear interpolation conversion according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S1=3, DX1 and DY1 perform linear interpolation conversion for 0 to 0V and for 32767 to 5V.
3. If S2=1, carrying out linear interpolation conversion on DX2 and DY2 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S2=2, carrying out linear interpolation conversion on DX2 and DY2 according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S2=3, DX2 and DY2 perform linear interpolation conversion according to 0V and 32767 to 5V.
4. If S3=1, carrying out linear interpolation conversion on DX3 and DY3 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S3=2, carrying out linear interpolation conversion on DX3 and DY3 according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S3=3, then DX3 and DY3 perform linear interpolation conversion according to 0V for 0V and 5V for 32767.
……
5. If Sn =1, performing linear interpolation conversion on DXn and DYn according to 6553 corresponding to 4mA and 32767 corresponding to 20mA;
if Sn =2, then DXn and DYn are linearly interpolated according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if Sn =3, then DXn and DYn are linearly interpolated at 0V for 0V and 5V for 32767V.
6. And outputting n pairs of twin signals AX1, AY1, AX2, AY2, AX3, AY3 \8230, 8230, AXn and AYn, and returning to the step 1.
A flow chart of the digital-to-analog conversion processing method of the first DA conversion module 3 is shown in fig. 2.
DXn and DYn are converted into AXn and AYn according to 6553 corresponding to 4mA and 32767 corresponding to 20mA by linear interpolation, namely
AXn＝4mA+(20mA-4mA)(DXn-6553)/(32767-6553)；
AYn＝4mA+(20mA-4mA)(DYn-6553)/(32767-6553)；
The linear interpolation conversion method is a conventional method, and is referred to as an encyclopedia linear interpolation entry.
The first twin channel signal processing module 4 collects n channel signals (XY 1, XY2, XY3 \8230; XYn) output by the communication module 5, carries out twin channel signal processing according to channel specification signals S1, S2, S3 \8230; sn) output by the first dial module 8, and then outputs n pairs of complementary twin signals (DX 1, DY1, DX2, DY2, DX3, DY3 \8230; DXn, DYn) to the first DA conversion module 3.
The twin channel signal processing method of the twin channel signal processing module 4 comprises the following steps:
1. the method comprises the steps of collecting n channel signals XY1, XY2 and XY3 \8230 \ 8230:, XYn output by a communication module 5 and channel specification signals S1, S2 and S3 \8230 \ 8230:, sn output by a dial module 8.
2. If S1=1, the channel signal acquisition value zero point C1 Zero =6553, channel signal collection value full point C1 Is full of =32767; otherwise, the channel signal acquisition value zero point C1 Zero =0, channel signal acquisition value full point C1 Is full of ＝32767。
If S2=1, the channel signal acquisition value zero point C2 Zero =6553, channel signal acquisition value full point C2 Is full of =32767; otherwise, the channel signal acquisition value zero point C2 Zero =0, channel signal acquisition value full point C2 Is full of ＝32767。
If S3=1, the channel signal acquisition value zero point C3 Zero =6553, channel signal collection value full point C3 Is full of =32767; otherwise, the channel signal acquisition value zero point C3 Zero =0, channel signal acquisition value full point C3 Is full of ＝32767。
……
If Sn =1, the channel signal acquisition value zero point Cn Zero =6553, channel signal collection value full point Cn Is full of =32767; otherwise, the channel signal acquisition value zero point Cn Zero =0, full point Cn of channel signal acquisition value Is full of ＝32767。
3、DX1＝XY1；
DY1＝C1 Zero +C1 Is full of -XY1；
DX2＝XY2；
DY2＝C2 Zero +C2 Is full of -XY2；
DX3＝XY3；
DY3＝C3 Zero +C3 Is full of -XY3；
……
DXn＝XYn；
DYn＝Cn Zero +Cn Is full of -XYn；
4. And outputting n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3, 8230, DXn and DYn, and returning to the step 1.
A flow chart of the twin channel signal processing method of the first twin channel signal processing module 4 is shown in fig. 3.
The communication module 5 collects an output instruction of the PLC in a communication mode and outputs the output instruction to the twin channel signal processing module 4, wherein n channel signals XY1, XY2 and XY3 \8230, 8230and XYn.
The first control module 6 outputs control signals to the twin channel module 1, the first signal output processing module 2, the first DA conversion module 3, the first twin channel signal processing module 4 and the communication module 5, and controls the whole data output processing process.
The whole data output processing process comprises the steps of collecting an output instruction of the PLC controller by a communication mode from a communication module 5, outputting the output instruction to a first twin channel signal processing module 4, carrying out a series of processing on n channel signals XY1, XY2, XY3 \8230, XYn, then carrying out a series of processing on the n channel signals X1, Y1, X2, Y2, x3, y3 \8230, and finally outputting the whole data stream output processing process of the PLC analog quantity collection module to the outside after the n channel signals XY1, XY2, XY3 \8230andxyn are processed by the first twin channel signal processing module 4, the first DA conversion module 3, the first signal pre-processing module 2 and the twin channel module 1.
The first power supply module 7 supplies power to the twin channel module 1, the first signal output processing module 2, the first DA conversion module 3, the first twin channel signal processing module 4, the communication module 5, the first control module 6, and the first dial module 8.
A user sets dial codes according to the specification of a remote transmission analog quantity signal and requirements, the first dial module 8 outputs channel specification signals S1, S2 and S3 \8230, 8230and Sn to the first DA conversion module 3 and the first twin channel signal processing module 4 according to the setting of the dial codes by the user and a dial code rule output method. Sn is a channel specification signal of the twin channel n of the twin channel module 1.
The pattern diagram of the dial man-machine interaction panel of the first dial module 8 is shown in fig. 4, and includes n dial frames of "1", "2", "3" \ 8230 \ 8230: "n" number, each dial frame has one dial block, and each dial block has 3 dial bits of "1", "2" and "3" in the dial frame.
The dialing number of the first dialing module 8 is consistent with the number of twin channels contained in the twin channel module 1, the number of the first dialing module is n, the numbers are respectively '1', '2', '3' \8230; 'n' and 'n' numbers, and the dialing number of the 'n' number is corresponding to the analog quantity signal specification acquired by the twin channel n of the twin channel module 1. Each dial has 3 positions, "1" bit, "2" bit, and "3" bit.
If the analog quantity signal output by the twin channel module 1 twin channel n is a 4-20 mA analog quantity signal, the user sets the dial corresponding to the twin channel n as a '1' bit; if the specification of the analog quantity signal output by the twin channel n of the twin channel module 1 is 0-20 mA analog quantity signal, the user sets the dial corresponding to the twin channel n to be 2; if the specification of the analog quantity signal output by the twin channel module 1 twin channel n is 0-5V analog quantity signal, the user sets the dial corresponding to the twin channel n to be 3.
The dial rule output method comprises the following steps:
1. and collecting dial position information.
2. If the "1" dial is "1" bit, S1=1; if the "1" dial is "2" bits, S1=2; if "1"
The dial is "3" bits, then S1=3.
S2=1 if the "2" dial is a "1" bit; s2=2 if the "2" dial is "2" bits; if the "2" dial is "3" bits, S2=3.
If the "3" number dial is a "1" bit, S3=1; if the 3 dialing is 2, S3=2; if the "3" dial is a "3" bit, S3=3.
……
If the dial of the number "n" is a bit "1", sn =1; if the dial of the number "n" is the digit "2", sn =2; if the "n" number is "3" bits, sn =3.
3. And outputting channel specification signals S1, S2 and S3 \8230 \ 8230:Sn, and returning to the step 1.
A flowchart of the dialing rule output method is shown in fig. 5.
An analog twin signal receiver a for remote anti-electromagnetic interference transmission of analog signals is shown in fig. 7.
The receiver includes: a twin channel input module 1', a second signal preprocessing module 2', a second AD conversion module 3', a second twin channel signal processing module 4', a second DA conversion module 5', a second control module 6', a second dial module 8', a second signal output processing module 9', and an output channel module 10';
the twin channel input module 1 'collects n pairs of complementary twin signals X1', Y1', X2', Y2', X3', Y3 '\ 8230 \ 8230;, xn', yn ', and simultaneously outputs n pairs of twin signals X1', Y1', X2', Y2', X3', Y3 '\ 8230; \ 8230;, xn', yn 'to the second signal preprocessing module 2';
the second signal preprocessing module 2' collects n pairs of twin signals X1', Y1', X2', Y2', X3', Y3' \ 8230 \ 8230, xn ', yn ' output by the twin channel input module 1', performs preprocessing isolation, amplification and filtering processing, and then outputs n pairs of twin signals AX1', AY1', AX2', AY2', AX3', AY3' \ 8230 \ 8230: \ 8230, AXn ', AYn ' to the second AD conversion module 3';
the second AD conversion module 3 'collects n pairs of twin signals AX1', AY1', AX2', AY2', AX3', AY3 '\8230; AXn', AYn 'output by the second signal preprocessing module 2', performs analog-to-digital conversion processing according to channel specification signals S1', S2', S3 '\ 8230; \ 8230; sn' output by the second dial module 8', and then outputs n pairs of twin signals DX1', DY1', DX2', DY2', DX3', DY3 '\ 8230; \8230; DXn', DYn 'to the second twin channel signal processing module 4';
the second twin channel signal processing module 4' collects n pairs of twin signals DX1', DY1', DX2', DY2', DX3', DY3' \ 8230 \ 8230 '; DXn ', DYn ' output by the second DA conversion module 5', performs twin channel signal processing according to the channel specification signals S1', S2', S3' \ 8230 \ 8230; \ 8230, sn ' output by the second dial module 8', and then outputs n signals DXY1', DXY2', y3' \ 8230; \ 8230dxn ' to the second DA conversion module 5'.
The second DA conversion module 5' acquires n channel signals DXY1', DXY2', DXY3' \ 8230 \ 8230, DXYn ', and according to the channel specification signals S1', S2', S3' \ 8230 \ Sn ' output by the second dial module 8', performs digital-to-analog conversion processing, and then outputs n channel signals AXY1', AXY2', AXY3' \ 8230 \ 8230:, AXYn ' to the second signal output processing module 9';
the second signal output processing module 9' collects n channel signals AXY1', AXY2', AXY3' \ 8230 \ 8230and AXYn ' output by the second DA conversion module 5', performs isolation amplification processing, and then outputs n channel signals XY1', XY2', XY3' \ 8230 \ 8230and XYn ' to the output channel module 10';
the output channel module 10 'collects n channel signals XY1', XY2', XY3' \ 8230; \ 8230; XYn 'output by the second signal output processing module 9' and carries out isolation amplification processing to output n channel signals XY1', XY2', XY3 '\ 8230; \ 8230; XYn';
the second control module 6' outputs control signals to the twin channel input module 1', the second signal preprocessing module 2', the second AD conversion module 3', the second twin channel signal processing module 4', the second DA conversion module 5', the second signal output processing module 9', the output channel module 10', and the second control module 6' for controlling the data acquisition and processing process.
The receiver further comprises a power supply module 7', wherein the power supply module 7' is a twin channel input module 1', a second signal preprocessing module 2', a second AD conversion module 3', a second twin channel signal processing module 4', a second DA conversion module 5', a second control module 6', a second dial module 8', a second signal output processing module 9' and an output channel module 10' for supplying power.
The twin channel input module 1 'comprises n pairs of twin channels, each pair comprising 2' signal acquisition input channel units.
In the twin channel input module 1', the meaning of n pairs of complementary twin signals is as follows:
for 4-20 mA analog quantity signals, the two complementary twin analog quantity signals mean that the two analog quantity signals are added to be 24mA;
for 0-20 mA analog quantity signals, two complementary twin analog quantity signals mean that the two analog quantity signals are added to be 20mA;
for 0-5V analog quantity signals, the two complementary twin analog quantity signals mean that the two analog quantity signals are added to be 5V.
The second dial module 8 'outputs channel specification signals S1', S2', S3' \ 8230 \ Sn ';, sn' to the second AD conversion module 3', the second twin channel signal processing module 4', and the second DA conversion module 5', and Sn' is a channel specification signal of the twin channel input module 1 'twin channel n', according to the setting of the dial by the user and the dial rule output method.
The number of the second dial-up module 8' is consistent with the number of twin channels included in the twin channel input module 1', the number of the second dial-up module is n, the numbers are respectively ' 1', ' 2', ' 3' \8230 \ 8230; ' n '; ' n ' dial-up code is provided with analog quantity signal specification collected by the twin channel input module 1' twin channel n ', each dial-up code has 3 positions, a ' 1 '; ' 2'; ' and a ' 3 ';:
if the specification of the analog quantity signal collected by the twin channel input module 1' twin channel n ' is 4' -2 '0mA analog quantity signal, the user sets the dial corresponding to the twin channel n ' to be ' 1 ';
if the specification of the analog quantity signal collected by the twin channel input module 1 'twin channel n' is 0-2 '0mA analog quantity signal, setting the dial corresponding to the twin channel n' to be '2';
if the analog quantity signal specification collected by the twin channel input module 1' twin channel n ' is 0-5 ' V analog quantity signal, the user sets the dial corresponding to the twin channel n ' to be 3' ″.
The invention will be further elucidated with reference to the drawings and exemplary embodiments.
Example 1:
the speed regulator control cabinet is used for controlling the pressure, the liquid level and the temperature of a hydraulic system of the speed regulator. A PLC controller of a speed regulator control cabinet adopts a PLC analog output module B with a twin channel for remote anti-electromagnetic interference transmission of analog signals, outputs 1 pair of complementary twin signals with the specification of 4-20 mA related to the liquid level of a pressure oil tank of a speed regulator hydraulic system, the pair of complementary twin signals are remotely transmitted through a signal transmission cable 9, inputs an analog twin signal receiver A for remote anti-electromagnetic interference transmission of the analog signals, and outputs the analog twin signal receiver A to a liquid level electronic display meter 10 after being processed, as shown in figure 7.
The governor control cabinet controller PLC outputs 1 pair of complementary twin signals f1, f2 (f 2=24mA-f 1) of 4-20 mA specification related to the liquid level of a pressure oil tank of a governor hydraulic system through the twin channel 1 of the analog quantity output module B. The two signals are transmitted to an analog quantity twin signal receiver A for remote anti-electromagnetic interference transmission of analog quantity signals by adopting different cores of the same cable, so that the external electromagnetic environment of the two signals is the same, and the electromagnetic interference signals received by the signal transmission are consistent and are delta. The analog quantity twin signal receiver A acquires input hydraulic oil tank liquid level complementary twin signals which are respectively f1+ delta and f2+ delta.
Then AX1= X1= f1+ Δ and AX2= X2= f2+ Δ in the analog twin signal receiver a.
Then DX1=32767 × x1/20ma, dxl 2=32767 × x2/20mA in the analog twin signal receiver a.
Then DXY1= (DX 1+ C1) in the analog twin signal receiver a Zero +C1 Is full of -DY1)/2＝(32767*X1/20mA+6553+32767-32767*X2/20mA)/2＝f1/20mA*32767。
The analog twin signal receiver a outputs XY1= AXY1= DXY1/32767 × 20ma = f1.
The invention relates to an analog quantity twin signal receiver A for remote anti-electromagnetic interference transmission of analog quantity signals, which outputs the analog quantity signals to a liquid level electronic display meter 10 without electromagnetic interference signal delta item in the final expression of the analog quantity signals.
Although the method of the present invention is described above in connection with an exemplary embodiment as applied to the case where the governor control cabinet controller PLC outputs a 4-20 mA governor hydraulic system hydraulic tank level analog signal, it will be understood by those skilled in the art that various changes may be made to the above exemplary embodiment without departing from the scope of the claims, and the method is widely applicable to the transmission of analog signals of other specifications.
Claims (6)
1. The utility model provides a PLC analog output module that is used for remote anti-electromagnetic interference transmission of analog signal which characterized in that includes: the device comprises a twin channel module (1), a first signal output processing module (2), a first DA conversion module (3), a first twin channel signal processing module (4), a communication module (5), a first control module (6) and a first dial module (8);
the communication module (5) collects an output instruction of the PLC and outputs the output instruction to the first twin channel signal processing module (4), wherein n channel signals XY1, XY2 and XY3 are 8230; XYn;
the first twin channel signal processing module (4) collects n channel signals XY1, XY2, XY3 \8230 \ XYn outputted by the communication module (5), carries out twin channel signal processing according to channel specification signals S1, S2, S3 \8230 \ 8230 \ Sn outputted by the first dial module (8), and then outputs n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3 \8230 \ 8230 \ DXn and DYn to the first DA conversion module (3);
the first DA conversion module (3) collects n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3 \8230 \ DXn and DYn output by the first twin channel signal processing module (4), performs digital-to-analog conversion processing according to channel specification signals S1, S2, S3 \8230:Snoutput by the first code dialing module (8), and then outputs n pairs of complementary twin signals AX1, AY1, AX2, AY2, AX3, AY3 \8230 \ 8230, AXn and AYn to the first signal output processing module (2);
the first signal output processing module (2) collects n pairs of complementary twin signals AX1, AY1, AX2, AY2, AX3, AY3 \8230, AXn and AYn output by the first DA conversion module (3), carries out isolation amplification processing, and then outputs n pairs of complementary twin signals X1, Y1, X2, Y2, X3, Y3 \8230, xn and Yn to the twin channel module (1);
the twin channel module (1) comprises n pairs of twin channels, each pair of twin channels comprises 2 twin signal output channels, the twin channel module (1) collects n pairs of complementary twin signals X1, Y1, X2, Y2, X3, Y3 \8230, xn, yn, and the twin channel module (1) outputs n pairs of complementary twin analog quantity signals X1, Y1, X2, Y2, X3, Y3 \8230, xn, yn;
the first control module (6) outputs control signals to the twin channel module (1), the first signal output processing module (2), the first DA conversion module (3), the first twin channel signal processing module (4) and the communication module (5) to control the whole data output processing process;
the first dial module (8) outputs channel specification signals S1, S2 and S3 \8230 \ 8230 \ Sn to the first DA conversion module (3) and the first twin channel signal processing module (4), and Sn is the channel specification signal of the twin channel n of the twin channel module (1).
2. The PLC analog output module according to claim 1, wherein the PLC analog output module is configured to perform long-distance electromagnetic interference immunity transmission of analog signals, and comprises: the PLC analog output module comprises a first power supply module (7), wherein the first power supply module (7) supplies power to a twin channel module (1), a first signal output processing module (2), a first DA conversion module (3), a first twin channel signal processing module (4), a communication module (5), a first control module (6) and a first dial-up module (8).
3. The PLC analog output module according to claim 1, wherein the PLC analog output module is configured to perform long-distance electromagnetic interference immunity transmission of analog signals, and comprises: the digital-to-analog conversion processing method of the first DA conversion module (3) comprises the following steps:
step 1: collecting n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3, 8230, DXn and DYn output by a first twin channel signal processing module (4) and channel specification signals S1, S2 and S3, 8230, sn output by a first dial module (8);
step 2: if S1=1, carrying out linear interpolation conversion on DX1 and DY1 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S1=2, DX1 and DY1 perform linear interpolation conversion according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S1=3, DX1 and DY1 perform linear interpolation conversion according to 0 to 0V and 32767 to 5V;
and step 3: if S2=1, carrying out linear interpolation conversion on DX2 and DY2 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S2=2, carrying out linear interpolation conversion on DX2 and DY2 according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S2=3, DX2 and DY2 perform linear interpolation conversion according to 0 to 0V and 32767 to 5V;
and 4, step 4: if S3=1, carrying out linear interpolation conversion on DX3 and DY3 according to 4mA corresponding to 6553 and 20mA corresponding to 32767;
if S3=2, carrying out linear interpolation conversion on DX3 and DY3 according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if S3=3, DX3 and DY3 perform linear interpolation conversion according to 0-0V and 32767-5V;
……
and 5: if Sn =1, performing linear interpolation conversion on DXn and DYn according to 6553 corresponding to 4mA and 32767 corresponding to 20mA;
if Sn =2, then DXn and DYn are linearly interpolated according to 0 corresponding to 0mA and 32767 corresponding to 20mA;
if Sn =3, then DXn and DYn are linearly interpolated according to 0V and 32767 to 5V;
step 6: outputting n pairs of complementary twin signals AX1, AY1, AX2, AY2, AX3, AY3 \8230, 8230axn and returning
And (1).
4. The PLC analog output module according to claim 1, wherein the PLC analog output module is configured to perform long-distance electromagnetic interference immunity transmission of analog signals, and comprises: the twin channel signal processing method of the first twin channel signal processing module (4) comprises the following steps:
step (1): the method comprises the steps of collecting n channel signals XY1, XY2 and XY3 \8230 \ 8230;. XYn output by a communication module (5) and channel specification signals S1, S2 and S3 \8230;. Sn output by a first dial module (8);
step (2): if S1=1, the channel signal acquisition value zero point C1 Zero =6553, channel signal acquisition value full point C1 Is full of ＝32767；
Otherwise, the channel signal acquisition value zero point C1 Zero =0, channel signal acquisition value full point C1 Is full of ＝32767；
If S2=1, the channel signal acquisition value zero point C2 Zero =6553, channel signal acquisition value full point C2 Is full of =32767; otherwise, the channel signal acquisition value zero point C2 Zero =0, channel signal acquisition value full point C2 Is full of ＝32767；
If S3=1, the channel signal acquisition value zero point C3 Zero =6553, channel signal collection value full point C3 Is full of =32767; otherwise, the zero point C3 of the channel signal acquisition value Zero =0, channel signal acquisition value full point C3 Is full of ＝32767；
……
If Sn =1, the channel signal acquisition value zero point Cn Zero =6553, channel signal acquisition value full point Cn Is full of =32767; otherwise, the channel signal acquisition value zero point Cn Zero =0, channel signal acquisition value full point Cn Is full of ＝32767；
And (3): DX1= XY1;
DY1＝C1 zero +C1 Is full of -XY1；
DX2＝XY2；
DY2＝C2 Zero +C2 Is full of -XY2；
DX3＝XY3；
DY3＝C3 Zero +C3 Is full of -XY3；
……
DXn＝XYn；
DYn＝Cn Zero +Cn Is full of -XYn；
And (4): outputting n pairs of complementary twin signals DX1, DY1, DX2, DY2, DX3, DY3, 8230, 8230dXn and DYn, and returning
And (1).
5. The PLC analog output module according to claim 1, wherein the PLC analog output module is configured to perform long-distance electromagnetic interference immunity transmission of analog signals, and comprises: the number of the first dial modules (8) is consistent with the number of twin channels contained in the twin channel modules (1), the number of the first dial modules is n, the number of the first dial modules is 1, 2 and 3, the number of the twin channels is 8230, the number of the twin channels is n, and the number of the n is n, wherein the dial codes are correspondingly set according to the specification of analog quantity signals collected by the twin channels n of the twin channel modules (1); each dial has 3 positions, "1" bit, "2" bit, and "3" bit:
if the analog quantity signal output by the twin channel n of the twin channel module (1) is a 4-20 mA analog quantity signal, the user sets the dial corresponding to the twin channel n to be 1;
if the analog quantity signal specification output by the twin channel n of the twin channel module (1) is 0-20 mA analog quantity signal, the user sets the dial corresponding to the twin channel n to be 2;
if the specification of the analog quantity signal output by the twin channel n of the twin channel module (1) is 0-5V analog quantity signal, the user sets the dial corresponding to the twin channel n to be 3.
6. The PLC analog output module according to claim 1, wherein the PLC analog output module is configured to perform long-distance electromagnetic interference immunity transmission of analog signals, and comprises: the first dial module (8) and the dial rule output method comprise the following steps:
step a, collecting dial position information;
step b, if the dial of the number 1 is the bit 1, S1=1; if the "1" dial is "2" bit, S1=2; if the "1" dial is "3" bit, S1=3;
s2=1 if the "2" dial is a "1" bit; if the 2-digit dialing code is 2, then S2=2; if the 2 dialing code is 3, S2=3;
if the 3 dialing is 1, S3=1; if the 3-digit is a 2-digit, S3=2; if the 3-digit dialing code is 3, S3=3;
……
if the dial of the number "n" is a bit "1", sn =1; if the dial of the number "n" is the digit "2", sn =2; if the dial of the number "n" is 3, sn =3;
and step c, outputting channel specification signals S1, S2 and S3 \8230, sn, and returning to the step a.
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| CN101893868A (en) * | 2009-05-21 | 2010-11-24 | Ls产电株式会社 | Analog output module |
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| CN211979479U (en) * | 2020-06-05 | 2020-11-20 | 东莞市凯格精机股份有限公司 | Analog quantity board card |
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| US20190356362A1 (en) * | 2018-05-15 | 2019-11-21 | Speedlink Technology Inc. | Mimo transceiver array for multi-band millimeter-wave 5g communication |
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|---|---|---|---|---|
| CN101893868A (en) * | 2009-05-21 | 2010-11-24 | Ls产电株式会社 | Analog output module |
| CN102938646A (en) * | 2012-09-20 | 2013-02-20 | 中国兵器工业集团第二一四研究所苏州研发中心 | Fine-adjustment test system of hybrid integrated circuit and method of test system |
| CN107884703A (en) * | 2017-11-20 | 2018-04-06 | 北京空间机电研究所 | A kind of input signal simulation source for infrared detector video processing circuits noise testing |
| CN108599872A (en) * | 2018-03-16 | 2018-09-28 | 中国长江电力股份有限公司 | A kind of analog signals remote transmission method of electromagnetism interference |
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