CN113109621B - Method, system, device and medium for filtering attenuation direct current component in fault signal - Google Patents
Method, system, device and medium for filtering attenuation direct current component in fault signal Download PDFInfo
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Abstract
The invention discloses a method, a system, a device and a medium for filtering an attenuated direct current component in a fault signal, wherein the method comprises the following steps: acquiring a discrete signal containing a plurality of sampling points according to the fault signal; acquiring sampling data from the discrete signal, and performing discrete Fourier transform on the sampling data to obtain a DFT output phasor sequence; performing rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining an attenuation time constant according to the rotation difference phasor sequence; performing attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence; and constructing a linear equation set according to the attenuation difference phasor sequence, and obtaining the accurate fundamental frequency phasor after filtering the attenuation direct current component according to the linear equation set. The invention provides a discrete Fourier transform improved algorithm capable of filtering and attenuating direct-current components, overcomes the defects of the existing extraction algorithm, improves the performance of a relay protection device, and can be widely applied to the field of power systems.
Description
Technical Field
The invention relates to the field of power systems, in particular to a method, a system, a device and a medium for filtering an attenuated direct-current component in a fault signal.
Background
The extraction accuracy of the fundamental frequency component in the fault signal by the protection measurement element (such as an overcurrent element, a low-voltage element and an impedance element) determines the performance of the relay protection device to a great extent. Discrete Fourier Transform (DFT) is widely used to extract the fundamental frequency component, since it can filter out integer harmonics in the fault signal. However, the attenuated direct current component in the fault signal cannot be filtered by the traditional discrete fourier transform, so the fundamental frequency component extraction algorithm capable of filtering the attenuated direct current component is always the key point of research of domestic and foreign scholars. With the increase of the access amount of electric equipment, the loads of power grids in various regions of China are continuously increased, and the importance of relay protection as a first line of defense of a modern power system is self evident. In order to improve the performance of the relay protection device, the research on the fundamental frequency component extraction algorithm for filtering the attenuated direct current component has urgent needs and important research value.
The existing fundamental frequency component extraction algorithms mainly include an instantaneous value algorithm and a Discrete Fourier Transform (DFT) improved algorithm. The accuracy of the instantaneous value algorithm extremely depends on the modeling of a specific signal, and components such as secondary attenuation direct current components and noise contained in fault signals greatly affect the accuracy of the algorithm, so that the method is not suitable for relay protection devices with high requirements on stability and accuracy. On the other hand, DFT improvement algorithms mostly filter out the attenuated dc component by using an extra data time window. The existing algorithm can completely filter and attenuate a direct current component theoretically, but the problems of insufficient noise resistance, large inter-harmonic response or overlong required data time window generally exist, the performance improvement of a relay protection device is limited, and the requirement of relay protection cannot be met.
Disclosure of Invention
To solve at least one of the technical problems in the prior art to a certain extent, an object of the present invention is to provide a method, a system, a device and a medium for filtering an attenuated dc component in a fault signal.
The technical scheme adopted by the invention is as follows:
a method for filtering an attenuated direct current component in a fault signal comprises the following steps:
acquiring a discrete signal containing a plurality of sampling points according to the fault signal;
acquiring sampling data from the discrete signal, and performing discrete Fourier transform on the sampling data to obtain a DFT output phasor sequence;
performing rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining an attenuation time constant according to the rotation difference phasor sequence;
performing attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence;
and constructing a linear equation set according to the attenuation difference phasor sequence, and obtaining the accurate fundamental frequency phasor after filtering the attenuation direct current component according to the linear equation set.
Further, the number of the sampling points is N + NexN is the number of sampling points in a period, NexIs a natural number greater than or equal to 2;
the acquiring of the sample data from the discrete signal comprises:
extracting sampling data in a [ k delta T, T + (k-1) delta T ] time window from the discrete signals; where T is the period of the fault signal and Δ T is the sampling interval.
Further, the rotating difference operation is performed on the DFT output phasor sequence by using the following formula:
wherein the content of the first and second substances,is a rotating differential phasor sequence; n is the number of sampling intervals and the value range is that N is more than or equal to 1 and less than or equal to Nex-1;
The obtaining of the decay time constant α from the sequence of rotated differential phasors includes:
constructing a vector for e using the rotated differential phasor sequence-αΔtThe linear equation of (a):
using a linear least squares solution one can obtain:
if the term is accumulatedLess than or equal to epsilon, representing that the decaying direct current component is negligible, in which case the decay time constant alpha should be considered to be 0; if it isIf the attenuation time constant is larger than epsilon, the attenuation time constant can be obtained according to the formula (3);
the decay time constant α is:
where ε is a very small positive number.
Further, performing attenuation difference operation on the DFT output phasor sequence by adopting the following formula:
the attenuated differential phasor sequence can be obtained by using the formula (5) The following relation is satisfied:
Further, the expression of the linear equation set obtained by construction is as follows:
wherein the content of the first and second substances,andrespectively representThe real and imaginary parts of (c).
Further, the fault signal comprises a fundamental frequency component, a whole harmonic, an attenuated direct current component and a direct current offset component;
the expression of the fault signal is:
wherein A is0To offset the amplitude of the DC component, AmFor each whole harmonic amplitude, ω is angular velocity, t is time, θmD is the initial value of the attenuation direct current component, and alpha is the attenuation time constant.
Further, the discrete fourier transform is performed on the sampling data to obtain an output quantity:
wherein the content of the first and second substances,outputting phasor for DFT;is composed ofThe exact fundamental phasor contained in (a);is composed ofA decaying dc phasor caused by a decaying dc component;outputting phasor for DFT at T moment;is composed ofThe exact fundamental phasor contained in (a);is composed ofA decaying dc phasor caused by a decaying dc component; b is1The amplitude of the fundamental frequency phasor is accurate; theta1An initial phase angle of the fundamental frequency phasor is accurately determined; j is an imaginary unit.
The other technical scheme adopted by the invention is as follows:
a system for filtering an attenuated dc component of a fault signal, comprising:
the sampling module is used for acquiring a discrete signal containing a plurality of sampling points according to the fault signal;
the transformation module is used for acquiring sampling data from the discrete signal, and performing discrete Fourier transformation on the sampling data to obtain a DFT output phasor sequence;
the difference solving module is used for carrying out rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence and obtaining an attenuation time constant according to the rotation difference phasor sequence;
the attenuation solving module is used for carrying out attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence;
and the equation solving module is used for constructing a linear equation set according to the attenuation difference phasor sequence and obtaining the accurate fundamental frequency phasor after the attenuation direct current component is filtered and removed according to the linear equation set.
The other technical scheme adopted by the invention is as follows:
an apparatus for filtering an attenuated dc component of a fault signal, comprising:
at least one processor;
at least one memory for storing at least one program;
when executed by the at least one processor, cause the at least one processor to implement the method described above.
The other technical scheme adopted by the invention is as follows:
a storage medium having stored therein a processor-executable program for performing the method as described above when executed by a processor.
The invention has the beneficial effects that: the invention provides a Discrete Fourier Transform (DFT) improved algorithm capable of filtering and attenuating direct-current components, overcomes the defects of the existing fault signal fundamental frequency component extraction algorithm, and improves the performance of a relay protection device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description is made on the drawings of the embodiments of the present invention or the related technical solutions in the prior art, and it should be understood that the drawings in the following description are only for convenience and clarity of describing some embodiments in the technical solutions of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart illustrating the steps of a method for filtering an attenuated DC component in a fault signal according to an embodiment of the present invention;
FIG. 2 is a vector diagram illustrating a rotational difference operation according to an embodiment of the present invention;
fig. 3 is a schematic diagram of amplitude-frequency response characteristics of a method for filtering an attenuated dc component in a fault signal in a frequency band of 1 to 1000Hz in an embodiment of the present invention;
fig. 4 is a schematic diagram of waveforms of current signals of three phase lines before and after acquiring a fault signal in the embodiment of the present invention;
fig. 5 is a comparison graph of the result of extracting the fundamental frequency component and the result of extracting the full-wave DFT algorithm by the method for filtering the attenuated dc component in the fault signal according to the embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. The step numbers in the following embodiments are provided only for convenience of illustration, the order between the steps is not limited at all, and the execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, a plurality of means is one or more, a plurality of means is two or more, and greater than, less than, more than, etc. are understood as excluding the essential numbers, and greater than, less than, etc. are understood as including the essential numbers. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
As shown in fig. 1, the present embodiment provides a method for filtering an attenuated dc component in a fault signal, including the following steps:
and S1, acquiring a discrete signal containing a plurality of sampling points according to the fault signal.
Because the actual fault signal includes the whole harmonic, the attenuated dc component and the dc offset component in addition to the fundamental frequency component, the fault signal can be expressed as:
in the formula (8), A0To offset the amplitude of the DC component, AmFor each whole harmonic amplitude, ω is angular velocity, t is time, θmD is the initial value of the attenuation direct current component, and alpha is the attenuation time constant.
And S2, acquiring sampling data from the discrete signal, and performing discrete Fourier transform on the sampling data to obtain a DFT output phasor sequence.
For the pair comprising N + Nex(N is the number of sampling points in one period, NexNatural number greater than or equal to 2) discrete signals of sampling points, extracting [ k Δ T, T + (k-1) Δ T]Performing Discrete Fourier Transform (DFT) on the sampled data in a time window (T is a period, and delta T is a sampling interval) to obtain a DFT output phasorThereby obtaining a DFT output phasor sequence.
Performing Discrete Fourier Transform (DFT) on the sampled data in the time window [ k Δ T, T + (k-1) Δ T ], wherein the output phasor is:
in the formula (9), the reaction mixture is,outputting phasor for DFT;is composed ofThe exact fundamental phasor contained in (a);is composed ofA decaying dc phasor caused by a decaying dc component;outputting phasor for DFT at T moment;is composed ofThe exact fundamental phasor contained in (a);is composed ofA decaying dc phasor caused by a decaying dc component; b is1The amplitude of the fundamental frequency phasor is accurate; theta1An initial phase angle of the fundamental frequency phasor is accurately determined; j is an imaginary unit.
And S3, performing rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining an attenuation time constant according to the rotation difference phasor sequence.
in the formula (1)Is a rotating differential phasor; n is the number of sampling intervals and the value range is that N is more than or equal to 1 and less than or equal to Nex-1。
The rotational differential phasor sequence can be obtained by using the formula (1)Construction of-αΔtThe linear equation of (a):
using a linear least squares solution one can obtain:
in the formula (3), if the terms are added upLess than or equal to epsilon (epsilon is a very small positive number), this means that the decaying direct current component is negligible, in which case the decay time constant alpha should be considered to be 0; if it isIf the value is larger than ε, the decay time constant can be obtained by equation (3). In summary, the decay time constant α:
and S4, performing attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence.
Outputting phasor sequence by DFT according to the solved decay time constantAnd (3) carrying out attenuation difference operation:
Using the above formula, the sequence of attenuated differential phasors can be found The following relation is satisfied:
and S5, constructing a linear equation set according to the attenuation difference phasor sequence, and obtaining the accurate fundamental frequency phasor after the attenuation direct current component is filtered according to the linear equation set.
In the above-mentioned formula (6),outputting phasors for DFTThe exact fundamental phasor contained in (a). Using attenuated differential phasor sequences according to the above equationCan construct a construct about x0And y0The system of linear equations of:
in the above-mentioned equation (7),andrespectively representThe real and imaginary parts of (k ═ N, N +1, N +2ex). Solving the linear least squares solution of equation (7) above yields x0And y0And finally the accurate fundamental frequency phasor is obtained
As shown in FIG. 2, in the above equation (9), the exact fundamental phasorAndattenuated direct current phasorAndcan be represented by equations (10) and (11):
according to formula (9), formula (10) and formula (11),has been eliminated, soShould equal the decaying DC phasor for two sampling intervals of nAndand (3) performing a rotation difference operation to obtain a result, namely:
therefore, according to equations (11) and (12), when n is constant, two rotational differential phasors that differ by one sampling intervalAndthe following relation is satisfied:
by transforming the value of k according to equation (13) and applying a plurality of rotational differential phasors, the following overdetermined system of equations for solving the decay time constant α can be achieved:
according to the formula (2), e-αΔtIt can be calculated from the following formula (3):
it is noted that the accumulated term in equation (3)If smaller than or equal to e (e is a very small positive number) this means that the decaying dc component is negligible, in which case the decay time constant a should be considered to be 0. If it isIf the value is larger than ε, the decay time constant can be obtained by equation (3). In summary, the decay time constant α:
example 1
Defining a model of the fault signal:
wherein ω is 2 π ff,ffAt a fundamental frequency of 50 Hz.
The period T is 0.02s according to the fundamental frequency; if the sampling interval Δ t is 0.0002s, the number of sampling points N in one period is 100. Obtaining instantaneous value of signal in time window of length one period plus eight sampling points from time t as 0 at interval of delta t, obtaining discrete signal containing 50Hz fundamental wave, 2 to 10 integral harmonics and attenuation direct current containing 108 instantaneous values, N is thenex=8。
For a discrete signal containing 100+8 sampling points, [ k Δ T, T + (k-1) Δ T is extracted]Performing Discrete Fourier Transform (DFT) on the sampled data in the time window to obtain DFT output phasorThe resulting DFT output phasor sequence is as follows:
and S102, solving the attenuation time constant alpha.
due to the fact thatGreater than ε (ε is a very small positive number) can be solved by solving the equation Therefore, it is
Outputting a phasor sequence by DFT according to the solved decay time constant alpha being 25And (3) carrying out attenuation difference operation:
using the above formula, the sequence of attenuated differential phasors can be foundThe following were used:
when n is 4, it can be obtained according to formula (6):
byUsing the sequence of attenuated differential phasors according to the above equation, one can construct a vector for x0And y0The system of linear equations of:
solving the linear least squares solution of the above equation yields x086.6025 and y050.0000, the final exact fundamental frequency phasor is
Example 2
Defining a model of the fault signal:
fh(h,t)=10+100*cos(2π*h*t)+80*e-25t
wherein, h is 1, 2, 3.
According to the fundamental frequency of 50Hz and the period T of 0.02 s; if the sampling interval Δ t is 0.0002s, the number of sampling points N in one period is 100. Taking Δ t as an interval, sequentially taking values of h as 1, 2, 3,., 1000, and acquiring a signal f in a time window with the length of one period plus 10 sampling points from the time t as 0h(h, t) instantaneous values, 1000 discrete values each comprising 110 instantaneous values can be obtainedA signal.
Taking N by using the discrete signalexThe amplitude-frequency characteristics of the method were analyzed at 10 and n at 5, and the results are shown in fig. 3. FIG. 3 shows that N isexThe amplitude-frequency response characteristic of the method under the condition of 10 and n-5 in a frequency band of 1-1000 Hz is shown on the abscissa, the frequency is shown in Hz, and the amplitude of the response is shown on the ordinate.
As can be seen from FIG. 3, the response of the method of this embodiment to each whole harmonic signal within 1000Hz is 0; and the response of the harmonic signals in the frequency range of 200 to 1000Hz is lower than 3.5 percent; also has a low response to inter-harmonic signals in the frequency range of 100 to 200 Hz. This shows that the method has better suppression effect on the inter-harmonic.
Example 3
A50 Hz power transmission line model is built by utilizing PSCAD/EMTDC, a three-phase grounding fault is set at the length of a line 1/4 when the simulation time is 1.0 second(s), and the waveforms of current signals of the three-phase lines before and after the fault are obtained as shown in FIG. 4:
in fig. 4, the blue curve is a phase line a current waveform, the red curve is a phase line B current waveform, and the black curve is a phase line C current waveform; the horizontal axis represents time, the unit is second(s), and the waveforms of two cycles before the fault and four cycles after the fault, which are six cycles (0.12s) in total, are extracted; the vertical axis represents the instantaneous value of the current in kilo-amperes (kA).
Sampling three-phase line current signals in four cycles of simulation time from 1.0s to 1.08s by taking a sampling interval delta t as 0.0002s to obtain three discrete current signals respectively containing 400 instantaneous values; using the three discrete current signals, respectively taking N ex300, N is taken to correspond to NexDividing by two and then rounding down to a smaller value between 50, using the method to extract the fundamental frequency component of the discrete signal, and comparing the extraction result with the extraction result of the full-wave DFT algorithm on the same signal, the obtained result is shown in FIG. 5.
In FIG. 5, the horizontal axis is NexThe vertical axis is the modulus of the fundamental frequency component in kA. The solid lines blue, red and black represent the A extracted by the methodB, C modulus of fundamental frequency component of current; blue, red and black dot lines represent modulus values of A, B, C three-phase current fundamental frequency components extracted by full-wave DFT algorithm, respectively; the blue, red and black dashed lines represent the exact modulus values of the fundamental frequency components of A, B, C three-phase current, respectively.
As can be seen from the comparison result of fig. 5, compared with the full-wave DFT algorithm, the method of the present embodiment greatly improves the accuracy of extracting the fundamental frequency component of the fault current signal, and can obtain an accurate fundamental frequency component amplitude value by using a shorter data window.
The present embodiment further provides a system for filtering an attenuated dc component in a fault signal, including:
the sampling module is used for acquiring a discrete signal containing a plurality of sampling points according to the fault signal;
the transformation module is used for acquiring sampling data from the discrete signal, and performing discrete Fourier transformation on the sampling data to obtain a DFT output phasor sequence;
the difference solving module is used for carrying out rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence and obtaining an attenuation time constant according to the rotation difference phasor sequence;
the attenuation solving module is used for carrying out attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence;
and the equation solving module is used for constructing a linear equation set according to the attenuation difference phasor sequence and obtaining the accurate fundamental frequency phasor after the attenuation direct current component is filtered and removed according to the linear equation set.
The system for filtering the attenuated direct current component in the fault signal according to the embodiment of the present invention can execute the method for filtering the attenuated direct current component in the fault signal according to the embodiment of the method of the present invention, can execute any combination of the implementation steps of the method embodiments, and has corresponding functions and beneficial effects of the method.
The embodiment further provides a device for filtering an attenuated dc component in a fault signal, including:
at least one processor;
at least one memory for storing at least one program;
when executed by the at least one processor, cause the at least one processor to implement the method as shown above in fig. 1.
The device for filtering the attenuated direct-current component in the fault signal in the embodiment can execute the method for filtering the attenuated direct-current component in the fault signal provided by the method embodiment of the invention, can execute any combination implementation steps of the method embodiment, and has corresponding functions and beneficial effects of the method.
The embodiment of the application also discloses a computer program product or a computer program, which comprises computer instructions, and the computer instructions are stored in a computer readable storage medium. The computer instructions may be read by a processor of a computer device from a computer-readable storage medium, and executed by the processor to cause the computer device to perform the method illustrated in fig. 1.
The present embodiment further provides a storage medium, which stores an instruction or a program that can execute the method for filtering out the attenuated dc component in the fault signal according to the embodiment of the method of the present invention, and when the instruction or the program is executed, the method can be executed by any combination of the embodiments of the method, and the method has corresponding functions and advantages.
In alternative embodiments, the functions/acts noted in the block diagrams may occur out of the order noted in the operational illustrations. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Furthermore, the embodiments presented and described in the flow charts of the present invention are provided by way of example in order to provide a more thorough understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is changed and in which sub-operations described as part of larger operations are performed independently.
Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the described functions and/or features may be integrated in a single physical device and/or software module, or one or more functions and/or features may be implemented in a separate physical device or software module. It will also be understood that a detailed discussion of the actual implementation of each module is not necessary for an understanding of the present invention. Rather, the actual implementation of the various functional modules in the apparatus disclosed herein will be understood within the ordinary skill of an engineer, given the nature, function, and internal relationship of the modules. Accordingly, those skilled in the art can, using ordinary skill, practice the invention as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are merely illustrative of and not intended to limit the scope of the invention, which is defined by the appended claims and their full scope of equivalents.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the foregoing description of the specification, reference to the description of "one embodiment/example," "another embodiment/example," or "certain embodiments/examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A method for filtering an attenuated direct current component in a fault signal is characterized by comprising the following steps:
acquiring a discrete signal containing a plurality of sampling points according to the fault signal;
acquiring sampling data from the discrete signal, and performing discrete Fourier transform on the sampling data to obtain a DFT output phasor sequence;
performing rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining an attenuation time constant according to the rotation difference phasor sequence;
performing attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence;
constructing a linear equation set according to the attenuation difference phasor sequence, and obtaining accurate fundamental frequency phasor after filtering attenuation direct current components according to the linear equation set;
performing a rotation difference operation on the DFT output phasor sequence by adopting the following formula:
wherein the content of the first and second substances,is a rotating differential phasor sequence; Δ t is the sampling interval; n is the number of sampling intervals and the value range is that N is more than or equal to 1 and less than or equal to Nex-1;
The obtaining of the decay time constant α from the sequence of rotated differential phasors includes:
constructing a vector for e using the rotated differential phasor sequence-αΔtThe linear equation of (a):
using a linear least squares solution one can obtain:
if the term is accumulatedLess than or equal to epsilon, representing that the decaying direct current component is negligible, in which case the decay time constant alpha should be considered to be 0; if it isIf the attenuation time constant is larger than epsilon, the attenuation time constant can be obtained according to the formula (3);
the decay time constant α is:
where ε is a very small positive number.
2. The method according to claim 1, wherein the number of the sampling points is N + NexN is the number of sampling points in a period, NexIs a natural number greater than or equal to 2;
the acquiring of the sample data from the discrete signal comprises:
extracting sampling data in a [ k delta T, T + (k-1) delta T ] time window from the discrete signals; where T is the period of the fault signal and Δ T is the sampling interval.
3. The method for filtering attenuated dc components in fault signals according to claim 1, wherein the attenuation difference operation is performed on the DFT output phasor sequence by using the following formula:
the attenuated differential phasor sequence can be obtained by using the formula (5) The following relation is satisfied:
wherein the content of the first and second substances,to be accurate fundamental phasors, x0Is the real part of the exact fundamental phasor, y0The imaginary part of the exact fundamental phasor;
outputting phasors for DFTUsing attenuated differential phasor sequences according to equation (6) with the exact fundamental phasor contained therein
Can construct a construct about x0And y0The system of linear equations of:
4. The method for filtering an attenuated dc component of a fault signal according to claim 1, wherein the fault signal includes a fundamental frequency component, an integer harmonic, an attenuated dc component, and a dc offset component;
the expression of the fault signal is:
wherein A is0To offset the amplitude of the DC component, AmFor each whole harmonic amplitude, ω is angular velocity, t is time, θmD is the initial value of the attenuation direct current component, and alpha is the attenuation time constant.
5. The method according to claim 1, wherein the discrete fourier transform is performed on the sampled data to obtain an output quantity:
wherein the content of the first and second substances,outputting phasor for DFT;is composed ofThe exact fundamental phasor contained in (a);is composed ofA decaying dc phasor caused by a decaying dc component;outputting phasor for DFT at T moment;is composed ofThe exact fundamental phasor contained in (a);is composed ofA decaying dc phasor caused by a decaying dc component; b is1The amplitude of the fundamental frequency phasor is accurate; theta1An initial phase angle of the fundamental frequency phasor is accurately determined; j is an imaginary unit; d is an initial value of the attenuation direct current component, N is the number of sampling points contained in one period, and T is the period of the fault signal.
6. A system for filtering an attenuated dc component of a fault signal, comprising:
the sampling module is used for acquiring a discrete signal containing a plurality of sampling points according to the fault signal;
the transformation module is used for acquiring sampling data from the discrete signal, and performing discrete Fourier transformation on the sampling data to obtain a DFT output phasor sequence;
the difference solving module is used for carrying out rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence and obtaining an attenuation time constant according to the rotation difference phasor sequence;
the attenuation solving module is used for carrying out attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence;
the equation solving module is used for constructing a linear equation set according to the attenuation difference phasor sequence and obtaining an accurate fundamental frequency phasor after the attenuation direct current component is filtered according to the linear equation set;
performing a rotation difference operation on the DFT output phasor sequence by adopting the following formula:
wherein the content of the first and second substances,is a rotating differential phasor sequence; n is the number of sampling intervals and the value range of N is more than or equal to 1 and less than or equal to Nex-1;
The obtaining of the decay time constant α from the sequence of rotated differential phasors includes:
constructing a vector for e using the rotated differential phasor sequence-αΔtThe linear equation of (a):
using a linear least squares solution one can obtain:
if the term is accumulatedLess than or equal to epsilon, representing that the decaying direct current component is negligible, in which case the decay time constant alpha should be considered to be 0; if it isIf the attenuation time constant is larger than epsilon, the attenuation time constant can be obtained according to the formula (3);
the decay time constant α is:
where ε is a very small positive number.
7. An apparatus for filtering an attenuated dc component of a fault signal, comprising:
at least one processor;
at least one memory for storing at least one program;
when executed by the at least one processor, cause the at least one processor to implement the method of any one of claims 1-5.
8. A storage medium having stored therein a program executable by a processor, wherein the program executable by the processor is adapted to perform the method according to any one of claims 1-5 when executed by the processor.
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