CN113108816A - Magnetoelectric encoder circuit with transmission channel shared by multiple paths of signals - Google Patents
Magnetoelectric encoder circuit with transmission channel shared by multiple paths of signals Download PDFInfo
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- CN113108816A CN113108816A CN202110413600.0A CN202110413600A CN113108816A CN 113108816 A CN113108816 A CN 113108816A CN 202110413600 A CN202110413600 A CN 202110413600A CN 113108816 A CN113108816 A CN 113108816A
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- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
- G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
- G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
- G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
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Abstract
The invention discloses a magnetoelectric encoder circuit with a transmission channel shared by multiple paths of signals, which comprises a magnetic encoding chip and a differential circuit, wherein the magnetic encoding chip outputs an A pulse signal and a B pulse signal with a phase difference of 90 degrees and a PWM signal for outputting a motor angle; the magnetoelectric encoder circuit also comprises a NAND gate delay circuit connected between the magnetic encoding chip and the differential circuit; one of the A pulse signal and the B pulse signal and the PWM signal are input to the NAND gate delay circuit, the NAND gate delay circuit can delay preset time, after the NAND gate delay circuit is electrified, only the PWM signal is output to the differential circuit within the preset time, and after the preset time is reached, only the A pulse signal or the B pulse signal connected to the NAND gate delay circuit is output to the differential circuit. The invention ensures that the magnetoelectric encoder can transmit the initial angle signal and the pulse signal in the rotation process without mutual interference by using the same transmission channel without configuring an MCU.
Description
Technical Field
The invention relates to the technical field of encoders, in particular to a magnetoelectric encoder circuit with a transmission channel shared by multiple paths of signals.
Background
An encoder is a device that converts angular or linear displacement into an electrical signal. Magnetoelectric encoders generally output an absolute position. At present, all magnetoelectric encoders need to be calibrated with zero points for use.
And at present, the magnetoelectric encoders on the market are all provided with the MCU for calibrating the zero point, and the MCU records and saves a fixed angle position of the motor in the calibrating process. After calibration is finished, the initial angle position of the motor is read out firstly when the motor is powered on, the initial angle position and the calibration position in the MCU are processed to obtain the absolute position of the motor, and then only A, B orthogonal pulse signals with the mutual difference of 90 degrees on the magnetoelectric encoder are needed to be used in the running stage, and the A, B orthogonal pulse signals can obtain real-time relative position signals in the running process of the motor. In order to avoid signal interference, in the prior art, the transmission of the initial angle signal and the A, B signal both need respective differential circuits.
In the current magnetoelectric encoder, all need dispose MCU promptly, and initial angle signal and A, B signal all need dispose respective difference circuit, make current magnetoelectric encoder's electronic components many like this, with high costs and wiring trouble.
Therefore, the prior art has yet to be improved.
Disclosure of Invention
In view of the above-mentioned shortcomings in the prior art, an object of the present invention is to provide a circuit of a magnetoelectric encoder, in which multiple signals share a transmission channel, so that the magnetoelectric encoder can transmit an initial angle signal and a pulse signal during rotation without interfering with each other by using the same transmission channel without configuring an MCU.
In order to realize the purpose, the invention adopts the following technical scheme:
a magnetoelectric encoder circuit with a transmission channel shared by multiple channels of signals comprises a magnetoelectric encoding chip and a differential circuit, wherein,
the magnetic encoding chip outputs three paths of signals, namely an A pulse signal and a B pulse signal with the phase difference of 90 degrees, and a PWM signal for outputting the angle of the motor;
the magnetoelectric encoder circuit also comprises a NAND gate delay circuit connected between the magnetic encoding chip and the differential circuit;
one of the A pulse signal and the B pulse signal and the PWM signal are input to the NAND gate delay circuit, and the other of the A pulse signal and the B pulse signal is directly input to the differential circuit;
the NAND gate delay circuit can delay preset time, only outputs the PWM signal to the differential circuit within the preset time after the NAND gate delay circuit is electrified, and only outputs the A pulse signal or the B pulse signal accessed to the NAND gate delay circuit to the differential circuit after the preset time is reached.
The magnetic coding chip is provided with an A signal output end and a B signal output end which respectively output the A pulse signal and the B pulse signal, and a PWM signal output end which is used for outputting the PWM signal;
the NAND gate delay circuit comprises a NAND gate circuit group and a delay circuit, wherein the NAND gate circuit group is provided with three signal input ends which are respectively a PWM signal input end, an A signal input end, a control signal input end and a signal output end;
the PWM signal input end is connected with the PWM signal output end of the magnetic coding chip, the A signal input end is connected with the A signal output end of the magnetic coding chip, and the control signal input end is connected with the delay circuit;
the differential circuit comprises a first differential chip and a second differential chip, the signal output end of the NAND gate circuit group is connected with the first differential chip, and the B signal output end of the magnetic coding chip is connected with the second differential chip;
the delay circuit is electrified and switches the level of the input end of the control signal after delaying for a preset time, the NAND gate circuit group only outputs the PWM signal to the first differential chip within the preset time, and the NAND gate circuit group only outputs the A pulse signal to the first differential chip after the preset time is reached.
The NAND gate circuit group at least comprises a first NAND gate circuit, a second NAND gate circuit, a third NAND gate circuit and a fourth NAND gate circuit, and each NAND gate circuit is provided with a first input end, a second input end and an output end;
the first input end of the first NAND gate circuit is connected with the delay circuit, the second input end of the first NAND gate circuit is in short circuit with the first input end, meanwhile, the second input end of the first NAND gate circuit is connected with the first input end of the second NAND gate circuit, and the output end of the first NAND gate circuit is connected with the second input end of the third NAND gate circuit;
the second input end of the second NAND gate circuit is connected with the A signal output end of the magnetic coding chip, and the output end of the second NAND gate circuit is connected with the second input end of the fourth NAND gate circuit;
the first input end of the third NAND gate circuit is connected with the PWM signal output end of the magnetic coding chip, and the output end of the third NAND gate circuit is connected with the first input end of the fourth NAND gate circuit;
and the output end of the fourth NAND gate circuit is connected with the first differential chip.
The nand gate circuit group is a four-nand gate integrated chip 74HC 132.
The power input end of the four-nand integrated chip 74HC132 is further connected to a filter capacitor C11.
The delay circuit is an RC delay circuit and comprises a resistor R2 and a capacitor C7, one end of the resistor R2 is connected with the power supply, the other end of the resistor R2 is connected with the first input end of the first NAND gate circuit, the other end of the resistor R2 is also connected with one end of the capacitor C7, and the other end of the capacitor C7 is grounded.
Wherein, the magnetic coding chip model is MT 6825.
The first differential chip and the second differential chip have model numbers of YD 3082E.
The circuit comprises a magnetic coding chip, a NAND gate circuit group, a delay circuit, a first differential chip and a second differential chip, and further comprises a voltage stabilizing circuit, wherein the voltage stabilizing circuit provides 3.3V stable direct current voltage for the magnetic coding chip, the NAND gate circuit group, the delay circuit, the first differential chip and the second differential chip.
The voltage stabilizing circuit comprises a voltage stabilizing chip, and the model of the voltage stabilizing chip is ME6211A33M 3.
The invention discloses a magnetoelectric encoder circuit with a transmission channel shared by multiple signals, which is characterized in that a NAND gate delay circuit is arranged to be connected with one of a PWM signal and an A, B pulse signal of a magnetic encoding chip, the NAND gate delay circuit delays for a preset time when being electrified, only the PWM signal is output to a differential circuit within the preset time, only an A pulse signal or a B pulse signal connected with the NAND gate delay circuit is output to the differential circuit after the preset time is reached, thus, in the initial stage of electrification, the magnetoelectric encoder circuit firstly transmits an initial angle PWM signal of a motor to the differential circuit through the NAND gate delay circuit, then the differential circuit is uploaded to a driver, the driver compares the PWM signal with the checking position of the motor according to the PWM signal to obtain the absolute position of the motor, and then after the delay reaches the preset time, the NAND gate delay circuit only transmits the A pulse signal or the B pulse signal connected with the NAND gate delay circuit to the differential circuit, the difference circuit transmits A, B pulse signals to the driver, and the driver can obtain the absolute position of a single circle of the motor according to the absolute position of the motor and A, B pulse signals so as to accurately complete position control. The magnetoelectric encoder circuit does not need to be provided with an MCU, and meanwhile, the PWM signal and one of the A pulse signal or the B pulse signal share the NAND gate delay circuit and the differential circuit for transmission and do not interfere with each other, so that the magnetoelectric encoder circuit saves electronic elements and reduces the product cost.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic circuit diagram of a first embodiment of a magnetoelectric encoder circuit according to the present invention;
FIG. 2 is a schematic circuit connection diagram of the magnetic encoding chip, the NAND gate delay circuit and the differential circuit of the present invention;
FIG. 3 is a schematic circuit diagram of the NAND delay circuit of the present invention;
FIG. 4 is a schematic diagram of the NAND gate delay circuit of the present invention connected to a filter circuit;
FIG. 5 is a schematic circuit diagram of a magnetic encoder chip according to the present invention;
FIG. 6 is a schematic circuit diagram of the differential circuit of the present invention;
FIG. 7 is a schematic diagram of a circuit connection of a voltage regulator circuit according to the present invention;
FIG. 8 is a schematic circuit diagram of the quick connector of the present invention.
Description of reference numerals:
100-magnetoelectric encoder circuit, 10-magnetic encoding chip, 20-differential circuit, 21-first differential circuit, 22-second differential circuit, 30-NAND gate delay circuit, 31-NAND gate circuit group, 32-delay circuit, 40-voltage stabilizing circuit and 50-quick connector.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In the present invention, unless expressly stated or limited otherwise, the terms "connected," "secured," and the like are to be construed broadly, and for example, "connected" may be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In addition, the descriptions related to "first", "second", etc. in the present invention are only for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature.
Referring to fig. 1 and fig. 2, a magnetoelectric encoder circuit 100 for sharing a transmission channel by multiple signals according to the present invention includes a magnetic encoding chip 10 and a differential circuit 20.
The magnetic encoding chip 10 outputs three signals, namely an A pulse signal and a B pulse signal with the phase difference of 90 degrees, wherein the A pulse signal and the B pulse signal are used for transmitting relative angle information of the motor in the rotating process and outputting a PWM signal of the motor angle, and the PWM signal represents absolute angle information, relative to the magnet mounting position on the motor rotor, acquired by the magnetic encoding chip 10.
The magnetic coding chip 10 is an angle sensor chip, when the motor rotates, the magnetic field intensity can be changed correspondingly through the magnetic induction principle when the motor rotates, and the change is converted into A, B pulse signals with 90 degrees of difference to output relative angles for representing the rotation of the motor, and meanwhile, absolute angle signals of the installation positions of magnets on a rotor of the motor can be output and output as PWM signals. A. The pulse signal B can calculate the relative position signal, the steering, the rotating speed and other data of the motor. The differential circuit 20 is used for outputting two differential signals of an a pulse signal and a B pulse signal.
The magnetoelectric encoder circuit 100 further comprises a nand gate delay circuit 30 connected between the magnetic encoding chip 10 and the differential circuit 20.
One of the pulse signal a and the pulse signal B and the PWM signal are input to the nand gate delay circuit 30, and the other of the pulse signal a and the pulse signal B is directly input to the differential circuit 20.
The nand gate delay circuit 30 can delay a preset time, and after the nand gate delay circuit 30 is powered on, only the PWM signal is output to the differential circuit 30 within the preset time, and after the preset time is reached, only the pulse signal a or the pulse signal B connected to the nand gate delay circuit 30 is output to the differential circuit 30.
As an implementation manner, as shown in fig. 1, the magnetic encoding chip 10 according to the embodiment of the present invention is provided with an a signal output terminal and a B signal output terminal for outputting the a pulse signal and the B pulse signal, respectively, and a PWM signal output terminal for outputting the PWM signal.
The nand gate delay circuit 30 comprises a nand gate circuit group 31 and a delay circuit 32, wherein the nand gate circuit group 31 is provided with three signal input ends, namely a PWM signal input end, an a signal input end, a control signal input end, and a signal output end.
The PWM signal input end is connected with the PWM signal output end of the magnetic coding chip 10, the A signal input end is connected with the A signal output end of the magnetic coding chip 10, and the control signal input end is connected with the delay circuit 32.
The differential circuit 20 comprises a first differential chip 21 and a second differential chip 22, the signal output end of the nand gate circuit group 31 is connected with the first differential chip 21, and the B signal output end of the magnetic encoding chip 10 is connected with the second differential chip 22.
The delay circuit 32 switches the level of the input end of the control signal after being powered on and delaying for a preset time, the nand gate circuit group 31 only outputs the PWM signal to the first differential chip 21 within the preset time, and the nand gate circuit group 31 only outputs the a pulse signal to the first differential chip 21 after the preset time is reached.
That is, the pulse signal a and the pulse signal B output by the magnetic encoding chip 10 in the embodiment of the present invention, the pulse signal B is directly output to the second differential chip 22 and then transmitted to the driver, and the pulse signal a needs to first enter the nand gate circuit group 31 and then output to the driver through the first differential chip 21.
Due to the action of the delay circuit 32, the level of the control signal input terminal of the nand gate circuit group 31 is kept in the first state during the preset time of the delay, and in this state, the signal output terminal of the nand gate circuit group 31 only outputs the PWM signal to the first differential chip 21. Therefore, in the initial stage of power-on, the driver can obtain the initial angle of the motor according to the PWM signal and then obtain the absolute position of the motor after comparing the initial angle with the calibration position of the motor.
Then, after the preset time is reached, the level of the control signal input end of the nand gate circuit group 31 is switched by the delay circuit 32 and kept in the second state, in this state, the signal output end of the nand gate circuit group 31 only outputs the a pulse signal to the first differential chip 21, and the PWM signal is prevented by the nand gate circuit group 31 from being transmitted to the first differential chip 21, so that the mutual interference between the PWM signal and the a pulse signal is avoided. Therefore, in the process of rotating the motor after the preset time is reached, the driver can acquire the relative position of the motor according to the pulse signal A of the first differential chip 21 and the pulse signal B of the second differential chip 22, and then calculate the absolute position of a single turn of the motor according to the absolute position of the motor acquired in the initial electrifying stage.
In the embodiment of the present invention, the first state and the second state of the level of the control signal input end of the nand gate circuit group 31 are determined by the specific internal circuit of the nand gate circuit group 31, for example, the first state may be a low level state, and the second state at this time is a high level state, and may also be reversed, as long as the first state only outputs the original PWM signal, and the second state only outputs the a pulse signal.
Preferably, the delay preset time of the delay circuit 32 according to the embodiment of the present invention is preferably 45ms, the nand gate circuit group 31 only transmits the PWM signal within 45ms after power-on, and the nand gate circuit group 31 only transmits the a pulse signal after 45 ms.
In the starting process of the motor, the PWM signal and the a pulse signal of the embodiment of the present invention use the same transmission channel, that is, the nand gate circuit 31 and the first differential chip 21 are used to transmit signals in sequence, and do not interfere with each other. Meanwhile, the magnetoelectric encoder circuit does not need to be configured with an MCU independently, the MCU is saved, and the PWM signal and the A pulse signal share the first differential chip 21, so that one differential chip is saved.
As shown in fig. 3, the nand gate circuit group 21 of the magnetoelectric encoder circuit 100 of the present invention at least includes a first nand gate U9A, a second nand gate U9B, a third nand gate U9C and a fourth nand gate U9D, each of which is provided with a first input terminal, a second input terminal and an output terminal.
The first input terminal (pin 12 of U9A) of the first nand gate U9A is connected to the delay circuit 32, the second input terminal (pin 13 of U9A) thereof is shorted with the pin 12 of the first input terminal (U9A), meanwhile, the second input terminal (pin 13 of U9A) is connected to the first input terminal (pin 9 of U9B) of the second nand gate U9B, and the output terminal (pin 12 of U9A) of the first nand gate U9A is connected to the second input terminal (pin 2 of U9C) of the third nand gate U9C.
The second input end (pin 10 of U9B) of the second NAND gate U9B is connected with the A signal output end of the magnetic encoding chip 10 and used for receiving the A pulse signal output by the magnetic encoding chip 10, and the output end (pin 8 of U9B) of the second NAND gate U9B is connected with the second input end (pin 5 of U9D) of the fourth NAND gate U9D.
The first input end (pin 1 of U9C) of the third NAND gate U9C is connected with the PWM signal output end of the magnetic encoding chip 10 and used for receiving the PWM signal output by the magnetic encoding chip 10, and the output end (pin 3 of U9C) of the third NAND gate U9C is connected with the first input end (pin 4 of U9D) of the fourth NAND gate U9D.
The output of the fourth nand gate U9D (pin 6 of U9D) is connected to the first differential chip 21.
Preferably, the nand gate circuit group 31 is a four-nand gate integrated chip 74HC 132.
Further, as shown in fig. 4, the power input terminal of the four-nand integrated chip 74HC132 is also connected to a filter capacitor C11. The filter capacitor C11 can prevent the power signal from interfering with the nand gate circuit group 31. The nand gate circuit group 31 is connected with a 3.3V power supply.
The delay circuit 32 of the embodiment of the present invention is an RC delay circuit, and includes a resistor R2 and a capacitor C7, one end of the resistor R2 is connected to a power supply, in this embodiment, a 3.3V power supply, the other end is connected to a first input terminal (pin 12 of U9A) of the first nand gate U9A, the other end of the resistor R2 is also connected to one end of a capacitor C7, and the other end of the capacitor C7 is grounded. The delay time is determined by the values of R2 and C7, and the values of R2 and C7 can be adjusted to adjust the delay time according to actual needs.
With reference to the delay circuit 32 and the nand gate circuit group 31 in fig. 3, the transmission principle of the PWM signal at the initial angle after power-on and the pulse signal of the motor A, B during operation of the present invention is as follows:
1. and (3) transmission of a PWM signal of the initial angle of the motor:
as shown in fig. 3, when the magnetoelectric encoder circuit 100 is powered on, at the moment of power-on, because the function of C7 cannot change abruptly, the pin 12 and the pin 13 of U9A are in a low level state and become in a high level state after passing through the nand gate U9A, that is, the pin 11 of U9A and the pin 2 of U9C are both in a high level state, so that the PWM signal received by the pin 1 of U9C from the magnetic encoder chip can be transmitted to the pin 3 of U9C and the pin 4 of U9D in an inverted phase.
Similarly, at the power-on instant, the pin 9 of the U9B is in the low state, so the pin 8 of the U9B and the pin 5 of the U9D are both in the high state, and therefore, the PWM signal inverted on the pin 4 of the U9D is combined with the high level of the pin 5, and becomes the original PWM signal after being inverted again by the U9D, so the pin 6 of the U9D outputs the original PWM signal.
2. Transmission of pulse signal of motor A, B in operation:
after a predetermined delay time (e.g., 45ms) after power-up, i.e., after the delay of R2 and C7 in the delay circuit 32, the pin 12 and the pin 13 of U9A are pulled up to a high state, and at this time, the pin 11 of U9A and the pin 2 of U9C become a low state, so that the pin 3 of U9C and the pin 4 of U9D will continue to output a high state.
Similarly, after the power-on delay time is set to be in the high state (e.g. 45ms), the pin 9 of the U9B is in the high state, so that when the motor is not in motion, the a pulse signal connected to the pin 10 of the U9B of the magnetic encoding chip 10 will be in a fixed level, and thus the power output at the pin 6 of the U9D will be in a fixed level finally. When the motor is rotating, pin 8 of U9B will change with the change in the level (a pulse signal) of pin 10 of U9B. The level states of pin 5 of U9D and pin 8 of U9B are opposite to the level state of pin 10 of U9B due to passing through the U9B nand gate. When the level state of the pin 5 of U9D changes, and the pin 4 of U9D is at a high level state at this time, the level state of the pin 5 of U9D is inverted by U9D, and the original a pulse level signal will be output on the pin 6 of U9D.
So far, the nand gate delay circuit 30 in fig. 3 realizes the functions of transmitting the PWM signal of the motor output angle to the differential chip during a period of power-on, normally outputting the pulse signal in the motor operation process to the differential chip after a period of time delay, and sharing one differential chip by two paths of signals without mutual interference.
In the whole process, when the power is on, the driver firstly receives the PWM signal passing through the nand gate delay circuit 30 and the first differential chip 21, the signal reflects the initial angular position information of the motor at the time, and the absolute position of the motor at the time can be obtained by processing the angular position information and the calibrated position. The PWM signal is not received after it is acquired, and after 45ms of power-up, the signal will not be transmitted to the first differential chip 21 because of the nand gate delay circuit 30 of the present invention. After 45ms of power-up, the first differential chip 21 will only receive the a pulse signal due to the nand gate delay circuit 30 of the present invention. The pulse signal A is an uncertain level signal when the motor is not in motion, and only can be high level or low level, and when the motor rotates, the signal and the pulse signal B form a quadrature signal with a mutual difference of 90 degrees.
As shown in FIG. 5, the magnetic encoder chip 10 of the present embodiment is MT 6825. Pins 16 and 15 of the MT6825 output an a pulse signal (a _ in) and a B pulse signal (B _ in), respectively, and pin 10 of the MT6825 outputs a PWM pulse signal (PWM _ OUT). The 16 pins of the MT6825 are connected to the 10 pins of the U9B.
As shown in fig. 6, the first differential chip 21 and the second differential chip 22 according to the embodiment of the present invention have models YD 3082E. The 4 th pin of the first differential chip U7 is connected to the 6 th pin of the U9D for receiving the PWM signal or the A pulse signal, and the 4 th pin of the second differential chip U6 is connected to the 15 th pin of the U8 for receiving the B pulse signal.
The magnetoelectric encoder circuit 100 according to the embodiment of the present invention further includes a voltage stabilizing circuit 40, and the voltage stabilizing circuit 40 provides 3.3V stable dc voltage for the magnetic encoding chip 10, the nand gate circuit group 31, the delay circuit 32, the first differential chip 21, and the second differential chip 22.
Preferably, as shown in fig. 7, the voltage regulator circuit 40 includes a voltage regulator chip, and the model of the voltage regulator chip is ME6211a33M 3. The voltage stabilization chip ME6211A33M3 can provide a stabilized voltage of 3.3V.
As shown in fig. 8, the magnetoelectric encoder circuit 100 of the present invention preferably further includes a quick connector 50 for connecting the output signals of the first differential chip 21 and the second differential chip 22 to the driver. The quick connector 50 facilitates quick connection or disconnection of the magneto-electric encoder circuit 100 of the present invention to a driver.
The magnetoelectric encoder circuit 100 provided by the embodiment of the invention has the advantages that the plurality of signals share one transmission channel, the NAND gate delay circuit 30 is connected to one of the PWM signal and the A, B pulse signal of the magnetic encoding chip 10, when the magnetoelectric encoder circuit 100 is electrified, the NAND gate delay circuit 30 delays for the preset time, only the PWM signal is output to the differential circuit 20 within the preset time, only the A pulse signal or the B pulse signal connected to the NAND gate delay circuit 30 is output to the differential circuit 20 after the preset time is reached, therefore, in the initial stage of electrification, the magnetoelectric encoder circuit 100 firstly transmits the initial angle PWM signal of the motor to the differential circuit 20 through the NAND gate delay circuit 30, then the differential circuit 20 is uploaded to a driver, the driver compares the PWM signal with the checking position of the motor to obtain the absolute position of the motor, and after the delay reaches the preset time, the nand gate delay circuit 30 only transmits an a pulse signal or a B pulse signal connected to the nand gate delay circuit to the differential circuit 20, the differential circuit 20 transmits the A, B pulse signal to the driver, and the driver can obtain the absolute position of a single turn of the motor according to the absolute position of the motor and the A, B pulse signal, so as to accurately complete position control. The magnetoelectric encoder circuit 100 of the present invention does not need to set an MCU, and simultaneously, the PWM signal and one of the a pulse signal or the B pulse signal share the nand gate delay circuit 30 and the differential circuit 20 for transmission without mutual interference, so that the magnetoelectric encoder circuit 100 of the present invention saves electronic components and greatly reduces the production cost of the product.
The above description is only for clearly illustrating the invention and is not therefore to be considered as limiting the scope of the invention, and all embodiments are not intended to be exhaustive, and all equivalent structural changes made by using the technical solutions of the present invention or other related technical fields directly/indirectly applied under the concept of the present invention are included in the scope of the present invention.
Claims (10)
1. A magnetoelectric encoder circuit with a transmission channel shared by multiple paths of signals comprises a magnetoelectric encoding chip and a differential circuit, and is characterized in that,
the magnetic encoding chip outputs three paths of signals, namely an A pulse signal and a B pulse signal with the phase difference of 90 degrees, and a PWM signal for outputting the angle of the motor;
the magnetoelectric encoder circuit also comprises a NAND gate delay circuit connected between the magnetic encoding chip and the differential circuit;
one of the A pulse signal and the B pulse signal and the PWM signal are input to the NAND gate delay circuit, and the other of the A pulse signal and the B pulse signal is directly input to the differential circuit;
the NAND gate delay circuit can delay preset time, only outputs the PWM signal to the differential circuit within the preset time after the NAND gate delay circuit is electrified, and only outputs the A pulse signal or the B pulse signal accessed to the NAND gate delay circuit to the differential circuit after the preset time is reached.
2. A magnetoelectric encoder circuit according to claim 1, wherein the plurality of signals share a transmission channel,
the magnetic coding chip is provided with an A signal output end and a B signal output end which respectively output the A pulse signal and the B pulse signal, and a PWM signal output end which is used for outputting the PWM signal;
the NAND gate delay circuit comprises a NAND gate circuit group and a delay circuit, wherein the NAND gate circuit group is provided with three signal input ends which are respectively a PWM signal input end, an A signal input end, a control signal input end and a signal output end;
the PWM signal input end is connected with the PWM signal output end of the magnetic coding chip, the A signal input end is connected with the A signal output end of the magnetic coding chip, and the control signal input end is connected with the delay circuit;
the differential circuit comprises a first differential chip and a second differential chip, the signal output end of the NAND gate circuit group is connected with the first differential chip, and the B signal output end of the magnetic coding chip is connected with the second differential chip;
the delay circuit is electrified and switches the level of the input end of the control signal after delaying for a preset time, the NAND gate circuit group only outputs the PWM signal to the first differential chip within the preset time, and the NAND gate circuit group only outputs the A pulse signal to the first differential chip after the preset time is reached.
3. A magnetoelectric encoder circuit according to claim 2, wherein the nand gate circuit group includes at least a first nand gate circuit, a second nand gate circuit, a third nand gate circuit, and a fourth nand gate circuit, each nand gate circuit having a first input terminal, a second input terminal, and an output terminal;
the first input end of the first NAND gate circuit is connected with the delay circuit, the second input end of the first NAND gate circuit is in short circuit with the first input end, meanwhile, the second input end of the first NAND gate circuit is connected with the first input end of the second NAND gate circuit, and the output end of the first NAND gate circuit is connected with the second input end of the third NAND gate circuit;
the second input end of the second NAND gate circuit is connected with the A signal output end of the magnetic coding chip, and the output end of the second NAND gate circuit is connected with the second input end of the fourth NAND gate circuit;
the first input end of the third NAND gate circuit is connected with the PWM signal output end of the magnetic coding chip, and the output end of the third NAND gate circuit is connected with the first input end of the fourth NAND gate circuit;
and the output end of the fourth NAND gate circuit is connected with the first differential chip.
4. The circuit of claim 3, wherein said set of nand gate circuits is a quad nand gate integrated chip 74HC 132.
5. The circuit of claim 4, wherein the power input terminal of the four-nand-gate integrated chip 74HC132 is further connected to a filter capacitor C11.
6. A magnetoelectric encoder circuit according to claim 2, wherein the delay circuit is an RC delay circuit including a resistor R2 and a capacitor C7, one end of the resistor R2 is connected to the power supply, the other end is connected to the first input terminal of the nand gate, the other end of the resistor R2 is also connected to one end of a capacitor C7, and the other end of the capacitor C7 is grounded.
7. The circuit of claim 1, wherein the magnetic encoder chip is of type MT 6825.
8. A magnetoelectric encoder circuit according to claim 2, wherein the first difference chip and the second difference chip have models YD 3082E.
9. The circuit of claim 2, further comprising a voltage regulator circuit, wherein the voltage regulator circuit provides 3.3V regulated dc voltage to the magnetic encoder chip, the nand gate circuit set, the delay circuit, the first differential chip, and the second differential chip.
10. The circuit of claim 9, wherein the regulator circuit comprises a regulator chip, and the regulator chip is ME6211a33M 3.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707496A (en) * | 2023-08-01 | 2023-09-05 | 青岛本原微电子有限公司 | High-resolution pulse signal processing circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707496A (en) * | 2023-08-01 | 2023-09-05 | 青岛本原微电子有限公司 | High-resolution pulse signal processing circuit |
| CN116707496B (en) * | 2023-08-01 | 2023-10-13 | 青岛本原微电子有限公司 | High-resolution pulse signal processing circuit |
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