CN113078981A - Communication system and method - Google Patents

Communication system and method Download PDF

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Publication number
CN113078981A
CN113078981A CN202010009666.9A CN202010009666A CN113078981A CN 113078981 A CN113078981 A CN 113078981A CN 202010009666 A CN202010009666 A CN 202010009666A CN 113078981 A CN113078981 A CN 113078981A
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China
Prior art keywords
data
processing
module
control
level processing
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Pending
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CN202010009666.9A
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Chinese (zh)
Inventor
李骜
罗为
徐兴安
谢恺
杨烊
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Shenzhen Longhua New Generation Communication And Intelligent Computing Research Institute
Fuhuake Precision Industry Shenzhen Co ltd
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Shenzhen Longhua New Generation Communication And Intelligent Computing Research Institute
Fuhuake Precision Industry Shenzhen Co ltd
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Priority to CN202010009666.9A priority Critical patent/CN113078981A/en
Publication of CN113078981A publication Critical patent/CN113078981A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0067Rate matching
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1812Hybrid protocols; Hybrid automatic repeat request [HARQ]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053Allocation of signaling, i.e. of overhead other than pilot signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W72/00Local resource management
    • H04W72/20Control channels or signalling for resource management

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The invention discloses a communication system, comprising: the server comprises a media access control layer and a CPU, the MAC layer sends initial data to the CPU or the CPU receives the initial data through an antenna, and the CPU and the auxiliary processing device are matched to perform first-type data processing and second-type data processing on the initial data so as to establish PUSCH and PDSCH transceiving data. The invention also provides a corresponding communication method.

Description

Communication system and method
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a communication system and method capable of quickly and efficiently processing data in an uplink and a downlink.
Background
The 5G communication Channel includes a control Channel and a data Channel, where the data Channel includes a Physical Uplink Shared Channel (PUSCH) and a Physical Downlink Shared Channel (PDSCH), and the PUSCH and the PDSCH transmit and receive data processes include symbol-level processing (e.g., resource de-mapping, etc.) and bit-level processing (e.g., rate de-matching, etc.) on the data.
Compared with the 4G system, the 5G system has higher requirements, and the speed of the server processing data in the uplink and the downlink needs to be increased by at least 20 times compared with the 4G system. However, the existing 5G system based on 4G Long Term Evolution (LTE) is generally implemented on a single server, and both the bit-level module and the symbol-level module need to call the calculation module and the storage module for calculating parameters in the module and storing data to perform the symbol-level processing and the bit-level processing. Therefore, when a large amount of data processing and delay pressure are met, the server often has the situations of unsatisfied delay, out-of-range memory and the like, particularly the data channel of the 5G system selects the LDPC code, the LDPC belongs to iterative decoding, and under the condition that the uplink and the downlink of the server run simultaneously, the occupancy rate of the CPU is high and even can reach 80%, and the method creates obstacles for the future extensibility of the 5G system and the addition of new functions under different scenes.
Disclosure of Invention
In view of the above problems, it is desirable to provide a communication system that can process data in uplink and downlink quickly and efficiently, reduce the delay of the communication process, and reduce the CPU occupancy.
In addition, it is necessary to provide a communication method corresponding to the above communication system.
A communication system, the system comprising: the server comprises a Media Access Control (MAC) layer and a CPU, wherein the MAC layer sends initial data to the CPU or the CPU receives the initial data through an antenna, and the CPU and the auxiliary processing device are matched to complete first-class data processing and second-class data processing on the initial data so as to establish PUSCH and PDSCH transceiving data.
A method of communication, the method comprising:
providing a server and an auxiliary processing device;
and performing first-class data processing and second-class data processing on initial data by matching the server and the auxiliary processing device to establish PUSCH and PDSCH transceiving data.
The communication system processes data in the data uplink stage and the data downlink stage by the cooperation of the server and the auxiliary processing device, thereby improving the data processing speed and efficiency in the uplink and downlink of the whole communication system, reducing the time delay of the communication process and reducing the CPU occupancy rate.
Drawings
Fig. 1 is a system architecture diagram of a first preferred embodiment of the interactive communication system of the present invention.
Fig. 2 is a flowchart illustrating the operation of establishing PUSCH reception data in the communication system shown in fig. 1.
Fig. 3 is a system architecture diagram of a second preferred embodiment of the interactive communication system of the present invention.
Fig. 4 is a flowchart illustrating the operation of the communication system shown in fig. 3 for establishing PUSCH reception data.
Description of the main elements
Communication system 1, 3
Server 10, 30
MAC layers 11, 31
CPU 12、32
Symbol level processing module 121
Auxiliary processing device 20, 40
Data processor 21, 41
Bit level processing module 211
Computing modules 212, 321
Data synthesis module 322
Module group 411
Memory 22, 42
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
Fig. 1 is a diagram illustrating a system architecture of a first preferred embodiment of the communication system according to the present invention. The communication system 1 includes a server 10 and an auxiliary processing device 20 communicating with the server 10. In the preferred embodiment, the server 10 and the auxiliary processing device 20 are connected by optical fiber, and conform to the ethernet transmission standard. In the preferred embodiment, the auxiliary processing device 20 is a Field Programmable Gate Array (FPGA) chip, and it is understood that the auxiliary processing device 20 can also be an Application Specific Integrated Circuit (ASIC) chip.
The communication system 1 is used to construct a data channel of a Base Station (BS). The data channel includes a PUSCH and a PDSCH.
The processing process of the PUSCH received data includes resource de-mapping, noise and channel estimation, spatial frequency domain equalization, demodulation and layer de-mapping, descrambling, rate de-matching, Hybrid Automatic Repeat request (HARQ) merging, Low Density Parity Check (LDPC) decoding, and Cyclic Redundancy Check (CRC) de-adding.
The PDSCH data transmission processing process comprises CRC adding, LDPC coding, rate matching, retransmission data sorting, scrambling, modulation, layer mapping, transmission energy control, precoding and resource mapping.
Wherein, in the processing process of the PUSCH received data, resource mapping, noise and channel estimation, space frequency domain equalization, demodulation, layer mapping de-demodulation, descrambling and in the processing process of the PDSCH transmitted data, scrambling, modulation, layer mapping, transmitted energy control, precoding and resource mapping are symbol level processing; and in the processing process of the PUSCH received data, rate de-matching, HARQ merging, LDPC decoding and CRC de-decoding are performed, and in the processing process of the PDSCH transmitted data, CRC addition, LDPC coding, rate matching and retransmission data are sorted into bit-level processing.
The server 10 includes a Medium Access Control (MAC) layer 11 and a CPU 12, the MAC layer 11 sends initial data to the CPU 12 or the CPU 12 receives the initial data through an antenna, the auxiliary processing device 20 includes a data processor 21, and the CPU 12 cooperates with the data processor 21 to perform a first type of data processing and a second type of data processing on the initial data to establish PUSCH and PDSCH transceiving data.
In the preferred embodiment, the first type of data processing is symbol-level processing, the CPU 12 includes a symbol-level processing module 121, the symbol-level processing module 121 is configured to perform symbol-level processing on data, the second type of data processing is bit-level processing, the data processor 21 includes a bit-level processing module 211 and a calculating module 212, the calculating module 212 is configured to calculate data and then transmit the data to the bit-level processing module 211, and the bit-level processing module 211 is configured to perform bit-level processing on the data.
It is to be understood that the secondary processing device 20 further comprises a memory 23, said memory 23 being adapted to store partially processed data, e.g. retransmitted error related data.
Referring to fig. 2, when establishing PUSCH reception data, the work flow of the communication system 1 includes the following steps:
in step S101, the CPU 12 receives initial data through an antenna. The initial data comprises control data and basic data. The control data includes the number of users, the type of user data, the size of user data, priority, processing parameters (e.g., scrambling parameters), etc., and is used to control the transmission of the basic data. The basic data is a data packet which needs to be transmitted by a user.
In step S102, the CPU 12 performs symbol-level processing on the initial data, and then transmits the processed initial data to the data processor 21. In the preferred embodiment, the symbol-level processing includes de-resource mapping, noise and channel estimation, space-frequency domain equalization, demodulation, de-layer mapping, and descrambling.
In step S103, the bit-level processing module 211 performs bit-level processing on the data subjected to symbol-level processing. In the preferred embodiment, the bit-level processing includes de-rate matching, HARQ combining, LDPC decoding. Meanwhile, the calculation module 212 processes control data in the data that has been processed at symbol level to obtain a control parameter, and the control parameter is fed back to the bit level processing module 211, and the bit level processing module 211 performs corresponding bit level processing according to the control parameter.
Step S104, the bit-level processing module 211 transmits the data that has been subjected to the bit-level processing back to the MAC layer 11, and the MAC layer 11 reports and schedules the data according to the transmitted data.
It can be understood that when establishing PDSCH transmission data, the work flow of the communication system 1 is substantially the same as that when establishing PUSCH reception data, and the difference is only that the direction is opposite, so that the description is omitted here.
In the preferred embodiment, the communication system 1 completes the bit-level processing and the corresponding control parameter calculation in the data uplink stage and the data downlink stage through the auxiliary processing device 20, the server 10 performs only symbol-level processing, and the auxiliary processing device 20 can share part of the data processing tasks of the server 10, thereby reducing the resources occupied by the server 10, increasing the data processing speed and efficiency in the uplink and downlink of the whole communication system 1, reducing the delay in the communication process, and reducing the occupancy rate of the CPU 12.
Fig. 3 is a system architecture diagram of a communication system according to a second preferred embodiment of the present invention. The communication system 2 has substantially the same structure and operation principle as the communication system 1, the communication system 2 includes a server 30 and an auxiliary processing device 40 capable of communicating with the server 30, and the server 30 includes a Medium Access Control (MAC) layer 31 and a CPU 32. The auxiliary processing device 40 includes a data processor 41 and a memory 42. The communication system 2 is different from the communication system 1 in that the CPU 32 includes a calculation module 321 and a data synthesis module 322. The data processor 41 comprises a group of modules 411.
In the preferred embodiment, the first type of data processing includes control data processing, the second type of data processing includes basic data processing, the computing module 321 is configured to process control data in initial data and transmit the processed control data to the data synthesizing module 322, the data synthesizing module 322 is configured to synthesize the processed control data and the basic data and transmit the synthesized control data to the data processor 41, and the module group 411 is configured to perform symbol-level processing and bit-level processing on the synthesized control data.
Referring to fig. 4, when establishing PUSCH reception data, the work flow of the communication system 3 includes the following steps:
in step S301, the CPU 32 receives initial data through an antenna. The initial data comprises control data and basic data. The control data includes the number of users, the type of user data, the size of user data, priority, processing parameters (e.g., scrambling parameters), etc., and is used to control the transmission of the basic data. The basic data is a data packet which needs to be transmitted by a user.
In step S302, the calculating module 321 processes the control data in the initial data to obtain a control parameter, and transmits the control parameter to the data synthesizing module 322. The data synthesis module 322 is configured to synthesize the obtained control parameters and the basic data, and transmit the synthesized data to the data processor 41.
In step S303, the module group 411 performs symbol-level processing and bit-level processing on the synthesized data.
In the preferred embodiment, the module group 411 includes a plurality of processing modules, such as a bit-level processing module and a symbol-level processing module, and specifically, may include a de-rate matching module, a HARQ combining module, an LDPC decoding module, and so on.
It can be understood that the module group 411 further uploads messages such as processing status, information status, and the like corresponding to each processing module to a designated address of the server 30, and the server 30 traverses the designated address through a designated core (monitor core), so as to know the operation status of each module in the module group 411.
It is understood that the server 30 may also add additional control data through the computing module 321, where the control data includes a data throttling command, a waiting command, and the like, and the additional control information command may make the interaction between the MAC layer 31 and the physical layer (not shown) of the data processor 41 more compact and make the operation of each module more flexible.
It can be understood that when establishing PDSCH transmission data, the work flow of the communication system 3 is substantially the same as that when establishing PUSCH reception data, and the difference is only that the direction is opposite, so that the description is omitted here.
In the preferred embodiment, the communication system 3 separates the control data from the basic data in the initial data in the data uplink stage and the data downlink stage, the control data is processed by the server 30 with high processing rate and high parallelism, the auxiliary processing device 40 performs the basic data processing, and the server 30 and the auxiliary processing device 40 cooperate to perform data processing, thereby improving the data processing speed and efficiency in the uplink and downlink of the whole communication system 3, reducing the time delay of the communication process, and reducing the occupancy rate of the CPU 32.

Claims (10)

1. A communication system, the system comprising: the server comprises a Medium Access Control (MAC) layer and a CPU, wherein the MAC layer sends initial data to the CPU or the CPU receives the initial data through an antenna, and the CPU and the auxiliary processing device are matched to complete first-class data processing and second-class data processing on the initial data so as to establish a Physical Uplink Shared Channel (PUSCH) and a Physical Downlink Shared Channel (PDSCH) to receive and transmit data.
2. The communication system of claim 1, wherein the initial data comprises control data and basic data, the first type of data processing comprises symbol-level processing, the CPU comprises a symbol-level processing module, the symbol-level processing module is configured to perform symbol-level processing on the initial data, the second type of data processing comprises bit-level processing, the auxiliary processor comprises a calculation module and a bit-level processing module, the calculation module is configured to obtain a control parameter after processing the control data in the data that has been subjected to the symbol-level processing, and transmit the control parameter to the bit-level processing module, and the bit-level processing module is configured to perform bit-level processing on the basic data according to the control parameter.
3. The communication system of claim 1, wherein the initial data comprises control data and basic data, the first type of data processing comprises control data processing, the second type of data processing comprises basic data processing, the CPU comprises a computing module and a data synthesizing module, the computing module is configured to process the control data to obtain control parameters and transmit the control parameters to the data synthesizing module, the data synthesizing module is configured to synthesize the control parameters with the basic data and transmit the synthesized data to the auxiliary processor, the auxiliary processor comprises a module group, and the module group is configured to perform symbol-level processing and bit-level processing on the synthesized data.
4. The communication system according to claim 2 or 3, wherein the symbol-level processing comprises de-resource mapping, noise and channel estimation, spatial frequency domain equalization, demodulation, and de-layer mapping for data uplink stage, and modulation, layer mapping, transmission energy control, precoding, and resource mapping for data downlink stage.
5. The communication system of claim 2 or 3, wherein the bit-level processing comprises Cyclic Redundancy Check (CRC) addition, Low Density Parity Check (LDPC), rate matching, retransmission data grooming in a data downlink phase, and descrambling, rate de-scrambling, hybrid automatic repeat request (HARQ) combining, LDPC decoding, and CRC de-scrambling in a data uplink phase.
6. A method of communication, the method comprising:
providing a server and an auxiliary processing device;
and performing first-class data processing and second-class data processing on initial data by matching the server and the auxiliary processing device to establish PUSCH and PDSCH transceiving data.
7. The communication method of claim 6, wherein the initial data includes control data and basic data, the first type of data processing includes symbol-level processing, and the second type of data processing includes control data processing and bit-level processing.
8. The communication method according to claim 6, wherein the initial data includes control data and basic data, the first type of data processing includes control data processing, the control data processing includes obtaining control parameters and synthesizing the control parameters with the basic data, and the second type of data processing includes basic data processing, and the basic data processing includes symbol-level processing and bit-level processing.
9. The communication method according to claim 7 or 8, wherein the symbol-level processing comprises de-resource mapping, noise and channel estimation, spatial frequency domain equalization, demodulation and de-layer mapping of a data uplink stage, and modulation, layer mapping, transmission energy control, precoding and resource mapping of a data downlink stage.
10. The communication method according to claim 7 or 8, wherein the bit-level processing comprises CRC adding, LDPC, rate matching, retransmission data sorting in a data downlink stage, and descrambling, de-rate, HARQ combining, LDPC decoding, and de-CRC in a data uplink stage.
CN202010009666.9A 2020-01-06 2020-01-06 Communication system and method Pending CN113078981A (en)

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Publication number Priority date Publication date Assignee Title
CN102299735A (en) * 2010-06-25 2011-12-28 普天信息技术研究院有限公司 Method for decreasing bandwidth of Ir interface and distributed base station
CN104853417A (en) * 2014-02-19 2015-08-19 中国移动通信集团公司 Digital front end, base band main processing unit and channel function dividing method
CN106506411A (en) * 2015-09-07 2017-03-15 普天信息技术有限公司 Uplink data transmission method and base station
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Application publication date: 20210706