CN113078910A

CN113078910A - Bit field determination method, device, medium and electronic equipment

Info

Publication number: CN113078910A
Application number: CN202010010638.9A
Authority: CN
Inventors: 张丽虹; 王生平
Original assignee: Datang Mobile Communications Equipment Co Ltd
Current assignee: Datang Mobile Communications Equipment Co Ltd
Priority date: 2020-01-06
Filing date: 2020-01-06
Publication date: 2021-07-06
Anticipated expiration: 2040-01-06
Also published as: CN113078910B

Abstract

The embodiment of the invention provides a method, a device, a medium and electronic equipment for determining a bit field, wherein the method comprises the following steps: receiving a notification message sent by a coding end before coding information to be coded by a coding end through a decoding end, then selecting reliability index information corresponding to the bit length of the coding information from a preset set according to the notification message, and determining fields corresponding to each bit in the coding information according to the determined reliability index information; and after the subsequent decoding end receives the coding information sent by the coding end, the optimal decoding path can be quickly found according to the corresponding field of each bit, so that the time for calculating the optimal decoding path is reduced, and the decoding efficiency is improved.

Description

Bit field determination method, device, medium and electronic equipment

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a method, an apparatus, a medium, and an electronic device for determining a bit field.

Background

In The 5G NR (The 5th generation mobile New Radio, 5G New air interface communication) system, a polarization code (Polar code) is proposed by Arikan e.arikan, "channel polarization: method for constructing capacity implementation code for symmetric binary input memoryless channels "(IEEE trans. on inf. theory, volume 55, page 3051-3073). The polarization code can gradually realize the capacity of the binary input symmetrical memoryless channel with the increased code length, and is mainly characterized by the channel polarization, namely, as the number of coded bits (bits) is increased, the channel capacity of one part of sub-channels of the binary input symmetrical memoryless channel approaches to 1, and the other part of sub-channels tend to be pure noise channels with the capacity approaching to 0. Information is directly transmitted on a channel having a channel capacity of 1 to approximate the channel capacity.

In the conventional polar code decoding method, an optimal decoding path is generally calculated for encoded data having a length of N by using an SCL algorithm (sequential Cancellation List) to perform decoding. The method comprises the steps of constructing N layers of binary code trees for coded data with the length of N, enabling the number of nodes of each layer to be N powers of two, searching paths from a code tree root node to a leaf node layer by layer, selecting L candidate paths with the maximum transition probability at each node, respectively calculating metric values of the candidate paths, and determining the path with the minimum metric value as an optimal decoding path after comparison.

In the actual decoding process, the length of the encoded information is variable, and each decoding operation needs to calculate a corresponding decoding path. However, as the length N of the encoded data increases, the number of nodes of the N-level binary code tree constructed by the encoded data also increases as the power of two to the power of N, which increases the time for calculating the optimal decoding path, decreases the decoding efficiency, and may affect the information processing process of the entire base station.

Disclosure of Invention

The embodiment of the invention provides a method for determining a bit field, which is used for determining the type of each bit position in a control information bit stream, improving the decoding efficiency and ensuring the normal operation of a base station information processing process.

Correspondingly, the embodiment of the invention also provides a device, a medium and an electronic device for determining the bit field, which are used for ensuring the realization and the application of the method.

The embodiment of the invention discloses a method for determining a bit field, which comprises the following steps:

the decoding end receives the notification message; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end; determining the bit length of the coding information according to the notification message; selecting reliability index information with the same bit length as the coding information from a preset set; determining fields corresponding to all bits in the coding information according to the reliability index information; and the field corresponding to each bit is used for the decoding end to decode the coding information.

Optionally, the reliability index information includes first reliability index information and first bit position index information, and the step of determining a field corresponding to each bit in the coding information according to the reliability index information includes: generating second bit position index information according to the first reliability index information and the first bit position index information; and determining fields corresponding to all bits in the coding information according to the second bit position index information.

Optionally, the step of generating second bit position index information according to the first reliability index information and the first bit position index information includes: determining the bit length of the received coding information according to the bit length of the coding information and a preset sending code rate; generating second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received; and generating second bit position index information according to the second reliability index information and the first bit position index information.

Optionally, the first reliability index information includes N reliability values, the first bit position index information includes N bit position index values, and the step of generating the second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received includes: if the bit length of the coded information to be received is smaller than that of the coded information, deleting Q reliability values in the first reliability index information to generate second reliability index information; and deleting the Q bit position index values in the first bit position index information; wherein Q is the difference between the bit length of the coded information and the bit length of the coded information to be received; if the bit length of the coding information to be received is greater than or equal to the bit length of the coding information, adding W reliability values in the first reliability index information to generate second reliability index information; and adding W bit position index values in the first bit position index information; wherein W is the difference between the bit length of the coded information to be received and the bit length of the coded information.

Optionally, the second reliability index information includes E reliability values, the bit corresponding field includes an information code field to be encoded, a cyclic redundancy check code field, and a parity check code field, and the step of generating the second bit position index information according to the second reliability index information and the first bit position index information includes: sorting bit position index values corresponding to the E reliability values of the second reliability index information in the first bit position index information according to the reliability values to generate third bit position index information; determining a first sum value Y of the bit length of an information code field to be coded, the bit length of a cyclic redundancy check code field and the bit length of a parity check code;

and extracting Y bit position index values with the highest reliability value in the third bit position index information to generate second bit position index information.

Optionally, the decoding end further includes row re-index information of the encoded information, the parity check code segment includes a first type check code field and a second type check code field, and the step of determining a field corresponding to each bit in the encoded information according to the second bit position index information includes: according to the row weight index information and the second bit position index information, determining a bit position index value of which a bit position field is a first type check code field and a bit position index value of which a bit position field is a second type check code field; deleting the bit position index value of the first type check code field and the bit position index value of the second type check code field from the second bit position index information; sorting the second bit position index information after deleting the bit position index values of the first type check code fields and the second type check code fields according to bits to generate fourth bit position index information; determining a first target bit position index value which is the same as the bit position index value of the second bit position index information in the fourth bit position index information; and determining fields corresponding to all bits in the coding information according to the index value of the first target bit position.

Optionally, the first target bit position index value includes a plurality of values, and the step of determining a field corresponding to each bit in the encoded information according to the first target bit position index value includes:

determining, for one of the first target bit position index values, position information of the first target bit position index value in the fourth bit position index information; determining a second sum of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field; calculating a first difference between the second sum and a bit length of the cyclic redundancy check code field; calculating a second difference value between the position information of the first target bit position index value in the fourth bit position index information and the first difference value; if the second difference is smaller than 0, determining that the field of the bit corresponding to the first target bit position index value is an information code field to be coded; and if the second difference is greater than or equal to 0, determining that the field of the bit corresponding to the first target bit position index value is a cyclic redundancy check code field.

Optionally, the second reliability index information includes E reliability values, the bit corresponding field includes an information code field to be encoded and a cyclic redundancy check code field, and the step of generating the second bit position index information according to the second reliability index information and the first bit position index information includes: sorting bit position index values corresponding to the E reliability values of the second reliability index information in the first bit position index information according to the reliability values to generate third bit position index information; determining a third sum S of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field; and extracting S bit position index values with the highest reliability value in the third bit position index information to generate second bit position index information.

Optionally, the decoding end further includes interleaving and disordering information of the encoded information, and the step of determining, according to the second bit position index information, a field corresponding to each bit in the encoded information includes: sequencing the second bit position index information according to the bit position sequence to generate fifth bit position index information; sorting the fifth bit position index information by using the interleaving disorder information to generate sixth bit position index information; determining a second target bit position index value in the sixth bit position index information, which is the same as the bit position index value of the second bit position index information; and determining fields corresponding to all bits in the coding information according to the second target bit position index value.

Optionally, the second target bit position index value includes a plurality of values, and the step of determining, according to the second target bit position index value, a field corresponding to each bit in the encoded information includes: determining, for one of the second target bit position index values, position information of the second target bit position index value in the fourth bit position index information; calculating a third difference between the third sum S and the bit length of the CRC field; calculating a fourth difference between the position information of the second target bit position index value in the fourth bit position index information and the third difference; if the fourth difference is smaller than 0, determining that a field of a bit corresponding to the second target bit position index value is an information code field to be coded; and if the fourth difference is greater than or equal to 0, determining that the field of the bit corresponding to the second target bit position index value is a cyclic redundancy check code field.

Optionally, after the step of determining a field corresponding to each bit in the coding information according to the reliability index information, the method further includes: receiving the coding information sent by the coding end;

and decoding the coded information by adopting the corresponding field of each bit in the coded information.

The embodiment of the invention discloses a device for determining a bit field, which comprises:

the notification message receiving module is used for receiving the notification message by the decoding end; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end; a bit length determining module, configured to determine a bit length of the encoded information according to the notification message; the reliability index information selection module is used for selecting reliability index information with the same bit length as the coding information from a preset set; a field determining module, configured to determine, according to the reliability index information, a field corresponding to each bit in the coding information; and the field corresponding to each bit is used for the decoding end to decode the coding information.

Optionally, the reliability index information includes first reliability index information and first bit position index information, and the field determining module includes: a second position index generation submodule, configured to generate second bit position index information according to the first reliability index information and the first bit position index information; and the field determining submodule is used for determining fields corresponding to all bits in the coding information according to the second bit position index information.

Optionally, the second position index generation sub-module includes: a bit length determining unit, configured to determine a bit length of the coded information to be received according to the bit length of the coded information and a preset sending code rate; a second reliability generating unit, configured to generate second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received; and a second position index generating unit configured to generate second bit position index information according to the second reliability index information and the first bit position index information.

Optionally, the first reliability index information includes N reliability values, the first bit position index information includes N bit position index values, and the second reliability generating unit includes: a first generating subunit, configured to delete Q reliability values in the first reliability index information and generate second reliability index information if the bit length of the to-be-received encoded information is smaller than the bit length of the encoded information; a position index deleting subunit, configured to delete Q bit position index values in the first bit position index information; wherein Q is the difference between the bit length of the coded information and the bit length of the coded information to be received; the second generating subunit is further configured to add W reliability values to the first reliability index information to generate second reliability index information if the bit length of the to-be-received encoded information is greater than or equal to the bit length of the encoded information; a position index adding subunit, configured to add W bit position index values in the first bit position index information; wherein W is the difference between the bit length of the coded information to be received and the bit length of the coded information.

Optionally, the second reliability index information includes E reliability values, the field corresponding to each bit includes an information code field to be encoded, a cyclic redundancy check code field, and a parity check code field, and the second position index generating unit includes: a third bit position index generating subunit, configured to sort, according to the reliability values, bit position index values corresponding to the E reliability values of the second reliability index information in the first bit position index information, and generate third bit position index information; the first sum value determining subunit is used for determining a first sum value Y of the bit length of the information code field to be coded, the bit length of the cyclic redundancy check code field and the bit length of the parity check code; and a second bit position index generating subunit, configured to extract Y bit position index values with the highest reliability in the third bit position index information, and generate second bit position index information.

Optionally, the decoding end further includes row re-index information of the encoded information, the parity check code segment includes a first type check code field and a second type check code field, and the field determination sub-module includes: a first position index value determining unit, configured to determine, according to the row re-index information and the second bit position index information, that a bit field is a bit position index value of a first type check code field; a second position index value determining unit, configured to determine, according to the row re-index information and the second bit position index information, that a bit field is a bit position index value of a second type check code field; a position index value deleting unit, configured to delete the bit position index value of the first type check code field and the bit position index value of the second type check code field from the second bit position index information; a fourth bit position index generating unit, configured to sort, by bit, the second bit position index information from which the bit position index value of the first type check code field and the bit position index value of the second type check code field are deleted, and generate fourth bit position index information; a first target position index value determining unit, configured to determine a first target bit position index value that is the same as a bit position index value of the second bit position index information in the fourth bit position index information; a first field determining unit, configured to determine, according to the first target bit position index value, a field corresponding to each bit in the coding information.

Optionally, the first target bit position index value includes a plurality of values, and the first field determination unit includes: a first bit position index value determining subunit, configured to determine, for a first target bit position index value, position information of the first target bit position index value in the fourth bit position index information; the second sum value determining subunit is used for determining a second sum value of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field; a first difference determination subunit configured to calculate a first difference between the second sum and a bit length of the cyclic redundancy check code field; a second difference determination subunit configured to calculate a second difference between the position information of the first target bit position index value in the fourth bit position index information and the first difference; a first field determining subunit, configured to determine, if the second difference is smaller than 0, that a field of a bit corresponding to the first target bit position index value is an information code field to be encoded; a second field determining subunit, configured to determine, if the second difference is greater than or equal to 0, that a field of a bit corresponding to the first target bit position index value is a cyclic redundancy check code field.

Optionally, the second reliability index information includes E reliability values, the field corresponding to each bit includes an information code field to be encoded and a cyclic redundancy check code field, and the second position index generating unit includes: a third bit position index generating subunit, configured to sort, according to the reliability values, bit position index values corresponding to the E reliability values of the second reliability index information in the first bit position index information, and generate third bit position index information; a third sum value determining subunit, configured to determine a third sum value S of the bit length of the information code field to be encoded and the bit length of the cyclic redundancy check code field; and a second bit position index information generation subunit, configured to extract S bit position index values with the highest reliability values in the third bit position index information, and generate second bit position index information.

Optionally, the decoding end further includes interleaving and de-ordering information of the encoded information, and the field determination sub-module includes: a fifth bit position index generating unit, configured to sort the second bit position index information according to a bit position order, and generate fifth bit position index information; a sixth position index generating unit, configured to sort the fifth bit position index information by using the interleaving and disordering information, and generate sixth bit position index information; a second target position index value determination unit configured to determine a second target bit position index value in the sixth bit position index information that is the same as a bit position index value of the second bit position index information; and a second field determining unit, configured to determine, according to the second target bit position index value, a field corresponding to each bit in the encoded information.

Optionally, the second target bit position index value includes a plurality of values, and the second field determination unit includes: a second position information determining subunit, configured to determine, for one second target bit position index value, position information of the second target bit position index value in the fourth bit position index information; a third difference determination subunit configured to calculate a third difference between the third sum and the bit length of the crc field; a fourth difference determining subunit, configured to calculate a fourth difference between the position information of the second target bit position index value in the fourth bit position index information and the third difference; a third field determining subunit, configured to determine, if the fourth difference is smaller than 0, that a field of a bit corresponding to the second target bit position index value is an information code field to be encoded; a fourth field determining subunit, configured to determine, if the fourth difference is greater than or equal to 0, that a field of a bit corresponding to the second target bit position index value is a cyclic redundancy check code field.

Optionally, the apparatus further comprises:

the coding information receiving module is used for receiving the coding information sent by the coding end;

and the decoding module is used for decoding the coded information by adopting the field corresponding to each bit in the coded information.

The embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method for determining a bit field described above are implemented.

An embodiment of the present invention further provides an electronic device, including: a processor, a memory and a computer program stored on the memory and capable of running on the processor, which computer program, when executed by the processor, carries out the steps of the above-mentioned method of determining a bit-bit field.

The embodiment of the invention has the following advantages:

in the embodiment of the invention, a decoding end receives a notification message sent by a coding end before coding information to be coded, then selects reliability index information corresponding to the bit length of the coding information from a preset set according to the notification message, and determines fields corresponding to each bit in the coding information according to the determined reliability index information; and after the subsequent decoding end receives the coding information sent by the coding end, the optimal decoding path can be quickly found according to the corresponding field of each bit, so that the time for calculating the optimal decoding path is reduced, and the decoding efficiency is improved.

Drawings

FIG. 1 is a flow chart of the steps of one embodiment of a method of determining a bit field of the present invention;

FIG. 2 is a flow chart of the steps of an alternative embodiment of a method of determining a bit field of the present invention;

FIG. 3 is a flowchart illustrating the steps of one embodiment of the present invention for determining the fields corresponding to the bits in the encoded information;

FIG. 4 is a flow chart of steps of another embodiment of a method of determining a bit field of the present invention;

FIG. 5 is a flowchart illustrating another embodiment of determining fields corresponding to bits in the encoded information according to the present invention;

fig. 6 is a block diagram of an embodiment of an apparatus for determining a bit field according to the present invention.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.

Referring to fig. 1, a flowchart illustrating steps of an embodiment of a method for determining a bit field according to the present invention is shown, which may specifically include the following steps:

step 101, a decoding end receives a notification message.

The notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end.

In the embodiment of the invention, before the coding end codes the information to be coded, the information to be coded can be predetermined; determining the bit length of each field in the coding information after determining that the information to be coded is coded to obtain the coding information; then generating a notification message comprising the bit length of each field according to the bit length of each field in the coding information; and sending the notification message to a decoding end.

Step 102, determining the bit length of the coding information according to the notification message.

In the embodiment of the present invention, a plurality of preset bit lengths are preset at a decoding end, and then the bit length of the coding information may be determined according to the bit length of each field in the notification message and the plurality of preset bit lengths. In one example of the present invention, the bit length of each field may be compared with a preset bit length by summing the bit lengths of the fields; and selecting a preset bit length which is closest to the sum of the bit lengths of the fields as the bit length of the coded information. Of course, the bit length of the coding information may also be determined in other manners, and the embodiments of the present invention are not limited herein.

Taking Ploar encoding uplink control information as an example, in a 5G NR (The 5th generation mobile New Radio, 5G New air interface communication) protocol, The bit length N after encoding The uplink control information is limited to an integer power of 2, so that The bit lengths can be predetermined to be 32 bits, 64 bits, 128 bits, 512 bits, and 1024 bits. For other information to be encoded, such as downlink control information or broadcast information, the maximum bit length is only 512 bits, so that UCI information can be multiplexed to determine the bit length in advance.

Step 103, selecting reliability index information with the same bit length as the coding information from a preset set.

In the embodiment of the present invention, the decoding end may generate corresponding reliability index information according to a plurality of preset bit lengths generated in advance; then, a preset set is generated according to the reliability index information for each different bit length. The reliability value may refer to the ability or likelihood of performing a specified function within a certain time and under certain conditions without hindrance, which may be quantified as a reliability value. In one example of the present invention, the reliability value may be measured in terms of bit error rate; the bit error rate may represent a ratio of a number of erroneous encoding/decoding of the encoded data to a total number of encoding/decoding in an encoding/decoding process, which is not limited in the embodiment of the present invention.

In the embodiment of the present invention, the reliability index information may be shown in a table form, which is not limited in the embodiment of the present invention.

And 104, determining a field corresponding to each bit in the coding information according to the reliability index information.

And the field corresponding to each bit is used for the decoding end to decode the coding information.

In the embodiment of the invention, the decoding end generally decodes according to the field corresponding to each bit in the coding information; therefore, after the reliability index information is determined, the corresponding field of each bit in the coding information can be determined according to the reliability index information; and after receiving the coding information sent by the coding end, decoding the coding information according to the determined field corresponding to each bit in the coding information.

Referring to fig. 2, a flow chart of steps of another embodiment of a method for determining a bit field according to the present invention is shown, which may specifically include the following steps 201 and 206:

step 201, a decoding end receives a notification message; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end.

In this embodiment of the present invention, the information to be encoded may include at least one of the following: uplink Control Information (UCI), Downlink Control Information (DCI), or broadcast Information (PBCH). Of course, the information to be encoded may also include other types of control information, which is not limited in the present invention. If UCI is adopted, each field can comprise a parity check code field, a coding information code field and a cyclic redundancy check code field; if DCI or PBCH is used, the fields may include a coding information code field and a cyclic redundancy check code field.

Uplink Control Information (UCI) refers to Information for requesting Uplink shared channel resources from a base station.

Downlink Control Information (DCI) refers to Information used to transmit uplink/Downlink scheduling Information, uplink power Control instructions, and the like.

The broadcast information (PBCH) refers to information used for carrying system information such as a cell ID and broadcasted during a cell search process.

A parity code refers to an error correcting code in which the number of "1" s in a codeword is constantly odd or even by adding redundant bits.

The cyclic redundancy check code refers to a cyclic check between valid information and check bits through some mathematical operation. The information to be transmitted is expressed as a polynomial which is divided by a predetermined polynomial g (x), and the remainder is the required cyclic redundancy check code.

Optionally, the decoding end and the encoding end may be a terminal system or a base station system, and the terminal system may include a mobile device, a computer, and the like, which is not limited herein in the embodiments of the present invention.

Step 202, determining the bit length of the coding information according to the notification message.

Step 203, selecting reliability index information equal to the bit length of the coding information from a preset set.

In the embodiment of the present invention, the steps 202-203 are similar to the steps 102-103, and are not described herein again.

Optionally, the reliability index information may include first reliability index information and first bit position index information; the step of determining the field corresponding to each bit in the coding information according to the reliability index information in step 104 may include the following steps 204 and 205:

step 204, generating second bit position index information according to the first reliability index information and the first bit position index information.

In the embodiment of the present invention, the decoding end may extract a plurality of bit position index values with the highest reliability values by traversing the first reliability index information and the first bit position index information, and then sort the bit position index values to generate the second bit position index information.

Optionally, the sorting method may be a fast sorting method, and the like, which is not limited in this respect.

The fast sorting method is that the data to be sorted is divided into two independent parts through one-time sorting, wherein all the data of one part is smaller than all the data of the other part, then the two parts of data are respectively fast sorted according to the method, and the whole sorting process can be carried out recursively, so that the whole data is changed into an ordered sequence.

Optionally, the first reliability index information may include a plurality of reliability values, where the number of reliability values in the first reliability index information is the same as the number of bits of the coding information; wherein the bit number of the coded information is the bit length of the coded information. For convenience of subsequent description, N may be adopted to represent the number of reliability values in the first reliability index information.

Optionally, the first bit position index information may include a plurality of bit position index values, where the number of bit position index values in the first bit position index information is the same as the number of bits of the coding information. For convenience of subsequent description, N may be used to indicate the number of bit position index values in the first bit position index information.

The N reliability values of the first reliability index information may be sorted according to bit, and the N bit position index values of the first bit position index information may be sorted according to reliability values. The bit order may be from low to high or from high to low, and the reliability value order may be from small to large or from large to small, which is not limited in this embodiment of the present invention.

Optionally, step 204 may further comprise the following sub-steps 2041-2043:

substep 2041, determining the bit length of the received coded information according to the bit length of the coded information and a preset sending code rate.

Substep 2042, generating second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received.

Substep 2043 generates second bit position index information according to the second reliability index information and the first bit position index information.

In the embodiment of the invention, after the coding operation of the coding end is finished, the coding end can also carry out a code rate matching process on the coding information; and then, sending the coding information with the matched code rate to a decoding end, wherein the coding information to be decoded by the decoding end is the coding information with the matched code rate to be received (subsequently called the coding information to be received).

In the specific implementation, code rate matching can be realized by repeating or performing operations such as punching and truncation on the coded information with the bit length of N to obtain the corresponding coded information to be received; the bit length of the coded information to be received may be represented by E. The repetition refers to repeatedly encoding a certain section of bits of the encoded information; the puncturing refers to deleting a certain bit of the coded information; the truncation refers to deleting a certain segment of consecutive bits of the encoded information.

The bit length E of the coded information to be received can be determined according to a preset sending code rate corresponding to code rate matching and the bit length N of the coded information; the preset sending code rate can be preset, and the specific numerical value can be set according to requirements, which is not limited by the invention.

In the embodiment of the present invention, the bit length N of the coded information and the bit length E of the coded information to be received may be different; the decoding end may delete or add a partial reliability value in the first reliability index information with the length of N according to a size relationship between the bit length of the encoded information N and the bit length of the encoded information E to be received, so as to generate second reliability index information with the length of E. And correspondingly deleting or adding part of bit position index values in the first bit position index information, extracting E bit position index values with highest reliability in the first bit position index information according to the corresponding relation between the second reliability index information and the first bit position index information in which the part of bit position index values are deleted or added, and sequencing the E bit position index values to generate second bit position index information.

Optionally, the sub-step 2042 may further comprise the following sub-steps 20421-20423:

substep 20421, if the bit length of the coded information to be received is less than the bit length of the coded information, deleting Q reliability values in the first reliability index information, and generating second reliability index information; and deleting the Q bit position index values in the first bit position index information; wherein Q is the difference between the bit length of the coded information and the bit length of the coded information to be received.

In the embodiment of the present invention, when the bit length E of the coded information to be received is less than the bit length N of the coded information, it indicates that the difference between the bit length of the coded information to be received and the bit length of the coded information at this time is Q bit lengths. For the decoding, the Q bits are invalid bits; the first reliability index information comprises N reliability values, and in order to enable the reliability values to be equal to the number of bits of the information to be coded so as to conveniently determine fields corresponding to the bits in the follow-up process, the decoding end can delete Q reliability values to generate second reliability index information; q bit position index values are deleted from the first bit position index information accordingly.

Optionally, the substep 20421 may comprise the following substeps S1-S4:

a substep S1, determining a fourth sum of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field;

in the embodiment of the present invention, to determine the total length of the information code to be encoded and the cyclic redundancy check code, the bit length of the information code field to be encoded and the bit length of the cyclic redundancy check code field may be obtained according to the field length information of the encoding information in the notification message, and the fourth sum value is determined as the total length of the information code to be encoded and the cyclic redundancy check code.

A substep S2, determining whether a ratio of the fourth sum to the bit length of the coding information to be received is greater than a preset threshold;

of the N bits of the encoded data, only E bits are finally valid. To ensure that E valid reliability values can be extracted, a preset threshold may be set according to the 5G NR physical layer protocol, and the preset threshold, the fourth sum, and the ratio of the bit length of the encoded information to be received are compared to determine the positions of the E valid reliability values.

In sub-step S3, if the ratio of the fourth sum to the bit length of the coding information to be received is greater than a preset threshold, deleting the Q reliability values with the lowest reliability values in the first reliability index information, and generating second reliability index information;

substep S4, if the ratio of the fourth sum to the bit length of the coding information to be received is less than or equal to a preset threshold, deleting the Q reliability values with the highest reliability values in the first reliability index information, and generating second reliability index information;

in this embodiment of the present invention, for example, Polar coding is used, a preset threshold may be set to 7/16, and when a ratio of the fourth sum to the bit length E of the coding information to be received is greater than 7/16, Q reliability values with the lowest reliability values in the first reliability index information may be deleted, so as to generate second reliability index information with the number of E; and when the ratio of the fourth sum to the bit length of the coded information to be received is less than or equal to 7/16, deleting the Q reliability values with the highest reliability values in the first reliability index information to generate the second reliability index information with the number E.

Substep 20422, if the bit length of the coded information to be received is greater than or equal to the bit length of the coded information, adding W reliability values to the first reliability index information to generate second reliability index information; and adding W bit position index values in the first bit position index information; wherein W is the difference between the bit length of the coded information to be received and the bit length of the coded information.

In this embodiment of the present invention, if the bit length E of the coding information to be received is greater than or equal to the bit length N of the coding information, it is described that W bits that are added out of the coding information to be received are bits that are repeatedly transmitted from the beginning again, and are also invalid bits for the decoding of this time. In order to ensure that the field corresponding to each bit can be accurately determined, W reliability values can be added to the first reliability index information, so as to generate second reliability index information; correspondingly adding W bit position index values from the first bit position index information in order to ensure that the reliability values and the bit position index values are equal in quantity; wherein the W bit position index values may be W bit position index values with the smallest bit position order.

Optionally, the second reliability index information includes E reliability values, the bit corresponding fields include an information code field to be encoded, a cyclic redundancy check code field, and a parity check code field, and the sub-step 2043 may include the following sub-steps 20431 and 20433:

substep 20431, sorting bit position index values corresponding to E reliability values of the second reliability index information in the first bit position index information according to the reliability values, to generate third bit position index information;

in the embodiment of the present invention, E bit position index values are determined from the first bit position index information according to the correspondence between the bit position index values in the first bit position index information and the reliability values of the second reliability index information, and the third bit position index information is generated by sorting the E bit position index values according to the reliability values.

Alternatively, the sorting method may select a quick sorting method.

Substep 20432, determining a first sum Y of the bit length of the information code field to be encoded, the bit length of the cyclic redundancy check code field and the bit length of the parity check code;

substep 20433 extracts the Y bit position index values with the highest reliability values from the third bit position index information, and generates second bit position index information.

In the embodiment of the invention, the information code to be coded and the cyclic redundancy check code occupy the bit position with the highest reliability value of the whole transmission ratio. And a part of the parity bits is located at a position having the lowest reliability value among the remaining bits excluding the frozen bit, and another part is located at a position having the smallest row weight but the highest reliability value among the remaining bits. Therefore, by calculating the sum of the lengths of the three, which is subsequently referred to as a first sum value, Y can be used for representing, Y bit position index values with the highest reliability values are determined from the E bit position index values sorted according to the reliability values, and the Y bit position index values are extracted for sorting to generate second bit position index information.

Optionally, L bit position index values with the lowest reliability values may also be extracted from the third bit position index information, where the bit position index value with the lowest reliability value is also an invalid bit in the coding information; wherein L is a difference between the E bit position index values and the Y bit position index values.

Step 205, determining a field corresponding to each bit in the encoded information according to the second bit position index information.

In the embodiment of the present invention, after the decoding end obtains the second bit position index information, the field corresponding to each bit in the coding information may be determined according to the ordering of the bit position index values in the second bit position index information.

Step 205 may include the following sub-steps 2051-2055; referring to fig. 3, a flowchart of steps of an embodiment of the present invention for determining a field corresponding to each bit in the encoded information is shown.

Substep 2051, determining a bit position index value with a bit field as a first type check code field and a bit position index value with a bit field as a second type check code field according to the row re-index information and the second bit position index information;

optionally, the decoding end further includes row re-index information of the encoded information, the parity code field includes a first type check code field and a second type check code field,

in the embodiment of the present invention, the decoding end further includes row re-index information of the encoded information, where the row re-index information includes storing corresponding row re from low to high according to the bit index. The row weight refers to the occupation ratio of a specific value of each row in the coding matrix, and the larger the number of the specific values is, the higher the row weight is.

Taking Polar coding as an example, the second bit position index information includes a parity check code field, where the parity check code field includes a first type check code field and a second type check code field, where the first type check code field is a bit position index value with the minimum row weight and the highest reliability value, and the second type check code field is a bit position index value with the lowest reliability value. Therefore, through traversing the row weight index information and the second bit position index information, the bit position index value with the minimum row weight is determined from the row weight index information, the bit position index value with the highest reliability is determined from the second bit position index information, the two bit position index values are compared, if the two bit position index values are the same, the bit position index value is determined as the bit position index value of the first type check code field with the minimum row weight and the highest reliability, and if the two bit position index values are different, the search is continued; and simultaneously, acquiring a bit position index value with the lowest reliability from the second bit position index information, and determining the bit position index value as the bit position index value of the second type check code field.

Substep 2052, deleting the bit position index value of the first type check code field and the bit position index value of the second type check code field from the second bit position index information;

substep 2053, sorting the second bit position index information from which the bit position index values of the first type check code field and the second type check code field are deleted according to bits, and generating fourth bit position index information;

in the embodiment of the present invention, after determining the bit index value corresponding to the parity check code field, the positions of the cyclic redundancy check code field and the information code field to be encoded also need to be determined. And the bit position of the cyclic redundancy check code field is sequenced after the code field of the information to be coded, so the bit position index values of the first type check code field and the second type check code field are deleted from the second bit position index information, the bit position index values of the deleted second bit position index information are reordered according to bits, and fourth bit position index information which is sequenced according to bits is generated.

Sub-step 2054, determining a first target bit position index value in the fourth bit position index information, which is the same as the bit position index value of the second bit position index information, and position information of the first target bit position index value in the fourth bit position index information;

sub-step 2055, determining a field corresponding to each bit in the encoded information according to the index value of the first target bit position.

In the embodiment of the present invention, the same bit position index value is determined as the first target bit position index value by comparing the bit position index values in the fourth bit position index information and the second bit position index information. And further determining the position information of the first target bit position index value in the fourth bit position index information. The bit position index information in the fourth bit position index information is ordered according to bits, and the bit position of the cyclic redundancy check code field is ordered after the information code field to be coded. The cyclic redundancy check code field and the information code field to be coded in the coded information comprising the parity check code field are not subjected to interleaving and disorder operation, so that a plurality of bit position index values with the minimum bit position index value and the same bit length as the information code field to be coded can be determined as the information code field to be coded, and the rest bit position index values are determined as the cyclic redundancy check code field.

Optionally, the number of the first target bit position index values may include a plurality of values, and the sub-step 2055 may further include the following sub-steps 20551 and 20556:

sub-step 20551, for one of said first target bit position index values, determining position information of said first target bit position index value in said fourth bit position index information;

a substep 20552 of determining a second sum of the bit length of the information code field to be encoded and the bit length of the cyclic redundancy check code field;

sub-step 20553 of calculating a first difference between said second sum and the bit length of said cyclic redundancy check code field;

a substep 20554 of calculating a second difference value between the position information of the first target bit position index value in the fourth bit position index information and the first difference value;

in the embodiment of the present invention, the position information refers to a position of the first target bit position index value in the fourth bit position index information. After all parity check codes in the second bit position index information are deleted, the rest bit position index values in the second bit position index information are bit position index values corresponding to the code field of the information to be coded and the cyclic redundancy check code field; the sum of the bit length of the information code field to be encoded and the bit length of the cyclic redundancy check code field can be calculated and determined to obtain a second sum value. The first difference value may be obtained by calculating a difference between the second sum value and a bit length of the cyclic redundancy check code field. Since the bit positions of the crc field are ordered behind the codeword section of the information to be encoded, a second difference between the position information and the first difference may be calculated, and the actual position of the first target bit position index value in the second bit position index information is determined by determining whether the second difference is smaller than zero, thereby determining whether the corresponding bit of the first target bit position index value is the codeword section of the information to be encoded or the crc field.

In sub-step 20555, if the second difference is smaller than 0, the field of the bit corresponding to the first target bit position index value is an information code field to be encoded;

in this embodiment of the present invention, if the second difference is smaller than 0, it indicates that the first target bit position index value is in the interval of the code information code field, and at this time, a field of a bit corresponding to the first target bit position index value may be determined as the code information field to be coded.

In sub-step 20556, if the second difference is greater than or equal to 0, the field of the bit corresponding to the first target bit position index value is a cyclic redundancy check code field.

In this embodiment of the present invention, if the second difference is greater than or equal to 0, it indicates that the first target bit position index value is in the interval of the cyclic redundancy check code, and at this time, it may be determined that a field of a bit corresponding to the first target bit position index value is a cyclic redundancy check code field.

Step 206, receiving the coding information sent by the coding end;

and step 207, decoding the encoded information by adopting the field corresponding to each bit in the encoded information.

In the embodiment of the present invention, through the above-mentioned

step

201 and 205, the fields corresponding to all bits in the encoded information have been determined. After receiving the encoded information, the decoding end may select a decoding path for each bit of the encoded information according to the determined field.

Optionally, after determining the field corresponding to each bit in the encoded information, an information type index table with a size equal to the bit length of the encoded information may be created; the information type index table comprises a plurality of bit position index values arranged according to the bit order of the coded information, wherein the plurality of bit position index values identify an invalid code field by a first value, identify a parity check code field by a second value, identify an information code field to be coded by a third value and identify a cyclic redundancy check code field by a fourth value.

In the embodiment of the invention, a decoding end receives a notification message sent by an encoding end before encoding information to be encoded, and selects reliability index information with the same bit length as the encoding information from a preset set according to the notification message; determining second bit position index information according to the reliability index information; determining a parity check code field according to the second bit position index information and the row re-index information of the decoding end; determining the position information of the first target bit position index value in the fourth bit position index information after sequencing the second bit position index information according to the bit; determining the positions of a cyclic redundancy check code field and an information code field to be coded by judging whether a second difference value between the position information and the first difference value is less than zero; after the decoding end determines fields corresponding to all bits of the coded information, a decoding path with a faster decoding rate or bit assignment can be selected according to the fields of different bits, so that the time for calculating the optimal decoding path is reduced, and the coding efficiency and the coding accuracy are improved.

Referring to fig. 4, a flowchart illustrating steps of another embodiment of a method for determining a bit field according to the present invention is shown, which may specifically include the following steps:

step 401, a decoding end receives a notification message; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end;

step 402, determining the bit length of the coding information according to the notification message;

step 403, selecting reliability index information with the same bit length as the coding information from a preset set;

optionally, the reliability index information may include first reliability index information and first bit position index information, and the method may further include the sub-steps of:

step 404, generating second bit position index information according to the first reliability index information and the first bit position index information.

In the embodiment of the present invention, the steps 401-404 are similar to the steps 201-204, and are not described herein again.

Optionally, step 404 may further include the sub-steps of:

substep 4041, determining the bit length of the coded information to be received according to the bit length of the coded information and a preset sending code rate;

substep 4042, generating second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received;

optionally, the first reliability index information includes N reliability values, the first bit position index information includes N bit position index values, and the sub-step 4042 may further include the following sub-steps 40421 and 40422:

substep 40421, if the bit length of the coding information to be received is smaller than the bit length of the coding information, deleting Q reliability values in the first reliability index information, and generating second reliability index information; and deleting the Q bit position index values in the first bit position index information; wherein Q is the difference between the bit length of the coded information and the bit length of the coded information to be received;

sub-step 40422, if the bit length of the coding information to be received is greater than or equal to the bit length of the coding information, adding W reliability values to the first reliability index information to generate second reliability index information; and adding W bit position index values in the first bit position index information; wherein W is the difference between the bit length of the coded information to be received and the bit length of the coded information.

In the embodiment of the present invention, the sub-steps 40421 and 40423 are similar to the sub-steps 20421 and 20423, and are not described herein again.

Substep 4043 generates second bit position index information based on the second reliability index information and the first bit position index information.

Optionally, the second reliability index information includes E reliability values, the bit corresponding field includes an information code field to be encoded and a cyclic redundancy check code field, and the sub-step 4043 may further include the following sub-steps 40431 and 40433:

substep 40431, sorting E bit position index values corresponding to E reliability values of the second reliability index information in the first bit position index information according to the reliability values to generate third bit position index information;

sub-step 40432, determining a third sum S of the bit length of the information code field to be encoded and the bit length of the cyclic redundancy check code field;

sub-step 40433, extracting S bit position index values with the highest reliability value in the third bit position index information, and generating second bit position index information.

In the embodiment of the present invention, since the coded information may not carry a parity check code, and at this time, the field of the coded information includes an information code field to be coded and a cyclic redundancy check code field, a third sum value may be obtained by calculating a sum of a bit length of the information code field to be coded and a bit length of the cyclic redundancy check code field, and may be represented by S. S bit position index values with the highest reliability values are determined from the E bit position index values sorted according to the reliability values, and the S bit position index values are extracted to generate second bit position index information.

Step 405, determining a field corresponding to each bit in the coding information according to the second bit position index information.

Optionally, the decoding end further includes interleaving and de-ordering information of the coding information.

Step 405 may also include the following sub-steps 4051-4054; referring to fig. 5, a flowchart of steps of an embodiment of the present invention for determining a field corresponding to each bit in the encoded information is shown.

Substep 4051, sorting the second bit position index information according to the bit position order, and generating fifth bit position index information.

Substep 4052, sorting the fifth bit position index information by using the interleaving and disordering information, and generating sixth bit position index information.

In the embodiment of the invention, the sequence of the cyclic redundancy check code field and the information code field to be coded in the coded information is disordered because no parity check code exists. Therefore, before determining the position information of the field, the fifth bit position index information needs to be sorted according to the interleaving and disorder information of the decoding end to determine the real position of the S pieces of encoded information before interleaving and disorder.

Sub-step 4053, determining a second target bit position index value of said sixth bit position index information that is the same as the bit position index value of said second bit position index information.

Wherein the interleaving and disordering information comprises a real position of the second target index value before interleaving and disordering.

In the embodiment of the present invention, by comparing the sixth bit position index information with the second bit position index information, the same bit position index value in the two bit position index information is determined, and the determined bit position index value is determined as the second target bit position index value. And since the sixth bit position index information is the bit position index information restored by the interleaving disorder table, the position information of the second target bit position index value in the sixth bit position index information can be determined. And determining the positions of the cyclic redundancy check code and the information code to be coded in the coded information according to the position information.

Substep 4054, determining the field corresponding to each bit in the encoded information according to the second target bit position index value.

Optionally, sub-step 4054 may further comprise sub-steps 40541 and 40545 as follows:

sub-step 40541, for one of said second target bit position index values, determining the position information of said second target bit position index value in said fourth bit position index information;

sub-step 40542, calculating a third difference between the third sum S and the bit length of the crc field;

a substep 40543 of calculating a fourth difference value between the position information of the second target bit position index value in the fourth bit position index information and the third difference value;

in this embodiment of the present invention, the position information refers to a position of the second target bit position index value in the fourth bit position index information, and a third sum value S is obtained by calculating a sum of a bit length of the information code field to be encoded and a bit length of the cyclic redundancy check code field. The third difference value may be obtained by calculating a difference between the third sum value S and the bit length of the crc field. Since the bit positions of the crc field are ordered behind the codeword section of the information to be encoded, the actual position of the index value of the second target bit position in the index information of the second bit position can be determined by calculating a fourth difference between the position information and the third difference and by determining whether the fourth difference is smaller than zero, and it is determined whether the corresponding bit of the index value of the second target bit position is the codeword section of the information to be encoded or the crc field.

Sub-step 40544, if the fourth difference is smaller than 0, the field of the bit corresponding to the second target bit position index value is the field of the information code to be encoded.

In this embodiment of the present invention, if the fourth difference is smaller than 0, it indicates that the second target bit position index value is in the interval of the code information code field, and at this time, a field of a bit corresponding to the second target bit position index value may be determined as the code information field to be coded.

In sub-step 40545, if the fourth difference is greater than or equal to 0, the field of the bit corresponding to the second target bit position index value is a crc field.

In this embodiment of the present invention, if the fourth difference is greater than or equal to 0, it indicates that the second target bit position index value is in the interval of the cyclic redundancy check code, and at this time, it may be determined that a field of a bit corresponding to the second target bit position index value is a cyclic redundancy check code field.

Step 406, receiving the coding information sent by the coding end;

step 407, decoding the encoded information by using the field corresponding to each bit in the encoded information.

In the embodiment of the present invention, the steps 406-407 are similar to the steps 206-207, and are not described herein again.

In the embodiment of the invention, a decoding end receives a notification message sent by an encoding end before encoding information to be encoded, and selects reliability index information with the same bit length as the encoding information from a preset set according to the notification message; determining second bit position index information according to the reliability index information; determining the position information of the second target bit position index value in the sixth bit position index information after sequencing the second bit position index information according to the bit; determining the positions of a cyclic redundancy check code field and an information code field to be coded by judging whether a fourth difference value between the position information and the third difference value is less than zero; after determining the fields corresponding to all bits of the encoded information, the decoding end can select a decoding path with a faster decoding rate or assign a bit value according to the fields of different bits, thereby reducing the time for calculating the optimal decoding path and improving the efficiency and accuracy of coding and decoding.

It is noted that for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the illustrated order of acts, as some steps may occur in other orders or concurrently depending on the embodiment. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.

Referring to fig. 6, a block diagram of a structure of an embodiment of the apparatus for determining a bit field according to the present invention is shown, which may specifically include the following modules:

a notification message receiving module 601, configured to receive a notification message at a decoding end; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end;

a bit length determining module 602, configured to determine a bit length of the encoded information according to the notification message;

a reliability index information selection module 603, configured to select reliability index information with a bit length equal to that of the coding information from a preset set;

a field determining module 604, configured to determine, according to the reliability index information, a field corresponding to each bit in the coding information; and the field corresponding to each bit is used for the decoding end to decode the coding information.

Optionally, the reliability index information includes first reliability index information and first bit position index information, and the field determining module 604 includes:

a second position index generation submodule, configured to generate second bit position index information according to the first reliability index information and the first bit position index information;

and the field determining submodule is used for determining fields corresponding to all bits in the coding information according to the second bit position index information.

Optionally, the second position index generation sub-module includes:

a bit length determining unit, configured to determine a bit length of the coded information to be received according to the bit length of the coded information and a preset sending code rate;

a second reliability generating unit, configured to generate second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received;

and a second position index generating unit configured to generate second bit position index information according to the second reliability index information and the first bit position index information.

Optionally, the first reliability index information includes N reliability values, the first bit position index information includes N bit position index values, and the second reliability generating unit includes:

a first generating subunit, configured to delete Q reliability values in the first reliability index information and generate second reliability index information if the bit length of the to-be-received encoded information is smaller than the bit length of the encoded information; a position index deleting subunit, configured to delete Q bit position index values in the first bit position index information; wherein Q is the difference between the bit length of the coded information and the bit length of the coded information to be received;

the second generating subunit is further configured to add W reliability values to the first reliability index information to generate second reliability index information if the bit length of the to-be-received encoded information is greater than or equal to the bit length of the encoded information; a position index adding subunit, configured to add W bit position index values in the first bit position index information; wherein W is the difference between the bit length of the coded information to be received and the bit length of the coded information.

Optionally, the second reliability index information includes E reliability values, the field corresponding to each bit includes an information code field to be encoded, a cyclic redundancy check code field, and a parity check code field, and the second position index generating unit includes:

a third bit position index generating subunit, configured to sort, according to the reliability values, bit position index values corresponding to the E reliability values of the second reliability index information in the first bit position index information, and generate third bit position index information;

the first sum value determining subunit is used for determining a first sum value Y of the bit length of the information code field to be coded, the bit length of the cyclic redundancy check code field and the bit length of the parity check code;

and a second bit position index generating subunit, configured to extract Y bit position index values with the highest reliability in the third bit position index information, and generate second bit position index information.

Optionally, the decoding end further includes row re-index information of the encoded information, the parity check code segment includes a first type check code field and a second type check code field, and the field determination sub-module includes:

a first position index value determining unit, configured to determine, according to the row re-index information and the second bit position index information, that a bit field is a bit position index value of a first type check code field;

a second position index value determining unit, configured to determine, according to the row re-index information and the second bit position index information, that a bit field is a bit position index value of a second type check code field;

a position index value deleting unit, configured to delete the bit position index value of the first type check code field and the bit position index value of the second type check code field from the second bit position index information;

a fourth bit position index generating unit, configured to sort, by bit, the second bit position index information from which the bit position index value of the first type check code field and the bit position index value of the second type check code field are deleted, and generate fourth bit position index information;

a first target position index value determining unit, configured to determine a first target bit position index value that is the same as a bit position index value of the second bit position index information in the fourth bit position index information;

a first field determining unit, configured to determine, according to the first target bit position index value, a field corresponding to each bit in the coding information.

Optionally, the first target bit position index value includes a plurality of values, and the first field determination unit includes:

a first bit position index value determining subunit, configured to determine, for a first target bit position index value, position information of the first target bit position index value in the fourth bit position index information;

the second sum value determining subunit is used for determining a second sum value of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field;

a first difference determination subunit configured to calculate a first difference between the second sum and a bit length of the cyclic redundancy check code field;

a second difference determination subunit configured to calculate a second difference between the position information of the first target bit position index value in the fourth bit position index information and the first difference;

a first field determining subunit, configured to determine, if the second difference is smaller than 0, that a field of a bit corresponding to the first target bit position index value is an information code field to be encoded;

a second field determining subunit, configured to determine, if the second difference is greater than or equal to 0, that a field of a bit corresponding to the first target bit position index value is a cyclic redundancy check code field.

Optionally, the second reliability index information includes E reliability values, the field corresponding to each bit includes an information code field to be encoded and a cyclic redundancy check code field, and the second position index generating unit includes:

a third bit position index generating subunit, configured to sort, according to the reliability values, E bit position index values, corresponding to the E reliability values of the second reliability index information, in the first bit position index information, and generate third bit position index information;

a third sum value determining subunit, configured to determine a third sum value S of the bit length of the information code field to be encoded and the bit length of the cyclic redundancy check code field;

and a second bit position index information generation subunit, configured to extract S bit position index values with the highest reliability values in the third bit position index information, and generate second bit position index information.

Optionally, the decoding end further includes interleaving and de-ordering information of the encoded information, and the field determination sub-module includes:

a fifth bit position index generating unit, configured to sort the second bit position index information according to a bit position order, and generate fifth bit position index information;

a sixth position index generating unit, configured to sort the fifth bit position index information by using the interleaving and disordering information, and generate sixth bit position index information;

a second target position index value determination unit configured to determine a second target bit position index value in the sixth bit position index information that is the same as a bit position index value of the second bit position index information;

and a second field determining unit, configured to determine, according to the second target bit position index value, a field corresponding to each bit in the encoded information.

Optionally, the second target bit position index value includes a plurality of values, and the second field determination unit includes:

a second position information determining subunit, configured to determine, for one second target bit position index value, position information of the second target bit position index value in the fourth bit position index information;

a third difference determination subunit, configured to calculate a third difference between the third sum S and the bit length of the crc field;

a fourth difference determining subunit, configured to calculate a fourth difference between the position information of the second target bit position index value in the fourth bit position index information and the third difference;

a third field determining subunit, configured to determine, if the fourth difference is smaller than 0, that a field of a bit corresponding to the second target bit position index value is an information code field to be encoded;

a fourth field determining subunit, configured to determine, if the fourth difference is greater than or equal to 0, that a field of a bit corresponding to the second target bit position index value is a cyclic redundancy check code field.

Optionally, the apparatus further comprises:

a coding information receiving module 605, configured to receive the coding information sent by the coding end;

a decoding module 606, configured to decode the encoded information by using a field corresponding to each bit in the encoded information.

For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.

The embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when being executed by a processor, the computer program implements each process of the above-mentioned method for determining a bit field, and can achieve the same technical effect, and in order to avoid repetition, the details are not repeated here.

The embodiment of the present invention further provides an electronic device, which includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor, and when being executed by the processor, the computer program implements each process of the above-mentioned method for determining a bit field, and can achieve the same technical effect, and is not described herein again to avoid repetition.

Firstly, in the embodiment of the present invention, the electronic device receives a notification message sent before the encoding end encodes the information to be encoded, then selects reliability index information corresponding to the bit length of the encoded information from a preset set according to the notification message, and determines a field corresponding to each bit in the encoded information according to the determined reliability index information; and then after the subsequent coding information sent by the coding end is received, the optimal decoding path can be quickly found according to the corresponding field of each bit, so that the time for calculating the optimal decoding path is reduced. And under the condition of short decoding time, the coding efficiency can be effectively improved, so that the efficiency of the whole information transmission process is improved.

Secondly, in the process that the electronic equipment determines the fields corresponding to the bits in the coding information according to the determined reliability index information, the bit position index values can be quickly sequenced according to the reliability values in the reliability index information, and a plurality of bit position index values with the highest reliability values are extracted to form new bit position index information so as to determine the bit position index information of the fields corresponding to the bits, so that the number of the bit position index values to be processed by the processor is reduced, and the determination efficiency of the bit position fields is improved.

Further, when the coded information does not include a parity check code field, the electronic device may determine the position of the parity check code field by calling the row re-index information and the bit position index information in the process of determining the bit position index information of the field corresponding to each bit in the coded information, and then determine the positions of the cyclic redundancy check code field and the information code to be coded according to the front-back position relationship of the bit position index value in the bit position index information. And further, according to the row re-index information, determining the field corresponding to each bit from the coding information containing the parity check code field more quickly.

And thirdly, when the coded information does not comprise the parity check code field, the electronic equipment can firstly call the interleaved out-of-order information to process the bit position index information so as to restore the position of the bit position index value, and after the true position of the bit position index value is determined, the cyclic redundancy check code field or the information code field to be coded corresponding to each bit position is determined according to the front-back relation of the true position. Therefore, decoding errors caused by the problem of interleaving and disorder when the electronic equipment executes decoding are reduced, and the fault tolerance rate of information decoding is improved.

The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.

Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.

The method, the apparatus, the medium, and the electronic device for determining a bit field according to the present invention are described in detail above, and a specific example is applied in the present disclosure to explain the principle and the implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A method for determining a bit field, the method comprising:

the decoding end receives the notification message; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end;

determining the bit length of the coding information according to the notification message;

selecting reliability index information with the same bit length as the coding information from a preset set;

determining fields corresponding to all bits in the coding information according to the reliability index information; and the field corresponding to each bit is used for the decoding end to decode the coding information.

2. The method according to claim 1, wherein the reliability index information includes first reliability index information and first bit position index information, and the step of determining the corresponding field of each bit in the coding information according to the reliability index information comprises:

generating second bit position index information according to the first reliability index information and the first bit position index information;

and determining fields corresponding to all bits in the coding information according to the second bit position index information.

3. The method of claim 2, wherein the step of generating second bit position index information according to the first reliability index information and the first bit position index information comprises:

determining the bit length of the coded information to be received according to the bit length of the coded information and a preset sending code rate;

generating second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received;

and generating second bit position index information according to the second reliability index information and the first bit position index information.

4. The method of claim 3, wherein the first reliability index information comprises N reliability values, wherein the first bit position index information comprises N bit position index values, and wherein the step of generating the second reliability index information according to the bit length of the coding information and the bit length of the coding information to be received comprises:

if the bit length of the coded information to be received is smaller than that of the coded information, deleting Q reliability values in the first reliability index information to generate second reliability index information; and deleting the Q bit position index values in the first bit position index information; wherein Q is the difference between the bit length of the coded information and the bit length of the coded information to be received;

if the bit length of the coding information to be received is greater than or equal to the bit length of the coding information, adding W reliability values in the first reliability index information to generate second reliability index information; and adding W bit position index values in the first bit position index information; wherein W is the difference between the bit length of the coded information to be received and the bit length of the coded information.

5. The method according to claim 4, wherein the second reliability index information comprises E reliability values, and the bit-corresponding fields comprise an information code field to be encoded, a cyclic redundancy check code field and a parity check code field;

the step of generating second bit position index information according to the second reliability index information and the first bit position index information includes:

sorting bit position index values corresponding to the E reliability values of the second reliability index information in the first bit position index information according to the reliability values to generate third bit position index information;

determining a first sum value Y of the bit length of an information code field to be coded, the bit length of a cyclic redundancy check code field and the bit length of a parity check code;

6. The method according to claim 5, wherein the decoding end further includes row re-index information of the encoded information, the parity code field includes a first type check code field and a second type check code field, and the step of determining a field corresponding to each bit in the encoded information according to the second bit position index information includes:

according to the row weight index information and the second bit position index information, determining a bit position index value of which a bit position field is a first type check code field and a bit position index value of which a bit position field is a second type check code field;

deleting the bit position index value of the first type check code field and the bit position index value of the second type check code field from the second bit position index information;

sorting the second bit position index information after deleting the bit position index values of the first type check code fields and the second type check code fields according to bits to generate fourth bit position index information;

determining a first target bit position index value which is the same as the bit position index value of the second bit position index information in the fourth bit position index information;

and determining fields corresponding to all bits in the coding information according to the index value of the first target bit position.

7. The method according to claim 6, wherein the first target bit position index value comprises a plurality of values, and the step of determining the corresponding field of each bit in the encoded information according to the first target bit position index value comprises:

determining, for one of the first target bit position index values, position information of the first target bit position index value in the fourth bit position index information;

determining a second sum of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field;

calculating a first difference between the second sum and a bit length of the cyclic redundancy check code field;

calculating a second difference value between the position information of the first target bit position index value in the fourth bit position index information and the first difference value;

if the second difference is smaller than 0, determining that the field of the bit corresponding to the first target bit position index value is an information code field to be coded;

and if the second difference is greater than or equal to 0, determining that the field of the bit corresponding to the first target bit position index value is a cyclic redundancy check code field.

8. The method according to claim 4, wherein the second reliability index information comprises E reliability values, and the bit-corresponding fields comprise an information code field to be encoded and a cyclic redundancy check code field;

determining a third sum S of the bit length of the information code field to be coded and the bit length of the cyclic redundancy check code field;

and extracting S bit position index values with the highest reliability value in the third bit position index information to generate second bit position index information.

9. The method according to claim 8, wherein the decoding side further includes interleaving and de-ordering information of the encoded information, and the step of determining the corresponding field of each bit in the encoded information according to the second bit position index information comprises:

sequencing the second bit position index information according to the bit position sequence to generate fifth bit position index information;

sorting the fifth bit position index information by using the interleaving disorder information to generate sixth bit position index information;

determining a second target bit position index value in the sixth bit position index information, which is the same as the bit position index value of the second bit position index information;

and determining fields corresponding to all bits in the coding information according to the second target bit position index value.

10. The method according to claim 9, wherein the second target bit position index value comprises a plurality of values, and the step of determining the corresponding field of each bit in the encoded information according to the second target bit position index value comprises:

determining, for one of the second target bit position index values, position information of the second target bit position index value in the fourth bit position index information;

calculating a third difference between the third sum S and the bit length of the CRC field;

calculating a fourth difference between the position information of the second target bit position index value in the fourth bit position index information and the third difference;

if the fourth difference is smaller than 0, determining that a field of a bit corresponding to the second target bit position index value is an information code field to be coded;

and if the fourth difference is greater than or equal to 0, determining that the field of the bit corresponding to the second target bit position index value is a cyclic redundancy check code field.

11. The method of claim 1, wherein after the step of determining the field corresponding to each bit in the encoded information according to the reliability index information, the method further comprises:

receiving the coding information sent by the coding end;

12. An apparatus for determining a bit field, the apparatus comprising:

the notification message receiving module is used for receiving the notification message by the decoding end; the notification message is sent by a coding end before coding information to be coded, the notification message comprises bit length information of each field in the coding information, and the coding information is obtained by coding the information to be coded by the coding end;

a bit length determining module, configured to determine a bit length of the encoded information according to the notification message;

the reliability index information selection module is used for selecting reliability index information with the same bit length as the coding information from a preset set;

a field determining module, configured to determine, according to the reliability index information, a field corresponding to each bit in the coding information; and the field corresponding to each bit is used for the decoding end to decode the coding information.

13. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method for determining a bit field according to any one of claims 1 to 11.

14. An electronic device, comprising: processor, memory and computer program stored on the memory and executable on the processor, which computer program, when being executed by the processor, carries out the steps of the method for determining a bit-bit field according to any of claims 1 to 11.