CN113077156A - Small group vertical layout scheme generation method, system, medium and device - Google Patents
Small group vertical layout scheme generation method, system, medium and device Download PDFInfo
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Abstract
The invention provides a method, a system, a medium and a device for generating a small group standing layout scheme, wherein the method comprises the steps of numbering small groups, and simplifying each small group into a rectangle according to a preset simplified rule; generating a processing wave number, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for a processing area of the processing wave number, and placing the first small group into a first corner of the processing area of the processing wave number; selecting another small group which is not allocated with the processing wave number at present and is not marked as the irrelative small group according to the numbering sequence, and judging whether the other small group can be placed in the processing wave number or not based on the constraint condition; if so, putting the other small group into the processing wave; judging whether a small group which is not allocated with processing wave number and is not marked as unaccounted exists; and outputting the minor group distribution information of all the processing waves when the distribution of the processing waves of all the minor groups is finished. The automatic layout method is used for realizing small-group automatic layout considering actual space and logic constraints and improving the manufacturing efficiency of a production line.
Description
Technical Field
The invention relates to the technical field of ship final assembly construction, in particular to a method, a system, a medium and a device for generating a small group standing layout scheme.
Background
The small assembly production line is used for assembling and welding small ship assemblies. In the feeding process, the emission of small groups in a processing area belongs to a two-dimensional layout problem, certain rules and constraint conditions need to be observed, and if the small groups are emitted only by manual experience, the problem of low utilization rate of the processing area caused by the inevitable emission of the small groups is solved, the small groups have the characteristic of randomness, stable production rhythm is not facilitated to be formed, and the capacity of a unit area is difficult to be improved. Therefore, if it is possible to realize a small set of automatic layout in a production line processing area in consideration of physical space and logic constraints, it will contribute to improving the manufacturing efficiency of the production line.
Therefore, it is desirable to solve the problem of low utilization of the area of the processing area due to the assembly of the small manual discharge units and to solve the problem of randomness.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method, a system, a medium and a device for generating a small group stand layout scheme, which are used to solve the problem of low utilization rate of a processing area and randomness caused by manual discharge of small groups in the prior art.
To achieve the above and other related objects, the present invention provides a minor stock layout generating method, comprising the steps of: step S11: numbering all the minor assemblies of the production batch, and simplifying each minor assembly into a rectangle according to a preset simplification rule; step S12: generating a processing wave number, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for a processing area of the processing wave number, placing the first small group into a first corner of the processing area of the processing wave number, and updating constraint conditions based on a first condition updating rule; step S13: judging whether minor sets without processing waves are available, if so, switching to step S14, and if not, switching to step S16; step S14: selecting another small group which is not allocated with the processing wave number at present and is not marked as the irrelative small group according to the numbering sequence, and judging whether the other small group can be placed in the processing wave number or not based on the constraint condition; if so, placing the other group of stands in the processing wave times, updating the constraint condition based on a second condition updating rule, and otherwise marking the other group of stands as not to be considered; step S15: judging whether a small group which is not allocated with processing waves and is not marked as unaccounted exists, if so, switching to a step S14, and if not, switching to a step S16; step S16: judging whether minor stands without processing wave numbers are available, if so, turning to the step S12 and canceling the disregard marks of the minor stands without processing wave numbers, and if not, turning to the step S17; step S17: and outputting the minor group distribution information of all the processing waves when the distribution of the processing waves of all the minor groups is finished.
To achieve the above object, the present invention further provides a minor stock layout generating system, including: the device comprises a numbering module, a first constraint module, a first judgment module, a second constraint module, a second judgment module, a third judgment module and an output module; the numbering module is used for numbering all small assemblies of the production batch and simplifying each small assembly into a rectangle according to a preset simplification rule; the first constraint module is used for generating a processing wave number, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for a processing area of the processing wave number, placing the first small group into a first corner of the processing area of the processing wave number, and updating constraint conditions based on a first condition updating rule; the first judging module is used for judging whether a minor assembly without processing frequency distribution exists, if so, switching to the second constraint module, and if not, switching to the third judging module; the second constraint module is used for selecting another small group which is not allocated with the processing wave number at present and is not marked as the irrelative of the wave number according to the serial number sequence, and judging whether the other small group can be placed in the processing wave number or not based on the constraint condition; if so, placing the other group of stands in the processing wave times, updating the constraint condition based on a second condition updating rule, and otherwise marking the other group of stands as not to be considered; the second judging module is used for judging whether small assemblies which are not allocated with processing waves and are not marked as unaccounted exist, if so, the second judging module is switched to the second constraint module, and if not, the second judging module is switched to the third judging module; the third judging module is used for judging whether minor sets which are not distributed with processing waves exist, if so, switching to the first constraint module and canceling the disregard marks of the minor sets which are not distributed with the processing waves, and otherwise, switching to the output module; and the output module is used for outputting the minor assembly distribution information of all the machining waves when the distribution of the machining waves of all the minor assemblies is finished.
To achieve the above object, the present invention also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements any of the above minor loft pattern generation methods.
To achieve the above object, the present invention also provides a minor constituent layout plan generating apparatus, including: a processor and a memory; the memory is used for storing a computer program; the processor is connected to the memory and configured to execute the computer program stored in the memory, so that the minor constituent layout plan generating apparatus executes any one of the above-mentioned minor constituent layout plan generating methods.
As described above, the method, system, medium, and apparatus for generating a small vertical layout plan according to the present invention have the following advantages: the automatic layout method is used for realizing small-group automatic layout considering practical space and logic constraints, and improves the manufacturing efficiency of a production line.
Drawings
FIG. 1a is a flow chart illustrating a method of generating a small radial layout scheme in accordance with one embodiment of the present invention;
FIG. 1b is a flow chart illustrating a method of generating a small radial layout scheme according to the present invention in one embodiment;
FIG. 1c is a block diagram of a method of generating a small radial layout plan according to the present invention in a further embodiment;
FIG. 2 is a schematic diagram of a small vertical layout generation system according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a minor radial layout scheme generating apparatus according to an embodiment of the present invention.
Description of the element reference numerals
21 numbering module
22 first restraint module
23 first judging module
24 second restraint module
25 second judging module
26 third judging module
27 output module
31 processor
32 memory
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, so that the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, the type, quantity and proportion of the components in actual implementation can be changed freely, and the layout of the components can be more complicated.
The method, the system, the medium and the device for generating the small group standing layout scheme can form an instructive small group standing layout scheme in a small group standing feeding link before the operation starts in the actual production process of a small group standing production line, and replace workers to select small groups with current processing frequency by experience.
Small erection refers to the processing of the simplest hull structural members of a ship at a fixed site.
The small assembly lines usually arrange the production tasks in batches, each corresponding to a specific ship product, which contains small assemblies from tens to hundreds of segments, which is the so-called logical constraint; however, because the area of the processing area is limited, there are specific main-scale and small-component emission requirements, and all the small components of a production lot are often divided into tens of waves to be arranged on line for processing operation, which is the so-called space constraint.
The machining area of the production line is recorded as a rectangular area with the length L and the width W, all small assemblies to be fed can be simplified into a rectangle with a certain side length by neglecting the specific appearance according to the actual situation, and the edges (long edges or short edges) of the rectangle are parallel to the edges (long edges or short edges) of the machining area during feeding.
Certain constraints must be observed during discharge of the small stands to the processing zone, including: (1) the discharge positions of the small groups must be such that they all lie within the outline of the machining area, i.e. must not exceed the edge of the machining area; (2) the minimum distance min _ Gap is kept between the small groups in the processing area.
In order to accurately describe the discharge position of each cell group in the processing area, a rectangular coordinate system is established by taking the left lower corner point of the processing area as an origin, taking the direction from the origin along the long side of the processing area (namely, the horizontal direction to the right) as the positive direction of an x axis, and taking the direction from the origin along the short side of the processing area (namely, the vertical direction) as the positive direction of a y axis. Therefore, the position information of the small group can be determined only by making clear the coordinate data { x _ left, y _ bottom, x _ right, y _ top } of the left lower corner point and the right upper corner point of the small group in the processing area.
As shown in fig. 1a, in an embodiment, the method for generating a small vertical layout scheme of the present invention includes the following steps:
and step S11, numbering all the minor assemblies of the production batch, and simplifying each minor assembly into a rectangle according to a preset simplification rule.
Specifically, for example, all subgroups of the present production lot are numbered from 1 to m. The reducing each small group of the three-dimensional image into a rectangle according to a preset simplification rule comprises the following steps: each small assembly is simplified into a minimum rectangle which can completely surround the outline of the small assembly, so that the outline of the small assembly can be represented by the length and the width of the minimum rectangle.
And S12, generating a processing wave, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for the processing area of the processing wave, placing the first small group into a first corner of the processing area of the processing wave, and updating the constraint condition based on the first condition updating rule.
Specifically, the constraint conditions are:
wherein, x _ leftiFor the lower left corner x coordinate of the ith sub-group, y _ bottomiFor the lower left corner y coordinate, x _ right, of the ith sub-groupiFor the upper right corner x coordinate of the ith small group, y _ topiThe y coordinate of the upper right corner of the ith small group; the ith small assembly is an existing ith small assembly;
and is
u(x_lefti-x_rightj)+u(y_bottomi-y_topj)
+u(x_leftj-x_righti)+u(y_bottomj-y_topi)
≥1
(1≤i,j≤m)；
Wherein, x _ leftjFor the lower left corner x coordinate of the jth sub-group, y _ bottomjFor the lower left corner y coordinate of the j-th sub-group, x _ rightjFor the upper right corner x coordinate of the jth small group, y _ topjThe y coordinate of the upper right corner of the jth small group; the j small assemblies are added j small assemblies;
wherein
Specifically, for example, a new machining pass is generated, and the first minor group is selected in the order of numbering from 1 to m of all minor groups. And establishing a rectangular coordinate system for the processing area of the processing wave number, wherein the rectangular coordinate system is a coordinate system with an x axis and a y axis which are mutually vertical. And vertically placing the first group into a first corner of a processing area of the processing wave, wherein the first corner is a preset lower left corner or upper right corner or lower right corner. Updating the constraint condition based on the first condition update rule includes: and adding the lower left corner coordinate and the upper right corner coordinate of the first small group into the constraint condition to generate a first constraint condition, namely putting the lower left corner coordinate and the upper right corner coordinate of the first small group into the original constraint condition to enable the first small group to become a condition of the constraint condition, so that the constraint condition is updated. The first small group is the 1 st small group, that is, the updated constraint condition still needs to satisfy the following conditions under the original condition:
wherein, x _ left1For the lower left corner x coordinate, y _ bottom, grouped for the 1 st cell1For the lower left corner y coordinate, x _ right, of the 1 st sub-group1For the 1 st subset set of the upper right x-coordinates, y _ top1The upper right-hand y coordinate of the 1 st group.
Step S13, whether or not there is a minor group to which no machining order is assigned is determined, and if there is a minor group, the process proceeds to step S14, and if not, the process proceeds to step S16.
Specifically, the minor group to which the processing order is not assigned is a minor group which has not been selected in the order of numbers from 1 to m and which is judged whether or not the minor group can be put into the processing order based on the constraint condition.
Step S14, selecting another small group which is not allocated with the processing wave number at present and is not marked as the wave number which can not be considered according to the numbering sequence, and judging whether the other small group can be put into the processing wave number or not based on the constraint condition; and if so, placing the other group of stands in the processing wave times, updating the constraint condition based on a second condition updating rule, and otherwise marking the other group of stands as not to be considered.
Specifically, for example, the first minor group is selected in step S12, and the second minor group is selected in order in step S14. I.e., the 1 st subgroup is selected in step S12, for example, the 2 nd subgroup is selected in order in step S14.
Specifically, the updating the constraint condition based on the second condition updating rule includes: and on the basis of the first constraint condition, adding the left lower corner coordinate and the right upper corner coordinate of the other small group into the constraint condition to generate a second constraint condition. When the 1 st subgroup is selected in step S12, for example, the 2 nd subgroup is selected in sequence in step S14, and the constraint condition needs to be increased by the constraint condition of i being 2 or j being 2. I.e. when i is 2, the constraint is satisfied, and when j is 2, the constraint is satisfied.
Specifically, the constraint condition is actually not changed, but as the small assemblies are continuously placed into the processing area, each small assembly placed into the processing area needs to satisfy the constraint condition.
The constraint conditions are as follows:
wherein, x _ leftiFor the lower left corner x coordinate of the ith sub-group, y _ bottomiFor the lower left corner y coordinate, x _ right, of the ith sub-groupiFor the upper right corner x coordinate of the ith small group, y _ topiThe y coordinate of the upper right corner of the ith small group; the ith small assembly is an existing ith small assembly;
and is
u(x_lefti-x_rightj)+u(y_bottomi-y_topj)
+u(x_leftj-x_righti)+u(y_bottomj-y_topi)
≥1
(1≤i,j≤m)；
Wherein, x _ leftjFor the lower left corner x coordinate of the jth sub-group, y _ bottomjFor the bottom left corner y coordinate of the j-th sub-group, x _ righttjFor the upper right corner x coordinate of the jth small group, y _ topjThe y coordinate of the upper right corner of the jth small group; the j small assemblies are added j small assemblies;
wherein
Specifically, the determining whether the other small group can be placed in the processing wave number based on the small group placement constraint condition of the processing wave number includes: starting from the position of the lower left corner of a processing area of a processing wave, taking the lower right corner and the upper left corner of each small group as a reference, simultaneously meeting constraint conditions, taking the constraint conditions as alternative positions after the lower left corner of the small group under consideration is arranged, sequentially and respectively considering whether the arrangement of the alternative positions is feasible from left to right and then from bottom to top, if feasible, the processing wave can be put in, and if not feasible, the processing wave cannot be put in.
Step S15: and judging whether a small group which is not assigned with processing waves and is not marked as not-considered exists, if so, switching to the step S14, and if not, switching to the step S16. A minor grouping marked as not considered is a minor grouping that cannot be placed into a processing wave number without satisfying the constraints.
Step S16: judging whether minor stands without processing wave numbers are available, if so, turning to the step S12 and canceling the disregard marks of the minor stands without processing wave numbers, and if not, turning to the step S17;
step S17: and outputting the minor group distribution information of all the processing waves when the distribution of the processing waves of all the minor groups is finished.
Specifically, all the minor assemblies are put into the machining wave times meeting the constraint conditions according to the constraint conditions, so that minor assembly distribution information of all the machining wave times is output.
According to the invention, the problem of small assembly feeding and discharging in the small assembly production line machining process is converted into a two-dimensional layout mathematical problem, and by means of a computer combination optimization technology, a small assembly layout scheme in each machining pass can be automatically generated for a specific production task, so that the time required by manual layout is saved, the area utilization rate of a machining area is improved, the operation efficiency of a feeding link is improved, the arc burning rate of a welding link is ensured, and the intelligence degree and the production efficiency of a ship small assembly production process are further improved.
As shown in fig. 1b, in an embodiment, the method for generating a small vertical layout scheme of the present invention includes the following steps:
step S11: numbering all the small groups of the production batch according to a preset sequence, counting the number of reinforcing ribs, the length of the reinforcing ribs and the like corresponding to the small groups, and simplifying each small group into a minimum rectangle capable of completely surrounding the outline of the small group.
241/251 sectional total 137 small assemblies capable of being processed on line can be obtained by reading the information in the original part database, and the small assemblies are numbered according to the sequence in the database so as to determine the sequence considered when the small assemblies are on line; the relevant information of each small group of vertical reinforcing ribs and the equivalent rectangular size can directly obtain the corresponding relation from the original part database.
Step S12: and generating a new processing wave number, selecting the smallest serial number in the small assembly which is not allocated with the processing wave number currently, taking the small assembly as the first small assembly of the wave number to be discharged into the lower left corner of a processing area, and updating the constraint condition required to be met by discharging the subsequent small assembly of the wave number into the processing area.
And the size L of the processing area is 12m, the size W of the processing area is 4m, the first small group in the new processing wave is arranged in the lower left corner, a new layout constraint condition is also generated at the time, and the coordinate information of the lower left corner and the upper right corner of the small group is written into the constraint condition.
Step S13: and judging whether minor assemblies which are not allocated with processing waves exist, if so, switching to the step S14, and otherwise, switching to the step S17.
Step S14: and selecting the smallest serial number in the small group which is not allocated with the processing wave number at present and is not marked as the irrelative wave number, judging whether the small group can be arranged in the wave number, determining whether the small group can be arranged in the corresponding position according to whether the constraint condition is met, and otherwise marking the small group as the irrelative wave number.
When the processing area has been arranged with m small groups, whether the current small group satisfies the constraint condition (1)
And the constraint conditions (2)
Wherein
When a new small group is arranged in the processing area of the current wave, the coordinate information of the lower left corner point and the upper right corner point of the small group is updated to the constraint condition.
In the process of arranging the small groups into the machining area, starting from the position of the lower left corner of the machining area, taking the lower right corner and the upper left corner of each arranged small group as references, simultaneously meeting constraint conditions, taking the constraint conditions as alternative positions after the lower left corner of the small group under consideration is arranged, and considering whether the arrangement of the alternative positions is feasible or not sequentially from left to right and from bottom to top until the small groups are arranged into the current wave-time machining area or all the alternative positions cannot be arranged, wherein if the alternative positions are the conditions of the latter, the small groups which cannot be considered at the current wave time are the small groups of the 'current wave time'.
Step S15: and judging whether minor assemblies which are not allocated with processing wave numbers and are not marked as the irrelative minor wave numbers exist, if so, turning to the step S14, and otherwise, turning to the step S16.
Considering whether the current wave-time processing area can be discharged into a new small group, in the small group without processing wave-time distribution, the small groups capable of being discharged into the current wave-time processing area are searched in sequence according to the number, and if the small groups can not be discharged, a new processing wave-time is required to be added.
Step S16: and judging whether minor assemblies which are not allocated with processing wave numbers exist, if so, switching to step S12 and canceling the 'not-considered-for-the-wave-number' mark of the minor assemblies, and otherwise, switching to step S17.
Step S17: and finishing the distribution of all the small assembled processing waves, and outputting the relevant information of all the processing waves.
By continuously executing the steps 1 to 7 until all the online small assemblies are segmented by 241/251, the processing wave number distribution is completed, and the discharge position and the discharge mode of each small assembly in the wave number processing area are obtained, it can be known that 20 processing wave numbers are required to be distributed to the 137 online small assemblies in the segment, and the related information is recorded in the form of a layout chart, as shown in fig. 1c, the schematic diagram of the 1 st wave number is obtained.
As shown in fig. 2, in an embodiment, the minor constituent layout plan generating system of the present invention includes a numbering module 21, a first constraint module 22, a first determining module 23, a second constraint module 24, a second determining module 25, a third determining module 26, and an output module 27; the numbering module is used for numbering all small assemblies of the production batch and simplifying each small assembly into a rectangle according to a preset simplification rule; the first constraint module is used for generating a processing wave number, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for a processing area of the processing wave number, placing the first small group into a first corner of the processing area of the processing wave number, and updating constraint conditions based on a first condition updating rule; the first judging module is used for judging whether a minor assembly without processing frequency distribution exists, if so, switching to the second constraint module, and if not, switching to the third judging module; the second constraint module is used for selecting another small group which is not allocated with the processing wave number at present and is not marked as the irrelative of the wave number according to the serial number sequence, and judging whether the other small group can be placed in the processing wave number or not based on the constraint condition; if so, placing the other group of stands in the processing wave times, updating the constraint condition based on a second condition updating rule, and otherwise marking the other group of stands as not to be considered; the second judging module is used for judging whether small assemblies which are not allocated with processing waves and are not marked as unaccounted exist, if so, the second judging module is switched to the second constraint module, and if not, the second judging module is switched to the third judging module; the third judging module is used for judging whether minor sets which are not distributed with processing waves exist, if so, switching to the first constraint module and canceling the disregard marks of the minor sets which are not distributed with the processing waves, and otherwise, switching to the output module; and the output module is used for outputting the minor assembly distribution information of all the machining waves when the distribution of the machining waves of all the minor assemblies is finished.
Specifically, the reducing each minor component into a rectangle according to a preset simplification rule includes: each minor cube is reduced to a minimum rectangle that can fully enclose its outline.
It should be noted that: the structures and principles of the numbering module 21, the first constraint module 22, the first judging module 23, the second constraint module 24, the second judging module 25, the third judging module 26 and the output module 27 correspond to the steps in the above-mentioned small group layout scheme generating method one to one, and therefore, the description thereof is omitted.
It should be noted that the division of the modules of the above system is only a logical division, and the actual implementation may be wholly or partially integrated into one physical entity, or may be physically separated. And these modules can be realized in the form of software called by processing element; or may be implemented entirely in hardware; and part of the modules can be realized in the form of calling software by the processing element, and part of the modules can be realized in the form of hardware. For example, a module may be a processing element that is set up separately, or may be implemented by being integrated into a chip of the apparatus, or may be stored in a memory of the apparatus in the form of program code, and a processing element of the apparatus calls and executes a function of the module. Other modules are implemented similarly. In addition, all or part of the modules can be integrated together or can be independently realized. The processing element described herein may be an integrated circuit having signal processing capabilities. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in the form of software.
For example, the above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Specific Integrated circuits (ASICs), or one or more Microprocessors (MPUs), or one or more Field Programmable Gate Arrays (FPGAs), etc. For another example, when one of the above modules is implemented in the form of a Processing element scheduler code, the Processing element may be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).
In an embodiment of the present invention, the present invention further includes a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements any one of the above-mentioned minor constituent layout generation methods.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the above method embodiments may be performed by hardware associated with a computer program. The aforementioned computer program may be stored in a computer readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
As shown in fig. 3, in an embodiment, the minor constituent layout plan generating apparatus of the present invention includes: a processor 31 and a memory 32; the memory 32 is for storing a computer program; the processor 31 is connected to the memory 32, and is configured to execute the computer program stored in the memory 32, so as to enable the minor stock layout generating apparatus to execute any one of the minor stock layout generating methods.
Specifically, the memory 32 includes: various media that can store program codes, such as ROM, RAM, magnetic disk, U-disk, memory card, or optical disk.
Preferably, the Processor 31 may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components.
In summary, the method, system, medium and apparatus for generating a small group of layout schemes of the present invention are used to realize small group of automatic layout considering practical space and logic constraints, and improve the manufacturing efficiency of a production line. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A method for generating a small vertical layout scheme, comprising the steps of:
step S11: numbering all the minor assemblies of the production batch, and simplifying each minor assembly into a rectangle according to a preset simplification rule;
step S12: generating a processing wave number, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for a processing area of the processing wave number, placing the first small group into a first corner of the processing area of the processing wave number, and updating constraint conditions based on a first condition updating rule;
step S13: judging whether minor sets without processing waves are available, if so, switching to step S14, and if not, switching to step S16;
step S14: selecting another small group which is not allocated with the processing wave number at present and is not marked as the irrelative small group according to the numbering sequence, and judging whether the other small group can be placed in the processing wave number or not based on the constraint condition; if so, placing the other group of stands in the processing wave times, updating the constraint condition based on a second condition updating rule, and otherwise marking the other group of stands as not to be considered;
step S15: judging whether a small group which is not allocated with processing waves and is not marked as unaccounted exists, if so, switching to a step S14, and if not, switching to a step S16;
step S16: judging whether minor stands without processing wave numbers are available, if so, turning to the step S12 and canceling the disregard marks of the minor stands without processing wave numbers, and if not, turning to the step S17;
step S17: and outputting the minor group distribution information of all the processing waves when the distribution of the processing waves of all the minor groups is finished.
2. The method for generating a small group stand layout scheme according to claim 1, wherein the reducing each small group stand into a rectangle according to a preset reduction rule comprises: each minor cube is reduced to a minimum rectangle that can fully enclose its outline.
3. The method of generating a small radial layout plan of claim 1, the constraints being:
wherein, x _ leftiFor the lower left corner x coordinate of the ith sub-group, y _ bottomiFor the lower left corner y coordinate, x _ right, of the ith sub-groupiFor the upper right corner x coordinate of the ith small group, y _ topiThe y coordinate of the upper right corner of the ith small group; the ith small assembly is an existing ith small assembly;
and is
u(x_lefti-x_rightj)+u(y_bottomi-y_topj)
+u(x_leftj-x_righti)+u(y_bottomj-y_topi)
≥1
(1≤i,j≤m)；
Wherein, x _ leftjFor the lower left corner x coordinate of the jth sub-group, y _ bottomjFor the lower left corner y coordinate of the j-th sub-group, x _ rightjFor the upper right corner x coordinate of the jth small group, y _ topjThe y coordinate of the upper right corner of the jth small group; the j small assemblies are added j small assemblies;
wherein
4. The minor stock layout scheme generating method of claim 1, updating the constraint conditions based on the first condition update rule as: and adding the lower left corner coordinate and the upper right corner coordinate of the first small group into the constraint condition to generate a first constraint condition.
5. The method of claim 1, wherein the determining whether the other subset can be placed in the processing wave based on the subset placement constraint of the processing wave comprises: starting from the position of the lower left corner of a processing area of a processing wave, taking the lower right corner and the upper left corner of each small group as a reference, simultaneously meeting constraint conditions, taking the constraint conditions as alternative positions after the lower left corner of the small group under consideration is arranged, sequentially and respectively considering whether the arrangement of the alternative positions is feasible from left to right and then from bottom to top, if feasible, the processing wave can be put in, and if not feasible, the processing wave cannot be put in.
6. The minor gang layout scheme generation method of claim 1, the updating the constraint conditions based on a second condition update rule comprising: and on the basis of the first constraint condition, adding the left lower corner coordinate and the right upper corner coordinate of the other small group into the constraint condition to generate a second constraint condition.
7. A system for generating a small gang layout plan, comprising: the device comprises a numbering module, a first constraint module, a first judgment module, a second constraint module, a second judgment module, a third judgment module and an output module;
the numbering module is used for numbering all small assemblies of the production batch and simplifying each small assembly into a rectangle according to a preset simplification rule;
the first constraint module is used for generating a processing wave number, selecting a first small group according to the numbering sequence, establishing a rectangular coordinate system for a processing area of the processing wave number, placing the first small group into a first corner of the processing area of the processing wave number, and updating constraint conditions based on a first condition updating rule;
the first judging module is used for judging whether a minor assembly without processing frequency distribution exists, if so, switching to the second constraint module, and if not, switching to the third judging module;
the second constraint module is used for selecting another small group which is not allocated with the processing wave number at present and is not marked as the irrelative of the wave number according to the serial number sequence, and judging whether the other small group can be placed in the processing wave number or not based on the constraint condition; if so, placing the other group of stands in the processing wave times, updating the constraint condition based on a second condition updating rule, and otherwise marking the other group of stands as not to be considered;
the second judging module is used for judging whether small assemblies which are not allocated with processing waves and are not marked as unaccounted exist, if so, the second judging module is switched to the second constraint module, and if not, the second judging module is switched to the third judging module;
the third judging module is used for judging whether minor sets which are not distributed with processing waves exist, if so, switching to the first constraint module and canceling the disregard marks of the minor sets which are not distributed with the processing waves, and otherwise, switching to the output module;
and the output module is used for outputting the minor assembly distribution information of all the machining waves when the distribution of the machining waves of all the minor assemblies is finished.
8. The system for generating a small group stand layout scheme according to claim 5, wherein the reducing each small group stand to a rectangle according to a preset reduction rule comprises: each minor cube is reduced to a minimum rectangle that can fully enclose its outline.
9. A computer-readable storage medium, on which a computer program is stored, the computer program being executable by a processor to implement the method of generating a mini-gang layout scheme according to any one of claims 1 to 6.
10. A small-gang layout scheme generation apparatus, comprising: a processor and a memory;
the memory is used for storing a computer program;
the processor is connected to the memory for executing the computer program stored in the memory to cause the minor stock layout generating apparatus to perform the minor stock layout generating method of any one of claims 1 to 6.
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