CN113075764A - Optical receiving sub-module and passive alignment method thereof - Google Patents
Optical receiving sub-module and passive alignment method thereof Download PDFInfo
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- CN113075764A CN113075764A CN202010010434.5A CN202010010434A CN113075764A CN 113075764 A CN113075764 A CN 113075764A CN 202010010434 A CN202010010434 A CN 202010010434A CN 113075764 A CN113075764 A CN 113075764A
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
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Abstract
The invention discloses a light receiving sub-module consisting of a planar optical waveguide chip and a photodiode chip and a passive alignment method thereof. The light receiving sub-module comprises a bearing plate, a planar optical waveguide chip arranged on the bearing plate, a supporting plate and a plurality of photodiode chips. The planar optical waveguide chip comprises a substrate and a planar optical waveguide. The planar optical waveguide comprises an input optical waveguide core adjacent to an input end, a plurality of output optical waveguide cores adjacent to an output end, an optical coupling part respectively connected with the input optical waveguide core and the output optical waveguide cores, and a reflecting mirror formed on the side surface of the output end of the planar optical waveguide chip. An acute included angle is formed between the side face of the output end and an upper surface of the planar optical waveguide chip, and the side face of the output end and the upper surface of the planar optical waveguide chip are intersected to form an output end edge. The output edge includes an output end face of each output optical waveguide core.
Description
Technical Field
The present invention relates to an improved structure of a light receiving sub-module, and more particularly, to a light receiving sub-module having a supporting plate between a planar optical waveguide chip and a photodiode chip and a passive alignment method thereof.
Background
Please refer to fig. 5A, which is a schematic top view of an embodiment of a prior art rosa. The prior art rosa 9 includes a package 90, a Capillary fiber input 91, a planar waveguide chip 92, a photodiode chip array 93, a Transimpedance Amplifier 940, and a radio frequency circuit Board 941. FIG. 5B is a cross-sectional view of the embodiment of FIG. 5A taken along section line E-E' in the prior art. The package box 90 has a carrier 901. The planar optical waveguide chip 92 is disposed on the carrier 901. Please refer to FIG. 5C, which is a partial enlarged cross-sectional view of the embodiment of FIG. 5B in the prior art. Planar optical waveguide chip 92 includes a substrate 924, a planar optical waveguide 95, a lower cladding layer 925, and a reflective mirror 96. Planar optical waveguide 95 is formed under substrate 924. Planar optical waveguide 95 includes an input optical waveguide core 951, an optical coupling portion 952, and four output optical waveguide cores 953, 954, 955, 956. Input optical waveguide core 951 is located adjacent to an input end 920 of planar optical waveguide chip 92. Four output optical waveguide cores 953, 954, 955, 956 are located adjacent an output end 921 of the planar optical waveguide chip 92. The optical coupling portion 952 is located between the input optical waveguide core 951 and the four output optical waveguide cores 953, 954, 955, 956, wherein the optical coupling portion 952 is connected to the input optical waveguide core 951 and the four output optical waveguide cores 953, 954, 955, 956, respectively. The capillary fiber input end 91 has an input fiber 910. The capillary fiber input 91 is connected to the input 920 of the planar lightwave circuit chip 92 and the substrate 924 such that the input lightwave circuit core 951 is connected to the input fiber 910. Lower cladding layer 925 is formed over substrate 924 and planar optical waveguide 95 (including input optical waveguide core 951, optical coupling portion 952, and four output optical waveguide cores 953, 954, 955, 956), and covers an outer surface (not shown) of planar optical waveguide 95 (including input optical waveguide core 951, optical coupling portion 952, and four output optical waveguide cores 953, 954, 955, 956). The output end 921 of the planar lightwave circuit chip 92 has an output end side 923. The output-end side surface 923 includes output end surfaces of the four output optical waveguide cores 953, 954, 955, 956, respectively. Wherein the reflective mirror 96 is formed on the output-end side 923 (i.e., the reflective mirror 96 is formed on the output end faces of the four output optical waveguide cores 953, 954, 955, 956, respectively). An included angle 97 is formed between the output end side surface 923 and a lower surface 922 of the planar lightwave circuit chip 92. The included angle 97 is an acute angle. The photodiode chip array 93 includes four photodiode chips 930, 931, 932, 933, wherein the four photodiode chips 930, 931, 932, 933 are formed on a semiconductor substrate 94. The four photodiode chips 930, 931, 932, 933 correspond to the four output optical waveguide cores 953, 954, 955, 956, respectively. When an input optical signal is input from the input optical fiber 910 to the input optical waveguide core 951, and then input from the input optical waveguide core 951 and transmitted to the optical coupling portion 952, the input optical signal is demultiplexed into a plurality of output optical signals by the optical coupling portion 952, and then transmitted to the four output optical waveguide cores 953, 954, 955, 956, respectively; the output optical signals are reflected by the reflective mirror 96 on the output side 923, pass through the lower cladding layer 925 and an air gap 98, and are received by four photodiode chips 930, 931, 932 and 933 corresponding to the four output optical waveguide cores 953, 954, 955 and 956. The four photodiode chips 930, 931, 932, and 933 are electrically connected to the transimpedance amplifier 940 via a connection circuit 943, respectively. The transimpedance amplifier 940 is electrically connected to the rf circuit board 941 through a connection circuit 942.
In the design of the prior art, since the planar optical waveguide 95 of the planar optical waveguide chip 92 is located under the substrate 924, the planar optical waveguide 95 cannot be seen or cannot be clearly seen from the top view. Therefore, when the light of the planar optical waveguide chip 92 and the photodiode chip array 93 is focused, it is not possible to directly and accurately measure the positions of the four output optical waveguide cores 953, 954, 955, 956 of the planar optical waveguide 95 from above. Therefore, the design of the optical sub-module in the prior art cannot directly and accurately measure the positions of the four output optical waveguide cores 953, 954, 955, 956 of the planar optical waveguide 95 and directly and accurately measure a central position of each of the four photodiode chips 930, 931, 932, 933, thereby passively focusing light. The prior art designs of the rosa can only perform light in an active light-focusing manner. That is, an input optical signal is actually input from the input optical fiber 910, the four photodiode chips 930, 931, 932, 933 receive the output optical signals, the output optical signals received by the four photodiode chips 930, 931, 932, 933 are converted into electrical signals by the impedance-converting amplifier 940 and the rf circuit board 941, and the position of the photodiode chip array 93 is moved in a searching manner, so that the output optical signals received by the four photodiode chips 930, 931, 932, 933 of the photodiode chip array 93 reach the optimal position of the strongest state. Since the equipment required for active light is very expensive and it takes much time to search for the optimal position of the photodiode chip array 93, it costs much in hardware cost and time cost. The air gaps 98 between the four output optical waveguide cores 953, 954, 955, 956 and the four photodiode chips 930, 931, 932, 933 diffuse the output optical signal, and the larger the air gap 98 is, the wider the diffusion of the output optical signal is. This makes the optical signals received by the four photodiode chips 930, 931, 932, and 933 smaller than the output optical signal immediately after passing through the lower cladding layer 925, and thus the coupling efficiency of the four photodiode chips 930, 931, 932, and 933 is deteriorated.
In view of the above, the inventor has developed a design with easy assembly, which can avoid the above disadvantages, is convenient to install, and has the advantage of low cost, so as to take account of both flexibility and economy.
Disclosure of Invention
The technical problem to be solved by the present invention is how to increase the coupling efficiency of the planar optical waveguide chip and the photodiode chip array, and to provide a design for light alignment of the planar optical waveguide chip and the photodiode chip array in a passive light alignment manner, so as to reduce the cost of hardware and time.
To solve the above-mentioned problems and achieve the desired effect, the present invention provides a light receiving sub-module composed of a planar optical waveguide chip and a photodiode chip, which includes a carrier plate, a planar optical waveguide chip, a support plate and a plurality of photodiode chips. The planar optical waveguide chip is arranged on the bearing plate. The planar optical waveguide chip comprises a substrate, a planar optical waveguide and a reflecting mirror. The planar optical waveguide is formed on the substrate. The planar optical waveguide comprises an input optical waveguide core, a plurality of output optical waveguide cores and at least one optical coupling part. The input optical waveguide core is located adjacent to an input end of the planar optical waveguide chip. The plurality of output optical waveguide cores are positioned adjacent to an output end of the planar optical waveguide chip. At least one optical coupling portion is located between the input optical waveguide core and the plurality of output optical waveguide cores, wherein the at least one optical coupling portion is respectively connected with the input optical waveguide core and the plurality of output optical waveguide cores. The output end of the planar optical waveguide chip is provided with an output end side face. The output end side surface comprises an output end surface of each output optical waveguide core. The reflective mirror is formed on the side surface of the output end. The side surface of the output end and an upper surface of the planar optical waveguide chip are converged to form an output end edge. An included angle is formed between the side surface of the output end and the upper surface of the planar optical waveguide chip, and the included angle is an acute angle. The supporting plate comprises a fixed end and a suspended end. The fixed end of the support plate is arranged on the planar optical waveguide chip adjacent to the edge of the output end. The suspended end of the supporting plate is suspended outside the edge of the output end. The photodiode chips are respectively arranged on the supporting plate corresponding to the output optical waveguide cores. An input optical signal is input by the input optical waveguide core and is transmitted to the at least one optical coupling part, the input optical signal is divided into a plurality of output optical signals by the at least one optical coupling part and is respectively transmitted to the plurality of output optical waveguide cores, and the plurality of output optical signals respectively pass through the supporting plate after being reflected by the reflecting mirror on the side surface of the output end, so that the plurality of photodiode chips corresponding to the plurality of output optical waveguide cores respectively receive the plurality of output optical signals.
In some embodiments, each of the photodiode chips has a diode center, and a shortest distance between a vertical projection line of the diode center of each of the photodiode chips and the edge of the output end is an offset, wherein the offset is related to a thickness of the supporting plate, a refractive index of the supporting plate, and the included angle.
In some embodiments, the planar optical waveguide chip further includes an upper cladding layer formed on the substrate and covering an outer surface of the planar optical waveguide.
In some embodiments, each of the photodiode chips has a diode center, wherein a shortest distance between a vertical projection line of the diode center of each of the photodiode chips and the edge of the output end is an offset, wherein the offset is related to a thickness of the supporting plate, a refractive index of the supporting plate, a thickness of the upper cladding layer, a refractive index of the upper cladding layer, and an included angle.
In some embodiments, wherein the support plate has a refractive index, the refractive index of the support plate is greater than or equal to 1.44 and less than or equal to 1.76.
In some embodiments, the plurality of photodiode chips are adhesively fixed on the support plate.
In some embodiments, a plurality of photodiode chips are formed on a semiconductor substrate.
In addition, the invention also provides a passive alignment method of the light receiving sub-module consisting of the planar optical waveguide chip and the photodiode chip, which comprises the following steps: step A: providing a planar optical waveguide chip, wherein the planar optical waveguide chip comprises a substrate, a planar optical waveguide and a reflective mirror, the planar optical waveguide is formed on the substrate, the planar optical waveguide comprises an input optical waveguide core, a plurality of output optical waveguide cores and at least one optical coupling part, the input optical waveguide core is arranged at an input end adjacent to the planar optical waveguide chip, the plurality of output optical waveguide cores are arranged at an output end adjacent to the planar optical waveguide chip, the at least one optical coupling part is arranged between the input optical waveguide core and the plurality of output optical waveguide cores, the at least one optical coupling part is respectively connected with the input optical waveguide core and the plurality of output optical waveguide cores, the output end of the planar optical waveguide chip is provided with an output end side surface, the output end side surface comprises an output end surface of each output optical waveguide core, the reflective mirror is formed on the output end side surface, the output end side surface and an upper surface of the planar optical waveguide chip meet to form an output end edge, an included angle is formed between the side surface of the output end and the upper surface of the planar optical waveguide chip, and the included angle is an acute angle; and B: arranging a fixed end of a supporting plate on the planar optical waveguide chip adjacent to the edge of the output end, so that a suspended end of the supporting plate is suspended outside the edge of the output end; and C: calculating an offset, wherein the offset is related to a thickness of the support plate, a refractive index of the support plate and the included angle; step D: measuring a center extension line of one of the plurality of output optical waveguide cores; step E: measuring a diode center position of a photodiode chip; step F: moving the photodiode chip onto the support plate, so that a vertical projection line at the center of the diode is staggered with the central extension line, and the shortest distance between the vertical projection line and the edge of the output end is offset; and step G: the photodiode chip is fixed on the support plate.
In addition, the invention also provides a passive alignment method of a light receiving sub-module consisting of the planar optical waveguide chip and the photodiode chip, which comprises the following steps: step H: providing a planar optical waveguide chip and a photodiode chip array, wherein the planar optical waveguide chip comprises a substrate, a planar optical waveguide and a reflective mirror, the planar optical waveguide is formed on the substrate, the planar optical waveguide comprises an input optical waveguide core, a plurality of output optical waveguide cores and at least one optical coupling portion, the input optical waveguide core is located at an input end adjacent to the planar optical waveguide chip, the plurality of output optical waveguide cores are located at an output end adjacent to the planar optical waveguide chip, the at least one optical coupling portion is located between the input optical waveguide core and the plurality of output optical waveguide cores, the at least one optical coupling portion is respectively connected with the input optical waveguide core and the plurality of output optical waveguide cores, wherein the output end of the planar optical waveguide chip has an output end side surface, the output end side surface comprises an output end surface of each output optical waveguide core, the reflective mirror is formed on the output end side surface, the side surface of the output end and an upper surface of the planar optical waveguide chip are converged to form an output end edge, an included angle is formed between the side surface of the output end and the upper surface of the planar optical waveguide chip, the included angle is an acute angle, wherein the photodiode chip array comprises a plurality of photodiode chips, the plurality of photodiode chips are formed on a semiconductor substrate, the plurality of photodiode chips correspond to the plurality of output optical waveguide chips, the plurality of photodiode chips comprise a first photodiode chip and a second photodiode chip, the plurality of output optical waveguide chips comprise a first output optical waveguide chip and a second output optical waveguide chip, and the first photodiode chip and the second photodiode chip correspond to the first output optical waveguide chip and the second output optical waveguide chip respectively; step I: arranging a fixed end of a supporting plate on the planar optical waveguide chip adjacent to the edge of the output end, so that a suspended end of the supporting plate is suspended outside the edge of the output end; step J: calculating an offset, wherein the offset is related to a thickness of the support plate, a refractive index of the support plate and the included angle; step K: measuring a first central extension of the first output optical waveguide core; step L: measuring a first diode center position of the first photodiode chip and a second diode center position of the second photodiode chip; step M: moving the photodiode chip array onto the support plate, so that a first vertical projection line at the center of the first diode is staggered with the first central extension line, and the shortest distance between the first vertical projection line and the edge of the output end is offset; and step N: (1) making a central position connecting line parallel to the edge of the output end, wherein the central position connecting line is formed by connecting the central position of a first diode with the central position of a second diode, or (2) making the shortest distance between a second vertical projection line at the central position of the second diode and the edge of the output end be an offset; and step O: the photodiode chip array is fixed on the support plate.
In some embodiments, the photodiode chip array is adhesively fixed on the support plate.
In some embodiments, the planar optical waveguide chip further includes an upper cladding layer formed on the substrate and covering an outer surface of the planar optical waveguide, wherein the offset is related to the thickness of the supporting plate, the refractive index of the supporting plate, a thickness of the upper cladding layer, a refractive index of the upper cladding layer, and the included angle.
In some embodiments, the thickness of the support plate is greater than or equal to (50) μm and less than or equal to 300 μm.
In some embodiments, the refractive index of the support plate is greater than or equal to 1.44 and less than or equal to 1.76.
In some embodiments, the photodiode chip is adhesively fixed on the support plate.
In some embodiments, the refractive index of the upper cladding layer is greater than or equal to 1.44 and less than or equal to 1.76.
In some embodiments, the thickness of the upper cladding layer is greater than or equal to 3 μm and less than or equal to 50 μm.
In some embodiments, the refractive index of the support plate is equal to the refractive index of the upper cladding layer.
In some embodiments, the material comprising the upper cladding layer comprises silicon dioxide (SiO)2)。
In some embodiments, the planar optical waveguide chip further includes a lower cladding layer formed on the substrate, the planar optical waveguide is formed on the lower cladding layer, and the upper cladding layer is formed on the lower cladding layer and covers the outer surface of the planar optical waveguide.
In some embodiments, the offset is greater than or equal to 30 μm and less than or equal to 80 μm.
In some embodiments, the planar optical waveguide chip further includes a lower cladding layer formed on the substrate, and the planar optical waveguide is formed on the lower cladding layer.
In some embodiments, the included angle is greater than or equal to 38 degrees and less than or equal to 42 degrees.
In some embodiments, the support plate has a thickness greater than or equal to 50 μm and less than or equal to 300 μm.
In some embodiments, the material comprising the support plate comprises glass.
In some embodiments, the support plate is adhesively fixed on the planar optical waveguide chip.
For further understanding of the present invention, the following detailed description of the preferred embodiments will be provided in conjunction with the drawings and figures to illustrate the specific components of the present invention and the functions performed thereby.
Drawings
Fig. 1A is a schematic top view of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to an embodiment of the present invention.
FIG. 1B is a schematic cross-sectional view of the embodiment of FIG. 1A along section line A-A'.
FIG. 1C is an enlarged partial cross-sectional view of the embodiment of FIG. 1B.
FIG. 1D is a partial cross-sectional view of the embodiment of FIG. 1A along section line B-B'.
Fig. 1E is a partial cross-sectional view of another embodiment of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the present invention.
Fig. 1F is a partial cross-sectional view of a light receiving sub-module formed by a planar lightwave circuit chip and a photodiode chip according to another embodiment of the present invention.
Fig. 1G is a schematic partial cross-sectional view of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to another embodiment of the present invention.
Fig. 2A is a schematic top view of a step of forming a passive alignment method of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 1A.
Fig. 2B is a schematic top view of a step of forming a passive alignment method of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 1A.
Fig. 3A is a schematic partial top view of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to another embodiment of the present invention.
FIG. 3B is an enlarged partial cross-sectional view of the embodiment of FIG. 3A taken along section line D-D'.
Fig. 4A is a schematic top view illustrating a step of forming a passive alignment method of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 3A.
Fig. 4B is a schematic top view illustrating a step of a passive alignment method for forming a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 3A.
Fig. 5A is a schematic top view of an embodiment of a prior art rosa.
FIG. 5B is a cross-sectional view of the embodiment of FIG. 5A taken along section line E-E' according to the prior art.
FIG. 5C is an enlarged partial cross-sectional view of the embodiment of FIG. 5B according to the prior art.
Description of reference numerals: 1-a light receiving submodule; 10-a carrier plate; 2-a planar optical waveguide chip; 20-a substrate; 3-an array of photodiode chips; 30-a first photodiode chip; 31-a second photodiode chip; 32-a third photodiode chip; 33-a fourth photodiode chip; 34-a semiconductor substrate; 4-a support plate; 41-fixed end; 42-a free end; 5-offset; 50-a planar optical waveguide; 501-input optical waveguide core; 502-an optical coupling; 503-a first output optical waveguide core; 504-a second output optical waveguide core; 505-a third output optical waveguide core; 506-a fourth output optical waveguide core; 507-the outer surface of the planar optical waveguide; 508-side surfaces of planar optical waveguides; 509 — upper surface of planar optical waveguide; 51-upper coating layer; 52-lower cladding layer; 53-reflective mirror; 54-input end of planar optical waveguide chip; 55-output end of the planar optical waveguide chip; 56-output side; 57-the upper surface of the planar optical waveguide chip; 58-output end edge; 59-included angle; 6-packaging the box body; 60-capillary fiber input end; 61-a switched impedance amplifier; 62-a flexible printed circuit; 63-input fiber; 64, 65-connecting circuit; 66-a first central extension line; 67 — first diode center position; 68-first vertical projection line; 69-second diode center position; 70-a second vertical projection line; 71-center position connection; 72-third diode center position; 73-fourth diode center position; 74-a second central extension line; 75-a third central extension line; 76-a fourth central extension line; 9-a light receiving submodule; 90-packaging the box body; 901-a carrier plate; 902-a platform; 91-capillary fiber input end; 910-input fiber; 92-planar optical waveguide chip; 920-input end of planar optical waveguide chip; 921 — output end of planar optical waveguide chip; 922-lower surface of planar optical waveguide chip; 923-the side of the output end; 924-a substrate; 925-lower cladding layer; 93-photodiode chip array; 930. 931, 932, 933-photodiode chips; 94-a semiconductor substrate; 940-a switched impedance amplifier; 941-radio frequency circuit board; 942 — connecting circuitry; 943-connecting the circuit; 95-planar optical waveguides; 951 — input optical waveguide core; 952-an optical coupling section; 953. 954, 955, 956-output optical waveguide core; 96-a reflective mirror; 97-included angle; 98-air gap.
Detailed Description
Fig. 1A is a schematic top view of a light receiving sub-module composed of a planar optical waveguide chip and a photodiode chip according to an embodiment of the present invention. The optical subassembly 1 of the present invention includes a package 6, a Capillary (Capillary) fiber input 60, a planar waveguide chip 2, a support plate 4, a photodiode chip array 3, a transimpedence Amplifier (TIA) 61, and a Flexible Printed Circuit (FPC) 62. FIG. 1B is a cross-sectional view of the embodiment of FIG. 1A along section line A-A'. The package box 6 has a carrier 10. The planar optical waveguide chip 2 is disposed on the carrier plate 10. Please refer to fig. 1C, which is a partially enlarged cross-sectional view of the embodiment shown in fig. 1B. The planar optical waveguide chip 2 includes a substrate 20, a planar optical waveguide 50, an upper cladding layer 51 and a reflective mirror 53. The substrate 20 is disposed on the carrier 10. The planar optical waveguide 50 is formed on the substrate 20. The planar optical waveguide 50 includes an input optical waveguide core 501, an optical coupling portion 502, and a plurality of output optical waveguide cores (including a first output optical waveguide core 503, a second output optical waveguide core 504, a third output optical waveguide core 505, and a fourth output optical waveguide core 506). Input optical waveguide core 501 is located adjacent to an input end 54 of planar optical waveguide chip 2. The output optical waveguide cores 503, 504, 505, 506 are located adjacent to an output end 55 of the planar optical waveguide chip 2. The optical coupling portion 502 is located between the input optical waveguide core 501 and the output optical waveguide cores 503, 504, 505, and 506, and the optical coupling portion 502 is connected to the input optical waveguide core 501 and the output optical waveguide cores 503, 504, 505, and 506, respectively. The capillary fiber input end 60 has an input fiber 63. The capillary fiber input end 60 is connected to the input end 54 of the planar lightwave circuit chip 2 and the substrate 20 such that the input lightwave circuit core 501 is connected to the input fiber 63. Please refer to simultaneouslyFIG. 1D is a partial cross-sectional view of the embodiment of FIG. 1A along section line B-B'. The upper cladding layer 51 is formed on the substrate 20 and covers an outer surface 507 of the planar optical waveguide 50 (including an outer surface of the input optical waveguide core 501, an outer surface of the optical coupling portion 502, and an outer surface of the output optical waveguide cores 503, 504, 505, and 506), wherein the outer surface 507 of the planar optical waveguide 50 includes a side surface 508 (including a side surface of the outer surface of the input optical waveguide core 501, a side surface of the outer surface of the optical coupling portion 502, and a side surface of the outer surfaces of the output optical waveguide cores 503, 504, 505, and 506) and an upper surface 509 (including an upper surface of the outer surface of the input optical waveguide core 501, an upper surface of the outer surface of the optical coupling portion 502, and an upper surface of the outer surfaces of the output optical waveguide cores 503, 504, 505, and 506). The output 55 of the planar lightwave circuit chip 2 has an output side 56. The output-end side surface 56 includes an output end surface of the output optical waveguide core 503, an output end surface of the output optical waveguide core 504, an output end surface of the output optical waveguide core 505, and an output end surface of the output optical waveguide core 506. Wherein the reflective mirror 53 is formed on the output-end side 56 (i.e., the reflective mirror 53 is formed on the output end faces of the output optical waveguide cores 503, 504, 505, 506, respectively). The output end side surface 56 meets an upper surface 57 of the planar optical waveguide chip 2 to form an output end edge 58. The output side surface 56 forms an angle 59 with the upper surface 57 of the planar lightwave circuit chip 2. The included angle 59 is an acute angle. The supporting plate 4 includes a fixed end 41 and a free end 42. Fixed end 41 of support plate 4 is disposed over planar lightwave circuit chip 2 adjacent output end edge 58. The free end 42 of the support plate 4 overhangs the output end edge 58. In some embodiments, the supporting plate 4 is adhesively fixed on the planar optical waveguide chip 2. In this embodiment, the photodiode chip array 3 includes four photodiode chips (a first photodiode chip 30, a second photodiode chip 31, a third photodiode chip 32 and a fourth photodiode chip 33), wherein the first photodiode chip 30 is formed on a semiconductor substrate 34. A second photodiode chip 31, a third photodiode chip 32 andand the fourth photodiode chip 33 are independently formed on the semiconductor substrate, respectively. The first photodiode chip 30, the second photodiode chip 31, the third photodiode chip 32, and the fourth photodiode chip 33 are disposed on the support plate 4 corresponding to the first output optical waveguide core 503, the second output optical waveguide core 504, the third output optical waveguide core 505, and the fourth output optical waveguide core 506, respectively. In some embodiments, the first photodiode chip 30, the second photodiode chip 31, the third photodiode chip 32, and the fourth photodiode chip 33 are respectively adhesively fixed on the support plate 4. When an input optical signal is input into the input optical waveguide core 501 through the input optical fiber 63, and then input into the input optical waveguide core 501 and transmitted to the optical coupling portion 502, the input optical signal is demultiplexed into a plurality of output optical signals through the optical coupling portion 502, and then transmitted to the first output optical waveguide core 503, the second output optical waveguide core 504, the third output optical waveguide core 505, and the fourth output optical waveguide core 506, respectively; the output optical signals are reflected by the reflective mirrors 53 on the output end side surfaces 56, pass through the supporting plate 4, and are received by the photodiode chips 30, 31, 32, and 33 corresponding to the output optical waveguide cores 503, 504, 505, and 506, respectively. The photodiode chips 30, 31, 32, and 33 are electrically connected to the transimpedance amplifier 61 through a connection circuit 65. The transimpedance amplifier 61 is electrically connected to the flexible printed circuit 62 via a connection circuit 64. The first photodiode chip 30 has a first diode center location 67. The shortest distance between a first vertical projection line 68 of the first diode center location 67 and the output end edge 58 is an offset of 5. Wherein the offset 5 is related to a thickness of the supporting board 4, a refractive index of the supporting board 4, a thickness of the upper cladding layer 51, a refractive index of the upper cladding layer 51, and the included angle 59. Similarly, the second photodiode chip 31, the third photodiode chip 32 and the fourth photodiode chip 33 respectively have a second diode center position, a third diode center position and a fourth diode center position (not shown); a second vertical projection line (not shown) of the center of the second diode and the edge 58 of the output endThe shortest distance of (a) is also offset 5; the shortest distance between a third vertical projection line (not shown) of the center of the third diode and the edge 58 of the output end is also offset 5; the shortest distance between a fourth vertical projection line (not shown) of the center of the fourth diode and the edge 58 of the output end is also offset 5. In some preferred embodiments, the refractive index of upper cladding layer 51 is greater than or equal to 1.44 and less than or equal to 1.76; the thickness of the upper cladding layer 51 is greater than or equal to 3 μm and less than or equal to 50 μm; the material constituting the upper cladding layer 51 includes silicon dioxide (SiO)2). In some preferred embodiments, the thickness of the support plate 4 is greater than or equal to 50 μm and less than or equal to 300 μm; the refractive index of the support plate 4 is greater than or equal to 1.44 and less than or equal to 1.76; the material constituting the support plate 4 comprises glass. In some preferred embodiments, the refractive index of support plate 4 is equal to the refractive index of upper cladding layer 51. In some preferred embodiments, the included angle 59 is greater than or equal to 38 degrees and less than or equal to 42 degrees. In some preferred embodiments, the offset 5 is greater than or equal to 30 μm and less than or equal to 80 μm.
The design of the light receiving sub-module composed of the planar optical waveguide chip and the photodiode chip of the present invention can overlook the output optical waveguide cores 503, 504, 505, 506 of the planar optical waveguide chip 2 from above, so that the positions of the output optical waveguide cores 503, 504, 505, 506 can be accurately measured. And a center position of each of the first photodiode chip 30, the second photodiode chip 31, the third photodiode chip 32, and the fourth photodiode chip 33 of the photodiode chip array 3 can be easily measured. Therefore, the design of the light receiving sub-module composed of the planar optical waveguide chip and the photodiode chip of the invention can perform the light alignment of the planar optical waveguide chip 2 and the photodiode chip array 3 in a passive light alignment manner. In addition, the supporting plate 4 is disposed between the planar optical waveguide chip 2 and the photodiode chip array 3, and if the refractive index of the supporting plate 4 is selected to be the same as the refractive index of the upper cladding layer 51, the phenomenon that the air gap in the prior art diffuses the output optical signal can be avoided. Therefore, the present invention can substantially increase the coupling efficiency between the planar optical waveguide chip and the photodiode chip array, and provides a light receiving sub-module composed of the planar optical waveguide chip and the photodiode chip and a passive alignment method thereof, which can perform the light alignment design of the planar optical waveguide chip and the photodiode chip array in a passive light alignment manner, so as to substantially reduce the cost of hardware and time.
Fig. 1E is a partial cross-sectional view of a light receiving sub-module formed by a planar optical waveguide chip and a photodiode chip according to another embodiment of the present invention. The main structure of the embodiment of fig. 1E is substantially the same as that of the embodiment of fig. 1D, wherein an upper cladding layer 51 is formed on the substrate 20 and covers a side surface 508 of an outer surface 507 of the planar optical waveguide 50, so that an upper surface 509 of the outer surface 507 of the planar optical waveguide 50 is exposed. Wherein the offset 5 is related to the thickness of the support plate 4, the refractive index of the support plate 4 and the angle 59.
Fig. 1F is a partial cross-sectional view of a light receiving sub-module formed by a planar optical waveguide chip and a photodiode chip according to another embodiment of the present invention. The main structure of the embodiment of fig. 1F is substantially the same as that of the embodiment of fig. 1D, and further includes a lower cladding layer 52, wherein the lower cladding layer 52 is formed on the substrate 20, the planar optical waveguide 50 is formed on the lower cladding layer 52, and the upper cladding layer 51 is formed on the lower cladding layer 52 and covers the outer surface 507 of the planar optical waveguide 50. Wherein offset 5 is related to the thickness of support plate 4, the refractive index of support plate 4, the thickness of upper cladding layer 51, the refractive index of upper cladding layer 51, and angle 59.
Fig. 1G is a partial cross-sectional view of a light receiving sub-module formed by a planar optical waveguide chip and a photodiode chip according to still another embodiment of the present invention. The main structure of the embodiment of fig. 1G is substantially the same as that of the embodiment of fig. 1E, and further includes a lower cladding layer 52, wherein the lower cladding layer 52 is formed on the substrate 20, the planar optical waveguide 50 is formed on the lower cladding layer 52, and the upper cladding layer 51 is formed on the lower cladding layer 52 and covers a side surface 508 of an outer surface 507 of the planar optical waveguide 50, so that an upper surface 509 of the outer surface 507 of the planar optical waveguide 50 is exposed. Wherein the offset 5 is related to the thickness of the support plate 4, the refractive index of the support plate 4 and the angle 59.
The invention also provides a passive alignment method of the light receiving sub-module consisting of the planar optical waveguide chip and the photodiode chip, which comprises the following steps: step a (please refer to fig. 2A, which is a schematic top view of a step of forming a passive alignment method of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 1A, with reference to fig. 1A, fig. 1B, and fig. 1C): providing a planar optical waveguide chip 2, wherein the structure of the planar optical waveguide chip 2 is the same as that of the planar optical waveguide chip 2 of the embodiment of fig. 1A, wherein the planar optical waveguide chip 2 includes a substrate 20, a planar optical waveguide 50, an upper cladding layer 51 and a reflective mirror 53; the substrate 20 is disposed on the carrier 10; the planar optical waveguide 50 is formed on the substrate 20; the planar optical waveguide 50 includes an input optical waveguide core 501, an optical coupling portion 502, and a plurality of output optical waveguide cores; the plurality of output optical waveguide cores includes a first output optical waveguide core 503, a second output optical waveguide core 504, a third output optical waveguide core 505, and a fourth output optical waveguide core 506; the input optical waveguide core 501 is located adjacent to an input end 54 of the planar optical waveguide chip 2; the output optical waveguide cores 503, 504, 505, 506 are located adjacent to an output end 55 of the planar optical waveguide chip 2; the optical coupling portion 502 is located between the input optical waveguide core 501 and the output optical waveguide cores 503, 504, 505, and 506, wherein the optical coupling portion 502 is connected to the input optical waveguide core 501 and the output optical waveguide cores 503, 504, 505, and 506, respectively; the upper cladding layer 51 is formed on the substrate 20 and covers an outer surface 507 of the planar optical waveguide 50; the output end 55 of the planar lightwave circuit chip 2 has an output end side surface 56; the output-end side surface 56 includes output end surfaces of the output optical waveguide cores 503, 504, 505, and 506, respectively; wherein the reflective mirror 53 is formed on the output end side 56; the output end side surface 56 meets an upper surface 57 of the planar optical waveguide chip 2 to form an output end edge 58; an included angle 59 is formed between the output end side surface 56 and the upper surface 57 of the planar optical waveguide chip 2; the included angle 59 is an acute angle; and B: disposing a fixed end 41 of a supporting plate 4 on the planar optical waveguide chip 2 adjacent to the output end edge 58, so that a free end 42 of the supporting plate 4 is suspended outside the output end edge 58; step C (please refer to fig. 2B, which is a schematic top view of the steps of the method for passively aligning a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 1A): calculating an offset 5, wherein the offset 5 is related to a thickness of the supporting plate 4, a refractive index of the supporting plate 4 and the included angle 59; step D: measuring a first central extension 66 of the first output optical waveguide core 503; step E: measuring a first diode center position 67 of a first photodiode chip 30; step F: moving the first photodiode chip 30 onto the support plate 4 such that a first vertical projection line 68 of the first diode center position 67 of the first photodiode chip 30 intersects the first central extension line 66 of the first output optical waveguide core 503 and such that the shortest distance between the first vertical projection line 68 and the output end edge 58 is offset 5 (see fig. 1C); step G: fixing the first photodiode chip 30 on the support plate 4; step D': measuring a second central extension (not shown) of the second output optical waveguide core 504; step E': measuring a second diode center position (not shown) of a second photodiode chip 31; step F': moving the second photodiode chip 31 onto the support plate 4 such that a second vertical projection line (not shown) of the second diode center position of the second photodiode chip 31 intersects the second central extension line of the second output optical waveguide core 504, and the shortest distance between the second vertical projection line and the output end edge 58 is offset 5; step G': fixing the second photodiode chip 31 on the support plate 4; step D': measuring a third center extension (not shown) of the third output optical waveguide core 505; step E': measuring a third diode center position (not shown) of a third photodiode chip 32; step F': moving the third photodiode chip 32 onto the support plate 4, such that a third vertical projection line (not shown) of a third diode center position of the third photodiode chip 32 intersects with a third central extension line of the third output optical waveguide core 505, and such that a shortest distance between the third vertical projection line and the output end edge 58 is offset 5; step G': fixing the third photodiode chip 32 on the support plate 4; step D' ″: measuring a fourth center extension (not shown) of the fourth output optical waveguide core 506; step E' ″: measuring a fourth diode center position (not shown) of a fourth photodiode chip 33; step F' ″: moving the fourth photodiode chip 33 onto the support plate 4, such that a fourth vertical projection line (not shown) of the fourth diode center position of the fourth photodiode chip 33 intersects with the fourth central extension line of the fourth output optical waveguide core 506, and the shortest distance between the fourth vertical projection line and the output end edge 58 is offset 5; and a step G': the fourth photodiode chip 33 is fixed on the support plate 4.
Please refer to fig. 3A, which is a schematic partial top view of a light receiving sub-module composed of a planar optical waveguide chip and a photodiode chip according to another embodiment of the present invention. The main structure of the embodiment of fig. 3A is substantially the same as that of the embodiment of fig. 1A, wherein the four photodiode chips (the first photodiode chip 30, the second photodiode chip 31, the third photodiode chip 32, and the fourth photodiode chip 33) included in the photodiode chip array 3 are formed on the same semiconductor substrate 34. Referring to fig. 1C and fig. 3B, a cross-sectional view of the embodiment of fig. 3A along a sectional line C-C' is shown in fig. 1C; FIG. 3B is an enlarged partial cross-sectional view of the embodiment of FIG. 3A taken along section line D-D'. The first photodiode chip 30, the second photodiode chip 31, the third photodiode chip 32, and the fourth photodiode chip 33 respectively have a first diode center position 67, a second diode center position 69, a third diode center position 72, and a fourth diode center position 73. First diode center location 67, second diode center location 69, third diode center location 72, and fourth diode center location 73 may be connected as a center location connection 71. The center position connection 71 is parallel to the output end edge 58. The shortest distance between a first vertical projection line 68 of the first diode center location 67 and the output end edge 58 is an offset of 5 (fig. 1C). Wherein the offset 5 is related to a thickness of the support plate 4, a refractive index of the support plate 4 and the included angle 59. The shortest distance between a second perpendicular projection line 70 of the second diode center location 69 and the output end edge 58 is also offset 5 (fig. 3B). Similarly, the shortest distance between a third vertical projection line (not shown) of the third diode center position 72 and the output end edge 58 is also offset 5; the shortest distance between a fourth vertical projection line (not shown) of the fourth diode center 73 and the output edge 58 is also offset 5. In some embodiments, the photodiode chip array 3 is adhesively fixed on the support plate 4.
The invention also provides another passive alignment method of a light receiving submodule consisting of the planar optical waveguide chip and the photodiode chip, which comprises the following steps: step H (please refer to fig. 4A, which is a schematic top view of a step of forming a passive alignment method of a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 3A, with reference to fig. 1A, fig. 1B, fig. 1C, fig. 3A, and fig. 3B): providing a planar optical waveguide chip 2 and a photodiode chip array 3, wherein the structure of the planar optical waveguide chip 2 is the same as that of the planar optical waveguide chip 2 of the embodiment of fig. 1A, and the planar optical waveguide chip 2 includes a substrate 20, a planar optical waveguide 50, an upper cladding layer 51 and a reflective mirror 53; the substrate 20 is disposed on the carrier 10; the planar optical waveguide 50 is formed on the substrate 20; the planar optical waveguide 50 includes an input optical waveguide core 501, an optical coupling portion 502, and a plurality of output optical waveguide cores; the plurality of output optical waveguide cores includes a first output optical waveguide core 503, a second output optical waveguide core 504, a third output optical waveguide core 505, and a fourth output optical waveguide core 506; the input optical waveguide core 501 is located adjacent to an input end 54 of the planar optical waveguide chip 2; the output optical waveguide cores 503, 504, 505, 506 are located adjacent to an output end 55 of the planar optical waveguide chip 2; the optical coupling portion 502 is located between the input optical waveguide core 501 and the output optical waveguide cores 503, 504, 505, and 506, wherein the optical coupling portion 502 is connected to the input optical waveguide core 501 and the output optical waveguide cores 503, 504, 505, and 506, respectively; the upper cladding layer 51 is formed on the substrate 20 and covers an outer surface 507 of the planar optical waveguide 50; the output end 55 of the planar lightwave circuit chip 2 has an output end side surface 56; the output-end side surface 56 includes output end surfaces of the output optical waveguide cores 503, 504, 505, and 506, respectively; wherein the reflective mirror 53 is formed on the output end side 56; the output end side surface 56 meets an upper surface 57 of the planar optical waveguide chip 2 to form an output end edge 58; an included angle 59 is formed between the output end side surface 56 and the upper surface 57 of the planar optical waveguide chip 2; the included angle 59 is an acute angle; the structure of the photodiode chip array 3 is the same as that of the photodiode chip array 3 of the embodiment of fig. 3A, wherein the photodiode chip array 3 includes a first photodiode chip 30, a second photodiode chip 31, a third photodiode chip 32 and a fourth photodiode chip 33 formed on a semiconductor substrate 34, and the photodiode chips 30, 31, 32 and 33 respectively correspond to the output optical waveguide chips 503, 504, 505 and 506; step I: disposing a fixed end 41 of a supporting plate 4 on the planar optical waveguide chip 2 adjacent to the output end edge 58, so that a free end 42 of the supporting plate 4 is suspended outside the output end edge 58; step J: calculating an offset 5, wherein the offset 5 is related to a thickness of the supporting plate 4, a refractive index of the supporting plate 4 and the included angle 59; step K: measuring a first central extension 66 of the first output optical waveguide core 503; step L: measuring a first diode center position 67 of the first photodiode chip 30 and measuring a second diode center position 69 of the second photodiode chip 31; step M (please refer to fig. 4B, which is a schematic top view of a step of forming a passive alignment method for a light receiving sub-module composed of a planar lightwave circuit chip and a photodiode chip according to the embodiment of fig. 3A): moving the photodiode chip array 3 onto the support plate 4 such that a first vertical projection line 68 of the first diode center position 67 intersects the first central extension line 66 and the shortest distance between the first vertical projection line 68 and the output end edge 58 is offset 5 (as shown in fig. 1C); and step N: (1) either (1) making a center position line 71 parallel to output edge 58, where center position line 71 is formed by connecting first diode center position 67 to second diode center position 69 (as shown in fig. 4B), or (2) making the shortest distance between a second perpendicular projection line 70 of second diode center position 69 and output edge 58 offset 5 (as shown in fig. 3B); at this point, the second vertical projection line 70 of the second diode center location 69 intersects a second central extension line 74; a third vertical projection line (not shown) of a third diode center position 72 of the third photodiode chip 32 intersects a third central extension line 75 of the third output optical waveguide core 505, and the shortest distance between the third vertical projection line and the output end edge 58 is offset 5; a fourth vertical projection line (not shown) of a fourth diode center 73 of the fourth photodiode chip 33 intersects a fourth center extension line 76 of the fourth output optical waveguide core 506, and the shortest distance between the fourth vertical projection line and the output end edge 58 is offset 5; and step O: the photodiode chip array 3 is fixed on the support plate 4.
While the invention has been described in connection with specific embodiments and implementations, many modifications and variations are possible in light of the above teaching or may be acquired from practice of the invention, and it is intended that all such modifications and variations be considered as within the spirit and scope of the invention.
In summary, the present invention can achieve the intended purpose of the invention, and provides a light receiving sub-module composed of a planar optical waveguide chip and a photodiode chip and a passive alignment method thereof, which have great industrial application value.
Claims (36)
1. A light receiving sub-module composed of a planar optical waveguide chip and a photodiode chip is characterized by comprising:
a bearing plate;
a planar optical waveguide chip disposed on the carrier plate, the planar optical waveguide chip comprising:
a substrate;
a planar optical waveguide formed on the substrate, wherein the planar optical waveguide comprises:
an input optical waveguide core located adjacent to an input end of the planar optical waveguide chip;
a plurality of output optical waveguide cores located adjacent to an output end of the planar optical waveguide chip; and
at least one optical coupling part located between the input optical waveguide core and the plurality of output optical waveguide cores, wherein the at least one optical coupling part is respectively connected with the input optical waveguide core and the plurality of output optical waveguide cores; and
a reflective mirror, wherein the output end of the planar optical waveguide chip has an output end side surface, the output end side surface includes an output end surface of each output optical waveguide chip, the reflective mirror is formed on the output end side surface, the output end side surface and an upper surface of the planar optical waveguide chip converge to form an output end edge, an included angle is formed between the output end side surface and the upper surface of the planar optical waveguide chip, and the included angle is an acute angle;
a supporting plate, including a fixed end and a suspended end, wherein the fixed end of the supporting plate is arranged on the planar optical waveguide chip adjacent to the edge of the output end, and the suspended end of the supporting plate is suspended outside the edge of the output end; and
and a plurality of photodiode chips respectively disposed on the support plate corresponding to the plurality of output optical waveguide cores, wherein an input optical signal is input from the input optical waveguide core and transmitted to the at least one optical coupling portion, the input optical signal is demultiplexed into a plurality of output optical signals by the at least one optical coupling portion and transmitted to the plurality of output optical waveguide cores, and the plurality of output optical signals are reflected by the reflective mirror on the side surface of the output end and then pass through the support plate, so as to be received by the plurality of photodiode chips corresponding to the plurality of output optical waveguide cores.
2. The photonic device of claim 1, wherein each of the photodiode chips has a diode center, and a shortest distance between a vertical projection line of the diode center of each of the photodiode chips and the edge of the output end is an offset, wherein the offset is related to a thickness of the supporting plate, a refractive index of the supporting plate, and the included angle.
3. The photonic device as claimed in claim 1, wherein the planar optical waveguide chip further comprises an upper cladding layer formed on the substrate and covering an outer surface of the planar optical waveguide.
4. The planar lightwave circuit chip and photodiode chip of claim 3 wherein each photodiode chip has a diode center, wherein the shortest distance between a vertical projection line of the diode center of each photodiode chip and the edge of the output end is an offset, wherein the offset is related to a thickness of the supporting board, a refractive index of the supporting board, a thickness of the upper cladding layer, a refractive index of the upper cladding layer, and the included angle.
5. The photonic crystal structure of claim 4, wherein the refractive index of the upper cladding layer is greater than or equal to 1.44 and less than or equal to 1.76.
6. The planar lightwave circuit chip and photodiode chip package of claim 4 wherein the thickness of the upper cladding layer is greater than or equal to 3 μm and less than or equal to 50 μm.
7. The photonic crystal structure of claim 4, wherein the refractive index of the supporting plate is equal to the refractive index of the upper cladding layer.
8. The photonic device of claim 3, wherein the upper cladding layer comprises silicon dioxide.
9. The light receiving sub-module of claim 3, wherein the planar lightwave circuit chip further comprises a lower cladding layer formed on the substrate, the planar lightwave circuit chip is formed on the lower cladding layer, and the upper cladding layer is formed on the lower cladding layer and covers the outer surface of the planar lightwave circuit chip.
10. The sub-optical receiving module of the planar optical waveguide chip and the photodiode chip as claimed in any one of claims 2 and 4 to 7, wherein the offset is greater than or equal to 30 μm and less than or equal to 80 μm.
11. The photonic device of claim 1, further comprising a lower cladding layer formed on the substrate, wherein the planar optical waveguide chip is formed on the lower cladding layer.
12. The planar lightwave circuit chip and photodiode chip package of claim 1 wherein the angle is greater than or equal to 38 degrees and less than or equal to 42 degrees.
13. The planar optical waveguide chip and photodiode chip combined light receiving sub-module of claim 1, wherein the supporting board has a thickness, and the thickness of the supporting board is greater than or equal to 50 μm and less than or equal to 300 μm.
14. The planar lightwave circuit chip and photodiode chip light-receiving sub-module defined in claim 1 wherein the support board comprises glass.
15. The planar optical waveguide chip and photodiode chip light-receiving sub-module of claim 1, wherein the supporting board has a refractive index greater than or equal to 1.44 and less than or equal to 1.76.
16. The planar optical waveguide chip and photodiode chip of claim 1, wherein the plurality of photodiode chips are adhesively mounted on the support board.
17. The optical sub-assembly of claim 1, wherein the supporting plate is adhesively fixed on the planar optical waveguide chip.
18. The planar lightwave circuit chip and photodiode chip of claim 1 wherein the plurality of photodiode chips are formed on a semiconductor substrate.
19. A passive alignment method for a light receiving submodule formed by a planar optical waveguide chip and a photodiode chip is characterized by comprising the following steps:
step A: providing a planar optical waveguide chip, the planar optical waveguide chip including a substrate, a planar optical waveguide and a reflective mirror, the planar optical waveguide being formed on the substrate, the planar optical waveguide including an input optical waveguide core, a plurality of output optical waveguide cores and at least one optical coupling portion, the input optical waveguide core being located adjacent to an input end of the planar optical waveguide chip, the plurality of output optical waveguide cores being located adjacent to an output end of the planar optical waveguide chip, the at least one optical coupling portion being located between the input optical waveguide core and the plurality of output optical waveguide cores, the at least one optical coupling portion being respectively connected to the input optical waveguide core and the plurality of output optical waveguide cores, wherein the output end of the planar optical waveguide chip has an output end side surface including an output end surface of each output optical waveguide core, the reflective mirror being formed on the output end surface, the side surface of the output end and an upper surface of the planar optical waveguide chip are converged to form an output end edge, and an included angle is formed between the side surface of the output end and the upper surface of the planar optical waveguide chip and is an acute angle;
and B: arranging a fixed end of a supporting plate on the planar optical waveguide chip adjacent to the edge of the output end, so that a suspended end of the supporting plate is suspended outside the edge of the output end;
and C: calculating an offset, wherein the offset is related to a thickness of the support plate, a refractive index of the support plate, and the included angle;
step D: measuring a center extension line of one of the plurality of output optical waveguide cores;
step E: measuring a diode center position of a photodiode chip;
step F: moving the photodiode chip onto the support plate, so that a vertical projection line of the central position of the diode is staggered with the central extension line, and the shortest distance between the vertical projection line and the edge of the output end is the offset; and
step G: the photodiode chip is fixed on the supporting plate.
20. A passive alignment method for a light receiving submodule formed by a planar optical waveguide chip and a photodiode chip is characterized by comprising the following steps:
step H: providing a planar optical waveguide chip and a photodiode chip array, wherein the planar optical waveguide chip comprises a substrate, a planar optical waveguide and a reflective mirror, the planar optical waveguide is formed on the substrate, the planar optical waveguide comprises an input optical waveguide core, a plurality of output optical waveguide cores and at least one optical coupling portion, the input optical waveguide core is located adjacent to an input end of the planar optical waveguide chip, the plurality of output optical waveguide cores are located adjacent to an output end of the planar optical waveguide chip, the at least one optical coupling portion is located between the input optical waveguide core and the plurality of output optical waveguide cores, the at least one optical coupling portion is respectively connected with the input optical waveguide core and the plurality of output optical waveguide cores, wherein the output end of the planar optical waveguide chip has an output end side surface, the output end side surface includes an output end surface of each output optical waveguide core, the reflecting mirror is formed on the output end side surface, the output end side surface and an upper surface of the planar optical waveguide chip are converged to form an output end edge, an included angle is formed between the side surface of the output end and the upper surface of the planar optical waveguide chip, the included angle is an acute angle, wherein the photodiode chip array comprises a plurality of photodiode chips formed on a semiconductor substrate, the plurality of photodiode chips correspond to the plurality of output optical waveguide chips, the plurality of photodiode chips include a first photodiode chip and a second photodiode chip, the plurality of output optical waveguide cores includes a first output optical waveguide core and a second output optical waveguide core, the first photodiode chip and the second photodiode chip correspond to the first output optical waveguide core and the second output optical waveguide core respectively;
step I: arranging a fixed end of a supporting plate on the planar optical waveguide chip adjacent to the edge of the output end, so that a suspended end of the supporting plate is suspended outside the edge of the output end;
step J: calculating an offset, wherein the offset is related to a thickness of the support plate, a refractive index of the support plate, and the included angle;
step K: measuring a first central extension of the first output optical waveguide core;
step L: measuring a first diode center position of the first photodiode chip and a second diode center position of the second photodiode chip;
step M: moving the photodiode chip array onto the support plate, so that a first vertical projection line of the first diode center position is staggered with the first center extension line, and the shortest distance between the first vertical projection line and the output end edge is the offset;
and step N: (1) making a center position connecting line parallel to the edge of the output end, wherein the center position connecting line is formed by connecting the center position of the first diode with the center position of the second diode, or (2) making the shortest distance between a second vertical projection line of the center position of the second diode and the edge of the output end be the offset; and
step O: the photodiode chip array is fixed on the support plate.
21. The method of claim 20, wherein the array of photodiode chips is adhesively mounted on the support plate.
22. The method of claim 19 or 20, wherein the planar optical waveguide chip further comprises an upper cladding layer formed on the substrate and covering an outer surface of the planar optical waveguide, wherein the offset is related to the thickness of the supporting plate, the refractive index of the supporting plate, a thickness of the upper cladding layer, a refractive index of the upper cladding layer, and the included angle.
23. The method of claim 22, wherein the refractive index of the upper cladding layer is greater than or equal to 1.44 and less than or equal to 1.76.
24. The method of claim 22, wherein the thickness of the upper cladding layer is greater than or equal to 3 μm and less than or equal to 50 μm.
25. The method of claim 22, wherein the refractive index of the supporting board is equal to the refractive index of the upper cladding layer.
26. The method of claim 22, wherein the upper cladding layer comprises silicon dioxide.
27. The method of claim 22, wherein the planar lightwave circuit chip further comprises a lower cladding layer formed on the substrate, the planar lightwave circuit is formed on the lower cladding layer, and the upper cladding layer is formed on the lower cladding layer and covers the outer surface of the planar lightwave circuit.
28. The method of claim 22, wherein the offset is greater than or equal to 30 μm and less than or equal to 80 μm.
29. The passive alignment method of the sub-assembly of planar lightwave circuit chip and photodiode chip as claimed in claim 19 or 20, wherein the offset is greater than or equal to 30 μm and less than or equal to 80 μm.
30. The method as claimed in claim 19 or 20, wherein the planar optical waveguide chip further comprises a lower cladding layer formed on the substrate, and the planar optical waveguide is formed on the lower cladding layer.
31. The passive alignment method of the sub-assembly of claim 19 or 20, wherein the included angle is greater than or equal to 38 degrees and less than or equal to 42 degrees.
32. The method of claim 19 or 20, wherein the thickness of the supporting board is greater than or equal to 50 μm and less than or equal to 300 μm.
33. The method of claim 19 or 20, wherein the supporting plate is made of glass.
34. The method of claim 19 or 20, wherein the refractive index of the supporting plate is greater than or equal to 1.44 and less than or equal to 1.76.
35. The method as claimed in claim 19 or 20, wherein the supporting board is adhered to the planar optical waveguide chip.
36. The method of claim 19, wherein the photodiode chip is adhesively mounted on the supporting board.
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