CN113065294A - Analysis method for standard unit data - Google Patents
Analysis method for standard unit data Download PDFInfo
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- CN113065294A CN113065294A CN202110285282.4A CN202110285282A CN113065294A CN 113065294 A CN113065294 A CN 113065294A CN 202110285282 A CN202110285282 A CN 202110285282A CN 113065294 A CN113065294 A CN 113065294A
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- G06F30/30—Circuit design
Abstract
The invention discloses an analysis method for standard unit data, which analyzes a standard unit library file into a single-row full information format; the standard unit data is obtained by utilizing a single-row full information format and combining input parameters through an interpolation method, and the standard unit data obtained by the standard unit in the method is evaluated under a single process angle or under multiple process angles according to requirements, so that more excellent standard units are screened. The invention enables the data to be searched and processed more efficiently by rewriting the data format; meanwhile, through carrying out multidimensional grading on the standard unit parameters, the standard unit which is more suitable for design can be screened. More excellent timing and lower power consumption are achieved in practical designs.
Description
Technical Field
The invention belongs to the technical field of integrated circuit design, and particularly relates to an analysis method for standard unit data.
Background
In the design process of an integrated circuit, standard cell parameters are often required to be consulted and analyzed, and cells are also required to be screened in the automatic design process so as to meet the requirements of time sequence, power consumption, physical parameters and the like. In reality, this operation is performed by experience and referring to a large number of documents.
As the integrated circuit design is developed towards more advanced technology, in order to meet the requirements of increasingly stringent time sequence and power consumption in the design, more and more standard units are used in the design, so that the mode depending on experience becomes unreliable; meanwhile, with the design of billions of transistor scales, the automatic tool cannot traverse all standard cells in the process of selecting the standard cells, so that the optimal solution result cannot be obtained frequently; furthermore, a design typically requires that the signoff be completed at multiple process corners, and therefore, it is not sufficient to evaluate standard cell performance from a single process corner.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides an analysis method for standard cell data. The standard unit data analysis method enables standard unit data to be obtained more efficiently under various input parameters; meanwhile, the standard unit data evaluation method can be used for evaluating the standard unit data under multiple process angles, so that the standard unit with high grade is screened out.
In order to achieve the purpose, the invention adopts the following technical scheme: a method for analyzing standard unit data comprises the following specific processes: analyzing the information of each standard unit in the standard unit library to obtain a single-row full information format; obtaining standard unit data through an interpolation method according to the single-line full information format and the input parameters, and performing text and visual display on the standard unit data; the standard cell data includes: delay D of standard cellelayAnd power consumption P of standard cellower(ii) a The standard cell data is obtained by the following method:
Delay＝A+B*X+C*Y+D*X*Y (1)
Power＝A+B*X+C*Y+D*X*Y
wherein, a is a first interpolation parameter, B is a second interpolation parameter, C is a third interpolation parameter, D is a fourth interpolation parameter, and X, Y are all input parameters.
Further, each single-line full information format includes: pin information, capacitance values, data types, associated pins, timing types, pin signal states, two-dimensional lookup table indices, and two-dimensional lookup tables.
Further, the two-dimensional lookup table includes: capacitance value, delay value, power consumption value.
Further, the input parameters are any two of input skew on standard cell pins, output load, and associated pin input skew.
Further, the first interpolation parameter a is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
Further, the second interpolation parameter B is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
Further, the third interpolation parameter C is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
Further, the fourth interpolation parameter D is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
Further, inputting standard unit datum data and standard unit data of the same type into a score conversion function under a single process corner to obtain a standard unit data score, obtaining evaluation on the standard unit data under the single process corner by combining a weight coefficient gamma of the standard unit and the standard unit datum data score, and displaying an evaluation result through text and visualization, wherein the evaluation result specifically comprises the following steps:
Sd＝Sd0+γ*f(Di，D0)
Sp＝Sp0+γ*f(Pi，P0) (6)
wherein S isdExpressing the delay final score, S, of the standard cellPRepresenting the final power consumption score of the standard cell, f representing the score conversion function under a single process corner, DiIndicates the time delay, P, of each pin and state of the standard celliPower consumption representing the status of each pin of the standard cell, D0Reference delay, P, representing standard cell of this type0Reference power consumption, S, representing standard cells of this typed0Reference delay score, S, representing a standard cellP0Representing the benchmark power consumption score of the standard cell.
Further, inputting standard unit datum data and standard unit data under multiple process corners into a score conversion function under the multiple process corners to obtain standard unit data scores under the multiple process corners, obtaining evaluation on the standard unit data under the multiple process corners by combining the datum scores, and displaying evaluation results through texts and visualization, wherein the evaluation results specifically comprise:
Sd＝S0+g(Di，Dsj，Ds)
Sp＝S0+g(Pi，Psj，Ps) (7)
wherein S isdRepresents the standard cell delay score, SpIndicating signQuasi-unit power consumption score, S0Representing the reference score, g being the score transfer function under multiple process corners, DiDenotes the delay of the standard cell at each process corner, PiRepresenting the power consumption of the standard unit under each process corner; dsjRepresenting values of standard cells at multiple process corners, DsIndicating the reference delay value, P, of standard cells of the same type at multiple process cornerssjRepresents the power consumption value, P, of the standard cell under multiple process cornerssAnd the reference power consumption value of the standard unit of the same type under multiple process corners is represented.
Compared with the prior art, the invention has the following beneficial effects:
(1) according to the method, all information can be acquired in a single line by analyzing the standard cells in the standard cell library into a single-line full information format, so that the processing speed of the standard cell data is effectively improved;
(2) according to the method, the standard units are quantitatively scored, so that a comparison result of the scores of the standard unit data in the same type can be obtained, and when the standard unit data is smaller, the score is higher, so that the method is more accurate compared with the traditional method for screening the standard units by experience;
(3) the standard units are scored according to the standard unit data under the multiple process angles, the smaller the standard unit data fluctuation under the multiple process angles is, the higher the score is, the score is referred to, and the method has practicability;
(4) the invention realizes the text and visual display of the standard unit data and the grading information, and improves the information searching efficiency.
Drawings
FIG. 1 is a schematic flow chart of the method of the present invention for analysis of standard cell data;
FIG. 2 is a diagram illustrating a single-row full-information data format output by a standard cell in a parsed standard cell library according to the present invention;
FIG. 3 is a data mapping diagram of a two-dimensional look-up table of standard cells in a library of standard cells;
FIG. 4 is a schematic diagram of an output report and a visual report of the present invention.
Detailed Description
The technical scheme of the invention is further explained in detail by combining the attached drawings:
as shown in fig. 1, the present invention provides an analysis method for standard cell data, which specifically includes the following steps:
(1) analyzing the information of each standard unit in the standard unit library to obtain a single-row full information format; each single-row full information format records corresponding pin information, capacitance values, data types, associated pins, delay types, pin signal states, two-dimensional lookup table indexes and two-dimensional lookup tables in a single row, as shown in fig. 2, the single-row full information format enables data and information lookup to be more efficient, data and information do not need to be looked up by reading multiple rows of standard cell libraries, and all data and information of the lookup tables can be obtained only in a single row.
(2) Obtaining standard unit data by using a two-dimensional lookup table in a single-row full information format and combining input parameters through an interpolation method, and performing text and visual display on the standard unit data; the standard cell data includes: delay D of standard cellelayAnd power consumption P of standard cellower(ii) a The standard cell data is obtained by the following method:
Delay＝A+B*X+C*Y+D*X*Y (1)
Power＝A+B*X+C*Y+D*X*Y
wherein, a is a first interpolation parameter, B is a second interpolation parameter, C is a third interpolation parameter, D is a fourth interpolation parameter, X, Y are input parameters, and the input parameters are index values of a lookup table, specifically, any two of input skew, output load, and associated pin input skew on a standard cell pin.
The first interpolation parameter a is obtained by:
as shown in FIG. 3, X1、X2Respectively for two-dimensional inspectionFind the first and second transverse index variables, Y, on the table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
The second interpolation parameter B is obtained by:
the third interpolation parameter C is obtained by:
the fourth interpolation parameter D is obtained by:
and obtaining a first interpolation parameter A, a second interpolation parameter B, a third interpolation parameter C and a fourth interpolation parameter D through a two-dimensional lookup table of a standard unit corresponding pin, and calculating to obtain corresponding standard unit data by combining with the input parameters corresponding to the lookup table index.
The invention also provides an evaluation method for the standard unit data, which is used for evaluating the performance of the same type of standard unit under a single process angle and obtaining the standard unit with the optimal performance under the same type according to the final score; meanwhile, the invention also provides the method for evaluating the volatility of each standard unit under multiple process angles, and the standard units with smaller performance volatility are screened out.
For the same type of standard units, namely the standard units with the same function and driving capacity, standard unit reference data and standard unit data are input into a score conversion function under a single process corner to obtain standard unit data scores, evaluation on the standard unit data under the single process corner is obtained by combining a weight coefficient gamma of the standard unit and the reference data scores of the standard units, evaluation results are displayed through texts and visualization, and the score is higher when the delay or power consumption is smaller in the same type of standard units. The method specifically comprises the following steps:
Sd＝Sd0+γ*f(Di，D0)
Sp＝Sp0+γ*f(Pi，P0) (6)
wherein S isdExpressing the delay final score, S, of the standard cellPRepresenting the final power consumption score of the standard cell, f representing the score conversion function under a single process corner, DiDelay values, P, representing the status of the various pins of a standard celliPower consumption values, D, representing the respective pins, states of the standard cells0Reference delay, P, representing standard cell of this type0Reference power consumption, S, representing standard cells of this typed0Reference delay score, S, representing a standard cellP0Representing the benchmark power consumption score of the standard cell.
The score transfer function involved under a single process corner of the invention may be: f ═ Σ (X)0-Xi)/X0Wherein X is0Represents D0Or P0，XiRepresents DiOr Pi。
Compared with the traditional mode of screening the standard cells in an empirical mode, the method for evaluating the performance of the standard cells under the single process angle can obtain data such as time delay, power consumption and the like of the standard cells more accurately in a quantitative mode, so that the standard cells are screened more reasonably and efficiently.
For standard cells at multiple process corners: inputting standard unit datum data and standard unit data under multiple process corners into score conversion functions under the multiple process corners to obtain standard unit data scores under the multiple process corners, obtaining evaluation on the standard unit data under the multiple process corners by combining the datum scores, and displaying evaluation results through texts and visualization, wherein the evaluation results specifically comprise the following steps:
Sd＝S0+g(Di，Dsj，Ds)
Sp＝S0+g(Pi，Psj，Ps) (7)
wherein S represents the standard cell score, S0Representing the reference score, g being the score transfer function under multiple process corners, DiDenotes the delay of the standard cell at each process corner, PiRepresents the power consumption of the standard cell at each process corner, DsjRepresenting values of standard cells at multiple process corners, DsIndicating the reference delay value, P, of standard cells of the same type at multiple process cornerssjRepresents the power consumption value, P, of the standard cell under multiple process cornerssAnd the reference power consumption value of the standard unit of the same type under multiple process corners is represented.
The invention relates to a score conversion function under multiple process angles: g ═ Σ (X)i-Xsj)2/Xi)*(Xsj/Xs) Wherein X issjRepresents DsjOr Psj，XsRepresents DsOr Ps. The standard cell performance at multiple process angles needs to be evaluated from two dimensions: first, the standard cell needs to be evaluated for the fluctuation of indices such as delay and power consumption at a plurality of process angles, and the formula (7) is expressed by Σ (X)i-Xsj)2/XiObtaining the evaluation of the performance fluctuation of the standard unit, wherein the score is higher when the fluctuation is smaller; secondly, the absolute values of the indexes such as standard cell delay and power consumption under a plurality of process angles need to be evaluated, and the absolute values are represented by X in formula (7)sj/XsImplementation, here can be evaluated by specifying a performance value at a certain process corner or an average value at multiple process corners.
Fig. 4 is a schematic diagram of an output report and a visual report according to the present invention, in which the names, scores, and displays of parameter information of standard cells in each row of a document can be seen in the output report, and a chart shows data of standard cells in multiple process corners. It should be understood that the chart in the present embodiment is only an example, and richer standard cell data information can be presented by configuring the system in the present invention.
In a practical design implementation of an Arithmetic Logic Unit (ALU), standard cells with scores above 80 points (100 points full) are screened under a typical (typical) process corner using the standard cell data analysis method of the present invention. Under the condition that the time sequence which is the same as the traditional standard unit screening is obtained in the comprehensive stage, the power consumption is reduced by 3 percent; in the stage of completing the place and route, the power consumption is reduced by 4%. At multiple process corners, standard cells with scores higher than 80 are also selected, taking into account the performance volatility of the standard cells. In the final layout and wiring stage, the design is checked under three process corners (SS, TT and FF), and compared with the traditional standard cell screening method, the power consumption can be reduced by 3%.
The present invention has been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.
Claims (10)
1. A method for analyzing standard cell data is characterized by comprising the following specific processes: analyzing the information of each standard unit in the standard unit library to obtain a single-row full information format; obtaining standard unit data through an interpolation method according to the single-line full information format and the input parameters, and performing text and visual display on the standard unit data; the standard cell data includes: delay D of standard cellelayAnd power consumption P of standard cellower(ii) a The standard cell data is obtained by the following method:
Delay＝A+B*X+C*Y+D*X*Y (1)
Power＝A+B*X+C*Y+D*X*Y
wherein, a is a first interpolation parameter, B is a second interpolation parameter, C is a third interpolation parameter, D is a fourth interpolation parameter, and X, Y are all input parameters.
2. The analysis method for standard cell data according to claim 1, wherein each single-line full information format comprises: pin information, capacitance values, data types, associated pins, timing types, pin signal states, two-dimensional lookup table indices, and two-dimensional lookup tables.
3. The analysis method for standard cell data according to claim 2, wherein the two-dimensional look-up table comprises: capacitance value, delay value, power consumption value.
4. The method of claim 1, wherein the input parameters are any two of input skew on standard cell pins, output load, and associated pin input skew.
5. The analysis method for standard cell data according to claim 1, wherein the first interpolation parameter a is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
6. The analysis method for standard cell data according to claim 1, wherein the second interpolation parameter B is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
7. The analysis method for standard cell data according to claim 1, wherein the third interpolation parameter C is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
8. The analysis method for standard cell data according to claim 1, wherein the fourth interpolation parameter D is obtained by:
wherein, X1、X2Respectively a first transverse index variable, a second transverse index variable, Y on a two-dimensional lookup table1、Y2Respectively a first longitudinal index variable and a second longitudinal index variable on the two-dimensional lookup table; a is11Is (X)1，Y1) Corresponding capacitance, delay value or power consumption value, a12Is (X)1，Y2) Corresponding capacitance, delay value or power consumption value, a21Is (X)2，Y1) Corresponding capacitance, delay or power consumption value, a22Is (X)2，Y2) Corresponding capacitance value, delay value or power consumption value.
9. The analysis method for standard cell data according to claim 1, wherein the standard cell datum data and the standard cell data of the same type are input into a score conversion function under a single process corner to obtain a standard cell data score, and the evaluation of the standard cell data under the single process corner is obtained by combining the weight coefficient γ of the standard cell and the datum data score of the standard cell, and the evaluation result is displayed through text and visualization, specifically:
Sd＝Sd0+γ*f(Di,D0)
Sp＝Sp0+γ*f(Pi,P0) (6)
wherein S isdExpressing the delay final score, S, of the standard cellPRepresents the final score of the power consumption of the standard cell, f represents unityScore conversion function at the Process corner, DiIndicates the time delay, P, of each pin and state of the standard celliPower consumption representing the status of each pin of the standard cell, D0Reference delay, P, representing standard cell of this type0Reference power consumption, S, representing standard cells of this typed0Reference delay score, S, representing a standard cellP0Representing the benchmark power consumption score of the standard cell.
10. The analysis method for standard cell data according to claim 1, wherein the standard cell datum data and the standard cell data under multiple process corners are input into a score conversion function under multiple process corners to obtain a standard cell data score under multiple process corners, the evaluation of the standard cell data under multiple process corners is obtained by combining the datum score, and the evaluation result is displayed through text and visualization, specifically:
Sd＝S0+g(Di,Dsj,Ds)
Sp＝S0+g(Pi,Psj,Ps) (7)
wherein S isdRepresents the standard cell delay score, SpRepresents the standard cell power consumption score, S0Representing the reference score, g being the score transfer function under multiple process corners, DiDenotes the delay of the standard cell at each process corner, PiRepresenting the power consumption of the standard unit under each process corner; dsjRepresenting values of standard cells at multiple process corners, DsIndicating the reference delay value, P, of standard cells of the same type at multiple process cornerssjRepresents the power consumption value, P, of the standard cell under multiple process cornerssAnd the reference power consumption value of the standard unit of the same type under multiple process corners is represented.
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