CN113056092A

CN113056092A - Wiring board

Info

Publication number: CN113056092A
Application number: CN202011551560.8A
Authority: CN
Inventors: 久保昇; 石崎正人
Original assignee: NGK Insulators Ltd; NGK Electronics Devices Inc
Current assignee: NGK Insulators Ltd; NGK Electronics Devices Inc
Priority date: 2019-12-27
Filing date: 2020-12-24
Publication date: 2021-06-29
Also published as: JP7455730B2; JP2021108359A

Abstract

The invention provides a wiring substrate which can obtain good transmission characteristics under high frequency. The Laminate (LM) has an insulating Layer (LD) made of ceramic and an interlayer ground conductor (LG). The first to Nth insulating layers (LD1) to (LDN) (N.gtoreq.3) and the first to (N-1) th interlayer ground conductors (LG1) to (LG (N-1)) are alternately laminated in the thickness direction (Z). The Laminate (LM) has an electrode mounting Surface (SB) formed by a first insulating layer (LD1), a first side Surface (SO), and a second side Surface (SI). J th₁Kth₁Interlayer ground conductor (LGj)₁)～(LGk₁)(1≤j₁＜k₁N-1) to the first Side (SO). The first through ground conductor (MO) is spaced apart from the first side Surface (SO) in a direction (Y) intersecting the thickness direction ZAnd is arranged. J th₁Kth₁Interlayer ground conductor (LGj)₁)～(LGk₁) The first side Surfaces (SO) are electrically connected to each other via first through ground conductors (MO).

Description

Wiring board

Technical Field

The present invention relates to a wiring board, and more particularly to a wiring board including a laminate of a plurality of insulating layers made of ceramic and a plurality of interlayer ground conductors made of a conductor.

Background

Japanese patent laying-open No. 2001-077240 (patent document 1) discloses a wiring board for transmitting a high-frequency signal of 30GHz or more. According to this publication, a wiring substrate includes: the high-frequency transmission line includes a ceramic dielectric substrate, a high-frequency transmission line, and a connection terminal portion for connecting the high-frequency transmission line to another high-frequency circuit via a solder at a terminal portion of the high-frequency transmission line. The high-frequency transmission line includes: a signal conductor line formed on the surface of the dielectric substrate and having a terminal portion extending to the vicinity of an end surface of the dielectric substrate; and a ground layer formed inside or on the back surface of the dielectric substrate in parallel with the signal conductor line. A pair of ground conductors for connection are formed on both sides of the signal conductor line at the connection terminal portion on the surface of the dielectric substrate. The pair of connection ground conductors and the ground layer are connected by via conductors formed by filling a metal paste into vias provided in the dielectric substrate and baking the via conductors. The side surface of the via conductor is exposed from the end surface of the dielectric substrate.

According to the claims of the above-mentioned publication, these structures can prevent resonance between the via hole conductor and the end face of the dielectric substrate at the connection terminal portion, prevent deterioration of transmission characteristics at the connection terminal portion, and reduce transmission loss of a high-frequency signal at a connection portion with another high-frequency circuit. In addition, as a verification thereof, an experimental result of the transmission characteristic at 30GHz is suggested.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open publication No. 2001-077240

Disclosure of Invention

(problems to be solved by the invention)

According to the technique disclosed in the above-mentioned japanese patent application laid-open No. 2001-077240, the via conductor is disposed so as to be exposed on the side surface of the dielectric layer between the ground conductor for connection and the ground layer. Therefore, the via hole conductor is disposed at a position overlapping with the connection ground conductor in the planar layout and at a position between the connection ground conductor and the ground layer in the thickness direction. In this manner, the position where the via conductor is disposed is limited, and therefore, it is difficult for its transmission characteristics to be optimized at a higher frequency even if the signal frequency is sufficient to the extent of 30 GHz. If this optimization is insufficient, a surface wave is generated in the vicinity of the side surface of the wiring substrate, and thus leakage of electromagnetic energy occurs, and as a result, good transmission characteristics cannot be obtained. In particular, in recent years, a technique for propagating a signal at a very high frequency by using a differential signal has been required, and in particular, a good transmission characteristic of about 65GHz or more has been required.

The present invention has been made to solve the above-described problems, and an object thereof is to provide a wiring board that can obtain good transmission characteristics even at high frequencies.

(means for solving the problems)

A wiring board according to one embodiment of the present invention includes: the multilayer body comprises a multilayer body of a plurality of insulating layers made of ceramics and a plurality of interlayer grounding conductors made of conductors, first and second signal electrodes, and a plurality of first through grounding conductors. In the laminated body, first to Nth insulating layers (N is more than or equal to 3) contained in a plurality of insulating layers and first to (N-1) th interlayer grounding conductors contained in a plurality of interlayer grounding conductors are alternately laminated in the thickness direction. The laminate comprises: an electrode mounting surface, a first side surface and a second side surface formed by the first insulating layer. J-th conductor contained in a plurality of interlayer ground conductors₁Kth₁Interlayer grounding conductor (j is more than or equal to 1)₁＜k₁N-1) to the first side. The first and second signal electrodes are mounted on the electrode mounting surface of the laminate. The plurality of first through ground conductors are arranged at intervals in a direction intersecting the thickness direction on the first side surface of the laminate. J th₁Kth₁Interlayer grounding conductor (j is more than or equal to 1)₁＜k₁N-1) are electrically connected to each other in the first side surface by a plurality of first through ground conductors, respectively.

The wiring substrate preferably includes a differential wiring having first and second signal electrodes. The differential wiring can be used for propagating a signal having a frequency of 65GHz or higherAn electrical signal of rate f. The insulating layers have a relative dielectric constant epsilon, D is defined as the interval of the first through grounding conductors, and T is defined as the interval of the first through grounding conductors_iIs defined as the (j) th layer contained in the plurality of insulating layers₁+1) to kth₁When the thickness of at least any one of the insulating layers and c is defined as the speed of light, D + T is preferably satisfied_i≤c/(2×f×ε^1/2)。

The wiring substrate preferably includes a differential wiring having first and second signal electrodes. Defining D as the spacing of a plurality of first through ground conductors and T_iIs defined as the (j) th layer contained in the plurality of insulating layers₁+1) to kth₁When the thickness of at least any one of the insulating layers is larger, D + T is preferably satisfied_i≤0.75mm。

The plurality of first through ground conductors are preferably disposed in recesses provided in the first side surface, respectively.

The wiring board preferably has a plurality of second through-ground conductors arranged at intervals in a direction intersecting the thickness direction on the second side surface. Preferably j-th grounding conductor contained in the plurality of interlayer grounding conductors₂Kth₂Interlayer grounding conductor (j is more than or equal to 1)₂＜k₂N-1) to the second side and are electrically connected to each other by a plurality of second through ground conductors, respectively.

The first and second signal electrodes may be first and second protruding signal electrodes, respectively, protruding from the electrode mounting face of the stacked body in a planar layout. In this case, the plurality of first through ground conductors preferably include a separated through ground conductor separated from the electrode mounting surface of the laminate. The split through ground conductor at least partially overlaps the first protruding signal electrode in a planar layout.

H th₁-the (N-1) th interlayer ground conductor (k)₁＜h₁N-1) is spaced from the first side.

(effect of the invention)

According to the wiring board of one embodiment of the present invention, the jth grounding conductor included in the plurality of interlayer grounding conductors₁Kth₁Interlayer grounding conductor (j is more than or equal to 1)₁＜k₁N-1) to the first side. Due to the interlayer ground conductors in the vicinity of the first sideThe presence of the body shields propagation of the surface wave near the first side surface in the thickness direction from the electrode mounting surface. Therefore, leakage of electromagnetic energy due to the propagation can be suppressed. Further, j (th)₁Kth₁Interlayer grounding conductor (j is more than or equal to 1)₁＜k₁N-1) are electrically connected to each other by a plurality of first through-ground conductors arranged at intervals in a direction intersecting the thickness direction on the first side surface. This can suppress the jth side surface in the vicinity of the first side surface₁Kth₁Interlayer grounding conductor (j is more than or equal to 1)₁＜k₁Less than or equal to N-1). Therefore, deterioration of the shielding effect due to the resonance can be suppressed. As described above, good transmission characteristics can be obtained even at high frequencies.

The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.

Drawings

Fig. 1 is a top view schematically showing the structure of a wiring substrate in embodiment 1 of the present invention.

Fig. 2 is a bottom view schematically showing the configuration of a wiring structure included in the wiring substrate of fig. 1.

Fig. 3 is a perspective view schematically showing the wiring structure of fig. 2 in the direction of arrow III (fig. 1).

Fig. 4 is a perspective view schematically showing the wiring structure of fig. 2 in the direction of arrow IV (fig. 1).

Fig. 5 is a perspective view schematically showing the configuration of the wiring structure included in the wiring substrate in embodiment 2 of the present invention, from the same perspective as fig. 3.

Fig. 6 is a graph showing a simulation result of a differential pass characteristic as a transmission characteristic of a wiring substrate including a wiring structure having a structural feature shown in at least either one of fig. 4 and 5 together with a comparative example.

Fig. 7 is a graph showing a simulation result of energy loss characteristics as transmission characteristics of a wiring substrate including a wiring structure having structural features shown in at least either one of fig. 4 and 5, together with a comparative example.

Fig. 8 is a perspective view schematically showing structural features of the reference example from the same perspective as fig. 5.

Fig. 9 is a perspective view schematically showing structural features of the reference example from the same perspective as fig. 4.

Detailed Description

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

< embodiment 1 >

Fig. 1 is a plan view schematically showing a package 801 (wiring board) according to the present embodiment. The package 801 is used to manufacture a high frequency module. The package 801 includes a frame FL and a cavity CV surrounded by the frame FL. The cavity CV has a bottom having a mounting region RM and a terminal region RT. In the cavity CV, a circuit component (not shown) is mounted on the mounting region RM. The circuit components are sealed from the external environment by attaching a lid (not shown) to the frame FL so that the cavity CV becomes a closed space. This can protect the circuit components from the external environment.

The circuit component may comprise an IC (integrated circuit). The upper limit of the frequency band of the signal transmitted and received between the IC and the outside (other high frequency circuit, etc.) may be 65GHz or more. In addition, the circuit component may include an optical component, in which case the package 801 is an optical package for manufacturing an optical module. The optical component is typically an optical semiconductor element, for example, a laser diode for a light source or a photodiode for light detection. The package 801 as an optical package has an opening OP in a housing FL in order to secure a path for receiving light from an optical fiber (not shown) disposed outside the package 801 or for transmitting light to the optical fiber. Further, a translucent member for sealing the opening OP may be attached.

The circuit components mounted on the mounting region RM are connected to the terminal region RT by, for example, wire bonding, and can thereby be electrically connected to the external environment of the package 801 through the wiring structure 701 included in the package 801. The wiring structure 701 includes: signal leads SO1 to SO4 (first to fourth signal electrodes) exposed to the outside of the package 801, ground leads GO1 to GO3 (first to third ground electrodes) exposed to the outside of the package 801, signal terminals SI1 to SI4 in the cavity CV, ground terminals GI1 to GI3 in the cavity CV, and capacitors C1 to C4 in the cavity CV.

The signal wire SO1 and the signal terminal SI1 are connected to each other through the signal wiring WS 1. The signal wire SO2 and the signal terminal SI2 are connected to each other through the signal wiring WS 2. The signal wire SO3 and the signal terminal SI3 are connected to each other through the signal wiring WS 3. The signal wire SO4 and the signal terminal SI4 are connected to each other through the signal wiring WS 4. The signal wirings WS1 to WS4 may be formed of interlayer signal conductors (not shown), surface layer conductors for signals (electrode patterns P1 to P4 in fig. 2), and through conductors connecting these conductors in the thickness direction, respectively. The through conductor for the signal may be formed of at least one of a castellation electrode (an electrode exposed on a side surface of the laminate LM described later, not shown) and a via electrode (an electrode not exposed on a side surface of the laminate LM described later, not shown). The signal wirings WS1 to WS4 may include conductor patterns for mounting capacitors C1 to C4, respectively, and the capacitors C1 to C4 may prevent transmission of direct current. The capacitors C1 to C4 can be mounted on these conductor patterns, respectively, using solder BR (see fig. 3 and 4). The ground leads G01 to G03 are connected to ground terminals GI1 to GI3 via ground wirings WG, respectively. The ground wiring WG may be composed of interlayer ground conductors LG1 to LG15 (fig. 3), a surface layer conductor for grounding (fig. 2: ground pattern PG), and a through conductor connecting these conductors in the thickness direction. The through-conductors for grounding may be composed of castellation-type electrodes (outer through-ground conductor MO (fig. 3) and inner through-ground conductor MI (fig. 4)) and via electrodes (electrodes not exposed on the side surfaces of the laminate LM described later, not shown).

The signal wiring WS1 having the signal wire SO1 and the signal terminal SI1, and the signal wiring WS2 having the signal wire SO2 and the signal terminal SI2 constitute a first differential wiring. Further, the signal wiring WS3 having the signal wire SO3 and the signal terminal SI3, and the signal wiring WS4 having the signal wire SO4 and the signal terminal SI4 constitute a second differential wiring. Therefore, the first differential wiring has the signal wires SO1, SO2 and the signal terminals SI1, SI2, and the second differential wiring has the signal wires SO3, SO4 and the signal terminals SI3, SI 4. In addition, although the wiring structure 701 of the present embodiment has 2 differential wirings as described above, the number of differential wirings is not limited to a specific number.

Fig. 2 is a bottom view schematically showing the structure of the wiring structure 701. Fig. 3 and 4 are perspective views schematically showing the wiring structure 701 in the directions of arrows III and IV (fig. 1), respectively. Orthogonal coordinate systems having mutually orthogonal directions X, Y and Z are shown in the figures. The wiring structure 701 includes a laminate LM, an outer through ground conductor MO, and an inner through ground conductor MI (a plurality of first through ground conductors and a plurality of second through ground conductors), and a metal base plate 10, in addition to the above-described members. In order to make it easy to observe the drawings, points are added to the surface regions occupied by the wiring patterns on the electrode mounting surface SB and the terminal region RT (fig. 2 to 4), the outer through ground conductor MO on the side surface SO (fig. 3), and the inner through ground conductor MI on the side surface SI (fig. 4).

The laminate LM is a laminate of first to Nth insulating layers LD1 to LDN (N is 3 or more) made of a dielectric ceramic such as alumina and first to (N-1) th interlayer ground conductors LG1 to LG (N-1) made of a conductor. The interlayer ground conductor is an interlayer conductor that is grounded. Since N is 16 in this embodiment, the laminate LM is a laminate of the first to sixteenth insulating layers LD1 to LD16 and the first to fifteenth interlayer ground conductors LG1 to LG 15. In the laminate LM, the insulating layers LD1 to LD16 and the interlayer ground conductors LG1 to LG15 are alternately laminated in the thickness direction Z. The laminate LM may include an interlayer signal conductor, which is an interlayer conductor made of a conductor and to which a signal potential is applied. The interlayer signal conductors are electrically insulated and separated from the interlayer ground conductors LG1 to LG 15. The interlayer signal conductors may be disposed in the same layer as the interlayer ground conductors LG1 to LG 15. The laminate LM includes an electrode mounting surface SB formed by the insulating layer LD1, side surfaces SO and SI (first and second side surfaces) forming the outer and inner peripheral surfaces of the frame FL (fig. 1), respectively, and an upper surface ST forming the upper surface of the frame FL.

In the present embodiment, the frame FL (see fig. 1) is composed of insulating layers LD1 to LD16 and interlayer ground conductors LG1 to LG 15. The terminal region RT (see fig. 1) is formed of the insulating layers LD1 to LD12 and the interlayer ground conductors LG1 to LG12, and extends from the casing FL to the inside thereof without the insulating layers LD13 to LD16 and the interlayer ground conductors LG13 to LG 15. The terminal region RT thus has a flat surface shape protruding toward the inside of the housing FL, and the flat surface (upper surface in fig. 3 and 4) is formed by the pattern of the insulating layer LD12 and the interlayer ground conductor LG12 arranged thereon.

A skin conductor having a ground pattern PG (fig. 2) and electrode patterns P1 to P4 (fig. 2) is formed on the electrode mounting surface SB of the laminate LM. The signal wires SO1 to SO4 are mounted on the electrode mounting surface SB of the laminate LM via the electrode patterns P1 to P4, respectively. The ground leads GO1 to GO3 are attached to the electrode attachment surface SB of the laminate LM via the ground pattern PG. The electrode mounting surface SB may have grooves TR reaching the side surface SO between the signal conductors SO1 to SO4 and the ground conductors GO1 to GO 3.

The outer through ground conductor MO is disposed on the side surface SO of the laminate LM. The outer through ground conductors MO are preferably disposed in recesses provided in the side surface SO. In other words, the outer through ground conductors MO are each preferably a castellation-type electrode. The j-th through ground conductor MO is connected to the side surface SO via the outer through ground conductors₁Kth₁Interlayer ground conductor LGj₁～LGk₁Are electrically connected to each other. In this embodiment, j ₁1 and k₁Therefore, the interlayer ground conductors LG1 to LG3 are electrically connected to each other via the outer through ground conductors MO. In order to enable such electrical connection, at least the interlayer ground conductor LGj of the interlayer ground conductors LG₁～LGk₁(specifically, the interlayer ground conductors LG1 to LG3) need to reach the side SO. In the present embodiment, all the interlayer ground conductors LG reach the side surface SO (fig. 3).

The outer through-ground conductors MO include ground-wire-vicinity through-ground conductors MOG1 to MOG3 and signal-wire-vicinity through-ground conductors MOs1 to MOs4 (split through-ground conductors). The ground conductors MOG1 to MOG3 pass through the vicinity of the ground lead and preferably reach the electrode mounting surface SB, and are more preferably in contact with the ground leads GO1 to GO 3. The signal-lead-near through-ground conductors MOS1 to MOS4 are separated from the electrode mounting surface SB in the thickness direction Z. Therefore, the signal line and the ground conductors MOS1 to MOS4 penetrate through at least a part of the insulating layers LD2 to LDN (N is equal to or greater than 3, where N is equal to 16) without penetrating through the insulating layer LD 1. The through ground conductors MOS1 to MOS4 preferably pass through only a part of the insulating layers LD2 to LDN in the vicinity of the signal line, and the insulating layer LDN preferably does not pass through. In the example of fig. 3, the through ground conductors MOS1 to MOS4 pass through only the insulating layers LD2 to LD3 in the vicinity of the signal line. The signal-wire-vicinity through ground conductor MOS1 may at least partially overlap with the signal wire SO1 in a planar layout (i.e., a layout on the XY plane). Further, the signal-wire vicinity through-ground conductors MOS1 to MOS4 may at least partially overlap the signal wires SO1 to SO4, respectively, in a planar layout.

The outer through ground conductors MO are arranged at intervals D in a direction Y intersecting the thickness direction Z. Here, the insulating layer LD has a relative dielectric constant ∈ and when the differential wiring is used to propagate an electric signal having a frequency f, if T is set_iIs defined as an insulating layer LD (j)₁+1)～LDk₁When c is defined as the light speed, the thickness of at least one of the insulating layers LD2 to LD3 (in this embodiment, the thickness of at least one of the insulating layers LD2 to LD 3) preferably satisfies the following inequality.

D+T_i≤c/(2×f×ε^1/2)

This further improves the transmission characteristics particularly when the frequency f is 65GHz or more. For example, as long as D + T is satisfied_iLess than or equal to 0.75mm, the transmission characteristics are further improved in the case of using alumina or a material having a relative permittivity epsilon of the same degree as that of the alumina. E.g. at T_iIn the case of 0.1mm, this corresponds to D.ltoreq.0.65 mm. For the insulating layer LD (j)₁+1)～LDk₁The respective thicknesses preferably satisfy the inequalities described above.

The interval D of the outer through ground conductor MO may be different for each location. For example, the interval between the ground wire vicinity through ground conductor MOG1 and the signal wire vicinity through ground conductor MOS1 may be different from the interval between the signal wire vicinity through ground conductor MOS1 and the signal wire vicinity through ground conductor MOS 2.

Inner side through connectionThe ground conductor MI is disposed on the side surface SI of the laminate LM. The inner through-ground conductors MI are preferably disposed in recesses provided in the side surfaces SI. In other words, the inner through ground conductors MI are preferably each a castellation-type electrode. In the side surface SI, the j-th through-ground conductor MI included in the interlayer ground conductor LG is connected to the inner through-ground conductor MI₂Kth₂Interlayer ground conductor LGj₂～LGk₂(1≤j₂＜k₂N-1) are electrically connected with each other. In this embodiment, j₂13 and k₂Therefore, the interlayer ground conductors LG13 to LG15 are electrically connected to each other by the respective inner through ground conductors MI, as shown in fig. 15. In order to enable such electrical connection, the interlayer ground conductors LG13 to LG15 need to reach the side SI. In the present embodiment, the inner through ground conductors MI reach the interlayer ground conductor LG12 extending from the inside of the housing FL to the terminal region RT at the edge of the side surface SI. The inner through ground conductors MI are arranged at intervals D in a direction Y intersecting the thickness direction Z, and preferably satisfy the above inequality. The interval D of the inner through ground conductor MI may be different for each portion.

In addition, the intervals of the outer through ground conductors MO (fig. 3) adjacent to each other need not be exactly the same, and for example, the interval between the ground-wire-vicinity through ground conductor MOG1 and the signal-wire-vicinity through ground conductor MOs1 and the interval between the signal-wire-vicinity through ground conductor MOs1 and the signal-wire-vicinity through ground conductor MOs2 may be different. Further, the intervals of the inner through ground conductors MI (fig. 4) adjacent to each other need not be exactly the same. Even when the intervals are different in this manner, it is preferable that the intervals satisfy the above inequality.

In the present embodiment, the signal conductors SO1 to SO4 are respectively protruded signal electrodes protruding in the X direction from the electrode mounting surface SB of the laminate LM in a planar layout (i.e., a layout on the XY plane). In the present embodiment, the ground leads GO1 to GO3 are projected signal electrodes projected in the X direction from the electrode mounting surface SB of the laminate LM in the planar layout.

According to the present embodiment, the interlayer ground conductor LG reaches the side face SO. Propagation of the surface wave near the side surface SO from the electrode mounting surface SB in the thickness direction Z is shielded by the presence of the interlayer ground conductor near the side surface SO. Therefore, leakage of electromagnetic energy due to the propagation can be suppressed. The interlayer ground conductors LG1 to LG3 are electrically connected to each other at the side surface SO by the outer through ground conductor MO. This can suppress resonance of the interlayer ground conductors LG1 to LG3 in the vicinity of the side face SO. Therefore, deterioration of the shielding effect due to the resonance can be suppressed. As described above, good transmission characteristics can be obtained even at high frequencies.

In particular, when the inequality D + T is satisfied_i≤c/(2×f×ε^1/2) In the case of (2), the right side of the inequality corresponds to half the wavelength of the electromagnetic wave in the insulating layer LD, and the left side is spaced apart by the distance D + the thickness T_iThe following are given. Thus, the resonance of the interlayer ground conductors LG1 to LG3 is sufficiently suppressed even at a high frequency f of 65GHz or more. Therefore, the adverse effect of the resonance on the transmission characteristics is further suppressed.

When the inequality D + T is satisfied_iIn the case of 0.75mm or less (for example, in the case where the interval D is 0.46mm as in the simulation condition described later), the right side of the inequality corresponds to half the wavelength of the electromagnetic wave of 65GHz in the insulating layer LD made of alumina, and the left side interval D + thickness T_iThe following are given. Thus, when alumina or a material having a relative permittivity of approximately the same level as that of alumina is used as the material of the insulating layer LD, the resonance of the interlayer ground conductors LG1 to LG3 is sufficiently suppressed even at a high frequency f of 65GHz or more. Therefore, the adverse effect of the resonance on the transmission characteristics is further suppressed.

The outer through ground conductors MO are preferably disposed in recesses provided in the side surface SO. In this case, the position of the end of the outer through ground conductor MO in the thickness direction Z can be precisely overlapped with the interlayer ground conductor LG. Therefore, resonance at the end of the outer through ground conductor MO caused by a position of the end of the outer through ground conductor MO being shifted from the interlayer ground conductor LG can be avoided. Therefore, the adverse effect of the resonance on the transmission characteristics is further suppressed.

Preferably, the interlayer ground conductors LG13 to LG15 reach the side surface SI and are electrically connected to each other by the respective inner through ground conductors MI. This suppresses the adverse effect of the leakage of electromagnetic energy and the resonance on the transmission characteristics not only at the side SO but also in the vicinity of the side SI. Therefore, the transmission characteristics at high frequencies can be significantly improved as compared with the case where these adverse effects are suppressed only at the side SO.

The signal conductors SO1 to SO4 may be protruded signal electrodes protruded from the electrode mounting surface SB of the laminate LM in a planar layout. The electrode structure on the electrode mounting surface SB is easily restricted by the minimum size because of the necessity of securing physical strength of the terminal and the like, and therefore, it is difficult to adopt a design in which the impedance mismatch with the periphery is suppressed. As a result, leakage or resonance of electromagnetic energy in the vicinity of the region overlapping with the protruding signal electrode in the planar layout is likely to occur in the conventional technique. According to the present embodiment, this problem can be effectively suppressed. In the case of using such a protruding signal electrode, the outer through ground conductor MO preferably includes a through ground conductor MOs1 in the vicinity of the signal wire at least partially overlapping the signal wire SO1 in a planar layout. This can suppress leakage or resonance of electromagnetic energy in the vicinity of the region overlapping with the signal wire SO1 in the planar layout. Further, the outer through ground conductors MO preferably include signal-wire vicinity through ground conductors MOs1 to MOs4 which at least partially overlap with the signal wires SO1 to SO4 in a planar layout. This can suppress leakage and resonance of electromagnetic energy in the vicinity of the region overlapping with the signal conductors SO1 to SO4 in the planar layout.

< embodiment 2 >

Fig. 5 is a perspective view schematically showing the wiring structure 702 of the present embodiment from the same perspective as that of fig. 3 (wiring structure 701 of embodiment 1). In the wiring structure 702, the j-th₁Kth₁Interlayer ground conductor LGj₁～LGk₁(1≤j₁＜k₁N-1) to the side SO, in particular j ₁1 and k ₁3. Thus, the interlayer ground conductors LG 1-LG3 to the side SO. On the other hand, in the wiring structure 702 (fig. 5), the h-th line is different from the wiring structure 701 (see fig. 3: embodiment 1)₁Layer (N-1) ground conductor LGh₁～LG(N－1)(k₁＜h₁N-1) from the side SO, in particular h ₁4 and N-1 15. Therefore, the interlayer ground conductors LG4 to LG15 (see fig. 3: embodiment 1) are separated from the side surface SO. Since the other configurations are substantially the same as those of embodiment 1 described above, the same reference numerals are given to the same or corresponding elements, and the description thereof will not be repeated.

Fig. 6 is a graph showing simulation results (results E1 to E3) of a differential pass characteristic (expressed by S parameter, | Sdd21|) as a transmission characteristic of a wiring board including at least one of a structural characteristic FA (fig. 4) of the wiring structure 701 and a structural characteristic FB (fig. 5) of the wiring structure 702, together with a comparative example (result E0). FIG. 7 shows energy loss characteristics (1- (| Sdd11 |) in the expression of S parameter as transmission characteristics of the wiring board together with a comparative example (result E0)²+|Sdd21|²) A wiring board including at least one of the structural features FA (fig. 4) and FB (fig. 5) (results E1 to E3). Fig. 8 is a perspective view schematically showing the structural feature FBx of the comparative example from the same perspective as that of fig. 5 (structural feature FB). Fig. 9 is a perspective view schematically showing a structural feature FAx of a comparative example from the same perspective as that of fig. 4 (structural feature FA).

The structural feature FA (fig. 4) has an inner through-ground conductor MI. On the other hand, the structural feature FAx (fig. 9) does not have the inner through ground conductor MI.

The structural feature FB (fig. 5) has an outer through ground conductor MO connected to the plurality of interlayer ground conductors LG1 to LG 3. On the other hand, the structural feature FBx (fig. 8) has the outer through-ground conductor MO connected to a single interlayer ground conductor LG1 and disconnected from other interlayer ground conductors.

In fig. 6 and 7, the result E0 shows the simulation result under the condition that the structural feature FAx (fig. 9) and the structural feature FBx (fig. 8) are applied. The result E1 represents the simulation result under the condition that the structural feature FA (fig. 4) and the structural feature FBx (fig. 8) are applied. The result E2 represents a simulation result under the condition that the structural feature FAx (fig. 9) and the structural feature FB (fig. 5) are applied. The result E3 represents the simulation result under the condition that the configuration feature FA (fig. 4) and the configuration feature FB (fig. 5) are applied. From these simulation results, it is clear that the transmission characteristics are improved to about 65GHz or more and excellent transmission characteristics are obtained to about 75GHz from the results E1 to E3, as compared with the result E0. When the results E1 to E3 were compared, the result E2 was better than the result E1, and the result E3 was the best.

The main conditions other than the above for the above simulation are as follows. The distance between the center of the signal wire SO1 and the center of the signal wire SO2 in the Y direction (and the distance between the center of the signal wire SO3 and the center of the signal wire SO4 in the Y direction) was 0.65mm, and the distance between the center of the ground wire GO1 and the center of the ground wire GO2 in the Y direction (and the distance between the center of the ground wire GO2 and the center of the ground wire GO3 in the Y direction) was 2.4 mm. Further, the interval between the ground wire vicinity through ground conductor MOG1 and the ground wire vicinity through ground conductor MOG2 in the Y direction (and the interval between the ground wire vicinity through ground conductor MOG2 and the ground wire vicinity through ground conductor MOG3 in the Y direction) was 1.725mm, and the interval between the signal wire vicinity through ground conductor MOS1 and the signal wire vicinity through ground conductor MOS2 in the Y direction (and the interval between the signal wire vicinity through ground conductor MOS3 and the signal wire vicinity through ground conductor MOS4 in the Y direction) was 0.40 mm. Further, the interval between the ground wire vicinity through ground conductor MOG1 and the signal wire vicinity through ground conductor MOS1 (and the interval between the signal wire vicinity through ground conductor MOS2 and the ground wire vicinity through ground conductor MOG2, the interval between the ground wire vicinity through ground conductor MOG2 and the signal wire vicinity through ground conductor MOS3, and the interval between the signal wire vicinity through ground conductor MOS4 and the ground wire vicinity through ground conductor MOG 3) in the Y direction was 0.46 mm. Further, the interval between the inner through ground conductors MI (see fig. 4) adjacent to each other in the Y direction was 0.6325 mm. The insulating layer LD has a relative dielectric constant ∈ of 9. The insulating layers LD1 to LD12 each had a thickness of 0.15mm, and the insulating layers LD13 to LD16 each had a thickness of 0.25 mm. Further, the depth (dimension in the thickness direction Z) of the grooves TR disposed between the signal wire SO1 and the signal wire SO2 and between the signal wire SO3 and the signal wire SO4 was 225 μm, and the depth of the grooves TR disposed between the ground wire GO1 and the signal wire SO1, between the signal wire SO2 and the ground wire GO2, between the ground wire GO2 and the signal wire SO3, and between the signal wire SO4 and the ground wire GO3 was 300 μm.

According to the present embodiment, the interlayer ground conductors LG1 to LG3 reach the side SO. Thus, propagation of the surface wave near the side surface SO from the electrode mounting surface SB in the thickness direction Z is shielded by the layer-indirect conductors LG1 to LG 3. Therefore, leakage of electromagnetic energy due to the propagation can be suppressed. Further, the interlayer ground conductors LG1 to LG3 are electrically connected to each other by the outer through ground conductors MO arranged at intervals in the direction Y intersecting the thickness direction Z on the side surfaces SO, as in embodiment 1. This can suppress resonance of the interlayer ground conductors LG1 to LG3 in the vicinity of the side face SO. Therefore, the adverse effect of the resonance on the transmission characteristics can be suppressed. As described above, good transmission characteristics can be obtained even at high frequencies, substantially as in embodiment 1.

In particular, according to the present embodiment (fig. 5), unlike embodiment 1 (fig. 3), the interlayer ground conductors LG4 to LG15 are separated from the side surface SO and are not exposed at the side surface SO. Thus, when the method of manufacturing a wiring substrate having the wiring structure 702 has a plating treatment, the plating treatment can be avoided at the side surface SO for the interlayer ground conductors LG4 to LG 15. Therefore, the amount of material consumed in the plating process can be reduced. Therefore, the material cost of the plating treatment can be suppressed. This effect is particularly remarkable in the case where the plating treatment is a noble metal plating treatment, particularly a gold plating treatment.

In addition, in

embodiments

1 and 2 described above, the case where the signal lead wires SO1 and SO2 (first and second signal electrodes) are protruded signal electrodes that protrude from the electrode mounting surface SB of the laminate LM in a planar layout was described, but the first and second signal electrodes may also be electrodes that do not protrude from the electrode mounting surface SB of the laminate LM in a planar layout. For example, an electrode configuration such as BGA (Ball Grid Array) or PCB (Printed Circuit Board) may be used. Alternatively, an electrode configuration such as a flexible substrate may be used. The electrode mounting surface SB may be formed of the insulating layer LD 16. That is, the upper surface ST may be the electrode mounting surface SB. In addition, in

embodiments

1 and 2, the case where the outer through ground conductor MO (on the side surface SO of the laminate LM) and the inner through ground conductor MI (on the side surface SI of the laminate LM) are provided has been described, but the present invention is not limited to this, and only either the outer through ground conductor MO or the inner through ground conductor MI may be provided. An increase in loss due to leakage of electromagnetic energy due to generation of the surface wave occurs both inside and outside. Both the outer through ground conductor MO and the inner through ground conductor MI are preferably provided, but even only one of them can obtain an effect of reducing the loss.

Although the present invention has been described in detail, the above description is illustrative in all aspects, and the present invention is not limited thereto. It is understood that numerous variations not illustrated can be devised without departing from the scope of the invention.

Description of the reference numerals

701. 702: wiring structure

801: package (Wiring substrate)

CV: hollow cavity

FL: frame body

GI1 to GI 3: grounding terminal

GO 1-GO 3: grounding wire (first to third grounding electrode)

LD 1-LD 16: insulating layer

LG-LG 15: interlayer grounding conductor

LM: laminated body

MI: inner through grounding conductor

MO: outer through ground conductor

MOG 1-MOG 4: through grounding conductor near grounding wire

MOS 1-MOS 4: ground via near signal line (split ground via)

P1-P4: electrode pattern

PG: ground pattern

RM: mounting area

RT: terminal area

SB: electrode mounting surface

SI, SO: side surface

SI 1-SI 4: signal terminal

SO 1-SO 4: signal conductor (first to fourth signal electrode)

ST: upper surface of

WG: ground wiring

WS 1-WS 4: and signal wiring.

Claims

1. A wiring substrate, wherein,

the wiring board includes a laminate of a plurality of insulating layers made of ceramic and a plurality of interlayer ground conductors made of a conductor, wherein first to Nth insulating layers included in the plurality of insulating layers and first to (N-1) th interlayer ground conductors included in the plurality of interlayer ground conductors are alternately laminated in a thickness direction, the laminate has an electrode mounting surface, a first side surface and a second side surface formed by the first insulating layer, and a j-th interlayer ground conductor included in the plurality of interlayer ground conductors₁Interlayer ground conductor kth₁The interlayer ground conductor reaches the first side face,

the wiring substrate further includes:

a first signal electrode and a second signal electrode mounted on the electrode mounting surface of the laminate; and

a plurality of first through ground conductors arranged at intervals in a direction intersecting the thickness direction on the first side surface of the laminate,

the j (th)₁Interlayer ground conductor kth₁The interlayer ground conductors are electrically connected to each other at the first side surface via the plurality of first through ground conductors,

wherein N is not less than 3 and j is not less than 1₁＜k₁≤N－1。

2. The wiring substrate according to claim 1,

the wiring substrate includes a differential wiring having the first signal electrode and the second signal electrode, the differential wiring being used for propagating an electric signal having a frequency f of 65GHz or more, the insulating layers have a relative dielectric constant ε, D is defined as the distance between the first through ground conductors, and T is defined as_iIs defined as the (j) th insulating layer contained in the plurality of insulating layers₁+1) insulating layer-kth₁A thickness of at least any one of the insulating layers, and when c is defined as a speed of light, the following equation is satisfied:

D+T_i≤c/(2×f×ε^1/2)。

3. the wiring substrate according to claim 1,

the wiring substrate includes a differential wiring having the first signal electrode and the second signal electrode, D is defined as the interval between the plurality of first through ground conductors, and T is defined as_iIs defined as the (j) th insulating layer contained in the plurality of insulating layers₁+1) insulating layer-kth₁A thickness of at least any one of the insulating layers satisfies the following equation:

D+T_i≤0.75mm。

4. the wiring substrate according to any one of claims 1 to 3,

the plurality of first through ground conductors are disposed in recesses provided in the first side surface, respectively.

5. The wiring substrate according to any one of claims 1 to 4,

the wiring substrate further includes:

a plurality of second through-ground conductors arranged at intervals in a direction intersecting the thickness direction on the second side surface,

j-th grounding conductor contained in the multiple interlayer grounding conductors₂Interlayer ground conductor kth₂Inter-layer ground conductor toThe second side surfaces are electrically connected to each other through the plurality of second through ground conductors,

wherein j is more than or equal to 1₂＜k₂≤N－1。

6. The wiring substrate according to any one of claims 1 to 5,

the first signal electrode and the second signal electrode are respectively a first protruding signal electrode and a second protruding signal electrode protruding from the electrode mounting surface of the laminated body in a planar layout.

7. The wiring substrate according to claim 6,

the plurality of first through ground conductors include a split through ground conductor that is separated from the electrode mounting surface of the laminate, and the split through ground conductor at least partially overlaps the first protruding signal electrode in a planar layout.

8. The wiring substrate according to any one of claims 1 to 7,

h th₁The interlayer grounding conductor to the (N-1) th interlayer grounding conductor are separated from the first side surface,

wherein k is₁＜h₁≤N－1。