CN113054712B - Power supply circuit and electronic equipment - Google Patents
Power supply circuit and electronic equipment Download PDFInfo
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- CN113054712B CN113054712B CN202110341018.8A CN202110341018A CN113054712B CN 113054712 B CN113054712 B CN 113054712B CN 202110341018 A CN202110341018 A CN 202110341018A CN 113054712 B CN113054712 B CN 113054712B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
Abstract
The application provides a supply circuit and electronic equipment, supply circuit includes: a first power supply voltage output end of the power supply module is connected with a power supply voltage input end of the first chip through a first wire, and the first power supply voltage output end is also connected with a power supply voltage input end of the second chip through a second wire; the EOS performance of the first chip is weaker than that of the second chip; wherein the equivalent impedance of the first wire is greater than the equivalent impedance of the second wire. According to the method and the device, the complexity and the cost of a power supply circuit in the electronic equipment can be reduced under the condition of protecting a chip with poor EOS performance.
Description
Technical Field
The present disclosure relates to power supply technologies, and particularly to a power supply circuit and an electronic device.
Background
Electrical Over Stress (EOS) is a generic term for all Electrical Over stresses. The functionality of the chip/device may be diminished or destroyed if the EOS exceeds the maximum specified limit of the chip/device. EOS is typically generated in power supply circuits or test equipment, where the process duration may be microseconds to seconds. Physically, EOS can be viewed as a long energy pulse (typically within 500V, less than 10A in current, in microseconds) that can degrade or destroy the chip/device functionality beyond the maximum specified limit of the chip/device.
In electronic devices such as cell phones, EOS occurs mainly in the power supply circuit where the power module supplies power to the chip. To protect a chip with poor EOS performance, a protection device needs to be provided for the chip, thereby increasing the complexity and cost of a power supply circuit in an electronic device.
Disclosure of Invention
The application provides a power supply circuit and electronic equipment, which can reduce the complexity and cost of the power supply circuit in the electronic equipment under the condition of protecting a chip with poor EOS performance.
In a first aspect, an embodiment of the present application provides a power supply circuit, including:
a first power supply voltage output end of the power supply module is connected with a power supply voltage input end of the first chip through a first wire, and the first power supply voltage output end is also connected with a power supply voltage input end of the second chip through a second wire; the EOS performance of the first chip is weaker than that of the second chip;
wherein the equivalent impedance of the first wire is greater than the equivalent impedance of the second wire.
The power supply circuit can achieve the purpose of protecting the first chip with weaker EOS performance in the circuit without additionally arranging a protection device for the first chip with weaker EOS performance, thereby reducing the complexity and the cost of the power supply circuit while protecting the chip with weaker EOS performance and improving the integral EOS protection performance of a system.
In one possible implementation, if there is a mutual overlapping portion between the first wire and the second wire, the equivalent impedance of the first wire being greater than the equivalent impedance of the second wire includes:
the equivalent impedance of the non-overlapped part of the first conducting wire is larger than that of the non-overlapped part of the second conducting wire.
In one possible implementation, the equivalent impedance of the first conducting wire is greater than the equivalent impedance of the second conducting wire, including:
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are the same, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and material, and the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and cross-sectional area, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are made of the same material, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the lengths of the first conducting wire and the second conducting wire are the same, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the materials of the first conducting wire and the second conducting wire are different, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire.
In one possible implementation, the cross-sectional area of the first conductive line is smaller than the cross-sectional area of the second conductive line, including:
the height of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second liquid crystal display panels may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second electrodes may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire.
In a second aspect, an embodiment of the present application provides a power supply circuit, including:
a first power supply voltage output end of the power supply module is connected with a first power supply voltage input end of a first chip through a first wire, and the first power supply voltage output end is also connected with a second power supply voltage input end of the first chip through a second wire; the EOS performance of the first power supply voltage input end is weaker than that of the second power supply voltage input end;
wherein the equivalent impedance of the first wire is greater than the equivalent impedance of the second wire.
The power supply circuit can protect the chip pin with weaker EOS performance in the circuit without additionally arranging a protection device for the chip pin with weaker EOS performance, thereby reducing the complexity and cost of the power supply circuit while protecting the chip pin with weaker EOS performance and improving the integral EOS protection performance of a system.
In one possible implementation, if there is a mutual overlapping portion between the first wire and the second wire, the equivalent impedance of the first wire being greater than the equivalent impedance of the second wire includes:
the equivalent impedance of the non-overlapped part of the first conducting wire is larger than that of the non-overlapped part of the second conducting wire.
In one possible implementation, the equivalent impedance of the first conductive line is greater than the equivalent impedance of the second conductive line, including:
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are the same, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and material, and the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and cross-sectional area, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are made of the same material, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire.
In one possible implementation, the cross-sectional area of the first conductive line is smaller than the cross-sectional area of the second conductive line, including:
the height of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second electrodes may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second liquid crystal display panels may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire.
In a third aspect, an electronic device in an embodiment of the present application includes the power supply circuit described in any one of the first aspects.
In a fourth aspect, an electronic device in an embodiment of the present application includes the power supply circuit described in any one of the second aspects.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art power supply circuit for providing a chip with a protection device;
FIG. 2 is a schematic diagram of a power supply circuit according to the present application;
FIG. 3 is a schematic cross-sectional view of a lead of the present application;
FIG. 4 is a schematic diagram of related parameters of a conductive line in a power supply circuit of the present application;
FIG. 5 is a schematic diagram of another embodiment of a power supply circuit of the present application;
fig. 6 is a schematic diagram of another embodiment of a power supply circuit of the present application.
Detailed Description
The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.
In one example, in an electronic device such as a cell phone, EOS occurs primarily on the power supply circuit that the power module powers the chip. To protect a chip with poor EOS performance, a protection device needs to be provided for the chip, thereby increasing the complexity and cost of a power supply circuit in an electronic device. For example, as shown in fig. 1, a first voltage regulator ZD1 and a second voltage regulator ZD2 are provided at a power supply voltage input terminal Vbat of a chip U2, and the EOS borne by the power supply voltage input terminal of the chip U2 is prevented from exceeding the EOS performance of the chip U2 by the first voltage regulator ZD1 and the second voltage regulator ZD 2.
Due to the fact that a protection device such as the voltage regulator tube is arranged for the chip U2 with poor EOS performance, complexity and cost of a power supply circuit are increased.
Therefore, the application provides a power supply circuit and an electronic device, which can reduce the complexity and cost of the power supply circuit in the electronic device under the condition of protecting a chip with poor EOS performance.
Fig. 2 is a circuit schematic diagram of an embodiment of the power supply circuit of the present application, as shown in fig. 2, including: a power module 21, a first chip U1, a second chip U2, a first wire 22, and a second wire 23.
And the power supply module 21 is used for supplying power to the first chip U1 and the second chip U2. The power supply module 21 comprises a first supply voltage output terminal OUT1 for outputting a supply voltage VBAT; the power module 21 further includes a second power voltage output terminal OUT2, the second power voltage output terminal OUT2 may be electrically connected to a first terminal of the first resistor R1, and a second terminal of the first resistor R1 may be connected to the ground GND.
The power supply voltage input terminal Vbat of the first chip U1 is connected to the first power supply voltage output terminal OUT1 of the power supply module 21 through the first conductor 22; the supply voltage input terminal Vbat of the second chip U2 is connected to the first supply voltage output terminal OUT1 of the power module 21 via a second conductor 23;
the EOS performance of the first chip U1 is weaker than the EOS performance of the second chip U2.
Wherein the equivalent impedance of the first conducting wire is larger than that of the second conducting wire.
The parallel circuit has the current characteristics that the current is easy to flow to the branch with small impedance, i.e. the branch with small impedance, and the flowing current is large, and in the power supply circuit of the embodiment of the present application shown in fig. 2, by using the above characteristics of the parallel circuit, when the first power voltage output end OUT1 of the power module 21 outputs the instantaneous current because the power in the power module 21 generates the EOS under the condition that the equivalent impedance of the first wire is larger than the equivalent impedance of the second wire, the current flowing in the first wire 22 will be smaller than the current flowing in the second wire 23, so that the current received by the power voltage input end Vbat of the first chip U1 is relatively smaller than the current received by the power voltage input end Vbat of the second chip U2, that is, the EOS borne by the first chip U1 is relatively smaller than the EOS borne by the second chip U2, thereby protecting the first chip U1 with relatively weak EOS performance, therefore, the protection of the chip with relatively weak EOS performance in the power supply circuit is realized without additionally arranging a protection device. For example, if the equivalent impedance of the first conductive line is about 125 milliohms and the equivalent impedance of the second conductive line is about 15 milliohms, when the power module 21 generates EOS to output instantaneous current, most of the current will flow to the second chip U2, and the current flowing to the first chip U1 is relatively small, thereby protecting the first chip U1 with relatively weak EOS performance.
In the power supply circuit shown in fig. 2, the purpose of protecting the chip with the weak EOS performance in the circuit can be achieved without additionally arranging a protection device for the chip with the weak EOS performance, so that the complexity and the cost of the power supply circuit are reduced while the chip with the weak EOS performance is protected and the overall EOS protection performance of the system is improved.
It should be understood that, although the circuit configuration in which the power module 21 supplies power to 2 chips is only used as an example in the power supply circuit shown in fig. 2, the power supply circuit of the present application can be extended to a circuit configuration in which the power module supplies power to more than 2 chips, which is not illustrated here.
The specific implementation of the first conductor and the second conductor in the supply circuit of fig. 2 is illustrated in more detail below.
The equation for calculating the equivalent impedance of a wire is generally: r-wire resistivity-wire length/wire cross-sectional area, from which it can be seen that the impedance of a wire is primarily related to the wire material, length and cross-sectional area. When the materials of the wires are different, the resistivity of the wires is also different.
For example of a cross section of a wire:
the power supply circuit shown in fig. 2 is generally disposed on a circuit board, and fig. 2 can be considered as a top view of the power supply circuit, and if the first wire 22 and the second wire 23 are vertically cut along a line a, the schematic cross-sectional view shown in fig. 3 is obtained, which includes a cross-section 31 of the first wire 22 and a cross-section 32 of the second wire 23 on the circuit board 30. The specific shape of the cross-section of the wire is related to the specific implementation of the wire, and in fig. 3, taking the example that the cross-section of two wires is rectangular, the cross-section 31 includes a height h1 and a width w1, and the cross-section 32 includes a height h2 and a width w 2.
Referring to fig. 4, assuming that the first conductive line 22 and the second conductive line 23 in the power supply circuit shown in fig. 2 are both uniform-thickness conductive lines, that is, the cross-sectional areas of the positions of the first conductive line 22 are the same, i.e., S1, and the cross-sectional areas of the positions of the second conductive line 23 are the same, i.e., S2, assuming that the length of the first conductive line 22 is l1 ═ l11+ l12, and the length of the second conductive line 23 is l2, the implementation of the first conductive line 22 and the second conductive line 23 may include the following possible implementation manners:
the cross-sectional area S1 of the first wire 22 is equal to the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is greater than the length l2 of the second wire, and the materials of the first wire 22 and the second wire 23 are the same; alternatively, the first and second liquid crystal display panels may be,
the cross-sectional area S1 of the first wire 22 is smaller than the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is equal to the length l2 of the second wire, and the materials of the first wire 22 and the second wire 23 are the same; alternatively, the first and second electrodes may be,
the cross-sectional area S1 of the first wire 22 is equal to the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is equal to the length l2 of the second wire, the materials of the first wire 22 and the second wire 23 are different, and the resistivity of the first wire 22 is greater than the resistivity of the second wire 23; alternatively, the first and second electrodes may be,
the cross-sectional area S1 of the first wire 22 is equal to the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is greater than the length l2 of the second wire, the materials of the first wire 22 and the second wire 23 are different, and the resistivity of the first wire 22 is greater than the resistivity of the second wire 23; alternatively, the first and second electrodes may be,
the cross-sectional area S1 of the first wire 22 is smaller than the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is larger than the length l2 of the second wire, and the materials of the first wire 22 and the second wire 23 are the same; alternatively, the first and second electrodes may be,
the cross-sectional area S1 of the first wire 22 is smaller than the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is equal to the length l2 of the second wire, the materials of the first wire 22 and the second wire 23 are different, and the resistivity of the first wire 22 is greater than that of the second wire 23; alternatively, the first and second electrodes may be,
the cross-sectional area S1 of the first wire 22 is smaller than the cross-sectional area S2 of the second wire 23, the length l1 of the first wire 22 is greater than the length l2 of the second wire, the materials of the first wire 22 and the second wire 23 are different, and the resistivity of the first wire 22 is greater than the resistivity of the second wire 23.
Taking the cross-section of the first wire 22 and the second wire 23 as a rectangle, such as the cross-section 31 and the cross-section 32 shown in fig. 3, the area of the wire cross-section is related to the height and the width of the cross-section, therefore, the cross-sectional area S1 of the first wire 22 is smaller than the cross-sectional area S2 of the second wire 23, which can be realized by:
the height h1 of the cross section 31 of the first wire 22 is equal to the height h2 of the cross section 32 of the second wire 23, the width w1 of the cross section 31 of the first wire 22 is less than the width w2 of the cross section 32 of the second wire 23; alternatively, the first and second electrodes may be,
the height h1 of the cross section 31 of the first wire 22 is less than the height h2 of the cross section 32 of the second wire 23, and the width w1 of the cross section 31 of the first wire 22 is less than the width w2 of the cross section 32 of the second wire 23; alternatively, the first and second electrodes may be,
the height h1 of the cross-section 31 of the first wire 22 is less than the height h2 of the cross-section 32 of the second wire 23, and the width w1 of the cross-section 31 of the first wire 22 is equal to the width w2 of the cross-section 32 of the second wire 23.
It should be noted that, in the possible implementation of the first conductive line and the second conductive line, there may be a portion where the first conductive line and the second conductive line overlap with each other or there may be no overlapping portion, for example, in fig. 2, there is no overlapping portion between the first conductive line 22 and the second conductive line 23, and in fig. 5, the first conductive line 22 and the second conductive line 23 have an overlapping portion 51. Since the impedance of the first wire 22 and the second wire 23 at the overlapped portion is the same, the impedance of the non-overlapped portion (e.g., 52 in fig. 5) of the first wire 22 is larger than the impedance of the non-overlapped portion (e.g., 53 in fig. 5) of the second wire 23. The implementation of the non-overlapped part 52 of the first conducting wire 22 and the non-overlapped part 53 of the second conducting wire 23 can refer to the foregoing description about the specific implementation of the first conducting wire 22 and the second conducting wire 23, and is not described herein again.
The power supply circuit can also be used for solving the problem that the power module supplies power for different pins of the same chip and the different pins have different EOS (Ethernet over Ethernet) performances. At this time, as shown in fig. 6, the power supply circuit may include:
the first power supply voltage output terminal OUT1 of the power module 21 is connected to the first power supply voltage input terminal Vbat1 of the first chip U1 by the first wire 22, and the first power supply voltage output terminal OUT1 is also connected to the second power supply voltage input terminal Vbat2 of the first chip U1 by the second wire 23; the EOS performance of the first supply voltage input Vbat1 is weaker than the EOS performance of the second supply voltage input Vbat 2;
wherein the equivalent impedance of the first wire 22 is greater than the equivalent impedance of the second wire 23.
Possible implementations of the first conducting wire 22 and the second conducting wire 23 shown in fig. 6 can refer to the foregoing descriptions about specific implementations of the first conducting wire 22 and the second conducting wire 23, which are not repeated herein.
The aforementioned characteristics of the parallel circuit are also utilized in the power supply circuit of the embodiment of the present application shown in figure 6, when the first power supply voltage output terminal OUT1 of the power supply module 21 outputs a transient current due to the power supply module 21 generating EOS under the condition that the equivalent impedance of the first conductor is greater than that of the second conductor, the current flowing in the first conductor 22 will be smaller than that flowing in the second conductor 23, therefore, the current received by the first power voltage input terminal Vbat1 of the first chip U1 is relatively less than the current received by the second power voltage input terminal Vbat2, i.e. the EOS borne by the first power voltage input terminal Vbat1 is relatively less than the EOS borne by the second power voltage input terminal Vbat2, the first power supply voltage input Vbat1, which has relatively weak EOS performance, is protected, so that without an additional protection device, the protection for chip pins with relatively weak EOS performance in the power supply circuit is realized.
In the power supply circuit shown in fig. 6, the chip pin with weak EOS performance in the circuit can be protected without additionally arranging a protection device for the chip pin with weak EOS performance, so that the complexity and cost of the power supply circuit are reduced while the chip pin with weak EOS performance is protected.
It should be understood that, although the circuit configuration in which the power module 21 supplies power to 2 chip pins is only used as an example in the power supply circuit shown in fig. 6, the power supply circuit of the present application can be extended to a circuit configuration in which the power module supplies power to more than 2 chip pins, which is not illustrated here.
In an electronic device such as a mobile phone, the power module may be composed of a battery and a battery connector, for example, as shown in fig. 1; the first chip and the second chip may be Power Management Units (PMUs) in the electronic device, Global System for Mobile Communications (GSM) Power Amplifiers (PA), and the like.
It should be understood that, in the above embodiment, when the first wire and the second wire are provided, the first wire and the second wire need to be provided with the current meeting the requirements when the power module normally supplies power to the first chip and the second chip, so that the power supply circuit can protect a chip or a chip pin with relatively weak EOS performance under the condition of ensuring that the power supply circuit normally supplies power, and the complexity and the cost of the power supply circuit are reduced.
In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, and means that there may be three relationships, for example, a and/or B, and may mean that a exists alone, a and B exist simultaneously, and B exists alone. Wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c may represent: a, b, c, a and b, a and c, b and c or a and b and c, wherein a, b and c can be single or multiple.
Those of ordinary skill in the art will appreciate that the various elements and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, any function, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the specific embodiments of the present application, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present disclosure, and all the changes or substitutions should be covered by the protection scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A power supply circuit, comprising:
a first power supply voltage output end of the power supply module is connected with a power supply voltage input end of the first chip through a first wire, and the first power supply voltage output end is also connected with a power supply voltage input end of the second chip through a second wire; the EOS performance of the first chip is weaker than that of the second chip;
wherein the equivalent impedance of the first wire is greater than the equivalent impedance of the second wire.
2. The circuit of claim 1, wherein if there is a mutual overlap between the first conductive line and the second conductive line, the equivalent impedance of the first conductive line being greater than the equivalent impedance of the second conductive line comprises:
the equivalent impedance of the non-overlapped part of the first conducting wire is larger than that of the non-overlapped part of the second conducting wire.
3. The circuit of claim 1, wherein the equivalent impedance of the first conductive line is greater than the equivalent impedance of the second conductive line, comprising:
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are the same, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second liquid crystal display panels may be,
the first conducting wire and the second conducting wire are the same in length and material, and the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and cross-sectional area, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are made of the same material, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire.
4. The circuit of claim 3, wherein the cross-sectional area of the first conductive line is less than the cross-sectional area of the second conductive line, comprising:
the height of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second liquid crystal display panels may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second electrodes may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire.
5. A power supply circuit, comprising:
a first power supply voltage output end of the power supply module is connected with a first power supply voltage input end of a first chip through a first wire, and the first power supply voltage output end is also connected with a second power supply voltage input end of the first chip through a second wire; the first supply voltage input terminal has a lower EOS performance than the second supply voltage input terminal;
wherein the equivalent impedance of the first wire is greater than the equivalent impedance of the second wire.
6. The circuit of claim 5, wherein if there is a mutual overlap between the first conductive line and the second conductive line, the equivalent impedance of the first conductive line being greater than the equivalent impedance of the second conductive line comprises:
the equivalent impedance of the non-overlapped part of the first conducting wire is larger than that of the non-overlapped part of the second conducting wire.
7. The circuit of claim 5, wherein the equivalent impedance of the first conductive line is greater than the equivalent impedance of the second conductive line, comprising:
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are the same, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and material, and the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length and cross-sectional area, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the cross sectional areas of the first conducting wire and the second conducting wire are the same, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are made of the same material, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second electrodes may be,
the first conducting wire and the second conducting wire are the same in length, the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the first conducting wire and the second conducting wire are made of different materials, and the resistivity of the first conducting wire is larger than that of the second conducting wire; alternatively, the first and second liquid crystal display panels may be,
the cross-sectional area of the first conducting wire is smaller than that of the second conducting wire, the materials of the first conducting wire and the second conducting wire are different, the resistivity of the first conducting wire is larger than that of the second conducting wire, and the length of the first conducting wire is larger than that of the second conducting wire.
8. The circuit of claim 7, wherein the cross-sectional area of the first conductor is less than the cross-sectional area of the second conductor, comprising:
the height of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second electrodes may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire; alternatively, the first and second electrodes may be,
the height of the cross section of the first conducting wire is smaller than that of the cross section of the second conducting wire, and the width of the cross section of the first conducting wire is the same as that of the cross section of the second conducting wire.
9. An electronic device characterized by comprising the power supply circuit of any one of claims 1 to 4.
10. An electronic device characterized by comprising the power supply circuit of any one of claims 5 to 8.
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| CN202110341018.8A CN113054712B (en) | 2021-03-30 | 2021-03-30 | Power supply circuit and electronic equipment |
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| KR20170052751A (en) * | 2015-11-03 | 2017-05-15 | 삼성전자주식회사 | Integrated protecting circuit in semiconductor device |
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| CN110011132A (en) * | 2019-04-09 | 2019-07-12 | 晶晨半导体(上海)股份有限公司 | A kind of port processing method |
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