CN113052939B - Patch segment, tip and connection unification encoding for path tracing - Google Patents

Abstract

Patch sections, tips, and connections for path tracing are uniformly encoded. The present disclosure provides methods of encoding paths, a stroked system for paths, a renderer that generates stroked tessellation of paths, and a method of determining a link type for a path from a data structure. The data structure may be an array of index links of the compact encoding path. The location of one or more index values (e.g., null index values) within the indexed links may encode the type of link. In one example, a method of encoding includes: (1) Receiving a path having a plurality of links, wherein the links include at least one section and at least one junction; and (2) generating an encoded path by encoding the links based on the location information of the links, wherein the encoding employs the same data structure for each link.

Description

Patch segment, tip and connection unification encoding for path tracing

Cross Reference to Related Applications

The present application is a continuation-in-part application entitled "polar tracing for vector graphics" filed on day 12, 13 of Mark Kilgard (POLAR STROKING FOR VECTOR GRAPHICS "U.S. application serial No. 16/714,621), which claims priority from a provisional U.S. application entitled" polar tracing for vector graphics "filed on day 12, 10 of Mark Kilgard of 2019 (POLAR STROKING FOR VECTOR GRAPHICS" U.S. provisional application serial No. 62/946,267, which is commonly assigned with the present application and which is incorporated herein by reference in its entirety.

Technical Field

The present application relates generally to representing paths including segments and joints, and more particularly to encoding paths.

Background

Vector graphics (as used in PostScript, PDF, scalable vector graphics, openVG, flash, etc.) render shape and text in one of two ways: filling (essentially "coloring within a shape") or tracing (essentially "outlining a shape"). These shapes are commonly referred to as "paths", and the process of rendering filled or stroked paths is commonly referred to as "path rendering".

Existing methods perform stroking by slower CPU rasterization techniques or faster GPU methods that involve extensive CPU preprocessing. The need for CPU-based preprocessing often places the GPU tracing method under CPU operation constraints. Furthermore, CPU-based preprocessing for GPU stroking methods typically combines rendering states (e.g., stroking width, top style, and join style) into the GPU representation of the path, which becomes expensive to alter, e.g., by re-tessellating. Such GPU representations occupy significantly more memory than the original representation of the path.

Disclosure of Invention

In one aspect, the present disclosure provides a method of encoding a path. In one example, the method includes: (1) Receiving a path having a plurality of links, wherein the connection comprises at least one section and at least one junction; and (2) generating encoded links by encoding the links based on the location information of the links, wherein the encoding employs the same data structure for each link.

In another aspect, the present disclosure provides a tracing system for a path. In one example, the stroking system includes: (1) A path processor configured to break up a path into links and encode the links, wherein the links include at least one section and at least one junction, wherein the path processor is configured to encode the path with the same data structure for each link; and (2) an edge-rendering processor configured to tessellate the encoded path surface into geometric primitives corresponding to edge-rendered areas of the path.

In yet another aspect, the present disclosure provides a renderer. In one example, a renderer includes: (1) A first processor configured to decompose a path into links and encode the links as indexed links, wherein the links include one or more sections and one or more junctions; and (2) a second processor configured to generate a tessellation of the path based on the polar tessellation representation of each link using the indexed links.

In yet another aspect, the present disclosure provides a method of determining a type of link of a path from a data structure. In one example, the method of determining a type of link includes: (1) Analyzing a data structure encoding a link, the data structure having a plurality of indices related to an array of control point coordinates corresponding to the link; and (2) determining a type of the link based on a presence of at least one index null for at least one of the indexes.

In yet another aspect, the present disclosure provides a method of encoding a path comprising a plurality of segments and a plurality of junctions connecting respective consecutive pairs of adjacent segments. In one example, the encoding method includes: (1) For each section, and using the same representation format for each section, encoding that section into a first indexed link; and (2) for each splice point, and using the same representation format, encoding the splice point into a second indexed link. Each segment is a cubic bezier segment, a quadratic bezier segment, a conical segment or a line segment, each junction is a tip or a connection, and the first indexed link and the second indexed link include a field whose value indicates whether the segment or junction is encoded in a given instance.

Brief description of the drawings

Reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 shows an illustration of an example of a path having at least one section and at least one junction that may be encoded in accordance with the principles of the present disclosure;

FIG. 2 illustrates a block diagram of an example of an edge system configured as an encoding path in accordance with the principles of the present disclosure;

FIG. 3 illustrates a block diagram of an example of a renderer configured to perform path encoding in accordance with the principles of the present disclosure;

FIG. 4 illustrates a block diagram of another example of a renderer configured to perform path encoding in accordance with the principles of the present disclosure;

FIG. 5 illustrates a flow chart of an example of a method of polar tracing using an encoded path constructed in accordance with the principles of the present disclosure;

fig. 6, 7, 8, and 9 illustrate examples of encodings of path segments and indexed links thereof constructed in accordance with the principles of the present disclosure;

FIGS. 10-14 illustrate examples of different links from the path and encoding path of FIG. 1 in accordance with the principles of the present disclosure;

FIG. 15 illustrates an example of encoding of the full path of FIG. 1 constructed in accordance with the principles of the present disclosure;

FIG. 16 illustrates a flowchart of an example of determining a link type from an indexed link performed in accordance with the principles of the present disclosure;

FIG. 17 illustrates a block diagram of an example of a computing device configured to display a path using polar tracing in accordance with the principles of the present disclosure; and

fig. 18 illustrates a block diagram of an example of a printer configured to utilize a stroked print path in accordance with the principles of the present disclosure.

Detailed Description

The present disclosure provides improvements for encoding paths that unify path segments and path junctions. The present disclosure employs indexed link coding to provide a unified compact representation for both path segments and path junction points. Compact representations are well suited for GPU access and GPU tessellation using, for example, a mesh shader. The compact representation is a data structure with memory efficient coding that uses indexes to de-duplicate redundant control points of a path. The data structure can be quickly constructed using the location information of the segments and joints without recursive processing. In addition, the data structure may defer (defer) the mapping from the location tip and connection type to the geometry tip and connection type until rendered. Thus, flexible rendering is provided where the process of changing the stroked width, top style, or connection style is relatively inexpensive.

A path, as used herein, is a sequence of zero or more path components referred to herein as links. Links of a path are specified by an ordered set of control points and may be path segments or path junctions. A path segment is a link from its first control point to the last control point that specifies a stroked path segment. A path junction is a link that starts or terminates a path segment if two segments are connected in sequence or if no segment is connected. A connection junction is a link that connects two path segments. A non-connection junction is a link of a section that does not connect other sections. A connection junction is also called a join (join); the non-connecting joints are also called apices (caps).

The linking advantageously provides a unified way to handle segments, vertices and connections, which is also well suited for parallel processing (e.g., by a GPU). As described above, the links have control points, and the generated curve (also referred to herein as a generation equation) is a parametric curve specified by the control points of the links. The control point is a determined two-dimensional (2D) location, designated as an (x, y) 2D coordinate pair or a (x, y, w) rational 2D coordinate triplet for a cone (rational) bezier path segment. There are two types of control points, interpolation control points and extrapolation control points. The interpolated control points are control points comprised by the segments or junction points and the extrapolated control points are control points establishing the gradient direction of the segments or junction points.

The paths may include various arrangements of different links connected together. One example is a closed link sequence, which is a sequence of connected segments in which an initial control point of an initial link and an end control point of an end link are located at the same position and share a connection junction. Thus, the closed link sequence lacks a path top. An open link sequence is another example, which is a sequence of connected segments in which the initial control point of the initial segment link and the end control point of the end segment link do not share a connection junction. Closed loop sequences are also known as contours (contours), and open link sequences are also known as trajectories. Unlike the closed link sequence, the open link sequence has a path top. The top of the path is a non-connected link that marks the beginning or end of the sequence of connected links of the path. More specifically, the initial path top is a link to an open sequence of segments that begin to join, and the end path top is a link to an open sequence of links that end to join.

The present disclosure provides a method and system for encoding paths that uniformly encodes links regardless of whether the links are segments or joints. The disclosed link encoding uses the same data structure, the link structure, to encode the sections and junctions of the path. The data structure includes the necessary location information for the links in a compact format that allows efficient decoding of the stroked edges. The location information may be a coordinate value of the link or a reference to the coordinate value. In addition to compactness, the data structure is also structured to provide an efficient parallel tessellation (and subsequent rasterization) process of the GPU. The GPU is designed to efficiently process indexed vertex data and therefore can efficiently process the disclosed compact data structures.

The data structure for compactly encoding the path may be an indexed array of links that specifies a control point for each link through a control point index to the control point coordinate array of the path. The control point coordinate array is an array of control point coordinates including the encoding path. Each indexed link is a data structure corresponding to an individual link for which the link specifies a control point as a control point index into the control point coordinate array of the encoding path. The index value, called null index value, is a special index value designated to indicate unnecessary control points. The null index value may be zero. The location of one or more null index values in the indexed links encodes the type of link. The control point coordinate array includes at least one null value, and the indexed links indicate a link type based on the presence or absence of one or more null index values corresponding to the null value.

As described above, the data structure may be compact. For example, an indexed link may have an 8-bit or 16-bit index that represents a shared interpolation control point that is "shared" by one or two sections or junctions. In this way, the linked encoded representations and the paths they form can be stored without requiring a large amount of memory. The index in the indexed links may be as small as six unsigned bytes (any path with 255 control points or less can be handled). In practice, this number of control points is sufficient for most paths of glyphs, simple logos, rounded rectangles, and other basic shapes. While a control point is typically two 32-bit floating point values (8 bytes), the six bytes of small link size is smaller than a single control point. For paths with more than 255 control points, 16-bit indices or even 32-bit indices may be used and still maintain a compact structure.

Indexing as disclosed herein also allows control points to be stored once and indexed several times. Considering that the standard case of a path is a sequence of three bezier segments connected, each three segments may have three new control points (24= 3*8 bytes) because each segment "shares" its initial control point with the end control point of the last segment. Moreover, the connection junction (connection) between each pair of connected path segments does not require an additional control point, but can index the control points from the two path segments that it is connecting. Such compactness is beneficial when drawing detailed graphics (e.g., street maps of an entire city, especially when sewer lines, gas lines, electronic lines, etc. are present). Another example of a complex pattern is a Printed Circuit Board (PCB) or chip layout.

Another advantage due to the compact data structure is that the control point coordinate array will typically be floating point x and y values (four bytes per coordinate, eight bytes per point), but may also be a 16-bit signed integer value (2 bytes per coordinate, 4 bytes per point). Thus, the size of the control point coordinate array can be halved. Furthermore, paths encoded as 16-bit integers using control points may be converted into part of the rendering (tessellation and rasterization) process to stretch/translate/project the paths into any alternative coordinate space. Advantageously, glyphs in the standard TrueType font file format are stored as 16-bit signed integer values that allow path rendering of matching fonts. In some examples, 8-bit coordinates may be stored if desired in various formats.

The stroked path tessellation process also demonstrates the compactness advantage of the disclosed data structure. For example, a quadrilateral sequence may be generated during the stroking path tessellation. For a curved link, the link may be subdivided into tens or hundreds of quadrilaterals by the curved surface. Storing a tessellation requires more memory than storing a data structure (e.g., indexed links) that generates a tessellation. Even if the line segments are stored with the connection between each connected segment. The quadrangle of each line segment will still need to be stored. This means that four 2D points are stored compared to just one, since each line segment actually adds only one new control point. Connections requiring additional control points must also be handled; particularly for circular connections.

As described above, the data structure allows efficient decoding of the stroked edges. The tracing may be a polar tracing that steps at a tangential angle with links (both segments and junctions) along the path to provide a polar tracing representation of the path. Stepping the path at tangential angles involves "solving" to determine when a link might change from clockwise to counterclockwise turning (and vice versa), and then solving in each step when the gradient of the link is perpendicular to the 90 degree rotation of each tangential angle step. This method may take a trigonometric function and solve for the line-curve intersection at each step along the path.

Polar stroked representations can be used to generate a stroked tessellation (tessellation) of paths. For example, the polar-bound stroked representation may be a sequence of polygons (e.g., quadrilaterals) representing the link, and may be used to generate a stroked tessellation. For existing methods of generating a subdivision of a traced surface using a CPU, the stepping of the tangential angle would be an expensive approach. Efficient trigonometric function evaluation (sin, cos, atan 2) of a parallel processor such as a GPU makes the solution step in tangential angle steps fully feasible. For example, because the polar-tracing method determines how many steps to take without recursive processing, the polar-tracing method maps well to the GPU tessellation and mesh shader. The entire polar-tracing method (e.g., tessellation, rasterization, and shading) may be performed by the GPU.

The disclosed polar tracing may be used to improve the performance and quality of tracing path rendering in several different areas including web browsers (scalable vector graphics (SVG)), document viewers (PDF), navigation and mapping systems, and illustration applications (Adobe Illustrator, inkscape). Polar tracing may also be used to control different machines that perform operations according to the input path. For example, a Computer Numerical Control (CNC) machine that processes material according to an input path. Polar tracing is also useful where the tracing expansion occurs in a different coordinate space than the path itself. A typical use is window space tracing (referred to as non-scaled tracing in SVG). This is advantageous for applications such as map and navigation systems where the edges are specified in pixel units (typically 1) width, so that the width of the grid lines or marks does not scale as well when zooming into a map. The polar tracing method can also handle each link of the path without special arrangements for different types of links, as with the disclosed encoding.

Turning now to the drawings, FIG. 1 illustrates a diagram of an example of a path 100 having at least one section and at least one junction encoded in accordance with the principles of the present disclosure. The path 100 includes a start tip 110, a first cubic bezier segment 120, a connection 130, a second cubic bezier segment 140, and an end tip 150. The start tip 110 and the end tip 150 are examples of non-connection joints, and the connection 130 is an example of a connection joint. The start tip 110 and the end tip 150 are examples of rounded tips. Other types of tips, such as rectangular tips, triangular tips, or even no tips, may be similarly encoded. Connection 130 is an example of a circular connection. Other types of connections may be similarly encoded, such as, for example, bevels (angles), triangles, sharp corners (miters), truncated sharp corners, and restored sharp corners (inverted miters).

Control points 161 to 167 of path 100 are also shown. Control points 161, 164, and 167 are interpolation control points that are shared between different links. Control point 161 is shared between the start tip 110 and the first cubic bezier segment 120, control point 164 is shared between the cubic bezier segment 120, the connection 130, and the second cubic bezier segment 140, and control point 167 is shared between the second cubic bezier segment 140 and the end tip 150. Advantageously, the shared control point may be indexed multiple times in the data structure and reduce the amount of storage capacity required. Control points 162, 163, 165, and 166 are all extrapolation control points.

The coordinate values of the control points 161 to 167 for the links are also shown as x, y coordinates in fig. 1. Fig. 10 to 14 show examples of different links of the path 100 and corresponding control point coordinate arrays of the path 100 including coordinate values. Fig. 10-14 also include examples of data structures, indexed links, for encoding each different link. Path 100 may be provided to a stroking system, such as that shown in FIG. 2, for generating a stroked representation of the path. The stroking system may be a polar stroking system operating in accordance with method 500 of fig. 5.

Fig. 2 illustrates a block diagram of an example of a stroking system 200 configured to encode a path in accordance with the principles of the present disclosure. The stroked system 200 may be, or be part of, a renderer that draws a stroked tessellation of paths. The stroking system 200 may be a polar stroking system that takes encoded paths for stroking. The stroking system 200 may be located on a single computing device or distributed across multiple computing devices. The computing device may be, for example, a laptop computer, a desktop computer, a computing pad, a smart phone, or a server. The computing device may include at least one screen for displaying the path. The computing device may also be a machine or used to control a machine. For example, the stroking system 200 may be associated with or integrated with a machine such as a printer that prints the path or a CNC machine that processes the material using the path. In some examples, the stroking system 200 is part of a cloud-based server that may be used for cloud-based rendering as well as for game streaming. The game stream allows users to control and play remotely rendered games from their input devices (e.g., keyboard, game controller (including virtual reality input controller) and mouse). The cloud-based rendering platform and game stream may allow users to compete remotely with others in a video game over a communication network. The stroking system 200 includes a path processor 210 and a stroking processor 220. The stroked system 200 may include more than one path processor 210 or more than one stroked processor 220. The path processor 210 may be a Central Processing Unit (CPU) or a Graphics Processing Unit (GPU). In one example, path processor 210 is a CPU and stroked processor 220 is a GPU. Advantageously, the GPU may include multiple parallel processors to allow multiple links to be processed in parallel. In some examples, path processor 210 and stroked processor 220 may be a single processor.

The stroking system 200 is configured to receive paths to be represented and generate encoded path representations. The received path may be in the form of code representing a linked generation equation for the path, such as an SVG path command. The generation equation for each link includes the control point for that link. The path may be from, for example, a Web browser, a document viewer, a navigation or map system, or an illustration application, such as a vector graphics program. The received path may be simple, such as path 100 of fig. 1, or complex, with multiple types of segments and junctions forming a sequence in multiple combinations.

The path processor 210 is configured to break up the received path into links, such as segments, vertices, and connections of the path 100, and encode the links for storage using the same data structure for each link. The data structure may be an indexed link as disclosed herein. For example, path processor 210 may receive path 100 and break path 100 down into the various segments, vertices, and connections shown in fig. 1, and encode the segments, vertices, and connections for storage. The encoded links may be stored in a memory of the stroked processor 220. In this way, path processor 210 encodes the links into a format that can be stored and read by stroked processor 220. The encoded links and control points of the links are downloaded to the stroked processor 220 to represent the path 100. Path processor 210 may be configured to perform additional processing on the link to enable the tracing before instructing tracing processor 220 to generate a tracing representation of the link. The additional processing may correspond to processing performed by the CPU 310 of fig. 3.

At this point, path processor 210 sends a command to stroked processor 220 instructing stroked processor 220 to generate a path-linked stroked representation. The description representation may be a polar coordinate description representation. Commands may be sent from path processor 210 to stroked processor 220 through a programming interface, where the commands appear as function calls. Links may be generated as primitives (e.g., patches) or as tasks. The generated polar-bound representation may be used to visually represent the path. For example, the stroked processor 220 may provide the stroked representation to a computing device screen to display the path. The computing device may be, for example, a laptop computer, a desktop computer, a computing pad, a smart phone, or another type of computing device having a screen capable of displaying a polar-shaded representation. The stroked processor 220 may also provide a stroked representation to print a path or operate a machine employing the path. For example, the stroking system 200 may be integrated with a printer that employs a stroked representation to print paths.

The stroked processor 220 may be configured to generate a stroked representation based on the encoded path generated by the path processor 210. The stroking processor 220 may operate according to the polar stroking algorithm disclosed herein. Thus, the stroked processor 220 may effectively encode the algorithms disclosed herein, such as the algorithm represented by the flowchart of FIG. 5.

The stroked processor 220 may generate linked stroked representations in parallel. In some examples, stroked processor 220 may generate stroked representations of multiple paths in parallel. Thus, stroked processor 220 may operate on multiple paths in parallel, while also operating on multiple links of those paths in parallel. As used herein, "parallel" includes at least partially parallel and indicates that the processing occurs in parallel paths, but not necessarily simultaneously.

The stroking processor 220 may be a GPU and operate in accordance with a graphics pipeline, with certain steps of polar stroking occurring at specific stages along the graphics pipeline. The stroking processor 220 may provide stroking functions, such as polar stroking, via one or more shaders of the graphics pipeline. Alternatively, the encoded path may be stroked using other methods for stroking the path (e.g., unified parametric curve subdivision). A shader is a program that performs a particular function or functions at a particular stage of a graphics pipeline. Polar stroking shaders are examples of shaders that have been programmed to perform the polar stroking functions disclosed herein. The polar-tracing shader may perform additional functions that are typically included in a graphics pipeline, or may be performed as part of one or more shaders of the graphics pipeline. The stroked processor 220 may employ one of different examples of graphics pipelines such as those shown in fig. 3 or fig. 4.

Fig. 3 shows a block diagram of an example of a renderer 300 according to the principles of the present disclosure, the renderer 300 including a graphics pipeline configured to perform polar tracing. Renderer 300 provides an example of a system for polar tracing, such as tracing system 200 of FIG. 2. The renderer 300 renders the path using polar tracing. Renderer 300 includes a CPU 310, a GPU 320, and another hardware component, memory 330.

CPU 310 is configured to accept or receive paths, break the paths into links, encode the links using the same data structure for each link, and download the links and control points to GPU 320 via graphics commands. CPU 310 is also configured as a polar shader that binds GPU 320. Binding may include establishing a current configuration for the polar stroking shader and setting variables. CPU 310 also sets a uniform variable (unitorm) for the polar-strop shader. The value of the unified variable is unchanged during shader processing. The uniform variable is a constant over the duration of the polar stroking process. For example, the stroked width may be set to 5. Another part of the configuration may include transforming the coordinate space of the path by rotation, translation, scaling or projection. At this point, CPU 310 sends a command to GPU 320 indicating a link to the GPU 320 drawing path. Commands may be sent from the CPU 310 to the GPU 320 through a programming interface, where the commands appear as function calls. As described above, the links may be drawn as patches or tasks. Other primitives (e.g., triangles) may also be employed by the graphics pipeline for rendering.

GPU 320 includes a programmable graphics pipeline 321 for processing primitives representing paths. The primitive may be a patch and will be used as an example primitive to discuss the operation of graphics pipeline 321. Graphics pipeline 321 includes vertex fetcher 322, vertex shader 323, tessellation control shader 324, tessellation generator 325, tessellation evaluation shader 326, primitive components and rasterizer 327, and fragment shader 328. Some stages, such as vertex fetcher 322, tessellation generator 325, primitive components, and rasterizer 327, are fixed function GPU stages of graphics pipeline 321. The other illustrated stages, namely vertex shader 323, tessellation control shader 324, tessellation evaluation shader 326, and fragment shader 328, are programmable shader GPU stages of graphics pipeline 321. A GPU capable of using OpenGL 4.0, openGL for Embedded Systems (ES) 3.2, direct3D 11, or similar graphics application programming interfaces provides such programmable graphics pipeline 321 with these stages. OpenGL 4.0 and OpenGL ES 3.2 are available from Khronos Group Inc. in Bifidon, oreg, and Direct3D 11 is available from Microsoft corporation of Redmond, washington. GPUs available from Nvidia corporation of santa clara, california, such as GPUs with Volta or Pascal architecture, are examples of GPUs that may provide programmable graphics pipeline 321. As described below with reference to FIG. 5, various stages of graphics pipeline 321 may also be configured to perform the steps of polar tracing method 500.

Vertex fetcher 322 is the first stage of graphics pipeline 321 that fetches vertices of patches. Vertex shader 323 then describes the various characteristics of each vertex. Tessellation control shader 324, tessellation generator 325, and tessellation evaluation shader 326 cooperate to tessellate the patch into a triangular mesh or connected lines. Tessellation control shader 324 and tessellation evaluation shader 326 are two programmable stages for GPU tessellation, while tessellation generator 325 is a fixed-function GPU stage. Tessellation control shader 324 performs patch-wide calculations, such as calculating the level of detail (LOD) of each patch, as a first stage of GPU tessellation. Tessellation generator 325 uses the tessellation level to decompose the patch into a new set of primitives and assigns coordinates to each vertex. Tessellation evaluation shader 326 evaluates mesh vertices based on information provided by tessellation control shader 324 and tessellation generator 325. Tessellation evaluation shader 326 calculates the location of each vertex from tessellation generator 325, controls the tessellation pattern, and specifies the direction of the patch that is generated.

In the example representation of links intended for pipeline 321, a patch with six control points encodes each link. Fig. 10-15 show examples of an array of indexed links in which each indexed link includes six control points. Six control points are sufficient to index four control points of the three Bezier segments, and the other two are sufficient to index the initial and end gradient control points. Other types of links require fewer control points. A special control point index value (e.g., zero) may be used to encode a particular type of link. The skilled practitioner will recognize that such a linked representation is well suited for vertex fetcher 322 and may be compactly stored in memory.

The primitive component and rasterizer 327 divides the resulting tessellation patch generated by the tessellation evaluation shader 326 into a sequence of individual rasterized primitives (typically triangles) for rendering. Fragment shader 328 then calculates the color and other attributes of each pixel of the base patch. Memory 330 receives pixel updates from fragment shader 328 of programmable graphics pipeline 321. Memory 330 includes a frame buffer 334 that stores received pixel updates, which provides images for display. In this example, the image is a stroked tessellation of the path. In some examples, memory 330 is a video memory in which a series of tessellations of a tracing are encoded into a video stream.

The key details to complete tessellation appropriate for the path tracing from programmable graphics pipeline 321 are not apparent. Tessellation generator 325 typically generates a dense rectangular 2D grid whose width and height are limited to 64 on one side. Tessellation of the stroked path segments, vertices, or connections typically requires tessellation into elongated quadrilaterals (sometimes 100s long), rather than a dense grid. To accurately subdivide links that require a large number of subdivisions, the subdivided strips may need to be many times longer than the maximum width or height (typically 64 for any one) of the dense grid that subdivision generator 325 can generate. A non-obvious technique (referred to herein as NaN poisoning) (denoted non-numeric or NaN, an invalid floating point value) divides a dense grid into appropriate (possibly long) strips to trace arbitrary links. In an example use of programmable graphics pipeline 321, a polar-strop shader executing on tessellation evaluation shader 326 generates NaN values for the locations of vertices of triangles to discard. The primitive component and rasterizer 327 is unable to process rasterized primitives having one or more NaN location values, and therefore any such "NaN-poisoned" primitives must be discarded. The remaining non-discarded triangles have (no NaN) vertex positions calculated by tessellation evaluation shader 326, so that when processed by primitive components and rasterizer 327, the triangles will stitch together into a strip to form a continuous triangle strip corresponding to the intended tessellation. Arranging NaN poisoning and stripe seams involves a polar-stropping shader running on tessellation control shader 324 to feed appropriate grids and related parameters to tessellation generator 325 and tessellation evaluation shader 326.

Fig. 4 shows a block diagram of another example of a renderer 400 including a graphics pipeline configured to perform polar tracing in accordance with the principles of the present disclosure. Renderer 400 provides another example of a system for polar tracing. Renderer 400 includes a CPU 410, a GPU 420, and a memory 430.GPU 420 includes a graphics pipeline 421, which graphics pipeline 421, like graphics pipeline 321 of GPU 320 in FIG. 3, similarly provides tessellation of linked edges. However, the GPU tessellation of graphics pipeline 421 is provided by two programmable stages, by task shader 424 and grid shader 426, rather than tessellation control shader 324, tessellation generator 325, and tessellation evaluation shader 326 of graphics pipeline 321. The graphics pipeline 421 and other components of the renderer 400 may be configured and operate as identically named components of the graphics pipeline 321 and renderer 300 of FIG. 3. Thus, fragment shader 428 is another programmable shader GPU stage, and primitive components and rasterizer 427 are fixed function GPU stages. GPUs available from Nvidia corporation, such as GPUs with a Turing architecture, are one example of GPUs that can be used for programmable graphics pipeline 421. Path processor 210 of FIG. 2 may operate as CPU 310 of FIG. 3 and CPU 410 of FIG. 4. While graphics pipeline 321 operates on patches representing each link, graphics pipeline 421 operates on tasks that may represent one or more links, and also generates spawn grid shader instances to generate the necessary tessellation.

Task shader 424 is programmed to perform the functions of vertex shader 323 and tessellation control shader 324 of fig. 3. Thus, unlike FIG. 3, task shader 424 determines the various characteristics of each vertex for its one or more links and reads the vertex data itself, which in FIG. 3 pulls the vertex via fixed function vertex fetcher 322. Task shader 424 then performs computations within the patch-wide (patch-wide) as the first stage of GPU tessellation, similar to tessellation control shader 324.

Grid shader 426 is configured to perform the remaining GPU tessellation functions, including decomposing one or more links into a new set of primitives by polar tracing, assigning coordinates to each vertex, and evaluating the grid vertices. Mesh shader 426 is also configured to calculate the position of each vertex and control the tessellation pattern of the output mesh. The primitive component and rasterizer 427 then divides the resulting mesh into a sequence of individual triangles for rendering, and the fragment shader 428 calculates the color and other attributes of each pixel of the base link. The pixel updates are then provided to a frame buffer 434 of memory 430 for display of the stroked tessellation of the path. As noted below with reference to FIG. 5, the task shader 424 and the mesh shader 426 may also be configured to perform the steps of the polar tracing method 500.

FIG. 5 illustrates a flow chart of an example of a polar tracing method 500 for generating a polar tracing representation using the encoded paths disclosed herein. Polar stroked representations may be used for stroking tessellation. As such, some steps of method 500 may be mapped to a GPU such as GPU 320 or GPU 420. As described below, different stages of programmable graphics pipelines 321 and 421 may be configured to perform at least some of the steps or particular functions of polar tracing method 500. At least some of the steps of method 500 may also be performed by the stroking system 200 of fig. 2.

The method 500 basically includes two steps: a polar-middle is determined for each link of the path and a polygon used to generate a polar-description representation of each link is evaluated using the polar-middle. For method 500, a quadrilateral will be used as an example polygon. The method 500 begins with a receive path at step 515. The path may be a pre-processed path, such as a path received from the path processor 210 of fig. 2.

The method 500 proceeds to step 516 where it is determined whether there is a link to the path to be processed. The link may be a section or a junction. The number of links and the type of links will vary depending on the path. For the initial operation of method 500, there will be at least one link to the path to be processed. When there is no additional link to the path to be processed, the method 500 continues to step 590 and ends.

When there is a link (i.e., an initial link or a next link) to the path to be processed, the method 500 continues to step 518 where the type and index of the link are read. The type and index of the link may be read from the indexed links representing the path. The type of link may be, for example, a section, a tip, or a connection represented by the link of path 100. For example, the links may be a start tip, an end tip, or a connection, such as a pointed or beveled connection. The index of the link indicates the beginning and end of the link.

In step 520, the linked control points are read. The control points may be determined from the indexed links of each link that index into the path's coordinate control point array. As described above, each link has a generation equation that includes a control point defining the link. For method 500, the characterization of the link includes the link type, index, generate equations, and control points. With respect to programmable graphics pipeline 321, steps 518 and 520 may be performed by vertex fetcher 322.

In some cases, such as window space tracing, the control points are also transformed as needed in step 530. The transformation control points take into account any rotation, translation, scaling or perspective transformation for the polar-shaded representation of the path. With respect to programmable graphics pipeline 321, step 530 may be performed by vertex shader 323, while step 540 below may be performed by tessellation control shader 324.

In step 540, the linked polar-tracing middle is calculated. The polar-tracing mid-position may be calculated from the control point using the arc tangent. The polar-tracing middle position includes N, p, ψ, delta _Σ . N is the polar-shaded of the link representing the number of quadrilaterals required. p is an ordered sequence of parameter values t defining the link. The first p of the sequence is always zero, while the last p of the sequence is always 1. Each intermediate bit p between the first p and the last p is where the inflection point of the link is located. The inflection point is where the link changes the bending direction. The number of inflection points may vary depending on the type of link. For example, a cubic bezier curve may have a maximum of two inflection points.

ψ is the tangential angle corresponding to each element p of the ordered sequence. For the first p, ψ indicates the angle at which the link was originally oriented. For the last p, ψ indicates the angle at which the link terminates. For each intermediate bit p, ψ indicates the tangent angle of its respective inflection point.

Delta is the number of degrees to step along the different intervals of the link between inflection points, and delta _Σ Is the cumulative number of integer steps to take along each interval of the link. N, p, ψ, δ, Δ _Σ Is any symbol used to represent the characteristics of the links available for polar tracing. These polar stroked intermediate values can be calculated by those skilled in the art of differential geometry. For example, the sagittal curve of the linked generation equation may be used to determine at least some polar stroked intermediate values.

Once the polar-tracing intermediate bits are obtained, they are used to determine the quadrilateral. Determining the quadrilateral is an iterative process that begins at step 550 and proceeds to step 560 by selecting a rib (rib). The rib is one side of a quadrilateral having a length equal to the traced width of the path. A pair of consecutive ribs may form a quadrilateral. For the initial rib of the rib pair, the index value may be set to zero. The position and normal of the rib are evaluated in step 570 and the apex of the rib is generated in step 572. With respect to programmable graphics pipeline 321, steps 550 and 560 may be performed by tessellation generator 325, and steps 570 and 572 may be performed by tessellation evaluation shader 326. Each rib is independent and can be processed in parallel.

In step 574, a determination is made as to whether a pair of ribs has been evaluated. For the initial rib, a determination may be made as to whether more than one rib is selected for the link. As shown in fig. 5, the determination may be made by comparing the current index value of the selected rib with zero. If a pair of ribs has not been evaluated, then the method 500 continues to step 580 where it is determined if there are more ribs linked to process at step 580. When there are no additional ribs linked to process, the method 500 continues to step 590 and ends. For the first pass through the iterative rib process, there will be another rib to process. When there is at least one rib to process, the method 500 returns to step 560 and the next rib is selected. At this point, the index may be increased by one for the next rib. The position and normal of the next rib are evaluated in step 570 and the vertex of the next rib is generated in step 572. It is then determined in step 574 whether a pair of ribs has been evaluated. If not, the method 500 continues to step 580. If so, then a quadrilateral for rasterization is generated in step 576. The quadrilateral is defined by the vertices of the pair of ribs. The quadrangle may be provided to a rasterizer, such as the primitive components and rasterizers 327 or 427 of fig. 3-4. Alternatively, the quadrangle may be split and represented as two triangles sharing a common edge. Method 500 continues from step 576 to step 580 and on. The index of the ribs may be reset to zero, for example, in steps 576 or 580, to further indicate rib pairs during the iteration. Other counters or comparison values may also be used to determine rib pairs. For example, the mesh shader approach as in FIG. 4 may generate rib pairs to match the thread parallelism of the mesh shader instances.

The step of generating the vertices of the ribs and then generating the quadrangle is repeated for each rib linked. When it is determined in step 580 that there are no more ribs linked, the method 500 continues to step 516 where it is determined whether there is another link of the path to be processed in step 516. If the path has no more links, the method 500 continues to step 590 and ends. All generated quadrilaterals for the path links may then be used, for example, to render the path as a description subdivision. If there are more links to process, the method 500 continues to step 518 to continue with the next link. As described above, the different stages of programmable graphics pipeline 321 may be configured to perform specified steps of method 500. With respect to programmable graphics pipeline 421, task shader 424 can be configured to perform steps 518 through 550, and grid shader 426 can be configured to perform steps 560, 570, 572, 574, and 576.

Although presented as an iterative process, all rib iterations may operate independently, and thus at least part of method 500 may be performed in parallel on, for example, a GPU. Multiple processing groups of ribs may be evaluated in parallel, and one or more GPUs may be used to process the linked multiple processing groups in parallel. In one example, a sequence of 32 ribs is evaluated in parallel. Furthermore, several such sequences of up to 32 ribs can be evaluated simultaneously in parallel. In some examples, ribs from eight links are processed simultaneously.

As described above, the method 500 may also be used to generate the tip and connection. The top in the vector graphics system may be circular, square, triangular or omitted. In polar tracing, the tip is treated as a degenerate link where the control points are all co-located at the anchor point of the tip. The intermediate positions N, p, ψ, delta of the polar coordinate tracing edge can be calculated _Σ So that the same rib iterative process applied to the curved segment can be used to generate the tip geometry. The tip is complicated by distinguishing between an "inside" radius and an "outside" radius, so the inside radius is typically forced to zero for the tip. Square tips are more complex by scaling the outer radius of the ribs at the corners of the square tip by the square root of 2 (1.414 …). These increases in rib processing due to the tip are straightforward and impose minimal overhead on non-tip chained rib processing.

Similarly, the connections in the vector graphics system may be circular, beveled, pointed, threeAngled or omitted. In polar tracing, the connection is treated as a degenerate link in which the control points are all co-located at the junction of the connection. The intermediate positions N, p, ψ, delta of the polar coordinate tracing edge can be calculated _Σ So that the same rib iterative process applied to the curved segment can be used to generate the tip geometry. As with the tip, the connection becomes complex by distinguishing between "inside" and "outside" radii, so for connection, the inside radius is typically forced to zero. By calculating the sharp points of such a connection, and if the sharp points exceed the specified sharp limit of the path (depending on the sharp connection pattern), then truncating the sharp or reverting to a sharp connection can make the sharp connection more complex. The complexity of the rib processing due to the join is straightforward and minimal overhead is imposed on the non-join linked rib processing.

Various examples of path segments are shown in fig. 6-9 to display representations of path segments as data structures referencing control point coordinate arrays for particular segments and used to encode each different segment. In fig. 6 to 9, the control point coordinate array includes a combination of null values and coordinate values of control points of the sections. Each of the example data structures of fig. 6-9 is an indexed link. The indexed links in fig. 6-9 have six coordinate indexes designated as indexes 0 through 5, with four of the six indexes being designated for position control points of different path segments and two indexes being designated for gradient control points of different path segments. The position control point index refers to the coordinate value of the path segment in the control point coordinate array, and the gradient control point index refers to the coordinate value of the gradient control point of the path segment. The type of each link is compactly encoded with a null value, as subsequently disclosed in fig. 16, so the path segment data structure advantageously does not require other data than its index.

Fig. 6 shows a cubic bezier segment 600, a corresponding control point coordinate array 610 and an indexed link 620. The cubic Bessel section 600 includes four control points, represented as a first control point 602, a second control point 604, a third control point 606, and a fifth control point 608, respectively, each having coordinate values stored in a control point coordinate array 610. The control point coordinate array 610 has ten index slots or indexes including the coordinate values of the first, second, third and fourth control points 602, 604, 606 and 608 in indexes 2 to 9, and null values in indexes 0 to 1. The position control point indices 0 through 3 of indexed link 620 reference indices 2, 4, 6, and 8 of control point coordinate array 610. The gradient control point indices 4 to 5 of the indexed link 620 reference the indices 4 and 6 of the control point coordinate array 610, which are coordinate values of gradient control points of the cubic bezier segment 600.

Fig. 7 shows a (irrational) quadratic bezier segment 700, a corresponding control point coordinate array 710 and an indexed link 720. The (irrational) quadratic bezier field 700 includes three control points, denoted as a first control point 702, a second control point 704 and a third control point 706, respectively, each having coordinate values stored in a control point coordinate array 710. The control point coordinate array 710 has eight indexes including coordinate values of the first, second, and third control points 702, 704, and 706 in indexes 2 to 7, and null values in indexes 0 to 1. The position control point indices 0 through 3 of the indexed link 720 reference indices 2, 4, 0 (null) and 6 of the control point coordinate array 710. The position control point index 2, pointing to the 0 (null) index value in the control point coordinate array 7120, encodes the segment twice, rather than three times, and reflects the fact that the quadratic bezier curve segment requires only three control points. The gradient control point indices 4 through 5 of the indexed link 720 all reference index 4 of the control point coordinate array 710, which is the coordinate value of a single gradient control point of the (irrational) quadratic bezier segment 700. As will be clear when discussing fig. 8, it is advantageous that the index of the second control point 704 is an even value (4) to specify that the section is an irrational quadratic bezier section instead of a rational quadratic bezier section.

As shown in fig. 7, by assigning a null index to index 2 of indexed link 720, indexed link 720 is identified as a secondary bezier segment requiring three (rather than four) control points. Fig. 8 shows an example of a cone (rational quadratic bezier) segment 800, in this case an elliptical arc, encoded by the null index of index 2 and the odd vertex index (5) of index 1 of the indexed link 820, indicating that the extrapolated control point of the cone segment should be the (x, y, w) position, rather than the simple (x, y) and properly acquired and transformed. Thus, the combination of the odd index of index 2 (index 5 of control point array 810) and the null index of index 1 indicates that the segment encoded by indexed link 820 is not only a conventional (irrational) quadratic bezier segment, but also a tapered segment (which is a rational quadratic bezier segment). In addition to the tapered section 800 and indexed links 820, FIG. 8 also includes a control point coordinate array 810.

The tapered section 800 includes three control points, represented as a first control point 802, a second control point 804, and a third control point 806, respectively, each having coordinate values stored in a control point coordinate array 810. Those skilled in the art will recognize values encoding rational quadratic bezier segments, as such rational segments can accurately represent cones including circular arcs, elliptical arcs, and hyperbolas, as opposed to irrational quadratic bezier segments that are limited to representing parabolic segments. Since any rational quadratic bezier curve of the encoded cone can be normalized so that only the second control point is rational, the encoding of rational quadratic bezier segments requires a second control point supporting three components (x, y, w). The control point coordinate array 810 has ten indexes including the coordinate values of the first control point 802 in indexes 2 to 3, the coordinate values of the second and third control points 804 and 806 in indexes 5 to 9, and null values in indexes 0 to 1. The control point coordinate array 810 does not provide a specific value for index 4 because even index value 4 is skipped and index 5 (odd) is used instead to designate the segment as a rational quadratic bezier segment and to encode the three-component homogeneous coordinates of the second control point 804. The skilled practitioner will recognize how this encoding effectively distinguishes irrational (even index) and rational (odd index) quadratic bezier segments and allows for a second control point 804 of three components (x, y, w). The position control point indices 0 through 3 of the indexed link 820 reference indices 2, 5, 0 (null) and 8 of the control point coordinate array 810. The gradient control point indices 4 through 5 of the indexed link 820 reference index 5 of the control point coordinate array 810, which are coordinate values of a single gradient control point of the tapered section 800.

Fig. 9 shows a line segment 900, a corresponding control point coordinate array 910, and an indexed link 920. The (irrational) quadratic bezier segment 900 includes three control points, denoted as a first control point 902 and a second control point 904, respectively, each having coordinate values stored in a control point coordinate array 910. The control point coordinate array 910 has six indexes including coordinate values of the first control point 902 and the second control point 904 and null values in indexes 0 to 1. The position control point indices 0 through 3 of indexed link 920 reference indices 2 and 4 of control point coordinate array 910. Gradient control point indices 4 through 5 of indexed link 920 reference indices 4 and 2 of control point coordinate array 910. The skilled practitioner will recognize that any encoding of the coordinate values of indexes 2 and 4 in the indexed linked index values 1 and 2 will also result in a line segment.

Although fig. 6-9 illustrate examples of path segments and control point coordinate arrays and indexed links for each of the various path segments. Fig. 10-14 illustrate an example of a path 100, individual links of the path 100, a control point coordinate array 1010 for the path 100, and an example of an indexed link for a particular link of the path 100 referencing the control point coordinate array. The control point coordinate array 1010 includes sixteen indexes, where indexes 2 to 15 include control point coordinate values of control points of the path 100, and indexes 0 to 1 have null values. The indexed links of fig. 10-14 include six indexes that reference a particular index of the control point coordinate array 1010 to encode a particular link of the path 100. Fig. 10-14 show the same data structure for all links of the encoded path 100, including segments and joints.

Fig. 10 shows an indexed link 1020 for the start top 110 of the encoding path 100. Index 2 of indexed link 1020 references index 2 of control point coordinate array 1010, which includes the first coordinates of first control point 161 of path 100. The remaining control point indices 1 through 3 (and index 5) of indexed link 1020 reference index 0 and null values of control point coordinate array 1010. Index 4 references index 4 of the control point coordinate array 1010 and the first coordinate value of the gradient control point 162.

Fig. 11 shows an indexed link 1120 for a section 120 of the encoding path 100. Indexes 0 through 3 of indexed link 1120 reference indexes 2, 4, 6, and 8 of control point coordinate array 1010, which include the first coordinates of four control points 161, 162, 163, and 164 of section 120. Index 4-5 references indices 4 and 6 of control point coordinate array 1010 and the first coordinate values of gradient control points 162 and 163 of section 120.

Fig. 12 shows an indexed link 1220 for the connection 130 of the encoding path 100. Indexes 0 and 2 through 3 of the indexed link 1220 reference index 8 of the control point coordinate array 1010 including the first coordinates of the control point 164. Index 1 references index 0 of control point coordinate array 1010 and the null value stored therein. Indexes 4-5 reference the first coordinate values of the gradient control points 163 and 164 and indexes 6 and 10 of the control point coordinate array 1010.

Fig. 13 shows an indexed link 1320 for encoding a section 140 of the path 100. Indexes 0 through 3 of the indexed link 1320 reference indexes 8, 10, 12, and 14 of the control point coordinate array 1010 including the first coordinates of the four control points 164, 165, 166, and 167 of the section 140; indexes 4-5 reference the first coordinate values of the gradient control points 165 and 166 of the section 140 and the indexes 10 and 12 of the control point coordinate array 1010.

Fig. 14 shows an indexed link 1420 for encoding the end tip 150 of the path 100. Indexes 0 and 2 of the indexed link 1420 reference the index 14 of the control point coordinate array 1010, which includes the first coordinates of the final control point 167. The remaining control point indices 1 and 3 (and index 5) of the indexed link 1420 reference index 0 and null values of the control point coordinate array 1010. Index 4 references index 12 of control point coordinate array 1010 and first coordinate value 166 of the gradient control point.

Fig. 15 shows an indexed link sequence 1520 of the respective indexed linked paths 100 based on each link of the paths 100 as shown in fig. 10-14. Indexed link sequence 1520 represents a complete baked (bar) sequence of five links of path 100, which along with control point coordinate array 1010 may be stored in memory and processed to render a stroked path. For example, the two arrays of FIG. 15, control point coordinate array 1010 and indexed link sequence 1520 may be stored in GPU video memory, sequentially packaged into a single buffer, and then processed by a polar edge shader, such as discussed above with respect to FIGS. 2-4, to render the edge path of path 100.

Fig. 16 illustrates a flow chart of an example of a method 1600 of determining a link type from an encoded indexed link performed in accordance with the principles of the present disclosure. Method 1600 provides an example of decoding indexed links for the (irrational) quadratic bezier segments and the tapered (rational quadratic bezier) segments in fig. 7 and 8, respectively. Method 1600 also decodes the start and end path top indexed links in fig. 10 and 14, and the join indexed links in fig. 12. Other methods of encoding and thus decoding the encoded indexed links are possible in accordance with the principles of the present disclosure. All indexes mentioned in method 1600 are indexed links that index stored values of the control point coordinate array. Method 1600 may be performed by a path processor, such as path processor 210 of fig. 2. The method 1600 begins at step 1601.

In step 1605, it is determined whether index 1 is empty. If not, method 1600 continues to step 1610 and in step 1610, it is determined whether index 2 is empty. If not, the method 1600 determines if the link is a three-time path segment in step 1615. If it is determined in step 1610 that index 2 is empty, method 1600 continues to step 1620 where it is determined whether index 1 is even. If so, method 1600 determines if the link is an irrational secondary path segment in step 1625. If index 1 is not even, then method 1600 determines if the link is a rational secondary (tapered) path segment in step 1630.

Returning to step 1605, if index 1 is empty, method 1600 continues to step 1640 where it is determined whether index 5 is empty. If not, method 1600 determines if the link is a connection in step 1645. If index 5 is empty, the method continues to step 1650 where it is determined if index 3 is empty at step 1650. If so, then a determination is made in step 1655 as to whether index 2 is empty. If so, method 1600 determines if the link is the top of the initial path in step 1660. If not, method 1600 determines if the link is an end path top in step 1670.

Returning to step 1650, if index 3 is not empty, method 1600 determines if index 2 is empty in step 1680. If so, method 1600 determines in step 1685 that the link is the top of the starting dashed line (dash cap). If not, method 1600 determines if the link is at the top of the end dashed line in step 1670. The skilled practitioner will recognize that certain vector graphics standards, such as XML Paper Specification (XPS), provide a different dotted line tip than the end point dotted line tip, and therefore it is advantageous to distinguish between these two types of tips.

Fig. 17 illustrates a block diagram of an example of a computing device 1700 configured to display a path in accordance with the principles of the present disclosure. Path 100 is used as an example. Computing device 1700 may be, for example, a laptop computer, a desktop computer, a computing pad, a television (including a set-top box), or a smart phone. Computing device 1700 includes a stroking system 1710 and a screen 1720. Computing device 1700 may also include additional components, such as a frame buffer, typically included in a computing device configured to display images on its screen. The stroking system 1710 may be configured to operate as stroking system 200, renderer 300, renderer 400, or according to the stroking methods disclosed herein. The stroking system 1710 generates a representation of the path 100 and provides the representation to the screen 1720 to display the path 100. These representations may be tessellated geometric primitives. Screen 1720 may be a conventional screen of a computing device for displaying images.

Fig. 18 illustrates a block diagram of an example of a printer 1800 configured to utilize a stroked print path in accordance with the principles of the present disclosure. Path 100 is used as an example path. Printer 1800 includes a stroking system 1810, a controller 1820, and a printing mechanism 1830. The printer 1800 may also include additional components typically included in printers configured to print images. The stroking system 1810 may be configured to operate as the stroking system 200, the renderer 300, the renderer 400, or according to the polar stroking methods disclosed herein. The stroking system 1810 generates a stroked representation of the path 100, e.g., a geometric primitive of a curve subdivision, and provides the stroked representation to the controller 1820. The controller 1820 employs the description representation to generate a print command to instruct the print mechanism 1830 to print the path 100 based on the description representation. The printing mechanism 1830 may be a conventional component of a printer, such as a pen for printing images. The printed path 100 is shown on a sheet of paper 1840.

Portions of the above-described apparatus, systems, or methods may be embodied in, or executed by, various digital data processors or computers in which the computer is programmed or an executable program storing a series of software instructions to perform one or more steps of the method. The software instructions of such programs may represent algorithms and are encoded in machine-executable form on non-transitory digital data storage media, such as magnetic or optical disks, random Access Memory (RAM), magnetic hard disks, flash memory, and/or read-only memory (ROM), to enable various types of digital data processors or computers to perform one, more, or all of the steps of one or more of the methods or functions, systems, or devices described herein. The data storage medium may be part of or associated with a digital data processor or computer.

The digital data processor or computer may include one or more GPUs, one or more CPUs, one or more other processor types, or combinations thereof. The digital data processor and computer may be located adjacent to each other, in the vicinity of a user, in a cloud environment, in a data center, or in a combination thereof. For example, certain components may be located near a user, while certain components may be located in a cloud environment or a data center.

The GPU may be embodied on a single semiconductor substrate that is included in a system having one or more other devices (e.g., additional GPUs, memory, and CPUs). The GPU may be included on a graphics card that includes one or more memory devices and is configured to interface with a motherboard of a computer. The GPU may be an Integrated GPU (iGPU) that is co-located with the CPU on a single chip. An apparatus, e.g., designed, constructed, or programmed with a configuration of necessary logic and/or features for performing one or more tasks.

Various aspects of the disclosure, including the systems and methods indicated in the summary may be claimed. Each aspect mentioned in the summary may have one or more elements of the dependent claims presented below in combination.

Those skilled in the art to which the present application relates will appreciate that other and further additions, deletions, substitutions and modifications may be made to the described embodiments.

Claims (40)

1. A method of encoding a path, comprising:

receiving a path having a plurality of links, wherein the links include at least one section and at least one junction; and

an encoded path is generated by encoding the links based on the location information of the links, wherein the encoding employs the same data structure for each of the links.

2. The method of claim 1, wherein the data structure is an indexed link specifying a control point for each of the links by a control point index into a control point coordinate array.

3. The method of claim 2, wherein the control point coordinate array includes at least one null value.

4. A method as claimed in claim 3, wherein the indexed links comprise at least six control point indexes.

5. The method of claim 3, wherein the indexed links indicate link types based on the presence or absence of null index values.

6. The method of claim 2, wherein receiving the path comprises: the control point for the link of the path is received, and the method further comprises: generating the control point coordinate array of the path from the coordinates of the control point.

7. The method of claim 1, wherein the link comprises at least two sections selected from a list consisting of: a cubic bezier segment, a quadratic bezier segment, a conical segment, and a line segment.

8. The method of claim 1, wherein the junction is a connection.

9. The method of claim 1, wherein the junction is a tip.

10. The method of claim 1, further comprising subdividing the encoded path surface into geometric primitives corresponding to a stroked area of the path with a stroked processor.

11. The method of claim 10, wherein the stroked processor is a Graphics Processing Unit (GPU).

12. The method of claim 11, wherein the GPU rasterizes tessellated geometric primitives into a frame buffer.

13. The method of claim 11, wherein the tessellation is performed by a programmable GPU tessellation shader executing on the GPU.

14. The method of claim 11, wherein the tessellation is performed by a mesh shader executing on the GPU.

15. A tracing system for a path, comprising:

A path processor configured to break up a path into links and encode the links, wherein the links include at least one section and at least one junction, wherein the path processor is configured to encode the path with the same data structure for each of the links; and

an edge processor configured to tessellate the encoded path surface into geometric primitives corresponding to an edge region of the path.

16. The system of claim 15, wherein the data structure is an indexed link that specifies a control point for each of the links by a control point index into a control point coordinate array of the path.

17. The system of claim 16, wherein the path processor is configured to generate the control point coordinate array from coordinates of the control point.

18. The system of claim 16, wherein the control point coordinate array includes at least one null value and the indexed links indicate a link type based on the presence or absence of a null index value.

19. The system of claim 15, wherein the at least one segment is a cubic bezier segment, a quadratic bezier segment, a tapered segment, or a line segment, and the at least one junction is a connection or a tip.

20. The system of claim 15, wherein the stroked processor is a Graphics Processing Unit (GPU).

21. The system of claim 20, wherein the GPU is further configured to rasterize tessellated geometric primitives into a frame buffer.

22. The system of claim 20, wherein a programmable GPU tessellation shader executing on the GPU is configured to tessellate the encoded path into the geometric primitives.

23. The system of claim 20, wherein a vertex shader executing on the GPU is configured to subdivide the encoded path curved surface into the geometric primitives.

24. The system of claim 20, wherein the geometric primitive is a polygon.

25. The system of claim 24, wherein the polygon is a quadrilateral.

26. A computing device comprising the system of claim 20 and a screen configured to display an image of the path based on the geometric primitive.

27. The computing device of claim 26, wherein the computing device is a smart phone.

28. A printer comprising the system of claim 20 and a printing mechanism configured to print the path based on the geometric primitives.

29. A renderer, comprising:

a first processor configured to decompose a path into links and encode the links as indexed links, wherein the links include one or more sections and one or more junctions; and

a second processor configured to generate a description tessellation of the path based on a polar description representation of each of the links using the indexed links.

30. The renderer as recited in claim 29, wherein the first processor comprises a Central Processing Unit (CPU) and the second processor comprises a Graphics Processing Unit (GPU).

31. The renderer as recited in claim 30, wherein the GPU comprises a programmable graphics pipeline having a programmable shader stage and a fixed function stage configured to generate the polar-description representation, wherein the programmable shader stage comprises at least one polar-description shader.

32. The renderer as recited in claim 29, wherein said indexed links specify control points for each of said links by a control point index into a control point coordinate array.

33. The renderer as recited in claim 32, wherein said control point coordinate array comprises at least two null values and coordinates of said linked control points.

34. The renderer as recited in claim 29, wherein the indexed links indicate a link type based on the presence or absence of one or more null index values.

35. The renderer as recited in claim 29, wherein the link comprises a section that is a cubic bezier section, a quadratic bezier section, a conical section, or a line segment, and a junction that is a start tip, an end tip, or a connection.

36. The renderer as recited in claim 29, wherein each of said linked polar-shaded representations is a sequence of quadrilaterals.

37. A method of determining a type of link for a path from a data structure, comprising:

analyzing a data structure encoding a link, the data structure having a plurality of indexes referencing an array of control point coordinates corresponding to the link; and

the type of the link is determined based on at least one index null value for which at least one of the indexes exists.

38. The method of claim 37, wherein the type is a segment or a junction.

39. The method of claim 37, wherein the type is based on a presence of a plurality of indexes having index nulls.

40. A method of encoding a path comprising a plurality of segments and a plurality of junctions connecting respective consecutive adjacent pairs of the segments, the method comprising:

encoding, for each of the segments, the segment into a first indexed link using the same representation format for each of the segments; and

for each splice point, and using the same representation format, encoding the splice point into a second indexed link;

wherein each segment is a cubic bezier segment, a quadratic bezier segment, a conical segment or a segment;

wherein each junction is a tip or a junction; and

wherein the first indexed link and the second indexed link include a field whose value indicates whether a section or a junction is encoded in a given instance.