CN113037372A - Time-triggered passive optical bus and implementation method thereof - Google Patents

Time-triggered passive optical bus and implementation method thereof Download PDF

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CN113037372A
CN113037372A CN202110275633.3A CN202110275633A CN113037372A CN 113037372 A CN113037372 A CN 113037372A CN 202110275633 A CN202110275633 A CN 202110275633A CN 113037372 A CN113037372 A CN 113037372A
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optical bus
optical
frame
time
bus connector
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CN113037372B (en
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彭逸飞
涂晓东
牛萌
李港
刘坤
谢军
张超
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University of Electronic Science and Technology of China
Xian Flight Automatic Control Research Institute of AVIC
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University of Electronic Science and Technology of China
Xian Flight Automatic Control Research Institute of AVIC
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0795Performance monitoring; Measurement of transmission parameters

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Abstract

The invention discloses a time-triggered passive optical bus and an implementation method thereof, relates to the field of optical-based time-triggered buses, and aims to provide a bus which is light in weight and avoids collision in a cold start stage, wherein the bus comprises a first optical bus connector, a second optical bus connector, a plurality of optical bus terminal controllers, a first optical splitter and a second optical splitter; each optical bus terminal controller is provided with two ports, and the two ports are respectively connected to two optical splitters; each optical bus connector is provided with 2 optical fiber ports, one port of each first optical bus connector is connected with a first optical splitter, one port of each second optical bus connector is connected with a second optical splitter, and the other port of each first optical bus connector is connected with the other port of each second optical bus connector.

Description

Time-triggered passive optical bus and implementation method thereof
Technical Field
The invention relates to the field of light-based time-triggered buses, in particular to a time-triggered passive optical bus and an implementation method thereof.
Background
The optical fiber is called optical fiber for short. Optical fiber communication is a communication mode in which light waves are used as information carriers and optical fibers are used as transmission media. In principle, the basic material elements constituting optical fiber communication are an optical fiber, a light source, and a photodetector. Optical fiber communication is a communication method that uses light waves as carrier waves and optical fibers as transmission media to transmit information from one place to another, and is called "wired" optical communication. Nowadays, optical fiber has become the main transmission mode in world communication due to its wide transmission band, high interference immunity and reduced signal attenuation, which is far superior to the transmission of cable and microwave communication.
The communication organization of TTA (Time-Triggered Architecture) is realized by TDMA (Time Division Multiple access), and each communication device transmits information in a Time slot (slot) specified on a Time axis. The TTA architecture is based on a global synchronous clock, and adopts a pre-designed static global scheduling list to drive the data transmission of the TDMA mode, and is irrelevant to external events. This transmission mode enables the TTA to provide data transfer services between devices with minimal jitter and predictable latency, and avoids bus collisions. There are many techniques for implementing the time-triggered architecture in the prior art, wherein patent number CN103850802A, patent name: the patent of an electronic controller and a FADEC system based on a time triggered protocol TTP/C bus discloses an electronic controller based on a TTP/C bus, and the connection relation between the controller and various functional modules, and realizes TTP/C bus redundancy, time synchronization function completion and function inter-daughter board data exchange through the electronic controller of the TTP/C bus.
At present, a TTP/C protocol is mostly adopted for a time triggered architecture bus protocol and is completed by taking a cable as a medium. However, in a general cable link such as RS485, the rate of the CAN is limited, and it is difficult to meet the requirement of high-speed data transmission. Meanwhile, the cable is heavier than the optical fiber, and the overlong cable can increase the overall weight of the machine body. And due to the characteristics of the bus, collision avoidance also becomes a consideration. The Configuration of Configuration Data is cumbersome and requires device-by-device Configuration.
Disclosure of Invention
The invention discloses a time-triggered passive optical bus, and aims to provide a bus which is light in weight, improves bandwidth and avoids collision in a cold start stage.
In order to solve the problems, the invention adopts the following technical scheme:
a time-triggered passive optical bus comprises a first optical bus connector, a second optical bus connector, a plurality of optical bus terminal controllers, a first optical splitter and a second optical splitter; each optical bus terminal controller is provided with two ports which are respectively connected to the first optical splitter and the second optical splitter; each optical bus connector has 2 optical fiber ports, one port of the first optical bus connector is connected with the first optical splitter, one port of the second optical bus connector is connected with the second optical splitter, and the other port of the first optical bus connector is connected with the other port of the second optical bus connector.
The optical bus connectors are all provided with optical bus connector state control units, and the optical bus terminal controllers are all provided with optical bus terminal controller state control units.
The invention also discloses a method for realizing the time-triggered passive optical bus, which is applied to the time-triggered passive optical bus, wherein the bus comprises two optical bus connectors, a plurality of optical bus terminal controllers and two optical splitters, the optical bus connectors are respectively provided with an optical bus connector state control unit, the optical bus terminal controllers are respectively provided with an optical bus terminal controller state control unit, the two optical bus connectors are respectively marked as a first optical bus connector and a second optical bus connector, and the two optical splitters are respectively marked as a first optical splitter and a second optical splitter, and the method comprises the following steps:
s1: the device comprises an initialization device, a state control unit of an optical bus connector and a state control unit of an optical bus terminal controller are loaded;
s2: opening the state control logic of the state control unit of the optical bus connector or the state control unit of the optical bus terminal controller;
s3: waiting for generating a link topology and waiting for the completion of link time parameter measurement;
s4: completing the configuration of the optical bus terminal controller and completing the cold start process;
s5: and maintaining the link topology, and transmitting OTTB _ FRAME.
Preferably, the state control logic of the optical bus connector state control unit comprises the steps of,
step 010: the method comprises the steps that a first optical bus connector is used for sending configuration data in a default mode, the configuration data are issued to each node through a first optical splitter, a second optical bus connector forwards the configuration data from the first optical bus connector to a second optical splitter, measurement of link delay information of the second optical splitter is completed, a local member vector is set to be 0, a local Clock of initialization equipment is set to be 0, a local Clock is used globally, and the local Clock takes Micro Clock as a minimum Clock period;
step 020: the first optical bus connector circularly sends T _ SYNC _ FRAME FRAMEs to the connected first optical splitter and the second optical bus connector, the two optical bus connectors respectively record the sending time T1 of the T _ SYNC _ FRAME FRAMEs, and meanwhile, timing is started to wait for the response of corresponding equipment or response timeout; the method comprises the steps that an optical bus connector receives an N _ RESP _ FRAME FRAME of corresponding equipment, timing is stopped, the time T2 of the current N _ RESP _ FRAME FRAME is recorded, two optical bus connectors respectively calculate a link delay parameter T _ wiredelay which is (T2-T1-T _ cost)/2, wherein T _ cost is the time spent by an optical bus terminal controller in processing T _ SYNC _ FRAME;
step 030: waiting for the completion of traversal detection of all network equipment in the current network, and sending configuration information and link delay parameters obtained by respectively measuring two optical splitters to an optical bus terminal controller;
step 040: populating a member vector field in an ALLOW _ COLDSTART _ FRAME FRAME with a local member vector;
step 050: detecting and maintaining topology;
the state control logic of the state control unit of the optical bus terminal controller comprises the following steps:
step 110: setting member vectors of all devices, setting the corresponding position of the self Membership Flag to be 1, setting other positions to be 0, and initializing a local clock of the device to be 0;
step 120: monitoring whether T _ SYNC _ FRAME FRAMEs from the optical bus connectors exist on the two links respectively, wherein member vectors in the FRAMEs are the same as member vector values of equipment, synchronizing local clocks by using time information of the T _ SYNC _ FRAME FRAMEs sent by the first optical bus connector, processing the T _ SYNC _ FRAME FRAMEs of the two links respectively, and sending a response message N _ RESP _ FRAME through any link immediately after receiving the T _ SYNC _ FRAME FRAMEs;
step 130: the optical bus terminal controller which completes the response monitors the configuration information of the optical bus terminal controller on the link, and after the configuration information of the optical bus terminal controller is verified, if the verification passes the recovery CON _ ACK, the recovery CON _ FAIL is carried out;
step 140: after monitoring an all _ COLDSTART _ FRAME FRAME, all the optical bus terminal controllers receive a member vector containing a current network GLOBAL view, so far, the cold start process is completed, all the optical bus terminal controllers receiving the all _ COLDSTART _ FRAME FRAME set a local clock to be a link delay relative to an optical bus connector, simultaneously set the current integration period to be 0, reset the local clock to be 0 after reaching a GLOBAL TIME GLOBAL _ RESTART _ POINT _ TIME, and then realize normal communication according to configuration information;
step 150: and each optical bus terminal controller forming the group sends TIME _ TRIGGER _ FRAME TIME TRIGGER flow according to a local planned TIME scale, and the maintenance of the topology is completed by utilizing a GMP algorithm and a distributed clock algorithm.
Preferably, the step 010 includes the steps of:
step 011: initializing a local CLOCK, synchronizing a local GPS _ CLOCK counter to the GPS equipment if the system contains the GPS equipment, and clearing 0 of the local counter; if the system does not contain an external clock source, only clearing 0 from the local clock counter;
step 012: setting the sending member vector to be 64 'h 0000_0001, namely the target device at this time is the device of which the member vector is 64' h0000_ 0001; the local member vector is set to 64' h0000 — 0000.
Preferably, the step 020 comprises the steps of:
step 021: the first optical bus connector sends T _ SYNC _ FRAME FRAMEs containing the sending member vectors to the first optical splitter and the second optical bus connector respectively, records the sending time T1 and starts a Link _ latency _ measure _ count counter;
step 022: shifting 1 in the sending member vector to the left by one bit, and waiting for the next sending;
step 023: waiting for an N _ RESP _ FRAME message corresponding to the equipment response, and setting the corresponding position of the local member vector if the first optical bus connector receives the correct N _ RESP _ FRAME message;
and 024: according to a time point T2 of receiving the N _ RESP _ FRAME message and a known time T _ cost of processing and calculating a T _ SYNC _ FRAME by the optical bus terminal controller, calculating a link delay parameter T _ wireless delay (T2-T1-T _ cost)/2;
step 025: if all the devices in the system have been detected through traversal, go to the step 030, otherwise go back to the step 021.
Preferably, the step 030 includes the steps of:
step 031: checking the equipment with the member variable of 1 in the local member vector, and sending respective Configuration Data information and link time parameters to the optical bus terminal controllers, wherein the link time parameters comprise two parts of contents, one part is link time delay between each optical bus terminal controller and an optical bus connector, and the other part is internal processing time delay of the optical bus connector;
step 032: and after the optical bus terminal controller replies CON _ ACK information or exceeds the maximum reconfiguration times, configuring the next optical bus terminal controller.
Preferably, said step 040 comprises the steps of:
step 041: using a local member vector as a member vector field in an ALLOW _ COLDSTART _ FRAME FRAME, using a GPS _ CLOCK variable as a GPS information field in the ALLOW _ COLDSTART _ FRAME FRAME, and sending the ALLOW _ COLDSTART _ FRAME FRAME;
step 042: and clearing the local clock after sending an ALLOW _ COLDSTART _ FRAME FRAME, resetting the local clock to be 0 after the local clock normally TIMEs to GLOBAL _ RESTART _ POINT _ TIME, and then realizing normal communication according to the configuration information.
Preferably, said step 050 comprises the steps of:
step 051: for a plurality of optical bus terminal controllers which do not exist in an original group, completing measurement of link time parameters and configuration of configuration data information in respective first Node slots after the plurality of optical bus terminal controllers are powered on, and broadcasting the link time parameters to all other equipment in the respective Node slots;
step 052: the optical bus connector is not forwarded and a WARNING primitive is issued by the optical bus termination controller sending an out-of-spec OTTB _ FRAME.
Preferably, the step 150 comprises the steps of:
step 151: if an ALLOW _ COLDSTART _ FRAME FRAME is received, adding the member vector in the ALLOW _ COLDSTART _ FRAME FRAME into a local member vector of the user, and if a non-ALLOW _ COLDSTART _ FRAME FRAME is received, completing the integration operation of the user;
step 152: each optical bus terminal controller sends data frames in its Node Slot and updates the local member vector according to the GMP algorithm.
The invention has high link speed, reduces the weight of the machine body, reduces the wiring difficulty, has stronger anti-interference capability of the optical fiber and improves the integral anti-interference capability of the system; the uplink and downlink wavelengths are different at the same time, so that a cold start mode capable of avoiding conflict is provided; compared with the TTP/C protocol which needs to measure the link related time parameter information in advance in an off-line manner, the optical bus connector can measure the link time parameter in real time, so that the on-line measurement of the time parameter is realized, and the calculation of the link parameter is simplified; in addition, the optical bus connector completes the loading of all the online equipment Configuration Data at one time, increases the monitoring of the state of the optical bus terminal controller and simplifies the measurement of the link time parameter.
Drawings
Fig. 1 is a schematic diagram of a time triggered passive optical bus structure according to embodiment 1;
FIG. 2 is a flowchart of a method for carrying out the present invention in embodiment 2;
fig. 3 is a FRAME format diagram of T _ SYNC _ FRAME, N _ RESP _ FRAME, all _ COLDSTART _ FRAME, OTTB _ FRAME, etc. in embodiments 3 and 4;
FIG. 4 is the format diagrams of CON _ ACK, CON _ FAIL and WARNING primitives in examples 3 and 4;
FIG. 5 is a logic flow diagram of the state control of the optical bus connector state control unit according to embodiment 3;
FIG. 6 is a logic flow diagram of state control of the state control unit of the optical bus termination controller according to embodiment 4;
fig. 7 is a schematic diagram of a conventional time triggered bus technology.
Detailed Description
Example 1
A time-triggered passive optical bus structure of this embodiment is shown in fig. 1, and includes a first optical bus connector, a second optical bus connector, a plurality of optical bus terminal controllers, a first optical splitter, and a second optical splitter; each optical bus terminal controller is provided with two ports which are respectively connected to the first optical splitter and the second optical splitter; each optical bus connector has 2 optical fiber ports, one port of the first optical bus connector is connected with the first optical splitter, one port of the second optical bus connector is connected with the second optical splitter, and the other port of the first optical bus connector is connected with the other port of the second optical bus connector.
The optical bus connectors are all provided with optical bus connector state control units, and the optical bus terminal controllers are all provided with optical bus terminal controller state control units.
In this embodiment, the optical bus termination controller 4 is a device with cold start capability, and when the optical bus termination controller 4 is powered on, the optical bus connector state control unit works normally, and in order to distinguish the member vectors in the optical bus termination controller 4 and the optical bus connector conveniently, specifically, the local member vector of the optical bus termination controller 4 is described as NL _ MV4, the sending member vector of the optical bus connector is described as TS _ MV1, the local member vector of the optical bus connector is described as TL _ MV1, the initial value of the sending member vector of the optical bus connector is set to 64 'h 0001, and the initial value of the local member vector is 64' h0000 — 0000. The TL _ MV1 initial value of the optical bus terminal controller 1 is 64 ' h0000_0001, the TL _ MV2 initial value of the optical bus terminal controller 2 is 64 ' h0000_0002, the TL _ MV3 initial value of the optical bus terminal controller 3 is 64 ' h0000_0004, the TL _ MV4 initial value of the optical bus terminal controller 4 is 64 ' h0000_0008, the TL _ MV5 initial value of the optical bus terminal controller 5 is 64 ' h0000_0010, and the optical bus terminal controller 5 is powered on after the TTPON system is formed for a certain time. The rule setting is carried out freely by the technicians in the field according to the requirements, the setting rules are different, the sequence of the corresponding receiving configuration files is not used, but the forming, the maintenance and the normal time triggering flow of the whole network are not influenced.
Example 2
A method for implementing a time-triggered passive optical bus, which can be applied to the time-triggered passive optical bus in embodiment 1, where the bus includes two optical bus connectors, multiple optical bus termination controllers, and two optical splitters, where each optical bus connector is provided with an optical bus connector state control unit, each optical bus termination controller is provided with an optical bus termination controller state control unit, each optical bus connector is denoted as a first optical bus connector and a second optical bus connector, and each optical splitter is denoted as a first optical splitter and a second optical splitter, and a working flow diagram of the method includes the following steps as shown in fig. 2:
s1: the device comprises an initialization device, a state control unit of an optical bus connector and a state control unit of an optical bus terminal controller are loaded;
s2: opening the state control logic of the state control unit of the optical bus connector or the state control unit of the optical bus terminal controller;
s3: waiting for generating a link topology and waiting for the completion of link time parameter measurement;
s4: completing the configuration of the optical bus terminal controller and completing the cold start process;
s5: and maintaining the link topology, and transmitting OTTB _ FRAME.
Example 3
Referring to fig. 5, the method flow according to embodiment 2 of the present embodiment, wherein the state control logic of the optical bus connector state control unit includes the following steps,
step 010: the method comprises the steps that a first optical bus connector is used for sending configuration data in a default mode, the configuration data are issued to each node through a first optical splitter, a second optical bus connector forwards the configuration data from the first optical bus connector to a second optical splitter, measurement of link delay information of the second optical splitter is completed, a local member vector is set to be 0, a local Clock of initialization equipment is set to be 0, a local Clock is used globally, and the local Clock takes Micro Clock as a minimum Clock period;
step 020: the first optical bus connector circularly sends T _ SYNC _ FRAME FRAMEs to the connected first optical splitter and the second optical bus connector, the two optical bus connectors respectively record the sending time T1 of the T _ SYNC _ FRAME FRAMEs, and meanwhile, timing is started to wait for the response of corresponding equipment or response timeout; the method comprises the steps that an optical bus connector receives an N _ RESP _ FRAME FRAME of corresponding equipment, timing is stopped, the time T2 of the current N _ RESP _ FRAME FRAME is recorded, two optical bus connectors respectively calculate a link delay parameter T _ wiredelay which is (T2-T1-T _ cost)/2, wherein T _ cost is the time spent by an optical bus terminal controller in processing T _ SYNC _ FRAME;
step 030: waiting for the completion of traversal detection of all network equipment in the current network, and sending configuration information and link delay parameters obtained by respectively measuring two optical splitters to an optical bus terminal controller;
step 040: populating a member vector field in an ALLOW _ COLDSTART _ FRAME FRAME with a local member vector;
step 050: the topology is detected and maintained.
Preferably, step 010 comprises the steps of:
step 011: initializing a local CLOCK, synchronizing a local GPS _ CLOCK counter to the GPS equipment if the system contains the GPS equipment, and clearing 0 of the local counter; if the system does not contain an external clock source, only clearing 0 from the local clock counter;
step 012: setting the sending member vector to be 64 'h 0000_0001, namely the target device at this time is the device of which the member vector is 64' h0000_ 0001; the local member vector is set to 64' h0000 — 0000.
Preferably, step 020 comprises the steps of:
step 021: the first optical bus connector sends T _ SYNC _ FRAME FRAMEs containing sending member vectors to the first optical splitter and the second optical bus connector respectively, records sending time T1 and starts a Link _ latency _ measure _ count counter;
step 022: shifting 1 in the sending member vector to the left by one bit, and waiting for the next sending;
step 023: waiting for an N _ RESP _ FRAME message corresponding to the equipment response, and setting the corresponding position of the local member vector if the first optical bus connector receives the correct N _ RESP _ FRAME message;
and 024: according to a time point T2 of receiving the N _ RESP _ FRAME message and a known time T _ cost of processing and calculating a T _ SYNC _ FRAME by the optical bus terminal controller, calculating a link delay parameter T _ wireless delay (T2-T1-T _ cost)/2;
step 025: if all the devices in the system have been detected by traversal, go to step 030, otherwise go back to step 021.
Preferably, step 030 includes the steps of:
step 031: checking the equipment with the member variable of 1 in the local member vector, and sending respective Configuration Data information and link time parameters to the optical bus terminal controllers, wherein the link time parameters comprise two parts of contents, one part is link time delay between each optical bus terminal controller and an optical bus connector, and the other part is internal processing time delay of the optical bus connector;
step 032: and after the optical bus terminal controller replies CON _ ACK information or exceeds the maximum reconfiguration times, configuring the next optical bus terminal controller.
Preferably, step 040 includes the steps of:
step 041: using a local member vector as a member vector field in an ALLOW _ COLDSTART _ FRAME FRAME, using a GPS _ CLOCK variable as a GPS information field in the ALLOW _ COLDSTART _ FRAME FRAME, and sending the ALLOW _ COLDSTART _ FRAME FRAME;
step 042: and clearing the local clock after sending an ALLOW _ COLDSTART _ FRAME FRAME, resetting the local clock to be 0 after the local clock normally TIMEs to GLOBAL _ RESTART _ POINT _ TIME, and then realizing normal communication according to the configuration information.
Preferably, step 050 includes the steps of:
step 051: for a plurality of optical bus terminal controllers which do not exist in an original group, completing measurement of link time parameters and configuration of configuration data information in respective first Node slots after the plurality of optical bus terminal controllers are powered on, and broadcasting the link time parameters to all other equipment in the respective Node slots;
step 052: the optical bus connector is not forwarded and a WARNING primitive is issued by the optical bus termination controller sending an out-of-spec OTTB _ FRAME.
Example 4
Referring to fig. 6, the present embodiment is based on the method of embodiment 2, wherein the state control logic of the state control unit of the optical bus terminal controller includes the following steps:
step 110: setting member vectors of all devices, setting the corresponding position of the self Membership Flag to be 1, setting other positions to be 0, and initializing a local clock of the device to be 0;
step 120: monitoring whether T _ SYNC _ FRAME FRAMEs from the optical bus connectors exist on the two links respectively, wherein member vectors in the FRAMEs are the same as member vector values of equipment, synchronizing local clocks by using time information of the T _ SYNC _ FRAME FRAMEs sent by the first optical bus connector, processing the T _ SYNC _ FRAME FRAMEs of the two links respectively, and sending a response message N _ RESP _ FRAME through any link immediately after receiving the T _ SYNC _ FRAME FRAMEs;
step 130: the optical bus terminal controller which completes the response monitors the configuration information of the optical bus terminal controller on the link, and after the configuration information of the optical bus terminal controller is verified, if the verification passes the recovery CON _ ACK, the recovery CON _ FAIL is carried out;
step 140: after monitoring an all _ COLDSTART _ FRAME FRAME, all the optical bus terminal controllers receive a member vector containing a current network GLOBAL view, so far, the cold start process is completed, all the optical bus terminal controllers receiving the all _ COLDSTART _ FRAME FRAME set a local clock to be a link delay relative to an optical bus connector, simultaneously set the current integration period to be 0, reset the local clock to be 0 after reaching a GLOBAL TIME GLOBAL _ RESTART _ POINT _ TIME, and then realize normal communication according to configuration information;
step 150: and each optical bus terminal controller forming the group sends TIME _ TRIGGER _ FRAME TIME TRIGGER flow according to a local planned TIME scale, and the maintenance of the topology is completed by utilizing a GMP algorithm and a distributed clock algorithm.
Further, step 150 includes the steps of:
step 151: if an ALLOW _ COLDSTART _ FRAME FRAME is received, adding the member vector in the ALLOW _ COLDSTART _ FRAME FRAME into a local member vector of the user, and if a non-ALLOW _ COLDSTART _ FRAME FRAME is received, completing the integration operation of the user;
step 152: each optical bus terminal controller sends data frames in its Node Slot and updates the local member vector according to the GMP algorithm.
It should be particularly noted that the FRAME formats of the FRAMEs T _ SYNC _ FRAME, N _ RESP _ FRAME, all _ COLDSTART _ FRAME, and OTTB _ FRAME in this embodiment and embodiment 3 are shown in fig. 3, and the format diagrams of the CON _ ACK, CON _ FAIL, and WARNING primitives are shown in fig. 4.
In addition, the member vector is a group of vectors composed of bits, each bit of the group of vectors corresponds to a controller, and when a certain bit is 1, the controller corresponding to the bit is represented to work normally, so the controller corresponding to the lowest bit of the member vector is 1 is used as the clock measurement standard in the embodiment.
Compared with the existing time triggered bus technology, which is schematically illustrated in fig. 7, if the devices 1 and 2 are far away from the devices 4 and 5 and the devices 1 and 5 transmit cold start frames almost simultaneously, one of the following situations may occur: device 2 receives a cold start frame from device 1 and device 4 receives a cold start frame from device 5, but both cold start frames collide at device 3 and device 3 detects the collision. If this occurs, it may lead to an extreme case where device 2 completes the integration using the cold start frame from device 1, device 4 completes the integration using the cold start frame from device 5, and devices 3 cannot complete the integration due to the collision. This process forms two small clusters. Meanwhile, the bus shown in fig. 7 requires each device to configure Configuration Data separately, which also makes the Configuration cumbersome.
In the method, coarse synchronization of the rest optical bus terminal controllers is completed in advance through the optical bus connector, and all _ COLDSTART _ FRAME is sent through the optical bus connector to enable clocks of all nodes to be consistent, so that a cold start scheme of a small cluster is avoided. Meanwhile, the optical bus connector realizes that one machine configures a plurality of machines in a unified configuration mode. The mechanism of the optical bus connector fault warning is realized by utilizing the characteristics of the optical fiber link full duplex communication.

Claims (9)

1. A time triggered passive optical bus, comprising: the optical fiber coupler comprises a first optical bus connector, a second optical bus connector, a plurality of optical bus terminal controllers, a first optical splitter and a second optical splitter; each optical bus terminal controller is provided with two ports which are respectively connected to the first optical splitter and the second optical splitter; each optical bus connector is provided with 2 optical fiber ports, one port of the first optical bus connector is connected with the first optical splitter, one port of the second optical bus connector is connected with the second optical splitter, and the other port of the first optical bus connector is connected with the other port of the second optical bus connector;
the optical bus connectors are all provided with optical bus connector state control units, and the optical bus terminal controllers are all provided with optical bus terminal controller state control units.
2. An implementation method of a time-triggered passive optical bus, which is applied to the time-triggered passive optical bus described in claim 1, wherein the bus includes two optical bus connectors, a plurality of optical bus termination controllers, and two optical splitters, the optical bus connectors are each provided with an optical bus connector state control unit, the optical bus termination controllers are each provided with an optical bus termination controller state control unit, the two optical bus connectors are a first optical bus connector and a second optical bus connector, and the two optical splitters are a first optical splitter and a second optical splitter, and the implementation method of the time-triggered passive optical bus includes the following steps:
s1: the device comprises an initialization device, a state control unit of an optical bus connector and a state control unit of an optical bus terminal controller are loaded;
s2: opening the state control logic of the state control unit of the optical bus connector or the state control unit of the optical bus terminal controller;
s3: waiting for generating a link topology and waiting for the completion of link time parameter measurement;
s4: completing the configuration of the optical bus terminal controller and completing the cold start process;
s5: and maintaining the link topology, and transmitting OTTB _ FRAME.
3. A method for implementing a time triggered passive optical bus as claimed in claim 2, wherein:
the state control logic of the optical bus connector state control unit comprises the steps of,
step 010: the method comprises the steps that a first optical bus connector is used for sending configuration data in a default mode, the configuration data are issued to each node through a first optical splitter, a second optical bus connector forwards the configuration data from the first optical bus connector to a second optical splitter, measurement of link delay information of the second optical splitter is completed, a local member vector is set to be 0, a local Clock of initialization equipment is set to be 0, a local Clock is used globally, and the local Clock takes Micro Clock as a minimum Clock period;
step 020: the first optical bus connector circularly sends T _ SYNC _ FRAME FRAMEs to the connected first optical splitter and the second optical bus connector, the two optical bus connectors respectively record the sending time T1 of the T _ SYNC _ FRAME FRAMEs, and meanwhile, timing is started to wait for the response of corresponding equipment or response timeout; the method comprises the steps that an optical bus connector receives an N _ RESP _ FRAME FRAME of corresponding equipment, timing is stopped, the time T2 of the current N _ RESP _ FRAME FRAME is recorded, two optical bus connectors respectively calculate a link delay parameter T _ wiredelay which is (T2-T1-T _ cost)/2, wherein T _ cost is the time spent by an optical bus terminal controller in processing T _ SYNC _ FRAME;
step 030: waiting for the completion of traversal detection of all network equipment in the current network, and sending configuration information and link delay parameters obtained by respectively measuring two optical splitters to an optical bus terminal controller;
step 040: populating a member vector field in an ALLOW _ COLDSTART _ FRAME FRAME with a local member vector;
step 050: detecting and maintaining topology;
the state control logic of the state control unit of the optical bus terminal controller comprises the following steps:
step 110: setting member vectors of all devices, setting the corresponding position of the self Membership Flag to be 1, setting other positions to be 0, and initializing a local clock of the device to be 0;
step 120: monitoring whether T _ SYNC _ FRAME FRAMEs from the optical bus connectors exist on the two links respectively, wherein member vectors in the FRAMEs are the same as member vector values of equipment, synchronizing local clocks by using time information of the T _ SYNC _ FRAME FRAMEs sent by the first optical bus connector, processing the T _ SYNC _ FRAME FRAMEs of the two links respectively, and sending a response message N _ RESP _ FRAME through any link immediately after receiving the T _ SYNC _ FRAME FRAMEs;
step 130: the optical bus terminal controller which completes the response monitors the configuration information of the optical bus terminal controller on the link, and after the configuration information of the optical bus terminal controller is verified, if the verification passes the recovery CON _ ACK, the recovery CON _ FAIL is carried out;
step 140: after monitoring an all _ COLDSTART _ FRAME FRAME, all optical bus terminal controllers receive a member vector containing a current network GLOBAL view, so far, the cold start process is completed, all the optical bus terminal controllers receiving the all _ COLDSTART _ FRAME FRAME set a local clock to be a link delay relative to an optical bus connector, simultaneously set the current integration period to be 0, reset the local clock to be 0 after reaching a GLOBAL TIME GLOBAL _ RESTART _ POINT _ TIME, and then realize normal communication according to configuration information;
step 150: and each optical bus terminal controller forming the group sends TIME _ TRIGGER _ FRAME TIME TRIGGER flow according to a local planned TIME scale, and the maintenance of the topology is completed by utilizing a GMP algorithm and a distributed clock algorithm.
4. A method for implementing a time triggered passive optical bus as claimed in claim 3, wherein said step 010 comprises the following steps:
step 011: initializing a local CLOCK, synchronizing a local GPS _ CLOCK counter to the GPS equipment if the system contains the GPS equipment, and clearing 0 of the local counter; if the system does not contain an external clock source, only clearing 0 from the local clock counter;
step 012: setting the sending member vector to be 64 'h 0000_0001, namely the target device at this time is the device of which the member vector is 64' h0000_ 0001; the local member vector is set to 64' h0000 — 0000.
5. A method for implementing a time triggered passive optical bus as claimed in claim 3, wherein said step 020 comprises the steps of:
step 021: the first optical bus connector sends T _ SYNC _ FRAME FRAMEs containing the sending member vectors to the first optical splitter and the second optical bus connector respectively, records the sending time T1 and starts a Link _ latency _ measure _ count counter;
step 022: shifting 1 in the sending member vector to the left by one bit, and waiting for the next sending;
step 023: waiting for an N _ RESP _ FRAME message corresponding to the equipment response, and setting the corresponding position of the local member vector if the first optical bus connector receives the correct N _ RESP _ FRAME message;
and 024: according to a time point T2 of receiving the N _ RESP _ FRAME message and a known time T _ cost of processing and calculating a T _ SYNC _ FRAME by the optical bus terminal controller, calculating a link delay parameter T _ wireless delay (T2-T1-T _ cost)/2;
step 025: if all the devices in the system have been detected through traversal, go to the step 030, otherwise go back to the step 021.
6. The method of claim 4, wherein the step 030 comprises the steps of:
step 031: checking the equipment with the member variable of 1 in the local member vector, and sending respective Configuration Data information and link time parameters to the optical bus terminal controllers, wherein the link time parameters comprise two parts of contents, one part is link time delay between each optical bus terminal controller and an optical bus connector, and the other part is internal processing time delay of the optical bus connector;
step 032: and after the optical bus terminal controller replies CON _ ACK information or exceeds the maximum reconfiguration times, configuring the next optical bus terminal controller.
7. The method according to claim 4, wherein said step 040 includes the following steps:
step 041: using a local member vector as a member vector field in an ALLOW _ COLDSTART _ FRAME FRAME, using a GPS _ CLOCK variable as a GPS information field in the ALLOW _ COLDSTART _ FRAME FRAME, and sending the ALLOW _ COLDSTART _ FRAME FRAME;
step 042: and clearing the local clock after sending an ALLOW _ COLDSTART _ FRAME FRAME, resetting the local clock to be 0 after the local clock normally TIMEs to GLOBAL _ RESTART _ POINT _ TIME, and then realizing normal communication according to the configuration information.
8. A method for implementing a time triggered passive optical bus as claimed in claim 4, wherein said step 050 comprises the steps of:
step 051: for a plurality of optical bus terminal controllers which do not exist in an original group, completing measurement of link time parameters and configuration of configuration data information in respective first Node slots after the plurality of optical bus terminal controllers are powered on, and broadcasting the link time parameters to all other equipment in the respective Node slots;
step 052: the optical bus connector is not forwarded and a WARNING primitive is issued by the optical bus termination controller sending an out-of-spec OTTB _ FRAME.
9. A method for implementing a time triggered passive optical bus as claimed in claim 3, wherein said step 150 comprises the steps of:
step 151: if an ALLOW _ COLDSTART _ FRAME FRAME is received, adding the member vector in the ALLOW _ COLDSTART _ FRAME FRAME into a local member vector of the user, and if a non-ALLOW _ COLDSTART _ FRAME FRAME is received, completing the integration operation of the user;
step 152: each optical bus terminal controller sends data frames in its Node Slot and updates the local member vector according to the GMP algorithm.
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