CN113037309B

CN113037309B - Receiver circuit, terminal and working method

Info

Publication number: CN113037309B
Application number: CN202110338421.5A
Authority: CN
Inventors: 梁敏; 赵建国; 侯世国
Original assignee: Hanshuo Technology Co ltd
Current assignee: Hanshuo Technology Co ltd
Priority date: 2021-03-30
Filing date: 2021-03-30
Publication date: 2022-02-25
Anticipated expiration: 2041-03-30
Also published as: CN113037309A

Abstract

The invention discloses a receiver circuit, a terminal and a working method, wherein the receiver circuit comprises: the low-power-consumption state controller sleep counter is used for sending out a wake-up instruction and a power supply instruction; entering low power consumption upon receiving a notification to enter low power consumption; the RF receiving control logic circuit is used for sending a starting receiving instruction when receiving the awakening instruction after being powered on; when the RF receiver is monitored not to receive the system message, sending a low power consumption state entering notification, controlling the RF receiver to enter low power consumption and sending a power failure instruction; an RF receiver for receiving when receiving a start reception instruction; entering low power consumption and sending a power failure instruction when receiving a notice of entering low power consumption; the reset circuit is used for supplying power to the control logic circuit and the receiver when receiving a power supply instruction; and when the power failure instruction is received, the power supply for the control logic circuit and the receiver is stopped. The invention can reduce the electric quantity consumed by periodically waking up to monitor the system information, thereby prolonging the service life of the terminal battery.

Description

Receiver circuit, terminal and working method

Technical Field

The present invention relates to the field of communications receivers, and in particular, to a receiver circuit, a terminal, and a method for operating the receiver circuit.

Background

This section is intended to provide a background or context to the embodiments of the invention that are recited in the claims. The description herein is not admitted to be prior art by inclusion in this section.

A typical communication terminal receiver periodically wakes up to listen for system messages during the standby phase. This periodic waking up of the power consumed, if there is no data transmission required, can be a major factor affecting the battery life of the terminal. It is therefore critical to the receiver circuit design if this periodic wake-up power consumption is reduced.

The existing receiver circuit usually maintains a low-frequency clock counter after a receiver chip enters a low-power consumption state, and other circuits are powered off so as to achieve the effect of saving most power in a standby state. Once the counting period is over, the counter circuit triggers other circuits of the chip to reset and wake up, the MCU also restarts working, the corresponding radio frequency circuit is configured to open and receive, and the length of the receiving time window generally exceeds the possible length of two system messages. If no data communication information exists, the chip circuit enters a low-power-consumption power-saving state again.

The most important disadvantage of the prior art is that in order to periodically monitor system information, the main circuits of the chip must be woken up, including the MCU and the memory circuits required for supporting the terminal software, as shown in fig. 1, both the main processor MCU and the RF receiver are woken up at the same time, which makes the power consumption of the terminal chip circuit still larger in the time slice of the periodically woken-up receiving time window.

Disclosure of Invention

An embodiment of the present invention provides a receiver circuit for reducing power consumption of periodically waking up to monitor system messages, the receiver circuit including: the low-power consumption state controller sleep counter, radio frequency RF receive control logic circuit, RF receiver and reset circuit, wherein:

the low-power-consumption state controller sleep counter is connected with the RF receiving control logic circuit and the reset circuit and is used for sending an instruction for supplying power to the RF receiving control logic circuit to the reset circuit and sending a wake-up instruction to the RF receiving control logic circuit when the low-power-consumption state is timed to be finished; entering a low power consumption state when receiving notification information for entering the low power consumption state;

the RF receiving control logic circuit is connected with the RF receiver and the reset circuit and is used for sending the instruction for supplying power to the RF receiver to the reset circuit when the reset circuit receives the awakening instruction after supplying power according to the instruction for supplying power to the RF receiving control logic circuit, generating a starting receiving instruction according to the pre-configured receiver parameters and sending the starting receiving instruction to the RF receiver; when the fact that the RF receiver does not receive the system message before the receiving window is finished is monitored, the notification information of entering the low-power-consumption state is sent to the low-power-consumption state control machine sleep counter and the RF receiver, the RF receiving control logic circuit of the RF receiving control logic circuit is controlled to enter the low-power-consumption state, and the instruction of power failure of the RF receiving control logic circuit is sent to the reset circuit;

the RF receiver is connected with the reset circuit and used for turning on the receiving according to the receiver parameter pre-configured in the starting receiving instruction when the starting receiving instruction is received after the reset circuit provides power according to the instruction for supplying power to the RF receiver; when receiving the notification information of entering the low power consumption state, and sending a power failure instruction to the RF receiver to the reset circuit;

a reset circuit for powering the RF receive control logic circuit upon receiving an instruction to power the RF receive control logic circuit; powering the RF receiver upon receiving an instruction to power the RF receiver; stopping supplying power to the RF reception control logic circuit when receiving an instruction to power off the RF reception control logic circuit; stopping power supply to the RF receiver upon receiving an instruction to power off the RF receiver;

the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external host processor MCU and each power domain is isolated from other circuits.

An embodiment of the present invention further provides a terminal, configured to reduce power consumption for periodically waking up to monitor system messages, where the terminal includes: a receiver circuit as described above.

An embodiment of the present invention further provides a receiver circuit for reducing power consumption of periodically waking up to monitor system messages, where the receiver circuit includes: the low-power consumption state controller sleep counter, radio frequency RF receive control logic circuit, RF receiver and reset circuit, wherein:

the low-power-consumption state controller sleep counter is connected with the RF receiving control logic circuit and the reset circuit and is used for sending an instruction for supplying power to the RF receiving control logic circuit and a wake-up instruction to the reset circuit when the low-power-consumption state is timed to be finished; entering a low power consumption state when receiving notification information for entering the low power consumption state;

the reset circuit is used for supplying power to the RF receiving control logic circuit when receiving a command for supplying power to the RF receiving control logic circuit and sending a wake-up command to the RF receiving control logic circuit; powering the RF receiver upon receiving an instruction to power the RF receiver; stopping supplying power to the RF reception control logic circuit when receiving an instruction to power off the RF reception control logic circuit; stopping power supply to the RF receiver upon receiving an instruction to power off the RF receiver;

The embodiment of the invention also provides a working method of a receiver circuit, which is used for reducing the electric quantity consumed by periodically waking up to monitor the system message, and the method comprises the following steps:

when the low power consumption state controller sleep counter finishes timing in the low power consumption state, an instruction for supplying power to the RF receiving control logic circuit is sent to the reset circuit, and a wake-up instruction is sent to the RF receiving control logic circuit; the low-power-consumption state controller sleep counter is connected with the RF receiving control logic circuit and the reset circuit;

the reset circuit supplies power to the RF receiving control logic circuit when receiving the instruction of supplying power to the RF receiving control logic circuit;

the RF receiving control logic circuit sends the instruction for supplying power to the RF receiver to the reset circuit after the reset circuit supplies power according to the instruction for supplying power to the RF receiving control logic circuit and receives the awakening instruction, generates a starting receiving instruction according to the pre-configured receiver parameters and sends the starting receiving instruction to the RF receiver; the RF receiving control logic circuit is connected with the RF receiver and the reset circuit;

the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver;

after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; the RF receiver is connected with a reset circuit;

when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit;

when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit;

the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state;

the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit;

the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver;

The embodiment of the invention also provides a working method of the terminal, which is used for reducing the electric quantity consumed by periodically waking up to monitor the system message, and the method comprises the following steps: a method of operating a receiver circuit as described above.

when the low power consumption state controller sleep counter finishes timing in the low power consumption state, an instruction for supplying power to the RF receiving control logic circuit and a wake-up instruction are sent to a reset circuit; the low-power-consumption state controller sleep counter is connected with the RF receiving control logic circuit and the reset circuit;

when receiving an instruction for supplying power to the RF receiving control logic circuit, the reset circuit supplies power to the RF receiving control logic circuit and sends a wake-up instruction to the RF receiving control logic circuit;

The embodiment of the present invention further provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the processor implements the receiver circuit and the working method of the terminal.

An embodiment of the present invention further provides a computer-readable storage medium, in which a computer program for executing the operating method of the receiver circuit and the terminal is stored.

In a first aspect, compared with a technical scheme in the prior art that, in order to periodically monitor system information, main circuits of a terminal chip including a main processor MCU must be woken up, which results in a large power consumption of a circuit of the terminal chip, in a receiver circuit and a terminal scheme provided in an embodiment of the present invention: the low-power-consumption state controller sleep counter can directly start the RF receiving control logic circuit when the low-power-consumption state timing is finished, namely, an instruction for supplying power to the RF receiving control logic circuit is sent to a reset circuit when the low-power-consumption state timing is finished, and a wake-up instruction is sent to the RF receiving control logic circuit; then the RF receiving control logic circuit is powered on and starts to control the RF receiver to start receiving after receiving the awakening instruction, namely after the reset circuit provides power according to the instruction for supplying power to the RF receiving control logic circuit, the instruction for supplying power to the RF receiver is sent to the reset circuit when receiving the awakening instruction, a starting receiving instruction is generated according to the pre-configured receiver parameters, and the starting receiving instruction is sent to the RF receiver; the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver; after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit; when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit; the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state; the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit; the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver; the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external main processor MCU, and each power domain is isolated from other circuits, the whole process does not need the participation of the main processor MCU and other circuits, the electric quantity consumed by monitoring system messages by waking up periodically can be reduced, and the service life of a terminal battery can be prolonged.

In a second aspect, compared with a technical scheme in the prior art that, in order to periodically monitor system information, main circuits of a terminal chip including a main processor MCU must be woken up, which results in a large power consumption of a circuit of the terminal chip, in a receiver circuit and a terminal scheme provided in an embodiment of the present invention: the low-power-consumption state controller comprises an independent RF receiver and an independent RF receiving control logic circuit, wherein the independent RF receiver and the independent RF receiving control logic circuit are not in the same power domain with a main processor MCU (microprogrammed control Unit), and also comprises a low-power-consumption state controller sleep counter which can send an instruction for supplying power to the RF receiving control logic circuit and a wake-up instruction to a reset circuit when the low-power-consumption state is timed to be finished; when receiving an instruction for supplying power to the RF receiving control logic circuit, the reset circuit supplies power to the RF receiving control logic circuit and sends a wake-up instruction to the RF receiving control logic circuit; then the RF receiving control logic circuit is powered on and starts to control the RF receiver to start receiving after receiving the awakening instruction, namely after the reset circuit provides power according to the instruction for supplying power to the RF receiving control logic circuit, the instruction for supplying power to the RF receiver is sent to the reset circuit when receiving the awakening instruction, a starting receiving instruction is generated according to the pre-configured receiver parameters, and the starting receiving instruction is sent to the RF receiver; the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver; after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit; when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit; the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state; the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit; the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver; the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external main processor MCU, and each power domain is isolated from other circuits, the whole process does not need the participation of the main processor MCU and other circuits, the electric quantity consumed by monitoring system messages by waking up periodically can be reduced, and the service life of a terminal battery can be prolonged.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. In the drawings:

fig. 1 is a schematic diagram of a receiver circuit in the prior art;

FIG. 2 is a diagram illustrating a receiver circuit according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a terminal according to an embodiment of the present invention;

FIG. 4 is a diagram illustrating a receiver circuit according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a terminal according to an embodiment of the present invention;

FIG. 6 is a flow chart illustrating a method of operating a receiver circuit according to an embodiment of the invention;

FIG. 7 is a flow chart illustrating a method of operating a receiver circuit according to an embodiment of the invention;

fig. 8 is a schematic structural diagram of a computer device in an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the embodiments of the present invention are further described in detail below with reference to the accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.

In view of the technical problems of the receiver circuit in the prior art, the inventor proposes a scheme of a receiver circuit and a terminal, which changes the operation behavior of the chip internal circuit required by the periodic wake-up reception in the prior art through more accurate power domain division and a special wake-up RF reception control logic circuit, thereby achieving the purpose of more power saving. The following describes the receiver circuit and the terminal in detail.

Fig. 2 is a schematic structural diagram of a receiver circuit (receiver circuit 1 in fig. 3) according to an embodiment of the present invention, and as shown in fig. 2, the receiver circuit includes: the low-power consumption state controller sleep counter, radio frequency RF receive control logic circuit, RF receiver and reset circuit, wherein:

Compared with the technical scheme that in the prior art, in order to periodically monitor system information, main circuits of a terminal chip including a main processor MCU must be awakened, so that the power consumption of the circuit of the terminal chip is larger, the receiver circuit and the terminal scheme provided by the embodiment of the invention have the following advantages: the low-power-consumption state controller sleep counter can directly start the RF receiving control logic circuit when the low-power-consumption state timing is finished, namely, an instruction for supplying power to the RF receiving control logic circuit is sent to a reset circuit when the low-power-consumption state timing is finished, and a wake-up instruction is sent to the RF receiving control logic circuit; then the RF receiving control logic circuit is powered on and starts to control the RF receiver to start receiving after receiving the awakening instruction, namely after the reset circuit provides power according to the instruction for supplying power to the RF receiving control logic circuit, the instruction for supplying power to the RF receiver is sent to the reset circuit when receiving the awakening instruction, a starting receiving instruction is generated according to the pre-configured receiver parameters, and the starting receiving instruction is sent to the RF receiver; the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver; after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit; when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit; the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state; the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit; the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver; the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external main processor MCU, and each power domain is isolated from other circuits, the whole process does not need the participation of the main processor MCU and other circuits, the electric quantity consumed by monitoring system messages by waking up periodically can be reduced, and the service life of a terminal battery can be prolonged.

In specific implementation, the low-power-consumption state controller comprises a sleep counter, a radio frequency RF receiving control logic circuit, an RF receiver and a reset circuit, wherein the sleep counter, the radio frequency RF receiving control logic circuit, the RF receiver and the reset circuit are all provided with independent power domains and are isolated from other circuits in a chip. When the chip enters a deep sleep low-power consumption state, the low-power consumption state controls the sleep counter to supply power, but a preset parameter table in the radio frequency RF receiving control logic circuit also keeps a power supply maintaining state, and the RF receiver is in a power-down closing state.

In one embodiment, the reset circuit is also connected with an external main processor MCU;

the RF receiving control logic circuit can also be used for sending notification information for resetting the start MCU to the external main processor MCU through the reset circuit when the RF receiver is monitored to receive system messages before the receiving window is finished; and the external main processor MCU is used for controlling the normal operation of the terminal software after receiving the notification information of the reset starting MCU.

In specific implementation, if the RF receiving control logic circuit monitors that the RF receiver receives the system message before the receiving window is finished, the RF receiving control logic circuit may notify the reset circuit through an interface signal between the RF receiving control logic circuit and the low power state controller sleep counter, or may notify the reset circuit through the RF receiving control logic circuit, reset the main processor MCU part of the start chip, start normal operation of software, implement that the main processor MCU part is started only when the system message is monitored, and further reduce power consumption.

In one embodiment, the RF reception control logic may be specifically configured to send a notification message to the external host processor MCU through the reset circuit to reset the start MCU when it is monitored that the RF receiver receives a message of the contents of the predetermined sync word within the reception time window.

In specific implementation, the RF reception control logic circuit specifically determines whether to reset and start the MCU when it is monitored that the RF receiver receives a message of a predetermined sync word content within a reception time window, thereby improving the efficiency of system information monitoring.

In one embodiment, the RF reception control logic circuit is further connected to an external main processor MCU, the RF reception control logic circuit is further configured to receive and store the pre-configured receiver parameters sent from the main processor MCU before the terminal system is configured to enter a low power consumption state; the receiver parameters are not lost after the RF receive control logic enters a low power state.

During specific implementation, the RF receiving control logic circuit also receives the pre-configured receiver parameters sent by the main processor MCU before the terminal system is configured to enter the low power consumption state, thereby realizing the pre-configuration of the MCU on the RF receiving control logic circuit parameters and further improving the flexibility and the working stability of the receiver circuit.

In one embodiment, the preconfigured receiver parameters may include: frequency point, synchronous word, receiving gain, receiving window time length and data packet length, etc. to further raise the stability of receiver circuit.

In one embodiment, the RF receive control logic may store preconfigured receiver parameter information that is not lost by the chip entering a low power state, ensuring the security and stability of the receiver circuitry.

In one embodiment, as shown in fig. 2, the sleep counter of the low power state controller is further connected to the main processor MCU, and the sleep counter of the low power state controller further receives sleep control information sent by the main processor MCU before the control chip needs to enter the deep sleep state, where the sleep control information may include: sleep length, sleep mode, etc., further improving the flexibility of the receiver circuit.

In addition, as shown in fig. 2, the receiver circuit provided by the embodiment of the present invention includes several logic circuit units, which are different power domains. The reset circuit can reset all modules (circuit units in fig. 2) in the chip, and has independent reset signals for different power domains, so that the flexibility and the working stability are stronger.

For ease of understanding, the overall scheme of the receiver circuit provided in the embodiment of the present invention is described below.

Before the chip system is configured by software to enter a low power consumption state, the software configures corresponding parameters (receiver parameters) including frequency points, synchronization words, receiving gains, receiving window time lengths, data packet lengths and the like in the RF periodic wake-up control logic, and then enters the low power consumption state. When the counting of the low-power-consumption counter is finished, the low-power-consumption state controller sleep counter informs an RF (radio frequency) periodic wake-up control logic circuit through an interface signal, an instruction for supplying power to the RF receiving control logic circuit is sent to a reset circuit, the wake-up instruction is sent to the RF receiving control logic circuit, and the reset circuit supplies power to the RF receiving control logic circuit when receiving the instruction for supplying power to the RF receiving control logic circuit. The RF reception control logic circuit controls the RF reception circuit (RF receiver) to turn on reception and starts reception according to the parameters configured in advance. If the system message is received before the receiving window is finished, the reset circuit is informed through the interface signal, the main control MCU (main processor MCU in figure 2) part of the starting chip is reset, and the normal operation of the software is started. If no system message is received, the low power state controller is notified to re-enter the low power state by the sleep counter, thereby also controlling the RF circuit block (RF receiver + RF reception control logic circuit in fig. 2) to enter the low power state, and at the same time, notifies the reset circuit to stop being the RF circuit block.

In summary, the most important technical points of the embodiments of the present invention are emphasized again:

1) the power domains of the RF receiver part and the MCU part (main processor MCU) of the main control circuit are separated from each other, and each block in fig. 2 is a separate power domain.

2) The RF circuit is added with a control logic part for periodically waking up reception, namely an RF receiving control logic circuit, which comprises a frequency point, a synchronous word, a receiving gain, a receiving window time length, a data packet length and the like required by receiving configuration.

3) Interface signals between the low power state machine logic (low power state machine sleep counter in fig. 2) and the periodic wake-up receive control logic (RF receive control logic in fig. 2) of the RF circuit are added.

4) The interface signal between the RF circuit part (RF receiver + RF reception control logic circuit in fig. 2) and the chip reset circuit is added.

In summary, the receiver scheme provided by the embodiment of the present invention has the following beneficial technical effects: the embodiment of the invention comprises a single RF receiver and a single RF receiving control logic circuit, and the single RF receiving control logic circuit and the main control circuit (a main processor MCU) are not in the same power domain. The RF receive control logic may store receiver parameters including, but not limited to, frequency point, gain, length of receive time, sync word, etc., which are not lost when the chip enters a low power state. The embodiment of the invention also comprises a low power consumption state controller sleep counter which is directly connected with the RF receiving control logic circuit through an interface and can be directly started after the low power consumption state is finished in timing, or the RF receiving control logic circuit is started through a reset circuit after the low power consumption state is finished in timing, and then the RF receiving control logic circuit starts to control the RF receiving circuit to start receiving, and the whole process does not need the participation of a main processor MCU, thereby reducing the power consumption of the terminal.

The embodiment of the invention also provides a terminal, which is described in the following embodiment. Since the principle of the terminal to solve the problem is similar to that of the receiver circuit, the implementation of the terminal can refer to the implementation of the receiver circuit, and repeated descriptions are omitted.

Fig. 3 is a schematic structural diagram of a terminal in an embodiment of the present invention, and as shown in fig. 3, the terminal includes: the invention implements the receiver circuit 1 described.

Embodiments of the present invention further provide a receiver circuit, as described in the following embodiments. Since the principle of solving the problem of the receiver circuit is similar to that of the above receiver circuit, the implementation of the receiver circuit can be referred to the implementation of the above receiver circuit, and repeated descriptions are omitted.

Fig. 4 is a schematic diagram of a receiver circuit (receiver circuit 2 in fig. 5) according to an embodiment of the present invention, and as shown in fig. 4, the receiver circuit includes:

the reset circuit is used for supplying power to the RF receiving control logic circuit and sending a wake-up instruction to the RF receiving control logic circuit when receiving the instruction for supplying power to the RF receiving control logic circuit and the wake-up instruction; powering the RF receiver upon receiving an instruction to power the RF receiver; stopping supplying power to the RF reception control logic circuit when receiving an instruction to power off the RF reception control logic circuit; stopping power supply to the RF receiver upon receiving an instruction to power off the RF receiver;

Compared with the technical scheme that in the prior art, in order to periodically monitor system information, main circuits of a terminal chip including a main processor MCU must be awakened, so that the power consumption of the circuit of the terminal chip is larger, the receiver circuit and the terminal scheme provided by the embodiment of the invention have the following advantages: the low-power-consumption state controller comprises an independent RF receiver and an independent RF receiving control logic circuit, wherein the independent RF receiver and the independent RF receiving control logic circuit are not in the same power domain with a main processor MCU (microprogrammed control Unit), and also comprises a low-power-consumption state controller sleep counter which can send an instruction for supplying power to the RF receiving control logic circuit and a wake-up instruction to a reset circuit when the low-power-consumption state is timed to be finished; when receiving an instruction for supplying power to the RF receiving control logic circuit, the reset circuit supplies power to the RF receiving control logic circuit and sends a wake-up instruction to the RF receiving control logic circuit; then the RF receiving control logic circuit is powered on and starts to control the RF receiver to start receiving after receiving the awakening instruction, namely after the reset circuit provides power according to the instruction for supplying power to the RF receiving control logic circuit, the instruction for supplying power to the RF receiver is sent to the reset circuit when receiving the awakening instruction, a starting receiving instruction is generated according to the pre-configured receiver parameters, and the starting receiving instruction is sent to the RF receiver; the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver; after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit; when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit; the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state; the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit; the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver; the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external main processor MCU, and each power domain is isolated from other circuits, the whole process does not need the participation of the main processor MCU and other circuits, the electric quantity consumed by monitoring system messages by waking up periodically can be reduced, and the service life of a terminal battery can be prolonged.

In one embodiment, the reset circuit can be further connected with an external main processor MCU;

In one embodiment, the RF reception control logic circuit may be further connected to an external main processor MCU, and the RF reception control logic circuit is further configured to receive and store the pre-configured receiver parameters sent by the main processor MCU before the terminal system is configured to enter the low power consumption state; the receiver parameters are not lost after the RF receive control logic enters a low power state.

Fig. 5 is a schematic structural diagram of a terminal according to an embodiment of the present invention, and as shown in fig. 5, the terminal includes: the invention implements the receiver circuit 2 described.

The embodiment of the present invention further provides an operating method of the receiver circuit 1, as described in the following embodiments. Since the principle of solving the problem of the method is similar to that of the receiver circuit 1, the implementation of the method can be referred to the implementation of the receiver circuit 1, and repeated descriptions are omitted.

Fig. 6 is a schematic flowchart of an operating method of the receiver circuit 1 in the embodiment of the present invention, and as shown in fig. 6, the method includes the following steps:

step 101: when the low power consumption state controller sleep counter finishes timing in the low power consumption state, an instruction for supplying power to the RF receiving control logic circuit is sent to the reset circuit, and a wake-up instruction is sent to the RF receiving control logic circuit; the low-power-consumption state controller sleep counter is connected with the RF receiving control logic circuit and the reset circuit;

step 102: the reset circuit supplies power to the RF receiving control logic circuit when receiving the instruction of supplying power to the RF receiving control logic circuit;

step 103: the RF receiving control logic circuit sends the instruction for supplying power to the RF receiver to the reset circuit after the reset circuit supplies power according to the instruction for supplying power to the RF receiving control logic circuit and receives the awakening instruction, generates a starting receiving instruction according to the pre-configured receiver parameters and sends the starting receiving instruction to the RF receiver; the RF receiving control logic circuit is connected with the RF receiver and the reset circuit;

step 104: the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver;

step 105: after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; the RF receiver is connected with a reset circuit;

step 106: when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit;

step 107: when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit;

step 108: the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state;

step 109: the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit;

step 110: the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver;

In one embodiment, the reset circuit can be further connected with an external main processor MCU; the operating method of the receiver circuit may further include:

when the RF receiving control logic circuit monitors that the RF receiver receives a system message before the receiving window is finished, the RF receiving control logic circuit sends a notification message for resetting and starting the MCU to an external main processor MCU through a reset circuit; and the external main processor MCU is used for controlling the normal operation of the terminal software after receiving the notification information of the reset starting MCU.

In one embodiment, the sending, by the RF reception control logic circuit, a notification message to reset the start MCU to the external host processor MCU through the reset circuit when it is detected that the RF receiver receives the system message before the end of the reception window may include:

and when monitoring that the RF receiver receives the message of the content of the preset synchronous word in the receiving time window, the RF receiving control logic circuit sends a notification message for resetting the start MCU to the external main processor MCU through the reset circuit.

In one embodiment, the RF receive control logic circuit is further connected to an external main processor MCU, and the method of operating the receiver circuit may further include:

the RF receiving control logic circuit receives and stores the pre-configured receiver parameters sent by the MCU before the terminal system is configured to enter a low power consumption state; the receiver parameters are not lost after the RF receive control logic enters a low power state.

The embodiment of the invention also provides a working method of the terminal, which is described in the following embodiment. Since the principle of solving the problem of the method is similar to that of a receiver circuit, the implementation of the method can be referred to the implementation of the receiver circuit, and repeated details are omitted.

The embodiment of the invention also provides a working method of the terminal, which comprises the following steps: the method of operation of the receiver circuit 1 as described above.

The embodiment of the present invention further provides an operating method of the receiver circuit 2, as described in the following embodiments. Since the principle of solving the problem of the method is similar to that of the receiver circuit 2, the implementation of the method can be referred to the implementation of the receiver circuit, and repeated descriptions are omitted.

Fig. 7 is a schematic flowchart of an operating method of the receiver circuit 2 according to an embodiment of the present invention, and as shown in fig. 7, the operating method includes the following steps:

step 201: when the low power consumption state controller sleep counter finishes timing in the low power consumption state, an instruction for supplying power to the RF receiving control logic circuit and a wake-up instruction are sent to a reset circuit; the low-power-consumption state controller sleep counter is connected with the RF receiving control logic circuit and the reset circuit;

step 202: when receiving an instruction for supplying power to the RF receiving control logic circuit, the reset circuit supplies power to the RF receiving control logic circuit and sends a wake-up instruction to the RF receiving control logic circuit;

step 203: the RF receiving control logic circuit sends the instruction for supplying power to the RF receiver to the reset circuit after the reset circuit supplies power according to the instruction for supplying power to the RF receiving control logic circuit and receives the awakening instruction, generates a starting receiving instruction according to the pre-configured receiver parameters and sends the starting receiving instruction to the RF receiver; the RF receiving control logic circuit is connected with the RF receiver and the reset circuit;

step 204: the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver;

step 205: after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; the RF receiver is connected with a reset circuit;

step 206: when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit;

step 207: when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit;

step 208: the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state;

step 209: the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit;

step 210: the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver;

In one embodiment, the reset circuit is also connected with an external main processor MCU; the operating method of the receiver circuit may further include:

The embodiment of the invention also provides a working method of the terminal, which comprises the following steps: the method of operation of the receiver circuit 2 as described above.

An embodiment of the present invention further provides a computer device, as shown in fig. 8, which includes a memory 302, a processor 304, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the processor implements any of the receiver circuits and the operation method of the terminal described above.

In particular, the computer device may be a computer terminal, a server or a similar computing device.

An embodiment of the present invention further provides a computer-readable storage medium, which stores a computer program for executing any of the above-mentioned receiver circuits and operating methods of a terminal.

In particular, computer-readable storage media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer-readable storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable storage medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

The receiver circuit and the terminal scheme provided by the embodiment of the invention have the beneficial technical effects that:

in a first aspect, compared with a technical scheme in the prior art that, in order to periodically monitor system information, main circuits of a terminal chip including a main processor MCU must be woken up, which results in a large power consumption of a circuit of the terminal chip, in a receiver circuit and a terminal scheme provided in an embodiment of the present invention: the low-power-consumption state controller sleep counter can directly start the RF receiving control logic circuit when the low-power-consumption state timing is finished, namely, an instruction for supplying power to the RF receiving control logic circuit is sent to a reset circuit when the low-power-consumption state timing is finished, and a wake-up instruction is sent to the RF receiving control logic circuit; then the RF receiving control logic circuit is started to control the RF receiver to start receiving after being powered on, namely after the reset circuit provides electric energy according to an instruction for supplying power to the RF receiving control logic circuit and receives the awakening instruction, the instruction for supplying power to the RF receiver is sent to the reset circuit, a starting receiving instruction is generated according to the pre-configured receiver parameters, and the starting receiving instruction is sent to the RF receiver; the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver; after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit; when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit; the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state; the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit; the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver; the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external main processor MCU, and each power domain is isolated from other circuits, the whole process does not need the participation of the main processor MCU and other circuits, the electric quantity consumed by monitoring system messages by waking up periodically can be reduced, and the service life of a terminal battery can be prolonged.

In a second aspect, compared with a technical scheme in the prior art that, in order to periodically monitor system information, main circuits of a terminal chip including a main processor MCU must be woken up, which results in a large power consumption of a circuit of the terminal chip, in a receiver circuit and a terminal scheme provided in an embodiment of the present invention: the low-power-consumption state controller sleep counter can directly start the RF receiving control logic circuit when the low-power-consumption state timing is finished, namely an instruction for supplying power to the RF receiving control logic circuit and a wake-up instruction are sent to a reset circuit when the low-power-consumption state timing is finished; when receiving an instruction for supplying power to the RF receiving control logic circuit, the reset circuit supplies power to the RF receiving control logic circuit and sends a wake-up instruction to the RF receiving control logic circuit; then the RF receiving control logic circuit is started to control the RF receiver to start receiving after being powered on, namely after the reset circuit provides electric energy according to an instruction for supplying power to the RF receiving control logic circuit and receives the awakening instruction, the instruction for supplying power to the RF receiver is sent to the reset circuit, a starting receiving instruction is generated according to the pre-configured receiver parameters, and the starting receiving instruction is sent to the RF receiver; the reset circuit supplies power to the RF receiver when receiving an instruction for supplying power to the RF receiver; after the reset circuit provides power according to the instruction for supplying power to the RF receiver, the RF receiver turns on receiving according to the receiver parameter pre-configured in the starting receiving instruction when receiving the starting receiving instruction; when the RF receiving control logic circuit monitors that the RF receiver does not receive the system message before the receiving window is finished, the RF receiving control logic circuit sends notification information entering a low power consumption state to the low power consumption state control machine sleep counter and the RF receiver, controls the RF receiving control logic circuit to enter the low power consumption state, and sends a power failure instruction to the RF receiving control logic circuit to the reset circuit; when receiving a power failure instruction for the RF receiving control logic circuit, the reset circuit stops supplying power to the RF receiving control logic circuit; the low power consumption state controller controls the sleep counter to enter the low power consumption state when receiving the notification information of entering the low power consumption state; the RF receiver enters a low power consumption state when receiving the notification information of entering the low power consumption state, and sends a power failure instruction to the RF receiver to the reset circuit; the reset circuit stops supplying power to the RF receiver when receiving a power failure instruction to the RF receiver; the low-power-consumption state controller sleep counter, the RF receiving control logic circuit, the RF receiver and the reset circuit are provided with independent power domains, or the low-power-consumption state controller sleep counter and the reset circuit are in the same power domain, and the RF receiving control logic circuit and the RF receiver are provided with independent power domains; each power domain is different from the power domain of the external main processor MCU, and each power domain is isolated from other circuits, the whole process does not need the participation of the main processor MCU and other circuits, the electric quantity consumed by monitoring system messages by waking up periodically can be reduced, and the service life of a terminal battery can be prolonged.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A receiver circuit, comprising: the low-power consumption state controller sleep counter, radio frequency RF receive control logic circuit, RF receiver and reset circuit, wherein:

2. The receiver circuit of claim 1, wherein the reset circuit is further connected to an external host processor MCU;

the RF receiving control logic circuit is also used for sending notification information for resetting the start MCU to the external main processor MCU through the reset circuit when the RF receiver is monitored to receive system messages before the receiving window is finished; the external main processor MCU is used for controlling the normal operation of the terminal software after receiving the notification information of resetting the start MCU; the terminal comprises the receiver circuit.

3. The receiver circuit of claim 2, wherein the RF receive control logic circuit is configured to send a notification message to the external host processor MCU through the reset circuit to reset the start MCU upon detecting that the RF receiver receives a message of the contents of a predetermined sync word within a receive time window.

4. The receiver circuit of claim 1, wherein the RF receive control logic circuit is further coupled to an external host processor MCU, the RF receive control logic circuit further configured to receive and store the preconfigured receiver parameters from the host processor MCU prior to the terminal system being configured into the low power consumption state; the receiver parameters are not lost after the RF receiving control logic circuit enters a low power consumption state; the terminal comprises the receiver circuit.

5. A terminal, comprising: the receiver circuit of any of claims 1 to 4.

6. A receiver circuit, comprising: the low-power consumption state controller sleep counter, radio frequency RF receive control logic circuit, RF receiver and reset circuit, wherein:

7. A terminal, comprising: the receiver circuit of claim 6.

8. A method of operating a receiver circuit, comprising:

9. The method of operating a receiver circuit according to claim 8, wherein said reset circuit is further connected to an external main processor MCU; the operating method of the receiver circuit further comprises:

when the RF receiving control logic circuit monitors that the RF receiver receives a system message before the receiving window is finished, the RF receiving control logic circuit sends a notification message for resetting and starting the MCU to an external main processor MCU through a reset circuit; the external main processor MCU is used for controlling the normal operation of the terminal software after receiving the notification information of resetting the start MCU; the terminal comprises the receiver circuit.

10. The method of operation of a receiver circuit according to claim 8, wherein the RF receive control logic circuit is further coupled to an external host processor MCU, the method of operation of the receiver circuit further comprising:

the RF receiving control logic circuit receives and stores the pre-configured receiver parameters sent by the MCU before the terminal system is configured to enter a low power consumption state; the receiver parameters are not lost after the RF receiving control logic circuit enters a low power consumption state; the terminal comprises the receiver circuit.

11. An operating method of a terminal, comprising: a method of operating a receiver circuit according to any of claims 8 to 10.

12. A method of operating a receiver circuit, comprising:

13. An operating method of a terminal, comprising: a method of operating a receiver circuit according to claim 12.

14. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of any one of claims 8 to 13 when executing the computer program.

15. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program for executing the method of any of claims 8 to 13.