CN113036040A - Preparation method of field effect transistor with near-infrared light sensing characteristic - Google Patents
Preparation method of field effect transistor with near-infrared light sensing characteristic Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/10—Organic polymers or oligomers
- H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
- H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
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Abstract
The invention discloses a preparation method of a field effect transistor with near infrared light sensing characteristics, belonging to the technical field of near infrared light sensing. The preparation process of the near-infrared light sensing organic field effect transistor is connected with the semiconductor layer according to the sequence from bottom to top, namely the substrate, the gate electrode, the dielectric layer, the source electrode and the drain electrode are connected with the semiconductor layer. The transistor is in a bottom-gate bottom contact configuration, a source electrode, a drain electrode and a semiconductor layer are positioned on the same horizontal plane, a film prepared by a conjugated polymer and organic small molecule blending solution is used as the semiconductor layer, the transistor has a vertical split-phase heterostructure, and two ends of the transistor are respectively connected with the source electrode and the drain electrode; the dielectric layer is made of non-metal oxide or cross-linked polymer with good solvent resistance. The modification layer is a monomolecular layer; the invention has simple preparation process and low cost, and the dumpling page of the near infrared light sensing organic field effect transistorFor low energy (10-80. mu. Wcm)‑2) The near infrared light has high light dark current ratio and high light responsivity; the method is widely applicable to detection of near infrared light.
Description
Technical Field
The invention relates to the technical field of near-infrared light sensing, in particular to a preparation method of a field effect transistor with near-infrared light sensing characteristics.
Background
The organic field effect transistor with the optical sensing characteristic can convert the change of an optical signal into the change of an electric signal, further amplify the photocurrent through the regulation and control function of the grid voltage, and improve the sensitivity of optical detection. The near-infrared light sensing organic field effect transistor is simple in preparation process, low in cost and good in flexibility, is easy to integrate into wearable equipment, and is widely applied to the fields of health monitoring, disease diagnosis, night vision, remote monitoring, environment monitoring, optical communication and the like.
The main physical processes involved in near-infrared organic field effect transistors include the generation of light-induced excitons, charge separation, charge transport and collection that occur in the semiconductor layer. The near-infrared organic field effect transistor mostly adopts a bottom gate bottom contact configuration and a bottom gate top contact configuration, and selects a material with strong absorption in a near-infrared spectrum region as a semiconductor layer.
Disclosure of Invention
The invention aims to provide a preparation method of a field effect transistor with near infrared light sensing characteristics, wherein the field effect transistor is formed by assembling a substrate, a gate electrode, a dielectric layer, a source electrode, a drain electrode and a semiconductor layer, and the preparation method is characterized by comprising the following steps of:
step 1, preparing a gate electrode on a substrate;
step 2, preparing a dielectric layer on the gate electrode;
step 3, preparing a source drain electrode on the dielectric layer;
step 4, modifying a monomolecular layer on the dielectric layer;
and 5, preparing a semiconductor layer.
In the step 1, the gate electrode has good conductivity, gold and silver are adopted, or the electrode is printed, and silver ink or PEDOT (PSS solution) is selected as the printing ink; the substrate may be glass, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or Polyimide (PI); the substrate can also be selected from heavily doped silicon which can be used as a gate electrode at the same time;
in the step 2, the dielectric layer has good dielectric property, insulating property and solubility resistance; silicon dioxide with a certain thickness is oxidized on the surface of the heavily doped silicon to be used as a dielectric layer, or cross-linked polyimide, cross-linked polystyrene or cross-linked polyvinyl alcohol;
in the step 3, the source and drain electrodes need to have good conductivity, and are prepared by evaporation, photoetching or printing processes, and the adopted material is a metal or conductive polymer material; wherein the metal material is selected from gold and silver; the conductive polymer material is PEDOT PSS.
In the step 4, the monolayer and the dielectric layer are covalently bonded.
In the step 5, the semiconductor layer is a thin film prepared by a conjugated polymer and organic small molecule blending solution and has a vertical phase-splitting heterostructure. Firstly, preparing a blending solution with proper concentration according to the mass ratio of the conjugated polymer to the organic micromolecules, and preparing a semiconductor layer by adopting a spin coating or blade coating method; wherein, in the mixed solute, the mass fraction of the conjugated polymer is 30-90%, and the total mass volume concentration of the two materials of the blending solution is 6.2-12.8 mg/mL.
The conjugated polymer takes pyrrolo-pyrrole-dione or dithien fused pyrrolo-pyrrole-dione as an acceptor unit, and takes benzene ring, thiophene or dithiophene as a donor unit; the organic small molecule is selected from spherical molecule derivatives, such as [6, 6] -phenyl-C71-methyl butyrate (PC71BM) or [6, 6] -phenyl-C61-methyl butyrate (PC61 BM).
The method has the advantages that the preparation process is simple, the repeatability is good, the vertical split-phase heterojunction can be formed in the semiconductor layer, and the prepared device is widely suitable for near-infrared light detection.
Drawings
FIG. 1 is a schematic flow chart of a method for manufacturing a near-infrared light sensing organic field effect transistor;
FIG. 2 is a structural formula of (a) a conjugated polymer (P0) and (b) a small organic molecule (PC71BM) used for blending semiconductor layers;
FIG. 3 is a surface topography of a film prepared by a solution process, (a) a surface topography of a P0 film, (b) a surface topography of a P0/PC71BM (mass ratio 1: 1) blended film and (c) a section of a P0/PC71BM (mass ratio 1: 1) blended film;
FIG. 4 is a graph of the photo-response performance of the device, which is a graph of the transfer (power is 35 μ W/cm) of the near-infrared response field effect transistor (a) using 850nm near-infrared light as a light source and using a blended film as a semiconductor layer2) (b) output curve diagram (power 35 μ W/cm)2) And (c) a graph of the change in optical responsivity with optical power.
Detailed Description
The invention provides a method for preparing a field effect transistor with near infrared light sensing characteristics, wherein the field effect transistor is formed by assembling a substrate, a gate electrode, a dielectric layer, a source electrode, a drain electrode and a semiconductor layer, and the invention is clearly and completely described below by combining an embodiment and an attached drawing.
Fig. 1 is a schematic flow chart of a method for manufacturing a near-infrared light sensing organic field effect transistor. The preparation process of the near-infrared light sensing organic field effect transistor shown in the figure is in the sequence from bottom to top, namely a substrate, a gate electrode, a dielectric layer, a source electrode, a drain electrode and a semiconductor layer; and selecting proper materials to construct each layer. The method comprises the following specific steps:
step 1, preparing a gate electrode on a substrate,
in this step, the gate electrode is formed with good conductivity, which should be 102-106Scm-1In the meantime. The substrate may be a rigid film or a flexible film. The rigid material comprises heavily doped silicon, glass and the like, and the heavily doped silicon can be used as a gate electrode at the same time; the flexible film comprises polyethylene terephthalate (PET), polyethylene naphthalate (PEN) andpolyimide (PI), and the like. The gate electrode is prepared by evaporation or printing on a substrate, the evaporation mainly refers to thermal resistance evaporation, the gate electrode prepared by the thermal resistance evaporation mainly refers to aluminum, gold and silver, the thickness of the film is 30nm-100nm, and the evaporation rate is
The surface root mean square roughness is 1-5 nm. In the process of preparing the gate electrode in a printing mode, the printing ink can be selected from a suspension of nano silver particles or a PEDOT/PSS solution, the silver content in the suspension of the nano silver particles is generally between 10 and 30 percent (mass fraction), and the concentration of the PEDOT/PSS solution is 0.5 to 2.5 percent. The surface root mean square roughness is 0.5-2 nm.
Step 2, preparing a dielectric layer on the gate electrode,
in this step, the dielectric layer has good dielectric properties, insulating properties, and resistance to dissolution. Silicon dioxide with a certain thickness can be oxidized on the surface of the heavily doped silicon to be used as a dielectric layer, the thickness of the silicon dioxide is 300nm-500nm, and the surface roughness is less than 1 nm; or the polymer comprises one of polyimide, crosslinked polyvinyl phenol (PVP), crosslinked polystyrene or crosslinked polyvinyl alcohol, and is prepared by adding a crosslinking agent into the corresponding polymer, reacting at high temperature, and crosslinking, wherein the thickness of the crosslinked polymer is 20nm-100nm, and the surface roughness is less than 1 nm.
Step 3, preparing a source drain electrode on the dielectric layer,
in this step, the source and drain electrodes need to have good conductivity, which should be 102～106Scm-1In the meantime. The source and drain electrodes are made of metal or conductive polymer material. The source and drain electrodes are prepared by evaporation, photoetching or printing processes, and when the source and drain electrodes are prepared by adopting an evaporation mode, a chromium adhesion layer can be evaporated at first, and then the metal electrodes are evaporated, wherein the source and drain electrodes are generally made of gold. The evaporation rate is
The steps of the photoetching process comprise glue homogenizing, exposure, development, gold evaporation and strippingObtaining a patterned source-drain electrode, wherein a nano-silver particle suspension or a PEDOT: PSS solution can be selected in a printing process (as shown in FIG. 3, the surface appearance of a film prepared by a solution method, (a) a surface appearance graph of a P0 film, (b) a surface appearance graph of a P0/PC71BM (mass ratio 1: 1) blended film and (c) a section graph of a P0/PC71BM (mass ratio 1: 1) blended film);
step 4, modifying a monomolecular layer on the dielectric layer,
in this step, the monolayer molecules are Octadecyltrichlorosilane (OTs) or Hexamethyldisilazane (HMDS), etc., and the modification method is as follows: uniformly placing the substrate with the dielectric layer in a culture dish, dropping a drop of OTs or HMDS in the culture dish, placing the culture dish in a vacuum oven, vacuumizing the vacuum oven, and heating the vacuum oven at the temperature of 110-130 ℃. The final modification effect is: the monomolecular layer and the dielectric layer are connected in a covalent bond mode.
Step 5, preparing a semiconductor layer,
in this step, the semiconductor layer is a thin film prepared from a blend solution of a conjugated Polymer (PO) and an organic small molecule (PC71BM) (as shown in fig. 2 (a) a conjugated polymer (P0) and (b) an organic small molecule (PC71 BM)), and has a vertically phase-separated heterostructure. The conjugated polymer copolymer generally has pyrrolopyrroledione or dithiophene-fused pyrrolopyrroledione or the like as an acceptor unit and a benzene ring, thiophene or dithiophene or the like as a donor unit. The small organic molecules are typically selected from derivatives of spherical molecules such as [6, 6] -phenyl-C71-butyric acid methyl ester (PC71BM) or [6, 6] -phenyl-C61-butyric acid methyl ester (PC61 BM). The solvent is trichloromethane or o-dichlorobenzene. The concentration of the conjugated polymer solution is 6-10mg/mL, and the concentration of the organic micromolecule solution is 10-20 mg/mL. And mixing the two solutions according to different volume ratios to obtain a blending solution of the two materials. In the mixed solute, the mass fraction of the conjugated polymer is 30%, 60% or-90%, and the total mass volume concentration of the two materials of the blended solution is 6.2/mL, 8.5/mL or 12.8 mg/mL. And preparing the semiconductor layer on the prepared substrate by adopting a spin coating or blade coating method. The spin coating speed is 1000rpm-3500rpm, the substrate temperature is controlled at 60-80 ℃ in the blade coating process, and the blade coating speed is 0.5mm/s-3 mm/s. The film prepared by using trichloromethane as a solvent is not annealed, the film prepared by using o-dichlorobenzene as a solvent needs to be annealed in a vacuum oven, the annealing temperature is 120-160 ℃, and the annealing time is 30-60 min.
The methods and materials of the present invention are further illustrated by the following specific examples:
examples
Required materials and reagents
Silicon chip, trichloromethane and semiconductor material. KW-4A type bench spin coater, vacuum oven, infrared light source, Keithley SCS 4200 semiconductor parameter tester
The actual procedure
Step 1, preparing a gate dielectric layer. Selecting a heavily doped silicon wafer with Sb as an N-type dopant as a substrate, and preparing SiO on the surface by dry thermal oxidation2，SiO2The thickness was 300nm, and the surface thereof was subjected to polishing treatment.
And 2, preparing a source drain electrode. In SiO2Surface glue homogenizing, exposure, development, evaporation coating of 3nm Cr and 30nm Au in sequence, stripping to obtain patterned source and drain electrodes, and cutting into a regular substrate of 5mm × 5mm by using a glass cutter.
And 3, cleaning the substrate. Preparing a mixed solution (volume ratio is 7: 3) of concentrated sulfuric acid and hydrogen peroxide, soaking the substrate in the mixed solution for 5min, then respectively soaking the substrate in beakers containing deionized water, ethanol and acetone in sequence, and carrying out ultrasonic treatment (power is 8W) in an ultrasonic cleaning instrument for 5 min.
And 4, performing OTs modification on the substrate. Removing the substrate from the beaker using N2Blow-drying by a gun, uniformly placing in a culture dish, dripping a drop of OTs at the center of the culture dish, then placing the culture dish in a vacuum oven, setting the temperature of the vacuum oven at 120 ℃, and heating for 3 h.
And 5, cleaning the modified substrate. And taking the silicon wafer out of the vacuum oven, sequentially soaking the silicon wafer in a beaker filled with n-hexane, ethanol and chloroform, and carrying out ultrasonic treatment (power of 8W) in an ultrasonic cleaning instrument for 5 min. And (5) standby.
And 6, preparing a solution of the semiconductor material. Selecting a conjugated polymer P0 (shown as (a) in figure 2) and an organic small molecule PC71BM (shown as (B) in figure 2) as semiconductor materials, respectively preparing a chloroform solution (A) of P0 of 8mg/mL and a chloroform solution (B) of PC71BM of 20mg/mL by taking chloroform as a solvent, and measuring the volume ratio of 5: 2, and uniformly mixing the A and the B to obtain a blending solution C.
And 7, preparing the semiconductor film. Taking out the OTs modified substrate from the beaker, drying, placing on a spin coater, sucking a sheet, and setting the spin speed of the spin coater at 2000 rpm. Transfer 20 μ L C using a pipette, drop-wise on the substrate, and homogenize the gel for 1 min.
Step 8, testing the electrical property and the light response property of the device as shown in FIG. 4, which is a light response property curve diagram of the device, taking near infrared light of 850nm as a light source and taking a blended film as a transfer curve diagram (power is 35 muW/cm)2) (b) output curve diagram (power 35 μ W/cm)2) And (c) a graph of the change in optical responsivity with optical power.
In summary, in the method of the embodiment of the invention, N-type heavily doped silicon is used as a substrate, 300nm silicon dioxide is prepared by thermal oxidation as a gate dielectric layer, and a source/drain electrode is prepared by a photolithography process. And after the substrate is ultrasonically cleaned, modifying the substrate by using a monomolecular layer so that the monomolecular layer is connected with the substrate by a covalent bond. And washing away the monomolecular layer which is not bonded with the substrate through covalent bonds by using ultrasonic cleaning. Fixing the processed silicon wafer on a spin coater in a vacuumizing mode, sucking the two prepared semiconductor blending solutions by using a liquid-transferring gun, paving the solution on a substrate, and spin-coating. And obtaining the semiconductor layer with uniform and smooth surface. Observed from an atomic force microscope, spherical aggregation occurred in the film of P0/PC71BM (mass ratio 1: 1) (as shown in fig. 3) compared to the film prepared from pure P0 polymer solution, wherein (a) the surface topography of the P0 film, (b) the surface topography of the P0/PC71BM (mass ratio 1: 1) blended film and (c) the profile of the P0/PC71BM (mass ratio 1: 1) blended film; observing by adopting a scanning electron microscope, and finding that the semiconductor layer film has a layered structure; XPS analysis revealed that the composition of the top layer of the P0/PC71BM blend film was the same as that of P0, and the top layer of the layered film wasP0, the spherical aggregation of the lower layer is PC71 BM. At a power of 35. mu. Wcm-2Under the irradiation of near infrared light with a wavelength of 850nm, the dark current ratio of the field effect transistor based on the P0: PC71BM (mass ratio of 1: 1) film is 3.6X 103The optical responsivity is 6.65AW-1。
Claims (7)
1. A preparation method of a field effect transistor with near infrared light sensing characteristics is disclosed, wherein the field effect transistor is assembled by a substrate, a gate electrode, a dielectric layer, a source electrode, a drain electrode and a semiconductor layer, and the preparation method of the near infrared light sensing organic field effect transistor is characterized by comprising the following steps:
step 1, preparing a gate electrode on a substrate;
step 2, preparing a dielectric layer on the gate electrode;
step 3, preparing a source drain electrode on the dielectric layer;
step 4, modifying a monomolecular layer on the dielectric layer;
and 5, preparing a semiconductor layer.
2. The method for preparing the field effect transistor with the near infrared light sensing characteristic according to claim 1, wherein in the step 1, the gate electrode has good conductivity, gold, silver or a printing electrode is adopted, and the ink adopted by printing is selected from silver ink or PEDOT, PSS solution; the substrate is glass, polyethylene terephthalate (PET), polyethylene naphthalate (PEN) or Polyimide (PI); the substrate can also be selected to be heavily doped silicon, which can also serve as a gate electrode.
3. The method for manufacturing a field effect transistor with near infrared light sensing characteristics according to claim 1, wherein in the step 2, the dielectric layer has good dielectric properties, insulating properties and solubility resistance; it can be silicon dioxide with certain thickness oxidized on the surface of heavily doped silicon as dielectric layer, or cross-linked polyimide, cross-linked polystyrene or cross-linked polyvinyl alcohol.
4. The method for preparing a field effect transistor with the near-infrared light sensing characteristic according to claim 1, wherein in the step 3, the source and drain electrodes need to have good conductivity, and are prepared by evaporation, photoetching or printing processes, and the adopted material is a metal or conductive polymer material; wherein the metal material is selected from gold and silver; the conductive polymer material is PEDOT PSS.
5. The method according to claim 1, wherein in step 4, the monolayer and the dielectric layer are covalently bonded.
6. The method for manufacturing a field effect transistor with near infrared light sensing characteristics according to claim 1, wherein in the step 5, the semiconductor layer is a thin film prepared from a conjugated polymer and organic small molecule blending solution, and has a vertically phase-separated heterostructure; firstly, preparing a blending solution with proper concentration according to the mass ratio of the conjugated polymer to the micromolecules, and preparing a semiconductor layer by adopting a spin coating or blade coating method; wherein, in the mixed solute, the mass fraction of the conjugated polymer is 30-90%, and the total mass volume concentration of the two materials of the blending solution is 6.2-12.8 mg/mL.
7. The method for manufacturing a field effect transistor having a near-infrared light sensing characteristic according to claim 6, wherein the conjugated polymer has pyrrolopyrroledione or dithiophene-fused pyrrolopyrroledione as an acceptor unit, and a benzene ring, thiophene or dithiophene as a donor unit; the organic small molecule is selected from spherical molecule derivatives, such as [6, 6] -phenyl-C71-methyl butyrate (PC71BM) or [6, 6] -phenyl-C61-methyl butyrate (PC61 BM).
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