CN113014092B - Voltage-stabilized power supply, voltage-stabilized power supply method and display device - Google Patents
Voltage-stabilized power supply, voltage-stabilized power supply method and display device Download PDFInfo
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- CN113014092B CN113014092B CN202110480882.6A CN202110480882A CN113014092B CN 113014092 B CN113014092 B CN 113014092B CN 202110480882 A CN202110480882 A CN 202110480882A CN 113014092 B CN113014092 B CN 113014092B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The embodiment of the application provides a voltage-stabilized power supply, a voltage-stabilized power supply method and a display device. The voltage-stabilizing power supply is used for providing analog power supply signals for the display screen and comprises a time sequence controller and a power supply management module electrically connected with the time sequence controller; the time schedule controller is configured to simultaneously send a generated line scanning signal to the display screen and the power management module; the power management module is configured to adjust a duty cycle of a pulse modulation signal according to the line scanning signal to adjust a current value of an analog power supply signal. In the embodiment, the time schedule controller is electrically connected with the power management module, the line scanning signals are used as reference signals, and the current output capacity of the analog power supply signals is correspondingly adjusted, so that the voltage of the analog power supply signals is ensured to be in a stable state, the display effect can be improved, and the noise problem caused by the fluctuation of the analog power supply signals can be avoided.
Description
Technical Field
The present application relates to the field of power supply technologies for display devices, and in particular, to a voltage-stabilized power supply, a voltage-stabilized power supply method, and a display device.
Background
The display panel needs the power management module to provide the working voltage and the driving voltage of each unit in the display panel, wherein, the voltage of the analog power supply signal AVDD directly influences the display effect, if the ripple control of the AVDD is improper, not only the image quality is reduced, but also the problem of exceeding the standard of noise is caused. Especially high resolution (PPI) and high refresh rate display products, are more susceptible to the ripple of the AVDD.
The conventional power management module generates AVDD through a Boost circuit, and regulates the duty ratio of a switching circuit according to the detected voltage/current fluctuation to realize voltage stabilization. However, because the display panel is scanned line by line, the load of the display panel fluctuates periodically, and thus the debugging of the AVDD lags behind the voltage fluctuation, so that the AVDD still has a certain fluctuation problem.
Disclosure of Invention
The application aims at the defects of the existing mode and provides the voltage-stabilizing power supply, the voltage-stabilizing power supply method and the display device, so that the fluctuation problem of AVDD can be effectively solved, the display effect is improved, and the noise problem caused by the fluctuation of the AVDD is improved.
In a first aspect, an embodiment of the present application provides a voltage-stabilized power supply for providing an analog power supply signal for a display screen, where the voltage-stabilized power supply includes a timing controller and a power management module electrically connected to the timing controller; the time schedule controller is configured to simultaneously transmit the generated line scanning signals to the display screen and the power management module; the power management module is configured to adjust a duty ratio of a pulse modulation signal according to the line scanning signal to adjust a current value of an analog power supply signal.
Optionally, when the operating level of the line scanning signal is a low level, the power management module is specifically configured to reduce the duty ratio of the pulse modulation signal within a set time taking a falling edge of the line scanning signal as a starting time to increase the current value of the analog control signal; when the working level of the line scanning signal is a high level, the power management module is specifically configured to boost the duty ratio of the pulse modulation signal within a set time taking a rising edge of the line scanning signal as a starting time so as to boost the current value of the analog control signal.
Optionally, the power management module includes: a register configured to generate a first clock signal according to a preset logic; the phase-locked loop is respectively electrically connected with the time schedule controller and the register and is configured to adjust the first clock signal according to the line scanning signal so as to obtain a second clock signal, the pulse width of the second clock signal is equal to the set time, and the rising edge of the second clock signal is the same as the time when the line scanning signal starts scanning the corresponding line; the analog power supply unit is configured to adjust the duty ratio of the pulse modulation signal within the set time according to the second clock signal so as to adjust the current value of the analog power supply signal.
Optionally, the analog power supply unit comprises: a logic control circuit electrically connected to the phase-locked loop and configured to adjust a duty cycle of the pulse modulation signal within the set time according to the second clock signal; the boost circuit is electrically connected with the logic control unit and is configured to generate the analog power supply signal according to the pulse modulation signal, wherein the current values of the generated analog power supply signal are different according to different duty ratios of the pulse modulation signal.
In a second aspect, an embodiment of the present application provides a display device, including:
a display screen comprising a first input and a second input;
in the above voltage-stabilizing power supply, the power management module is electrically connected to the first input terminal to transmit the analog power supply signal to the display screen through the first input terminal, and the timing controller is electrically connected to the second input terminal to transmit the line scanning signal to the display screen through the second input terminal.
In a third aspect, an embodiment of the present application provides a voltage-stabilized power supply method, including:
the time schedule controller simultaneously transmits the generated line scanning signals to the display screen and the power management module;
and the power supply management module adjusts the duty ratio of the pulse modulation signal according to the line scanning signal so as to adjust the current value of the analog power supply signal.
Optionally, when the working level of the line scanning signal is a low level, the power management module adjusts a duty ratio of a pulse modulation signal according to the line scanning signal to adjust a current value of an analog power supply signal:
and the power supply management module reduces the duty ratio of the pulse modulation signal within a set time taking the falling edge of the line scanning signal as the starting moment so as to improve the current value of the analog control signal.
Optionally, when the working level of the line scanning signal is a high level, the power management module adjusts a duty ratio of a pulse modulation signal according to the line scanning signal to adjust a current value of an analog power supply signal:
and the power supply management module is used for increasing the duty ratio of the pulse modulation signal within a set time taking the rising edge of the line scanning signal as the starting moment so as to increase the current value of the analog control signal.
Optionally, the adjusting, by the power management module, the duty ratio of the pulse modulation signal according to the line scanning signal to adjust the current value of the analog power supply signal includes:
generating a first clock signal according to a preset logic;
adjusting the first clock signal according to the line scanning signal to obtain a second clock signal, wherein the pulse width of the second clock signal is equal to the set time, and the rising edge of the second clock signal is the same as the time when the line scanning signal starts scanning the corresponding line;
and adjusting the duty ratio of the pulse modulation signal within the set time according to the second clock signal so as to adjust the current value of the analog power supply signal.
Optionally, adjusting the duty ratio of the pulse modulation signal within the set time according to the second clock signal to adjust the current value of the analog power supply signal includes:
adjusting the duty ratio of the pulse modulation signal within the set time according to the second clock signal;
and generating the analog power supply signal according to the pulse modulation signal by using a boost circuit, wherein the current values of the analog power supply signal generated by different duty ratios of the pulse modulation signal are different.
The technical scheme provided by the embodiment of the application has the following beneficial technical effects:
the voltage-stabilizing power supply provided by the embodiment of the application, be connected time schedule controller and power management module electricity, regard as reference signal with the line scanning signal, and adjust the current value in order to adjust simulation power supply signal AVDD according to the duty cycle of line scanning signal to the pulse modulation signal, thereby guarantee when line scanning signal begins to charge to the one line of display screen, can corresponding adjustment simulation power supply signal's current output ability, thereby guarantee that the voltage of simulation power supply signal is in stable state, not only can promote the display effect, and can avoid the noise problem because of simulation power supply signal fluctuation arouses.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The above and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 shows a TP signal, a PWM signal, an AVDD signal and I signal in the prior art AVDD A plot of the signal;
fig. 2 is a schematic diagram of a frame structure of a voltage-stabilized power supply according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram illustrating a voltage stabilizing principle of the electrical voltage stabilizing apparatus according to the embodiment of the present application;
fig. 4 is a schematic diagram of a frame structure of a power management module in the regulated power supply provided in the embodiment of the present application;
fig. 5 is a schematic diagram of a frame structure of another power management module in the regulated power supply provided in the embodiment of the present application;
fig. 6 is a schematic structural diagram of a voltage-stabilized power supply according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a display device according to an embodiment of the present application;
fig. 8 is a schematic flowchart of a voltage-stabilizing power supply method according to an embodiment of the present disclosure;
fig. 9 is a schematic flowchart of step S2 in the voltage-stabilized power supply method according to the embodiment of the present application;
fig. 10 is a schematic flowchart of step S203 in the voltage-stabilizing power supply method according to the embodiment of the present application.
Reference numerals are as follows:
1-voltage-stabilizing power supply; 11-a timing controller; 12-a power management module; 121-a register; 122-a phase-locked loop; 123-an analog power supply unit; 1231-logic control circuitry; 1232-a boost circuit;
2-a display screen; 21-a first input; 22-second input terminal.
Detailed Description
Reference will now be made in detail to the present application, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar parts or parts having the same or similar functions throughout. In addition, if a detailed description of the known art is not necessary for illustrating the features of the present application, it is omitted. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
It will be understood by those within the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The display panel needs the power management module to provide the working voltage and the driving voltage of each unit in the display panel, wherein, the voltage of the analog power supply signal AVDD directly influences the display effect, if the ripple control of the voltage of the AVDD is improper, the unstable situation of the voltage of the AVDD occurs, not only the image quality is reduced, but also the problem of exceeding the standard of noise is caused. Especially high resolution (PPI) and high refresh rate display products, are more susceptible to the ripple of the AVDD.
Specifically, the reason for generating the noise problem is that devices such as ceramic capacitors exist in the circuit board, and voltage fluctuation causes a significant piezoelectric effect, which causes mechanical vibration of the capacitor stack to drive the circuit board to vibrate, thereby generating noise.
An existing power management module (e.g., a DCDC module) includes a logic control unit and a Boost circuit Boost, where the logic control unit generates a pulse modulation signal, and the Boost circuit Boost generates an AVDD signal according to the pulse modulation signal. The display screen is scanned line by line, which makes the load of the display screen fluctuate periodically, that is, the current-drawing requirement of the display screen on the AVDD signal changes periodically, and the voltage of the AVDD signal fluctuates.
As shown in fig. 1, based on the problem of fluctuation of the AVDD signal, the inventors of the present application found that, for the Boost circuit Boost using NMOS as the switching tube, the node where the AVDD signal fluctuates is the falling edge of the row scan signal TP, that is, when the row scan signal TP starts to fall, the row charging starts, the current draw of the display screen load increases, which causes the voltage of the AVDD signal to fall, thereby causing the fluctuation of the AVDD signal.
Based on this, the inventor of the present application proposes an idea of connecting the line scan signal TP as a reference signal to the power management module and synchronously adjusting the voltage value of the AVDD signal according to the line scan signal, thereby obtaining an AVDD signal with stable voltage, and provides a regulated power supply, a regulated power supply method and a display device based on the idea, aiming to solve the above technical problems in the prior art.
The embodiment of the present application provides a voltage-stabilized power supply, as shown in fig. 2, for providing an analog power supply signal for a display screen 2, and the voltage-stabilized power supply 1 provided in this embodiment includes a timing controller 11 and a power management module 12 electrically connected to the timing controller 11.
The timing controller 11 is configured to simultaneously transmit the generated line scan signal TP to the display screen 2 and the power management module 12; the power management module 12 is configured to adjust a duty ratio of the pulse modulation signal according to the line scan signal TP to adjust a current value of the analog power supply signal AVDD.
Specifically, the power management module 12 employs a DCDC power management module. The duty ratio of the pulse modulation signal refers to a time ratio of a high level in a unit time in the pulse modulation signal.
The voltage-stabilizing power supply 1 provided by this embodiment electrically connects the timing controller 11 to the power management module 12, uses the line scanning signal TP as a reference signal, and adjusts the duty ratio of the pulse modulation signal according to the line scanning signal TP to adjust the current value of the analog power supply signal AVDD, thereby ensuring that the current output capability of the analog power supply signal AVDD can be correspondingly adjusted when the line scanning signal TP starts to charge one line of the display screen, thereby ensuring that the voltage of the analog power supply signal AVDD is in a stable state, not only improving the display effect, but also avoiding the noise problem caused by the fluctuation of the analog power supply signal AVDD.
Alternatively, as shown in fig. 3, when the operating level of the line scanning signal TP is a low level, the power management module 12 is specifically configured to decrease the duty ratio of the pulse modulation signal PWM to increase the current value of the analog control signal AVDD within a set time starting from the falling edge of the line scanning signal TP.
In this embodiment, the falling edge of the line scanning signal TP is the time when line scanning is started for the corresponding line, and in the set time using the falling edge of the line scanning signal TP as the starting time, since the load of the display screen 2 is increased, that is, the current draw of the display screen 2 is increased, and the current value of the AVDD signal is increased, the increased current draw requirement of the display screen 2 can be met, so that the stability of the AVDD signal can be maintained.
Specifically, for a certain display screen, the duty ratio of the pulse modulation signal PWM is 50% in the original light load interval, and is a heavy load interval in the set time, and the duty ratio of the pulse modulation signal PWM can be adjusted to be 50% to 20% in order to increase the current value of the AVDD signal. Of course, different display panels 2 have different power supply requirements, and the current drawing situations respectively corresponding to the heavy load and the light load are different, so that the setting time and the duty ratio of the pulse modulation signal PWM in the voltage-stabilized power supply 1 for different display panels 2 are different.
Alternatively, when the operating level of the line scanning signal TP is a high level, the power management module 12 is specifically configured to increase the duty ratio of the pulse modulation signal PWM within a set time with the rising edge of the line scanning signal TP as the starting time to increase the current value of the analog control signal.
In this embodiment, the rising edge of the line scanning signal TP is the time when line scanning is started for the corresponding line, and in the set time taking the rising edge of the line scanning signal TP as the starting time, because the load of the display screen 2 increases, that is, the current drawing of the display screen 2 increases, and the current value of the AVDD signal is increased, the increased current drawing requirement of the display screen 2 can be met, so that the stability of the AVDD signal can be maintained.
Specifically, for a certain display screen, the duty ratio of the pulse modulation signal PWM is 20% in the original light load interval, and the duty ratio of the pulse modulation signal PWM is 20% in the set time, and the duty ratio of the pulse modulation signal PWM can be adjusted to 50% in order to increase the current value of the AVDD signal. Of course, different display panels 2 have different power supply requirements, and the current drawing situations respectively corresponding to the heavy load and the light load are different, so that the setting time and the duty ratio of the pulse modulation signal PWM in the voltage-stabilized power supply 1 for different display panels 2 are different.
Further, as shown in fig. 3 and fig. 4, in the regulated power supply 1 provided in this embodiment, the power management module 12 includes a register 121, a phase-locked loop 122 electrically connected to the timing controller 11 and the register 121, respectively, and a power supply analog unit electrically connected to the phase-locked loop 122. The register 121 is configured to generate a first clock signal according to preset logic; the phase-locked loop 122 is configured to adjust the first clock signal according to the line scanning signal TP to obtain a second clock signal, and the analog power supply unit 123 is configured to adjust the duty ratio of the pulse modulation signal PWM within the set time according to the second clock signal to adjust the current value of the analog power supply signal AVDD.
Specifically, the pulse width of the second clock signal CLK2 is equal to the set time, that is, the pulse width of the second clock signal CLK2 is adjusted from the pulse width of the first clock signal CLK1 to the set time, and the rising edge of the second clock signal CLK2 is the same as the time when the scanning of the corresponding row by the row scanning signal TP is started. In this way, the current value of the AVDD signal can be adjusted within the set time by adjusting the duty ratio of the pulse modulation signal PWM within the pulse width of the second pulse signal CLK 2.
It should be noted that the duty cycle of the pulse modulation signal PWM is shifted, that is, the shift of the duty cycle of the pulse modulation signal PWM is different for different second clock signals CLK 2.
Further, as shown in fig. 5, in the regulated power supply 1 provided in the present embodiment, the analog power supply unit 123 includes a logic control circuit 1231 electrically connected to the phase-locked loop 122 and a voltage boost circuit 1232 electrically connected to the logic control circuit 1231. The logic control circuit 1231 is configured to adjust the duty ratio of the pulse modulation signal PWM within the set time according to the second clock signal; the boost circuit 1232 is configured to generate the analog power supply signal AVDD according to the pulse modulation signal PWM, where current values of the analog power supply signal AVDD generated are different for different duty ratios of the pulse modulation signal PWM.
Specifically, as shown in fig. 6, the logic control circuit 1231 processes the second clock signal CLK2 to generate a pulse modulation signal PWM, and the pulse modulation signal PWM controls the on condition of the switching tube T1 in the voltage boost circuit 1232, i.e. controls the on frequency and the time duration of each on of the switching tube T1. When the switch tube T1 is turned on, the input electrical signal VIN is led to the ground through the switch tube T1, and when the switch tube T1 is turned off, the input electrical signal VIN passes through the boost circuit 1231, and is processed by the boost circuit 1231 to form an AVDD signal. The closing frequency and the closing time length of the switching tube T1 control the current value of the AVDD signal, so the current value of the AVDD signal can be adjusted by adjusting the pulse modulation signal.
As shown in fig. 6, the boost circuit 1232 further includes an inductor L, a first capacitor C1, a first capacitor C2, a first resistor R1, a second resistor R2, a third resistor R3, and the like. It should be noted that the boost circuit 1232 can be designed according to specific boost requirements to satisfy different boost ratios, so as to obtain the required AVDD signal.
Based on the same inventive concept, an embodiment of the present application further provides a display device, as shown in fig. 7, the display device provided in this embodiment includes a display screen 2 and the voltage-stabilized power supply 1 in the above embodiment, which has the beneficial effects of the voltage-stabilized power supply 1 in the above embodiment, and is not described herein again.
As shown in fig. 7, the present embodiment provides a display device in which a display screen 2 includes a first input terminal 21 and a second input terminal 22; the power management module 12 is electrically connected to the first input terminal 21 to transmit the analog power supply signal AVDD to the display panel 2 through the first input terminal 21, and the timing controller 11 is electrically connected to the second input terminal 22 to transmit the line scanning signal TP to the display panel 2 through the second input terminal 22.
Specifically, as shown in fig. 7, the first input terminal 21 is a power supply signal terminal, the second input terminal 22 is a source driving terminal, that is, the analog power signal is input to the display 2 from the power supply signal terminal, and the line scanning signal TP is input to the display 2 from the source driving terminal.
Based on the same inventive concept, an embodiment of the present application provides a voltage-stabilizing power supply method, as shown in fig. 2 and 8, the voltage-stabilizing power supply method provided by the embodiment includes:
s1: the timing controller 11 sends the generated line scanning signal TP to the display screen 2 and the power management module 12 at the same time;
s2: the power management module 12 adjusts the duty ratio of the pulse modulation signal according to the line scanning signal TP to adjust the current value of the analog power supply signal AVDD.
In the voltage-stabilizing power supply method provided by this embodiment, the line scanning signal TP is used as a reference signal, and the duty ratio of the pulse modulation signal is adjusted according to the line scanning signal TP to adjust the current value of the analog power supply signal AVDD, so that it is ensured that the current output capability of the analog power supply signal AVDD is improved when one line of the display screen starts to be charged by the line scanning signal TP, and thus it is ensured that the voltage of the analog power supply signal AVDD is in a stable state, not only is the display effect improved, but also the noise problem caused by the fluctuation of the analog power supply signal AVDD can be avoided.
Optionally, as shown in fig. 3, in the voltage-stabilized power supply method provided in this embodiment, when the working level of the line scanning signal TP is a low level, step S2 specifically includes: the power management module 12 reduces the duty ratio of the pulse modulation signal PWM within a set time using the falling edge of the line scanning signal TP as the starting time to increase the current value of the analog control signal.
In this embodiment, the falling edge of the line scanning signal TP is the time when line scanning is started for the corresponding line, and in the set time taking the falling edge of the line scanning signal TP as the starting time, because the load of the display screen 2 increases, that is, the current drawing of the display screen 2 increases, and the current value of the AVDD signal is increased, the increased current drawing requirement of the display screen 2 can be met, so that the stability of the AVDD signal can be maintained.
Specifically, for a certain display screen, the duty ratio of the pulse modulation signal PWM is 50% in the original light load interval, and is a heavy load interval in the set time, and the duty ratio of the pulse modulation signal PWM can be adjusted to be 50% to 20% in order to increase the current value of the AVDD signal. Of course, different display panels 2 have different power supply requirements, and the current drawing situations respectively corresponding to the heavy load and the light load are different, so that the setting time and the duty ratio of the pulse modulation signal PWM in the voltage-stabilized power supply 1 for different display panels 2 are different.
Optionally, in the voltage-stabilized power supply method provided in this embodiment, when the working level of the line scanning signal TP is a high level, the step S2 specifically includes: the power management module 12 increases the duty ratio of the pulse modulation signal PWM within a set time using the rising edge of the line scanning signal TP as the starting time to increase the current value of the analog control signal.
In this embodiment, the rising edge of the line scanning signal TP is the time when line scanning is started for the corresponding line, and in the set time taking the rising edge of the line scanning signal TP as the starting time, since the load of the display screen 2 is increased, that is, the current draw of the display screen 2 is increased, and the current value of the AVDD signal is increased, the increased current draw requirement of the display screen 2 can be met, so that the stability of the AVDD signal can be maintained.
Specifically, for a certain display screen, the duty ratio of the pulse modulation signal PWM is 20% in the original light load interval, and the duty ratio of the pulse modulation signal PWM is 20% in the set time, and the duty ratio of the pulse modulation signal PWM can be adjusted to 50% in order to increase the current value of the AVDD signal. Of course, different display panels 2 have different power supply requirements, and the current drawing situations respectively corresponding to the heavy load and the light load are different, so that the setting time and the duty ratio of the pulse modulation signal PWM in the voltage-stabilized power supply 1 for different display panels 2 are different.
Optionally, as shown in fig. 9, in the regulated power supply method provided in this embodiment, step S2 includes:
s201: and generating a first clock signal according to a preset logic.
S202: the first clock signal is adjusted according to the line scanning signal TP to obtain a second clock signal, a pulse width of the second clock signal is equal to the set time, and a rising edge of the second clock signal CLK2 is the same as a time when the line scanning signal TP starts scanning the corresponding line.
Specifically, the pulse width of the second clock signal is equal to the set time, i.e., the pulse width of the second clock signal is adjusted from the pulse width of the first clock signal to the set time. In this way, the current value of the AVDD signal within the set time can be adjusted by adjusting the duty ratio of the pulse modulation signal PWM within the pulse width of the second pulse signal.
S203: and adjusting the duty ratio of the pulse modulation signal PWM within a set time according to the second clock signal to adjust the current value of the analog power supply signal AVDD.
Further, as shown in fig. 10, in the regulated power supply method provided in this embodiment, S203 includes:
s2031: and adjusting the duty ratio of the pulse modulation signal PWM in the set time according to the second clock signal.
S2032: and generating an analog power supply signal AVDD by using the booster circuit according to the pulse modulation signal PWM, wherein the current values of the analog power supply signal AVDD generated by different duty ratios of the pulse modulation signal PWM are different.
It should be noted that the boost circuit can be designed according to specific boost requirements to satisfy different boost ratios, so as to obtain the required AVDD signal.
By applying the embodiment of the application, the following beneficial effects can be at least realized:
the voltage-stabilizing power supply provided by the embodiment of the application, be connected time schedule controller and power management module electricity, regard as reference signal with the line scanning signal, and adjust the current value in order to adjust simulation power supply signal AVDD according to the duty cycle of line scanning signal to the pulse modulation signal, thereby guarantee when line scanning signal begins to charge to the one line of display screen, can corresponding adjustment simulation power supply signal's current output ability, thereby guarantee that the voltage of simulation power supply signal is in stable state, not only can promote the display effect, and can avoid the noise problem because of simulation power supply signal fluctuation arouses.
Those of skill in the art will understand that various operations, methods, steps in the flow, measures, schemes discussed in this application can be alternated, modified, combined, or deleted. Further, various operations, methods, steps, measures, schemes in the various processes, methods, procedures that have been discussed in this application may be alternated, modified, rearranged, decomposed, combined, or eliminated. Further, steps, measures, schemes in the prior art having various operations, methods, procedures disclosed in the present application may also be alternated, modified, rearranged, decomposed, combined, or deleted.
In the description of the present application, it is to be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be construed as limiting the present application.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, the meaning of "a plurality" is two or more unless otherwise specified.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in this application will be understood to be a specific case for those of ordinary skill in the art.
The particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
The foregoing is only a partial embodiment of the present application, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present application, and these modifications and decorations should also be regarded as the protection scope of the present application.
Claims (8)
1. A voltage-stabilizing power supply is used for providing analog power supply signals for a display screen and is characterized by comprising a time sequence controller and a power management module electrically connected with the time sequence controller;
the time schedule controller is configured to simultaneously transmit the generated line scanning signals to the display screen and the power management module;
the power management module is configured to adjust the duty ratio of a pulse modulation signal according to the line scanning signal so as to adjust the current value of an analog power supply signal; when the working level of the line scanning signal is a low level, the power management module is specifically configured to reduce the duty ratio of the pulse modulation signal within a set time taking a falling edge of the line scanning signal as a starting moment, so that the display screen enters a heavy load interval from a light load interval, and the current value of the analog power supply signal is increased; when the working level of the line scanning signal is a high level, the power management module is specifically configured to increase the duty ratio of the pulse modulation signal within a set time taking a rising edge of the line scanning signal as an initial time, so that the display screen enters a heavy load interval from a light load interval to increase the current value of the analog power supply signal; wherein the set time is the heavy load interval;
the power management module comprises:
a register configured to generate a first clock signal according to a preset logic;
the phase-locked loop is respectively electrically connected with the time schedule controller and the register and is configured to adjust the first clock signal according to the line scanning signal so as to obtain a second clock signal, the pulse width of the second clock signal is equal to the set time, and the rising edge of the second clock signal is the same as the time when the line scanning signal starts scanning the corresponding line;
the analog power supply unit is configured to adjust the duty ratio of the pulse modulation signal within the set time according to the second clock signal so as to adjust the current value of the analog power supply signal.
2. The regulated power supply according to claim 1, wherein the analog power supply unit comprises:
a logic control circuit electrically connected with the phase-locked loop and configured to adjust a duty ratio of the pulse modulation signal within the set time according to the second clock signal;
the boost circuit is electrically connected with the logic control circuit and is configured to generate the analog power supply signal according to the pulse modulation signal, wherein the current values of the generated analog power supply signal are different according to different duty ratios of the pulse modulation signal.
3. A display device, comprising:
a display screen comprising a first input and a second input;
the regulated power supply of any one of claims 1-2, said power management module electrically coupled to said first input to transmit said analog power signal to said display screen through said first input, said timing controller electrically coupled to said second input to transmit said line scan signal to said display screen through said second input.
4. A regulated power supply method for use in the regulated power supply of any one of claims 1-2, comprising:
the time schedule controller simultaneously transmits the generated line scanning signals to the display screen and the power supply management module;
and the power supply management module adjusts the duty ratio of the pulse modulation signal according to the line scanning signal so as to adjust the current value of the analog power supply signal.
5. The voltage-stabilized power supply method according to claim 4, wherein when the operating level of the line scanning signal is low level, the power management module adjusts the duty ratio of the pulse modulation signal according to the line scanning signal to adjust the current value of the analog power supply signal:
and the power supply management module reduces the duty ratio of the pulse modulation signal within a set time taking the falling edge of the line scanning signal as the starting moment so as to improve the current value of the analog power supply signal.
6. The voltage-stabilized power supply method according to claim 4, wherein when the operating level of the line scanning signal is high level, the power management module adjusts the duty ratio of the pulse modulation signal according to the line scanning signal to adjust the current value of the analog power supply signal:
and the power supply management module is used for increasing the duty ratio of the pulse modulation signal within a set time taking the rising edge of the line scanning signal as the starting moment so as to increase the current value of the analog power supply signal.
7. The voltage-stabilized power supply method according to claim 5 or 6, wherein the power management module adjusts a duty ratio of a pulse modulation signal according to the line scanning signal to adjust a current value of an analog power supply signal, and comprises:
generating a first clock signal according to a preset logic;
adjusting the first clock signal according to the line scanning signal to obtain a second clock signal, wherein the pulse width of the second clock signal is equal to the set time, and the rising edge of the second clock signal is the same as the time when the line scanning signal starts scanning the corresponding line;
and adjusting the duty ratio of the pulse modulation signal within a set time according to the second clock signal so as to adjust the current value of the analog power supply signal.
8. The regulated power supply method according to claim 7, wherein adjusting the duty ratio of the pulse modulation signal in a set time according to the second clock signal to adjust the current value of the analog power supply signal comprises:
adjusting the duty ratio of the pulse modulation signal within the set time according to the second clock signal;
and generating the analog power supply signal according to the pulse modulation signal by using a booster circuit, wherein the current values of the generated analog power supply signal are different according to different duty ratios of the pulse modulation signal.
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| CN202855274U (en) * | 2012-09-27 | 2013-04-03 | 京东方科技集团股份有限公司 | Time-sequence control circuit, backlight scanning driving system and backlight source |
| TWI496405B (en) * | 2013-07-05 | 2015-08-11 | Nat Univ Chung Cheng | A single inductance multi-stage output conversion device that increases the load range |
| CN105553260B (en) * | 2016-01-26 | 2018-04-24 | 昆山龙腾光电有限公司 | A kind of program-controlled voltage adjustment circuit |
| CN108615501B (en) * | 2018-06-26 | 2024-01-16 | 富满微电子集团股份有限公司 | Driving method and driving circuit for eliminating ghosts of LED display screen and LED display screen |
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