CN113010147B - FFT arithmetic device and microphone - Google Patents

FFT arithmetic device and microphone Download PDF

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CN113010147B
CN113010147B CN202110206599.4A CN202110206599A CN113010147B CN 113010147 B CN113010147 B CN 113010147B CN 202110206599 A CN202110206599 A CN 202110206599A CN 113010147 B CN113010147 B CN 113010147B
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齐鲁欣
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Goertek Microelectronics Inc
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
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    • G06F7/5446Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation using crossaddition algorithms, e.g. CORDIC
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
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    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141Discrete Fourier transforms
    • G06F17/142Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
    • HELECTRICITY
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    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
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Abstract

The embodiment of the present disclosure provides an FFT operation device and a microphone, wherein the TTF operation device includes: the calculation module is used for receiving a target signal and calculating a first variable value of the target signal for a first type of monomial of an FFT polynomial and a second variable value of a second type of monomial of the FFT polynomial, wherein the second type of monomial is a monomial with a rotation factor; the conversion module is used for receiving the second variable value provided by the calculation module and carrying out Cordic rotation on the second variable value to obtain a product value of the second variable value and the rotation factor of the corresponding monomial; and the adder group is used for receiving the first variable value provided by the calculation module and the product value provided by the conversion module, and performing addition operation on the first variable value and the product value to obtain a signal value after FFT processing is performed on the target signal.

Description

FFT arithmetic device and microphone
Technical Field
The present disclosure relates to the field of smart microphones, and more particularly, to an FFT operation device and a microphone.
Background
In the large context of artificial intelligence, smart microphones (Smart MICs) come with it. Generally, a smart microphone is added with a speech recognition technology based on deep learning on the basis of a traditional microphone, so that the smart microphone is applied intelligently. In the implementation of the smart microphone, fast Fourier Transform (FFT) is used, which is limited by the size characteristics of the microphone, and the conventional implementation manner based on the multiplier cannot meet the requirement of the chip area, reduce the precision of the multiplier, and cannot meet the requirement of the voice recognition algorithm. Therefore, there is a need for improvement in view of the above-mentioned drawbacks.
BRIEF SUMMARY OF THE PRESENT DISCLOSURE
An object of the embodiments of the present disclosure is to provide a new technical solution for an FFT operation device.
According to a first aspect of the present disclosure, there is provided an FFT operation device including:
the calculation module is used for receiving a target signal and calculating a first variable value of the target signal for a first type of monomial of an FFT polynomial and a second variable value of a second type of monomial of the FFT polynomial, wherein the second type of monomial is a monomial with a rotation factor;
the conversion module is used for receiving the second variable value provided by the calculation module and carrying out Cordic rotation on the second variable value to obtain a product value of the second variable value and the rotation factor of the corresponding monomial;
and the adder group is used for receiving the first variable value provided by the calculation module and the product value provided by the conversion module, and performing addition operation on the first variable value and the product value to obtain a signal value after FFT processing is performed on the target signal.
Optionally, the FFT is a radix-4 FFT, the radix-4 FFT having one first-type polynomial and three second-type polynomials.
Optionally, the conversion module is configured to receive three second variable values provided by the calculation module, and perform Cordic rotation on the three second variable values respectively to obtain a first product value, a second product value, and a third product value;
the adder group at least comprises a first adder, a second adder and a third adder, wherein the first adder is used for receiving the first variable value provided by the calculation module and the first product value provided by the conversion module and adding the first variable value and the first product value to obtain a first result;
the second adder is used for receiving the second product value and the third product value provided by the conversion module and performing addition operation on the second product value and the third product value to obtain a second result;
and the third adder is used for receiving the first result provided by the first adder and the second result provided by the second adder, and performing addition operation on the first result and the second result to obtain a third result, which is used as a signal value after the target signal is subjected to FFT processing.
Optionally, the apparatus further comprises a storage module,
the storage module is used for receiving the second variable value provided by the calculation module and storing the second variable value;
the conversion module is used for reading the second variable value from the storage module and carrying out Cordic rotation on the second variable value to obtain the product value;
and the storage module is used for receiving the product value and storing the product value to an address corresponding to the second variable value.
Optionally, the storage module is configured to receive the first variable value provided by the calculation module;
and the adder group is used for reading the first variable value and the second variable value from the storage module, and performing addition operation on the first variable value and the second variable value to obtain a signal value after the target signal is subjected to FFT processing.
Optionally, the memory module has four memory cells, and each memory cell has a corresponding read interface.
Optionally, the conversion module is configured to obtain a target rotation number, and perform Cordic rotation on the second variable value based on the target rotation number to obtain the product value.
Optionally, the target number of rotations is any one of 9 to 12.
Optionally, the apparatus further comprises a configuration module,
the configuration module is used for providing a configuration interface for configuring the rotation times, and acquiring the rotation times configured through the configuration interface as the target rotation times.
According to a second aspect of the present disclosure, there is also provided a microphone, comprising:
means for implementing FFT as claimed in any one of claims 1-9.
According to the embodiment of the disclosure, a calculation module is used for calculating a first variable value of a target signal for a first type of monomial in an FFT polynomial and a second variable value of a second type of monomial in the FFT polynomial, the second type of monomial has a twiddle factor, the second variable value is rotated by using a Cordic algorithm to obtain a product value of the second variable value and the twiddle factor of the corresponding monomial, and the first variable value and the product value are added by using an adder group to obtain a signal value after FFT processing of the target signal.
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The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a functional block diagram of an FFT operation device according to an embodiment of the present disclosure;
fig. 2 is a functional block diagram of an FFT operation device according to another embodiment of the present disclosure;
fig. 3 is a functional block diagram of a microphone according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as exemplary only and not as limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be discussed further in subsequent figures.
The embodiment of the disclosure provides an FFT operation device, which can be applied to a microphone. The microphone may be provided in the electronic device or may be a device independent from the electronic device. The microphone may be a smart microphone that may perform speech signal recognition based on FFT operations.
Fig. 1 is a block schematic diagram of an FFT operation apparatus according to an embodiment of the present disclosure.
Referring to fig. 1, the FFT operation device 10 includes a computation module 110, a conversion module 120, and an adder group 130, wherein the computation module 110 is communicatively connected to the adder group 130, the computation module 110 is communicatively connected to the conversion module 120, and the adder group 130 is communicatively connected to the conversion module 120.
The calculating module 110 is configured to receive a target signal and calculate a first variable value of the target signal for a first type of polynomial of the FFT polynomial and a second variable value for a second type of polynomial of the FFT polynomial.
The above second-type monomials are monomials with a rotation factor.
The above target signal may be a speech signal, and the speech signal may be represented as x (N) (N =1,2, 3.,. N-1), where N is a point number of the speech signal, and the point number may be a value set according to a specific application scenario and a specific application requirement, and the point number may be 1024, for example, and the embodiment is not limited herein.
In this embodiment, the FFT may be a radix-4 FFT, the radix-4 FFT having one first-type polynomial and three second-type polynomials. It is understood that the FFT may also be a radix-2 FFT, a radix-8 FFT, a radix-16 FFT, etc., and the embodiment is not limited herein.
Taking FFT as an example of radix-4 FFT, i.e. the smart microphone adopts a real FFT structure of 1024 points, radix-4 structure, where the above speech signal can be expressed as x (n) (n =1,2, 3...., 1024-1), in general, radix-4 FFT polynomial of the sequence can be expressed as:
Figure BDA0002951024460000051
wherein N is the number of points in the sequence, N is 1024, k is an integer from 1 to N-1, X 0 (k) Representing a value of a first variable, X 1 (k)、X 2 (k)、X 3 (k) Representing a value of a second variable, an
Figure BDA0002951024460000055
Figure BDA0002951024460000056
The twiddle factors are represented, and the above values are all unknown numbers.
Here, the calculation module 110 can calculate a first variable value X of the speech signal for the first-type monomials of the radix-4 FFT polynomial 0 (k) And a second variable value X for a second class of monomials of the FFT polynomial 1 (k)、X 2 (k)、X 3 (k) The following formula can be obtained:
Figure BDA0002951024460000052
wherein N is the number of points in the sequence, N is 1024, k is an integer from 1 to N-1, X 0 (k) A first variable value, X ', representing a first type of monomial' 1 (k)、X‘ 2 (k)、X‘ 3 (k) Represents a polynomial of the second kind, wherein X 1 (k)、X 2 (k)、X 3 (k) Representing a value of a second variable, an
Figure BDA0002951024460000053
Representing the twiddle factor.
The conversion module 120 is configured to receive the second variable value provided by the calculation module 110, and perform Cordic rotation on the second variable value to obtain a product value of the second variable value and the rotation factor of the corresponding monomial.
In this embodiment, in the case that the FFT is the radix-4 FFT, since the radix-4 FFT has one first-type monomial and three second-type monomials, the conversion module 120 may receive three second variable values provided by the calculation module, and perform Cordic rotation on the three second variable values respectively to obtain the first product value, the second product value, and the third product value.
Illustratively, the second variable value X may be 1 (k)、X 2 (k) And X 3 (k) Performing Cordic rotation respectively to obtain X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000054
Is taken as a first product value to obtain X 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000061
As a second product value, and X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000062
The product value of (c) is used as the third product value. How to perform Cordic rotation belongs to the prior art, and this embodiment is not described in detail herein.
Compared with the prior art which utilizes a multiplier to calculate X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000063
Product value of, X 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000064
Product value of and X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000065
The apparatus of the embodiment of the present disclosure does not introduce a multiplier, but uses Cordic rotation algorithm to calculate X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000066
Product value of, X 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000067
Product value of and X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000068
The product value of (2) not only occupies small area, but also has simple process and high efficiency.
In this embodiment, the conversion module 120 is configured to obtain a target rotation number for Cordic rotation, and perform Cordic rotation on the second variable value based on the target rotation number to obtain a product value.
The number of rotations may be any one of 9 to 12.
For example, cordic rotation may be performed for different second variable values, each with the same number of rotations, e.g. the second variable value X may be set 1 (k)、X 2 (k) And X 3 (k) Each subjected to 9 Cordic rotations to obtain X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000069
Is taken as a first product value to obtain X 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA00029510244600000610
As a second product value, and X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA00029510244600000611
The product value of (c) is used as the third product value.
For example, the number of revolutions may be provided for different values of the second variable, wherein the number of revolutions provided for different values of the second variable is provided separatelyThe numbers may be the same or different, e.g. the second variable value X may be varied 1 (k) Performing 9 Coric rotations, and adjusting the value of the second variable X 2 (k) 10 Cordic rotations are performed and the second variable value X is varied 3 (k) Subjected to 9 Cordic rotations to obtain X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA00029510244600000612
Is taken as a first product value to obtain X 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA00029510244600000613
As a second product value, and obtaining X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA00029510244600000614
The product value of (d) is taken as the third product value.
The adder group 130 is configured to receive the first variable value provided by the calculating module 110 and the product value provided by the converting module 120, and add the first variable value and the product value to obtain a signal value after FFT processing of the target signal.
In this embodiment, when the FFT is radix-4 FFT, the radix-4 FFT has one first type polynomial and three second type polynomials, and meanwhile, the conversion module 120 is used to perform Cordic rotation on the three second variable values respectively, so as to obtain the first product value, the second product value, and the third product value.
Correspondingly, the adder group 130 includes at least a first adder 131, a second adder 132, and a third adder 133. The first adder 131 is configured to receive the first variable value provided by the calculating module 110 and the first product value provided by the converting module 120, and add the first variable value and the first product value to obtain a first result, the second adder 132 is configured to receive the second product value and the third product value provided by the converting module 120, and add the second product value and the third product value to obtain a second result, and the third adder is configured to receive the first result provided by the first adder and the second result provided by the second adder, and add the first result and the second result to obtain a third result, which is used as a signal value after FFT processing of the target signal.
Illustratively, the second variable value X is converted in the conversion module 120 1 (k)、X 2 (k) And X 3 (k) Performing Coriic rotation to obtain X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000071
Obtaining X is obtained 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000072
And obtaining X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000073
After the third product value, the first adder 131 may add X 0 (k) And X' 2 (k) Adding as the first result, or adding X 0 (k) and-X' 2 (k) The second adder 132 may, for example, sum X 'as the second first result' 1 (k) And X' 3 (k) Adding as a first second result, -jX' 1 (k) and-X' 3 (k) Adding as a second result, -X' 1 (k) and-X' 3 (k) Adding as a third second result, jX' 1 (k) And jX' 3 (k) Adding as a fourth second result, the third adder may add the first result and the first second result to obtain a final X (k), and add the second first result and the second result to obtain a final X (k)
Figure BDA0002951024460000074
Adding the first result and the third second result to obtain the final result
Figure BDA0002951024460000075
Will be the second oneThe first result and the fourth second result are added to obtain the final result
Figure BDA0002951024460000076
Of course, the adder group 130 may further include a fourth adder 134, so as to solve the problem that data does not need to be buffered during the addition operation.
It is understood that, as shown in fig. 2, the FFT operation apparatus 10 in the embodiment of the present disclosure may further include a control module 150, and the control module 150 may control the operations of other modules.
According to the embodiment of the disclosure, a calculation module is used for calculating a first variable value of a target signal for a first type of monomial in an FFT polynomial and a second variable value of a second type of monomial in the FFT polynomial, the second type of monomial has a twiddle factor, the second variable value is rotated by using a Cordic algorithm to obtain a product value of the second variable value and the twiddle factor of the corresponding monomial, and the first variable value and the product value are added by using an adder group to obtain a signal value after FFT processing of the target signal.
In one embodiment, referring to fig. 1, the FFT operation apparatus 10 further includes a storage module 140. The memory module 140 has four memory cells, for example, a first memory cell 141, a second memory cell 142, a third memory cell 143, and a fourth memory cell 144, and each memory cell 140 has a corresponding read interface to facilitate reading of data.
The storage module 140 is configured to receive the second variable value provided by the calculation module 110 and store the second variable value.
Illustratively, this may be through the first storage unit 141Receives the second variable value X provided by the calculation module 110 1 (k)、X 2 (k)、X 3 (k) And varying the value X of the second variable 1 (k)、X 2 (k)、X 3 (k) Respectively, address 1, address 2, and address 3 to the first memory cell 141.
The conversion module 120 is configured to read the second variable value from the storage module 140 and perform Cordic rotation on the second variable value to obtain a product value.
Illustratively, the rotation module 120 may read X in address 1 through the read interface of the first storage unit 141 1 (k) X in address 2 2 (k) And X in Address 3 3 (k) And are each directed to X 1 (k)、X 2 (k) And X 3 (k) Performing Cordic rotation to obtain X 1 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000081
Is taken as a first product value to obtain X 2 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000082
As a second product value, and obtaining X 3 (k) Twiddle factor corresponding to the corresponding monomial
Figure BDA0002951024460000083
The product value of (c) is used as the third product value.
The storage module 140 is configured to receive the product value and store the product value to an address corresponding to the second variable value.
Illustratively, after obtaining the first product value, the second product value, and the third product value, the first product value may be written back to address 1, the second product value may be written back to address 2, and the third product value may be written back to address 3 through the read interface of the first memory unit 141.
According to the method disclosed by the embodiment of the disclosure, after Cordic rotation is performed, the product value is written back to the storage module 140, and then unified complex addition and subtraction operation is performed, although the access times of the storage module 140 can be increased by the separated processing mode, because the storage module 140 includes four storage units, that is, the problem of large access times is solved by increasing parallel access bandwidth, through separation of multiplication and addition, for the time division multiplexing control strategy of the control module, the method can be simpler and more efficient, the area can be saved to the greatest extent on the premise of meeting time/performance, and the area requirement of Smart MIC is realized.
In one embodiment, the storage module 140 is configured to receive the first variable value provided by the calculation module 110.
Illustratively, the first variable value X provided by the calculation module 110 may be received through the read interface of the second storage unit 142 0 (k) And applying the first variable value X 0 (k) Address 1 to the first memory cell 141 is stored.
The adder group 130 is configured to read the first variable value and the second variable value from the storage module 140, and add the first variable value and the second variable value to obtain a signal value after FFT processing of the target signal.
Illustratively, taking the above formula (2) as an example, the first adder 131 can read X in address 1 through the read interface of the second storage unit 142 0 (k) And, the first product value in the address 1 is read through the read interface of the first storage unit 141, and the first variable value and the first product value are added to obtain a first result, the second adder 132 may read the second product value in the address 2 and the third product value in the address 3 through the read interface of the first storage unit 141, and add the second product value and the third product value to obtain a second result, and the third adder 1333 adds the first result and the second result to obtain a third result, which is a signal value obtained by performing FFT processing on the target signal.
In one embodiment, the FFT operation device 10 further includes a configuration module 150 (not shown).
The configuration module 150 is configured to provide a configuration interface configured with the rotation number, and obtain the rotation number configured through the configuration interface as a target rotation number.
The configuration interface may be an input box, a drop-down list, a voice input, etc., for example, an operator may input a required number of rotations as a target number of rotations through the input box; for another example, the operator may select a desired number of rotations as the target number of rotations from the pull-down list; for another example, the operator may input the number of rotations required as the target number of rotations by voice.
The target number of rotations may be any of 9 to 12.
For example, different numbers of rotations may be set for different second variable values, in which case, the target number of rotations is 3; for example, the same number of rotations may be set for different second variable values, and in this case, the target number of rotations may be only 1.
According to the embodiment of the disclosure, a man-machine interaction interface is provided to support an operator to select the required rotation times according to the current actual needs, so as to realize customized design.
The present disclosed embodiment also provides a microphone 20, as shown in fig. 3, including:
any of the FFT computation apparatus 10 provided in the apparatus embodiments section above.
In this embodiment, the microphone may be disposed in the electronic device, or may be a device independent from the electronic device. The microphone may be a smart microphone that may implement recognition of the speech signal based on FFT operations.
In this embodiment, since the microphone provided by the present disclosure includes any one of the FFT computation devices provided in the foregoing device embodiment section, the microphone provided by the present disclosure can achieve the same function as any one of the FFT computation devices provided in the foregoing device embodiment section. The calculation module is used for calculating a first variable value of a target signal to a first type of monomial in an FFT polynomial and a second variable value of a second type of monomial in the FFT polynomial, the second type of monomial has a twiddle factor, the second variable value is rotated by a Cordic algorithm to obtain a product value of the second variable value and the twiddle factor of the corresponding monomial, the first variable value and the product value are added by an adder group to obtain a signal value after FFT processing of the target signal.
The above embodiments mainly focus on differences from other embodiments, but it should be clear to those skilled in the art that the above embodiments can be used alone or in combination with each other as needed.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from other embodiments, but it should be clear to a person skilled in the art that the embodiments described above can be used alone or in combination with each other as needed. In addition, for the device embodiment, since it corresponds to the method embodiment, the description is relatively simple, and for relevant points, reference may be made to the description of the corresponding parts of the method embodiment. The system embodiments described above are merely illustrative.
The present invention may be a system, method and/or computer program product. The computer program product may include a computer-readable storage medium having computer-readable program instructions embodied therewith for causing a processor to implement various aspects of the present invention.
The computer-readable storage medium may be a tangible device that can hold and store the instructions for use by the instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. Computer-readable storage media as used herein is not to be interpreted as a transitory signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., optical pulses through a fiber optic cable), or an electrical signal transmitted through an electrical wire.
The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing/processing device.
The computer program instructions for carrying out operations of the present invention may be assembler instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present invention are implemented by personalizing an electronic circuit, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA), with state information of computer-readable program instructions, which can execute the computer-readable program instructions.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer-readable medium storing the instructions comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions. It is well known to those skilled in the art that implementation by hardware, by software, and by a combination of software and hardware are equivalent.
Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein. The scope of the invention is defined by the appended claims.

Claims (8)

1. An FFT operation device, comprising:
the calculation module is used for receiving a target signal and calculating a first variable value of the target signal for a first type of monomial of an FFT polynomial and a second variable value of a second type of monomial of the FFT polynomial, wherein the second type of monomial is a monomial with a rotation factor;
the conversion module is used for receiving the second variable value provided by the calculation module and carrying out Cordic rotation on the second variable value to obtain a product value of the second variable value and the rotation factor of the corresponding monomial;
the adder group is used for receiving the first variable value provided by the calculation module and the product value provided by the conversion module, and performing addition operation on the first variable value and the product value to obtain a signal value after FFT processing is performed on the target signal;
wherein the FFT is a radix-4 FFT, the radix-4 FFT having one first-type polynomial and three second-type polynomials;
the conversion module is used for receiving the three second variable values provided by the calculation module and respectively carrying out Cordic rotation on the three second variable values to obtain a first product value, a second product value and a third product value;
the adder group at least comprises a first adder, a second adder and a third adder, wherein the first adder is used for receiving a first variable value provided by the calculation module and a first product value provided by the conversion module and adding the first variable value and the first product value to obtain a first result;
the second adder is used for receiving the second product value and the third product value provided by the conversion module and performing addition operation on the second product value and the third product value to obtain a second result;
and the third adder is configured to receive the first result provided by the first adder and the second result provided by the second adder, and perform addition operation on the first result and the second result to obtain a third result, which is used as a signal value after FFT processing is performed on the target signal.
2. The apparatus of claim 1, further comprising a storage module,
the storage module is used for receiving the second variable value provided by the calculation module and storing the second variable value;
the conversion module is used for reading the second variable value from the storage module and carrying out Cordic rotation on the second variable value to obtain the product value;
and the storage module is used for receiving the product value and storing the product value to an address corresponding to the second variable value.
3. The apparatus of claim 2,
the storage module is used for receiving the first variable value provided by the calculation module;
the adder group is configured to read the first variable value and the product value from the storage module, and perform addition operation on the first variable value and the product value to obtain a signal value obtained by performing FFT processing on the target signal.
4. The apparatus of claim 2 or 3,
the memory module has four memory cells, each memory cell having a corresponding read interface.
5. The apparatus of claim 1,
and the conversion module is used for acquiring the target rotation times and carrying out Cordic rotation on the second variable value based on the target rotation times to obtain the product value.
6. The apparatus of claim 5,
the target number of rotations is any one of 9 to 12.
7. The apparatus of claim 6, further comprising a configuration module,
the configuration module is used for providing a configuration interface for configuring the rotation times, and acquiring the rotation times configured through the configuration interface as the target rotation times.
8. A microphone, comprising:
means for implementing an FFT, said means for implementing an FFT being in accordance with any one of claims 1 to 7.
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