CN112994683A - Crystal oscillator based on jitter injection and negative resistance boosting - Google Patents
Crystal oscillator based on jitter injection and negative resistance boosting Download PDFInfo
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- CN112994683A CN112994683A CN202110203722.7A CN202110203722A CN112994683A CN 112994683 A CN112994683 A CN 112994683A CN 202110203722 A CN202110203722 A CN 202110203722A CN 112994683 A CN112994683 A CN 112994683A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L3/00—Starting of generators
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
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Abstract
The invention discloses a crystal oscillator based on jitter injection and negative resistance boosting, which comprises a Gaussian pulse injection oscillator, a state machine and a clock signal, wherein the clock signal is output to the state machine by the Gaussian pulse injection oscillator, the output enabling signal of the state machine respectively activates the Gaussian pulse injection oscillator and a negative resistance boosting module, input signals are respectively connected into a state machine FSM (finite state machine) and a Pierce oscillator, the state machine generates frequency tuning words for adjusting the oscillation frequency of the Gaussian pulse injection oscillator, the oscillation frequency is concentrated on the resonance frequency of the crystal oscillator, and the Gaussian pulse injection oscillator and the Pierce oscillator output oscillation starting signals to the crystal oscillator. The invention concentrates the energy of the injection signal on the resonance frequency of the crystal and simultaneously keeps the stability of the frequency deviation between the injection signal and the crystal oscillator, the negative resistance boosting module consisting of the phase inverter unit further reduces the starting time, and the invention has the advantage of low power consumption on the premise of ensuring the quick start of the crystal oscillator and has wide practical value.
Description
Technical Field
The invention relates to the field of crystal oscillators, in particular to a crystal oscillator based on jitter injection and negative resistance boosting.
Background
With the rapid development of the internet of things technology, wearable devices, sensor nodes and the like are widely applied to various fields such as military, biomedicine, environmental detection and the like. These devices and sensor nodes are typically battery powered, and due to the constraints of device size and battery technology, to reduce the power consumption of such chips, the system tends to operate periodically and stay in sleep mode for long periods of time, waking up only when data needs to be transmitted or received, including the clock circuitry of the chip. Because of the stable frequency characteristic, the crystal oscillator is often used as a clock source of the chip, but the stable oscillation starting of the crystal oscillator requires hundreds of microseconds, and the chip is in a power-on waiting state in the period of time. The longer the attack time, the greater the energy consumption wasted in the wait state. In the whole system, the start-up time of the crystal oscillator dominates the delay of the whole system, and finally, the energy consumption in the cycle period is increased, so that the energy efficiency ratio of the cycle period is remarkably reduced. In summary, it is important to reduce the start-up time of the crystal oscillator.
In recent years, there has been much research into fast start-up crystal oscillators. The start-up time of the crystal oscillator can be reduced by selecting crystal resonator parameters that favor short start-up times, but this adversely affects the stable oscillation performance of the crystal oscillator. For example, a crystal with a lower quality factor will have a smaller start-up time but will degrade the frequency stability and phase noise performance of the crystal. The constant frequency injection energy is adopted to effectively accelerate the oscillation starting of the crystal oscillator, and the frequency of the ring oscillator is required to be consistent with that of the crystal oscillator and is not influenced by PVT. However, it is known that the oscillation frequency of the ring oscillator is very susceptible to PVT, and therefore, it is necessary to design a ring oscillator that is not affected by PVT at great expense, resulting in a large circuit area. The CI (Chirp-Injection) method improves the defect that the Injection oscillator needs to be trimmed. During the start-up phase, the CI generates a CI signal that sweeps the frequency from a high frequency to a low frequency, in which frequency range the CI signal corresponds to a large bandwidth signal covering the frequency variations due to process and supply voltage, temperature. When the injection frequency matches the frequency of the crystal oscillator, the CI charges the crystal instantaneously, but a large amount of energy is wasted during the CI phase.
Disclosure of Invention
The purpose of the invention is as follows: the invention aims to provide a crystal oscillator based on jitter injection and negative resistance boosting, which realizes quick start of the crystal oscillator, and reduces system power consumption and phase noise of the crystal oscillator.
The technical scheme is as follows: a crystal oscillator based on jitter injection and negative resistance boosting comprises a Gaussian pulse injection oscillator, a Pierce oscillator, a negative resistance boosting module and a state machine FSM (finite State machine), wherein the Gaussian pulse injection oscillator outputs a clock signal to the state machine, an output enabling signal of the state machine respectively activates the Gaussian pulse injection oscillator and the negative resistance boosting module, an input signal is respectively connected to the state machine FSM and the Pierce oscillator, the state machine generates a frequency tuning word for adjusting the oscillation frequency of the Gaussian pulse injection oscillator, the oscillation frequency is concentrated on the resonance frequency of the crystal oscillator, and the Gaussian pulse injection oscillator and the Pierce oscillator output oscillation starting signals to the crystal oscillator.
Preferably, the gaussian type pulse injection oscillator includes: fourth PMOS transistor Mp4Respectively with the fifth PMOS transistor Mp5Sixth PMOS transistor Mp6Seventh PMOS transistor Mp7Eighth PMOS transistor Mp8Is connected to the gate of a fourth PMOS transistor Mp4The fifth PMOS transistor Mp5Sixth PMOS transistor Mp6Seventh PMOS transistor Mp7Eighth PMOS transistor Mp8The sources of the two-way transistor are connected with a power supply Vdd;
fourth PMOS transistor Mp4Is connected to the gate and to the second NMOS transistor MN2Is controlled by a 10-bit frequency tuning word generated by a state machine;
fifth PMOS transistor Mp5And the third NMOS transistor MN3The drain electrodes of the first and second transistors are connected; sixth PMOS transistor Mp6Is connected to the input of inverter inv 1; seventh PMOS transistor Mp7Is connected to the input of inverter inv 2; eighth PMOS transistor Mp8Is connected to the input of inverter inv 3;
third NMOS transistor MN3Respectively with the fourth NMOS transistor MN4The fifth NMOS transistor MN5And a sixth NMOS transistor MN6Is connected to the gate of the third NMOS transistor MN3A fourth NMOS transistor MN4The fifth NMOS transistor MN5And a sixth NMOS transistor MN6The source electrodes of the transistors are all connected with gnd;
third MOS transistor MN3The grid electrode and the drain electrode are connected; fourth NMOS transistor MN4Is connected to the input terminal of inverter inv 1; fifth NMOS transistor MN5Is connected to the input terminal of inverter inv 2; sixth NMOS transistor MN6Is connected to the input terminal of inverter inv 3;
the input end of the inverter inv1 is also respectively connected with the input end of the amplifier A1 and the upper polar plate of the capacitor C3, and the output end of the inverter inv1 is respectively connected with the upper polar plate of the capacitor C1 and the input end of the inverter inv 2; the output end of the inverter inv2 is respectively connected with the upper plate of the capacitor C2 and the input end of the inverter inv 3; the output end of the inverter inv3 is respectively connected with the upper plate of the capacitor C3 and the input end of the inverter inv 4; the output end of the inverter inv4 is connected with a transmission gate T2 controlled by a state machine, and the transmission gate T2 outputs a signal Xp(ii) a The output end of the amplifier A1 is connected with a transmission gate T1 controlled by a state machine, and the transmission gate T1 outputs a signal Xm(ii) a The lower pole plates of the capacitor C1, the capacitor C2 and the capacitor C3 are all connected with gnd; the state machine outputs an enable signal ENinjControlling the on-off of transmission gates T1 and T2;
output clock signal clk for a Gaussian dither injection oscillatorinjAn input port to a state machine; output signal X of Gaussian dither injection oscillatormAnd XpTo the input port of the crystal oscillator, while outputting a signal XpTo the input port of the negative resistance boost module.
Preferably, leatherThe los oscillator includes: first PMOS transistor Mp1Has a source connected to a power supply Vdd, a drain and a gate connected to an input signal ENp, a gate and a resistor RfiltOne end of the two ends are connected; resistance RfiltThe other end of each of the first and second capacitors is connected to a capacitor CflitAnd a second PMOS transistor MP2The grid electrodes are connected; capacitor CflitThe other end of the switch is connected with a power supply VDD;
second PMOS transistor MP2Is connected with a power supply Vdd, a drain electrode and a third PMOS transistor MP3The source electrodes of the first and second transistors are connected; third PMOS transistor MP3Respectively with a resistor RfbOne terminal of (1), 9 bit capacitor array CtuneAnd a first NMOS transistor MN1The grid electrodes are connected; third PMOS transistor MP3Respectively with a resistor RfbAnother end of the 9-bit capacitor array CtuneAnd the other end of the first NMOS transistor MN1Is connected to the drain of the first NMOS transistor MN1The source of the transistor is connected with a power supply Vdd; third PMOS transistor MP3Drain output signal X ofmTo the input port of the crystal oscillator, the gate outputs a signal XpTo the input port of the crystal oscillator.
Preferably, the negative resistance boosting module is composed of one inverter unit.
Preferably, transmission gates are arranged between the input port and the output port of the negative resistance boosting and the crystal oscillator, and the state machine outputs an enable signal ENNRBAnd controlling the on-off of the transmission gate.
Has the advantages that: compared with the prior art, the invention has the following remarkable advantages: the invention adopts a Gaussian pulse injection oscillator with a tunable function to generate a Gaussian jitter injection signal, concentrates the energy of the injection signal on the resonance frequency of the crystal and simultaneously keeps the stability of frequency deviation between the injection signal and the crystal oscillator, and the negative resistance boosting module consisting of the phase inverter unit further reduces the starting time, and has the advantage of low power consumption on the premise of ensuring the quick start of the crystal oscillator.
Drawings
FIG. 1 is a schematic diagram of a crystal oscillator based on jitter injection and negative resistance boosting according to the present invention;
FIG. 2 is a circuit diagram of a Gaussian pulse injection oscillator of the present invention;
fig. 3 is a circuit diagram of the pierce oscillator of the present invention.
Detailed Description
The following description will explain embodiments of the present invention in further detail with reference to the accompanying drawings.
As shown in FIG. 1, the crystal oscillator based on jitter injection and negative resistance boosting designed by the invention comprises a Gaussian pulse injection oscillator, a negative resistance boosting module, a Pierce oscillator and a state machine (FSM), wherein input signals ENxo and ENp respectively act on the state machine (FSM) and the Pierce oscillator, and when the state machine receives a clock provided by the Gaussian pulse injection, the output end of the state machine generates ENinjAnd ENNRBAnd the output ends of the pierce oscillator, the Gaussian jitter injection module and the negative resistance boosting module are connected with the input end of the crystal oscillator through a transmission gate. The pierce oscillator realizes circuit filtering and reduces phase noise of the crystal oscillator; the negative resistance boosting module consists of an inverter unit.
As shown in fig. 2, the gaussian type pulse injection oscillator includes: fourth PMOS transistor Mp4Respectively with the fifth PMOS transistor Mp5Sixth PMOS transistor Mp6Seventh PMOS transistor Mp7Eighth PMOS transistor Mp8Is connected to the gate of a fourth PMOS transistor Mp4The fifth PMOS transistor Mp5Sixth PMOS transistor Mp6Seventh PMOS transistor Mp7Eighth PMOS transistor Mp8The sources of the two-way transistor are connected with a power supply Vdd;
fourth PMOS transistor Mp4Is connected to the gate and to the second NMOS transistor MN2Is controlled by a 10-bit frequency tuning word generated by a state machine;
fifth PMOS transistor Mp5And the third NMOS transistor MN3The drain electrodes of the first and second transistors are connected; sixth PMOSTransistor Mp6Is connected to the input of inverter inv 1; seventh PMOS transistor Mp7Is connected to the input of inverter inv 2; eighth PMOS transistor Mp8Is connected to the input of inverter inv 3;
third NMOS transistor MN3Respectively with the fourth NMOS transistor MN4The fifth NMOS transistor MN5And a sixth NMOS transistor MN6Is connected to the gate of the third NMOS transistor MN3A fourth NMOS transistor MN4The fifth NMOS transistor MN5And a sixth NMOS transistor MN6The source electrodes of the transistors are all connected with gnd;
third MOS transistor MN3The grid electrode and the drain electrode are connected; fourth NMOS transistor MN4Is connected to the input terminal of inverter inv 1; fifth NMOS transistor MN5Is connected to the input terminal of inverter inv 2; sixth NMOS transistor MN6Is connected to the input terminal of inverter inv 3;
the input end of the inverter inv1 is also respectively connected with the input end of the amplifier A1 and the upper polar plate of the capacitor C3, and the output end of the inverter inv1 is respectively connected with the upper polar plate of the capacitor C1 and the input end of the inverter inv 2; the output end of the inverter inv2 is respectively connected with the upper plate of the capacitor C2 and the input end of the inverter inv 3; the output end of the inverter inv3 is respectively connected with the upper plate of the capacitor C3 and the input end of the inverter inv 4; the output end of the inverter inv4 is connected with a transmission gate T2 controlled by a state machine, and the transmission gate T2 outputs a signal Xp(ii) a The output end of the amplifier A1 is connected with a transmission gate T1 controlled by a state machine, and the transmission gate T1 outputs a signal Xm(ii) a The lower pole plates of the capacitor C1, the capacitor C2 and the capacitor C3 are all connected with gnd; the state machine outputs an enable signal ENinjControlling the on-off of transmission gates T1 and T2;
output clock signal clk for a Gaussian dither injection oscillatorinjAn input port to a state machine; output signal X of Gaussian dither injection oscillatormAnd XpTo the input port of the crystal oscillator, while outputting a signal XpTo the input port of the negative resistance boost module.
As shown in figure 3 of the drawings,the pierce oscillator includes: first PMOS transistor Mp1Has a source connected to a power supply Vdd, a drain and a gate connected to an input signal ENp, a gate and a resistor RfiltOne end of the two ends are connected; resistance RfiltThe other end of each of the first and second capacitors is connected to a capacitor CflitAnd a second PMOS transistor MP2The grid electrodes are connected; capacitor CflitThe other end of the switch is connected with a power supply VDD;
second PMOS transistor MP2Is connected with a power supply Vdd, a drain electrode and a third PMOS transistor MP3The source electrodes of the first and second transistors are connected; third PMOS transistor MP3Respectively with a resistor RfbOne terminal of (1), 9 bit capacitor array CtuneAnd a first NMOS transistor MN1The grid electrodes are connected; third PMOS transistor MP3Respectively with a resistor RfbAnother end of the 9-bit capacitor array CtuneAnd the other end of the first NMOS transistor MN1Is connected to the drain of the first NMOS transistor MN1The source of the transistor is connected with a power supply Vdd; third PMOS transistor MP3Drain output signal X ofmTo the input port of the crystal oscillator, the gate outputs a signal XpTo the input port of the crystal oscillator.
Claims (5)
1. A crystal oscillator based on jitter injection and negative resistance boosting is characterized by comprising a Gaussian pulse injection oscillator, a Pierce oscillator, a negative resistance boosting module and a state machine FSM (finite state machine), wherein the Gaussian pulse injection oscillator outputs a clock signal to the state machine, an output enabling signal of the state machine respectively activates the Gaussian pulse injection oscillator and the negative resistance boosting module, input signals are respectively connected into the state machine FSM and the Pierce oscillator, the state machine generates a frequency tuning word for adjusting the oscillation frequency of the Gaussian pulse injection oscillator, the oscillation frequency is concentrated on the resonance frequency of the crystal oscillator, and the Gaussian pulse injection oscillator and the Pierce oscillator output oscillation starting signals to the crystal oscillator.
2. The crystal oscillator based on jitter injection and negative resistance boosting according to claim 1, wherein the Gaussian pulse injection oscillator comprises:
fourth PMOS transistor Mp4Respectively with the fifth PMOS transistor Mp5Sixth PMOS transistor Mp6Seventh PMOS transistor Mp7Eighth PMOS transistor Mp8Is connected to the gate of the fourth PMOS transistor Mp4The fifth PMOS transistor Mp5Sixth PMOS transistor Mp6Seventh PMOS transistor Mp7Eighth PMOS transistor Mp8The sources of the two-way transistor are connected with a power supply Vdd;
the fourth PMOS transistor Mp4Is connected to the gate and to the second NMOS transistor MN2Is controlled by a 10-bit frequency tuning word generated by a state machine;
the fifth PMOS transistor Mp5And the third NMOS transistor MN3The drain electrodes of the first and second transistors are connected; the sixth PMOS transistor Mp6Is connected to the input of inverter inv 1; the seventh PMOS transistor Mp7Is connected to the input of inverter inv 2; the eighth PMOS transistor Mp8Is connected to the input of inverter inv 3;
the third NMOS transistor MN3Respectively with the fourth NMOS transistor MN4The fifth NMOS transistor MN5And a sixth NMOS transistor MN6Is connected to the gate of the third NMOS transistor MN3A fourth NMOS transistor MN4The fifth NMOS transistor MN5And a sixth NMOS transistor MN6The source electrodes of the transistors are all connected with gnd;
the third MOS transistor MN3The grid electrode and the drain electrode are connected; the fourth NMOS transistor MN4Is connected to the input terminal of inverter inv 1; the fifth NMOS transistor MN5Is connected to the input terminal of inverter inv 2; the sixth NMOS transistor MN6Is connected to the input terminal of inverter inv 3;
the input end of the phase inverter inv1 is also respectively connected with the input end of the amplifier A1 and the upper plate of the capacitor C3, and the output end of the phase inverter inv1 is respectively connected with the capacitorThe upper polar plate of the capacitor C1 is connected with the input end of the inverter inv 2; the output end of the inverter inv2 is respectively connected with the upper plate of the capacitor C2 and the input end of the inverter inv 3; the output end of the inverter inv3 is respectively connected with the upper plate of the capacitor C3 and the input end of the inverter inv 4; the output end of the inverter inv4 is connected with the transmission gate T2 controlled by the state machine, and the transmission gate T2 outputs a signal Xp(ii) a The output end of the amplifier A1 is connected with the transmission gate T1 controlled by the state machine, and the transmission gate T1 outputs a signal Xm(ii) a The lower pole plates of the capacitor C1, the capacitor C2 and the capacitor C3 are all connected with gnd; the state machine outputs an enable signal ENinjControlling the on-off of the transmission gates T1 and T2;
an output clock signal clk of the Gaussian dither injection oscillatorinjAn input port to the state machine; the output signal X of the Gaussian dither injection oscillatormAnd XpTo the input port of the crystal oscillator, while outputting a signal XpTo the input port of the negative resistance boost module.
3. A crystal oscillator based on jitter injection and negative resistance boosting according to claim 1, wherein said pierce oscillator comprises:
first PMOS transistor Mp1Has a source connected to a power supply Vdd, a drain and a gate connected to an input signal ENp, a gate and a resistor RfiltOne end of the two ends are connected; the resistor RfiltThe other end of each of the first and second capacitors is connected to a capacitor CflitAnd a second PMOS transistor MP2The grid electrodes are connected; the capacitor CflitThe other end of the switch is connected with a power supply VDD;
the second PMOS transistor MP2Is connected with a power supply Vdd, a drain electrode and a third PMOS transistor MP3The source electrodes of the first and second transistors are connected; the third PMOS transistor MP3Respectively with a resistor RfbOne terminal of (1), 9 bit capacitor array CtuneAnd a first NMOS transistor MN1The grid electrodes are connected; the third PMOS transistor MP3Respectively with the resistor RfbAnother end of the 9-bit capacitor arrayCtuneAnd the other end of the first NMOS transistor MN1Is connected to the drain of the first NMOS transistor MN1The source of the transistor is connected with a power supply Vdd; the third PMOS transistor MP3Drain output signal X ofmTo the input port of the crystal oscillator, the gate outputs a signal XpTo the input port of the crystal oscillator.
4. A crystal oscillator based on jitter injection and negative resistance boosting according to claim 1, wherein: the negative resistance boosting module is composed of an inverter unit.
5. The crystal oscillator based on jitter injection and negative resistance boosting as claimed in claim 4, wherein: the negative resistance is provided with a transmission gate between the input port and the output port of the negative resistance boosting and the crystal oscillator, and the state machine outputs an enable signal ENNRBAnd controlling the on-off of the transmission gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110203722.7A CN112994683A (en) | 2021-02-24 | 2021-02-24 | Crystal oscillator based on jitter injection and negative resistance boosting |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110203722.7A CN112994683A (en) | 2021-02-24 | 2021-02-24 | Crystal oscillator based on jitter injection and negative resistance boosting |
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| Publication Number | Publication Date |
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| CN112994683A true CN112994683A (en) | 2021-06-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202110203722.7A Withdrawn CN112994683A (en) | 2021-02-24 | 2021-02-24 | Crystal oscillator based on jitter injection and negative resistance boosting |
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| CN (1) | CN112994683A (en) |
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2021
- 2021-02-24 CN CN202110203722.7A patent/CN112994683A/en not_active Withdrawn
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Application publication date: 20210618 |
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